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authorJean Pihet <j-pihet@ti.com>2010-12-18 10:44:46 -0500
committerKevin Hilman <khilman@deeprootsystems.com>2010-12-21 17:45:59 -0500
commit8352129166b8270253a746f336a4429b349b023d (patch)
tree6e1a83e571d357b30ab15878b9ebcf8da21c0c62 /arch/arm/mach-omap2/pm34xx.c
parentf7dfe3d8a98b7c4869c09826e3a65663cb9c71be (diff)
OMAP3: add comments for low power code errata
Errata covered: - 1.157 & 1.185 - i443 - i581 Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
-rw-r--r--arch/arm/mach-omap2/pm34xx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a81ed251e667..c45b4fa1deeb 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -146,7 +146,7 @@ static void omap3_core_save_context(void)
146 146
147 /* 147 /*
148 * Force write last pad into memory, as this can fail in some 148 * Force write last pad into memory, as this can fail in some
149 * cases according to erratas 1.157, 1.185 149 * cases according to errata 1.157, 1.185
150 */ 150 */
151 omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14), 151 omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14),
152 OMAP343X_CONTROL_MEM_WKUP + 0x2a0); 152 OMAP343X_CONTROL_MEM_WKUP + 0x2a0);
@@ -433,7 +433,7 @@ void omap_sram_idle(void)
433 /* 433 /*
434 * On EMU/HS devices ROM code restores a SRDC value 434 * On EMU/HS devices ROM code restores a SRDC value
435 * from scratchpad which has automatic self refresh on timeout 435 * from scratchpad which has automatic self refresh on timeout
436 * of AUTO_CNT = 1 enabled. This takes care of errata 1.142. 436 * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
437 * Hence store/restore the SDRC_POWER register here. 437 * Hence store/restore the SDRC_POWER register here.
438 */ 438 */
439 if (omap_rev() >= OMAP3430_REV_ES3_0 && 439 if (omap_rev() >= OMAP3430_REV_ES3_0 &&