diff options
author | Thara Gopinath <thara@ti.com> | 2010-05-29 12:32:24 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-12-22 17:31:38 -0500 |
commit | d34427267186827dfd62bd8cf726601fffb22534 (patch) | |
tree | 22e170c0d538cd7dd2918aa030f5e8114a7cd259 /arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |
parent | 0c0a5d61ed9319e7e666990a7888f3b00868ac20 (diff) |
OMAP3: PM: Adding smartreflex hwmod data
This patch adds the smartreflex hwmod data for OMAP3430
and OMAP3630.
Signed-off-by: Thara Gopinath <thara@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_3xxx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 175 |
1 files changed, 175 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 89a943e9459c..8d8181334f86 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <plat/l4_3xxx.h> | 21 | #include <plat/l4_3xxx.h> |
22 | #include <plat/i2c.h> | 22 | #include <plat/i2c.h> |
23 | #include <plat/gpio.h> | 23 | #include <plat/gpio.h> |
24 | #include <plat/smartreflex.h> | ||
24 | 25 | ||
25 | #include "omap_hwmod_common_data.h" | 26 | #include "omap_hwmod_common_data.h" |
26 | 27 | ||
@@ -52,6 +53,8 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod; | |||
52 | static struct omap_hwmod omap3xxx_gpio4_hwmod; | 53 | static struct omap_hwmod omap3xxx_gpio4_hwmod; |
53 | static struct omap_hwmod omap3xxx_gpio5_hwmod; | 54 | static struct omap_hwmod omap3xxx_gpio5_hwmod; |
54 | static struct omap_hwmod omap3xxx_gpio6_hwmod; | 55 | static struct omap_hwmod omap3xxx_gpio6_hwmod; |
56 | static struct omap_hwmod omap34xx_sr1_hwmod; | ||
57 | static struct omap_hwmod omap34xx_sr2_hwmod; | ||
55 | 58 | ||
56 | static struct omap_hwmod omap3xxx_dma_system_hwmod; | 59 | static struct omap_hwmod omap3xxx_dma_system_hwmod; |
57 | 60 | ||
@@ -262,9 +265,47 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { | |||
262 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 265 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
263 | }; | 266 | }; |
264 | 267 | ||
268 | /* L4 CORE -> SR1 interface */ | ||
269 | static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { | ||
270 | { | ||
271 | .pa_start = OMAP34XX_SR1_BASE, | ||
272 | .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, | ||
273 | .flags = ADDR_TYPE_RT, | ||
274 | }, | ||
275 | }; | ||
276 | |||
277 | static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { | ||
278 | .master = &omap3xxx_l4_core_hwmod, | ||
279 | .slave = &omap34xx_sr1_hwmod, | ||
280 | .clk = "sr_l4_ick", | ||
281 | .addr = omap3_sr1_addr_space, | ||
282 | .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), | ||
283 | .user = OCP_USER_MPU, | ||
284 | }; | ||
285 | |||
286 | /* L4 CORE -> SR1 interface */ | ||
287 | static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { | ||
288 | { | ||
289 | .pa_start = OMAP34XX_SR2_BASE, | ||
290 | .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, | ||
291 | .flags = ADDR_TYPE_RT, | ||
292 | }, | ||
293 | }; | ||
294 | |||
295 | static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { | ||
296 | .master = &omap3xxx_l4_core_hwmod, | ||
297 | .slave = &omap34xx_sr2_hwmod, | ||
298 | .clk = "sr_l4_ick", | ||
299 | .addr = omap3_sr2_addr_space, | ||
300 | .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space), | ||
301 | .user = OCP_USER_MPU, | ||
302 | }; | ||
303 | |||
265 | /* Slave interfaces on the L4_CORE interconnect */ | 304 | /* Slave interfaces on the L4_CORE interconnect */ |
266 | static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = { | 305 | static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = { |
267 | &omap3xxx_l3_main__l4_core, | 306 | &omap3xxx_l3_main__l4_core, |
307 | &omap3_l4_core__sr1, | ||
308 | &omap3_l4_core__sr2, | ||
268 | }; | 309 | }; |
269 | 310 | ||
270 | /* Master interfaces on the L4_CORE interconnect */ | 311 | /* Master interfaces on the L4_CORE interconnect */ |
@@ -1186,6 +1227,135 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = { | |||
1186 | .flags = HWMOD_NO_IDLEST, | 1227 | .flags = HWMOD_NO_IDLEST, |
1187 | }; | 1228 | }; |
1188 | 1229 | ||
1230 | /* SR common */ | ||
1231 | static struct omap_hwmod_sysc_fields omap34xx_sr_sysc_fields = { | ||
1232 | .clkact_shift = 20, | ||
1233 | }; | ||
1234 | |||
1235 | static struct omap_hwmod_class_sysconfig omap34xx_sr_sysc = { | ||
1236 | .sysc_offs = 0x24, | ||
1237 | .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_NO_CACHE), | ||
1238 | .clockact = CLOCKACT_TEST_ICLK, | ||
1239 | .sysc_fields = &omap34xx_sr_sysc_fields, | ||
1240 | }; | ||
1241 | |||
1242 | static struct omap_hwmod_class omap34xx_smartreflex_hwmod_class = { | ||
1243 | .name = "smartreflex", | ||
1244 | .sysc = &omap34xx_sr_sysc, | ||
1245 | .rev = 1, | ||
1246 | }; | ||
1247 | |||
1248 | static struct omap_hwmod_sysc_fields omap36xx_sr_sysc_fields = { | ||
1249 | .sidle_shift = 24, | ||
1250 | .enwkup_shift = 26 | ||
1251 | }; | ||
1252 | |||
1253 | static struct omap_hwmod_class_sysconfig omap36xx_sr_sysc = { | ||
1254 | .sysc_offs = 0x38, | ||
1255 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
1256 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP | | ||
1257 | SYSC_NO_CACHE), | ||
1258 | .sysc_fields = &omap36xx_sr_sysc_fields, | ||
1259 | }; | ||
1260 | |||
1261 | static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = { | ||
1262 | .name = "smartreflex", | ||
1263 | .sysc = &omap36xx_sr_sysc, | ||
1264 | .rev = 2, | ||
1265 | }; | ||
1266 | |||
1267 | /* SR1 */ | ||
1268 | static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = { | ||
1269 | &omap3_l4_core__sr1, | ||
1270 | }; | ||
1271 | |||
1272 | static struct omap_hwmod omap34xx_sr1_hwmod = { | ||
1273 | .name = "sr1_hwmod", | ||
1274 | .class = &omap34xx_smartreflex_hwmod_class, | ||
1275 | .main_clk = "sr1_fck", | ||
1276 | .vdd_name = "mpu", | ||
1277 | .prcm = { | ||
1278 | .omap2 = { | ||
1279 | .prcm_reg_id = 1, | ||
1280 | .module_bit = OMAP3430_EN_SR1_SHIFT, | ||
1281 | .module_offs = WKUP_MOD, | ||
1282 | .idlest_reg_id = 1, | ||
1283 | .idlest_idle_bit = OMAP3430_EN_SR1_SHIFT, | ||
1284 | }, | ||
1285 | }, | ||
1286 | .slaves = omap3_sr1_slaves, | ||
1287 | .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), | ||
1288 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 | | ||
1289 | CHIP_IS_OMAP3430ES3_0 | | ||
1290 | CHIP_IS_OMAP3430ES3_1), | ||
1291 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
1292 | }; | ||
1293 | |||
1294 | static struct omap_hwmod omap36xx_sr1_hwmod = { | ||
1295 | .name = "sr1_hwmod", | ||
1296 | .class = &omap36xx_smartreflex_hwmod_class, | ||
1297 | .main_clk = "sr1_fck", | ||
1298 | .vdd_name = "mpu", | ||
1299 | .prcm = { | ||
1300 | .omap2 = { | ||
1301 | .prcm_reg_id = 1, | ||
1302 | .module_bit = OMAP3430_EN_SR1_SHIFT, | ||
1303 | .module_offs = WKUP_MOD, | ||
1304 | .idlest_reg_id = 1, | ||
1305 | .idlest_idle_bit = OMAP3430_EN_SR1_SHIFT, | ||
1306 | }, | ||
1307 | }, | ||
1308 | .slaves = omap3_sr1_slaves, | ||
1309 | .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), | ||
1310 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), | ||
1311 | }; | ||
1312 | |||
1313 | /* SR2 */ | ||
1314 | static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = { | ||
1315 | &omap3_l4_core__sr2, | ||
1316 | }; | ||
1317 | |||
1318 | static struct omap_hwmod omap34xx_sr2_hwmod = { | ||
1319 | .name = "sr2_hwmod", | ||
1320 | .class = &omap34xx_smartreflex_hwmod_class, | ||
1321 | .main_clk = "sr2_fck", | ||
1322 | .vdd_name = "core", | ||
1323 | .prcm = { | ||
1324 | .omap2 = { | ||
1325 | .prcm_reg_id = 1, | ||
1326 | .module_bit = OMAP3430_EN_SR2_SHIFT, | ||
1327 | .module_offs = WKUP_MOD, | ||
1328 | .idlest_reg_id = 1, | ||
1329 | .idlest_idle_bit = OMAP3430_EN_SR2_SHIFT, | ||
1330 | }, | ||
1331 | }, | ||
1332 | .slaves = omap3_sr2_slaves, | ||
1333 | .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), | ||
1334 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 | | ||
1335 | CHIP_IS_OMAP3430ES3_0 | | ||
1336 | CHIP_IS_OMAP3430ES3_1), | ||
1337 | .flags = HWMOD_SET_DEFAULT_CLOCKACT, | ||
1338 | }; | ||
1339 | |||
1340 | static struct omap_hwmod omap36xx_sr2_hwmod = { | ||
1341 | .name = "sr2_hwmod", | ||
1342 | .class = &omap36xx_smartreflex_hwmod_class, | ||
1343 | .main_clk = "sr2_fck", | ||
1344 | .vdd_name = "core", | ||
1345 | .prcm = { | ||
1346 | .omap2 = { | ||
1347 | .prcm_reg_id = 1, | ||
1348 | .module_bit = OMAP3430_EN_SR2_SHIFT, | ||
1349 | .module_offs = WKUP_MOD, | ||
1350 | .idlest_reg_id = 1, | ||
1351 | .idlest_idle_bit = OMAP3430_EN_SR2_SHIFT, | ||
1352 | }, | ||
1353 | }, | ||
1354 | .slaves = omap3_sr2_slaves, | ||
1355 | .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), | ||
1356 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), | ||
1357 | }; | ||
1358 | |||
1189 | static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { | 1359 | static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { |
1190 | &omap3xxx_l3_main_hwmod, | 1360 | &omap3xxx_l3_main_hwmod, |
1191 | &omap3xxx_l4_core_hwmod, | 1361 | &omap3xxx_l4_core_hwmod, |
@@ -1201,6 +1371,11 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { | |||
1201 | &omap3xxx_i2c1_hwmod, | 1371 | &omap3xxx_i2c1_hwmod, |
1202 | &omap3xxx_i2c2_hwmod, | 1372 | &omap3xxx_i2c2_hwmod, |
1203 | &omap3xxx_i2c3_hwmod, | 1373 | &omap3xxx_i2c3_hwmod, |
1374 | &omap34xx_sr1_hwmod, | ||
1375 | &omap34xx_sr2_hwmod, | ||
1376 | &omap36xx_sr1_hwmod, | ||
1377 | &omap36xx_sr2_hwmod, | ||
1378 | |||
1204 | 1379 | ||
1205 | /* gpio class */ | 1380 | /* gpio class */ |
1206 | &omap3xxx_gpio1_hwmod, | 1381 | &omap3xxx_gpio1_hwmod, |