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authorPaul Walmsley <paul@pwsan.com>2011-07-09 21:14:08 -0400
committerPaul Walmsley <paul@pwsan.com>2011-07-09 21:14:08 -0400
commit273b9465bc68d4f4bcdedc34411b231e26b48416 (patch)
tree48715a8535f1676b4dda99c6dac17b255dd7fa89 /arch/arm/mach-omap2/omap_hwmod_2430_data.c
parentd826ebfa49aeb8a8f4d216165e5e00826741ad9c (diff)
omap_hwmod: share identical omap_hwmod_class, omap_hwmod_class_sysconfig arrays
To reduce kernel source file data duplication, share struct omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx and 3xxx hwmod data files. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2430_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c273
1 files changed, 33 insertions, 240 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 639acd598c92..2a52f025bd06 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -347,24 +347,6 @@ static struct omap_hwmod omap2430_iva_hwmod = {
347 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 347 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
348}; 348};
349 349
350/* Timer Common */
351static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = {
352 .rev_offs = 0x0000,
353 .sysc_offs = 0x0010,
354 .syss_offs = 0x0014,
355 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
356 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
357 SYSC_HAS_AUTOIDLE),
358 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
359 .sysc_fields = &omap_hwmod_sysc_type1,
360};
361
362static struct omap_hwmod_class omap2430_timer_hwmod_class = {
363 .name = "timer",
364 .sysc = &omap2430_timer_sysc,
365 .rev = OMAP_TIMER_IP_VERSION_1,
366};
367
368/* timer1 */ 350/* timer1 */
369static struct omap_hwmod omap2430_timer1_hwmod; 351static struct omap_hwmod omap2430_timer1_hwmod;
370 352
@@ -407,7 +389,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
407 }, 389 },
408 .slaves = omap2430_timer1_slaves, 390 .slaves = omap2430_timer1_slaves,
409 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), 391 .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves),
410 .class = &omap2430_timer_hwmod_class, 392 .class = &omap2xxx_timer_hwmod_class,
411 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 393 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
412}; 394};
413 395
@@ -444,7 +426,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
444 }, 426 },
445 .slaves = omap2430_timer2_slaves, 427 .slaves = omap2430_timer2_slaves,
446 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), 428 .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves),
447 .class = &omap2430_timer_hwmod_class, 429 .class = &omap2xxx_timer_hwmod_class,
448 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 430 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
449}; 431};
450 432
@@ -481,7 +463,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
481 }, 463 },
482 .slaves = omap2430_timer3_slaves, 464 .slaves = omap2430_timer3_slaves,
483 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), 465 .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves),
484 .class = &omap2430_timer_hwmod_class, 466 .class = &omap2xxx_timer_hwmod_class,
485 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 467 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
486}; 468};
487 469
@@ -518,7 +500,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
518 }, 500 },
519 .slaves = omap2430_timer4_slaves, 501 .slaves = omap2430_timer4_slaves,
520 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), 502 .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves),
521 .class = &omap2430_timer_hwmod_class, 503 .class = &omap2xxx_timer_hwmod_class,
522 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 504 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
523}; 505};
524 506
@@ -555,7 +537,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
555 }, 537 },
556 .slaves = omap2430_timer5_slaves, 538 .slaves = omap2430_timer5_slaves,
557 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), 539 .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves),
558 .class = &omap2430_timer_hwmod_class, 540 .class = &omap2xxx_timer_hwmod_class,
559 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 541 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
560}; 542};
561 543
@@ -592,7 +574,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
592 }, 574 },
593 .slaves = omap2430_timer6_slaves, 575 .slaves = omap2430_timer6_slaves,
594 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), 576 .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves),
595 .class = &omap2430_timer_hwmod_class, 577 .class = &omap2xxx_timer_hwmod_class,
596 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 578 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
597}; 579};
598 580
@@ -629,7 +611,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
629 }, 611 },
630 .slaves = omap2430_timer7_slaves, 612 .slaves = omap2430_timer7_slaves,
631 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), 613 .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves),
632 .class = &omap2430_timer_hwmod_class, 614 .class = &omap2xxx_timer_hwmod_class,
633 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 615 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
634}; 616};
635 617
@@ -666,7 +648,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
666 }, 648 },
667 .slaves = omap2430_timer8_slaves, 649 .slaves = omap2430_timer8_slaves,
668 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), 650 .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves),
669 .class = &omap2430_timer_hwmod_class, 651 .class = &omap2xxx_timer_hwmod_class,
670 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 652 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
671}; 653};
672 654
@@ -703,7 +685,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
703 }, 685 },
704 .slaves = omap2430_timer9_slaves, 686 .slaves = omap2430_timer9_slaves,
705 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), 687 .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves),
706 .class = &omap2430_timer_hwmod_class, 688 .class = &omap2xxx_timer_hwmod_class,
707 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 689 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
708}; 690};
709 691
@@ -740,7 +722,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
740 }, 722 },
741 .slaves = omap2430_timer10_slaves, 723 .slaves = omap2430_timer10_slaves,
742 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), 724 .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves),
743 .class = &omap2430_timer_hwmod_class, 725 .class = &omap2xxx_timer_hwmod_class,
744 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 726 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
745}; 727};
746 728
@@ -777,7 +759,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
777 }, 759 },
778 .slaves = omap2430_timer11_slaves, 760 .slaves = omap2430_timer11_slaves,
779 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), 761 .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves),
780 .class = &omap2430_timer_hwmod_class, 762 .class = &omap2xxx_timer_hwmod_class,
781 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 763 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
782}; 764};
783 765
@@ -814,7 +796,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = {
814 }, 796 },
815 .slaves = omap2430_timer12_slaves, 797 .slaves = omap2430_timer12_slaves,
816 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), 798 .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves),
817 .class = &omap2430_timer_hwmod_class, 799 .class = &omap2xxx_timer_hwmod_class,
818 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 800 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
819}; 801};
820 802
@@ -836,27 +818,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
836 .user = OCP_USER_MPU | OCP_USER_SDMA, 818 .user = OCP_USER_MPU | OCP_USER_SDMA,
837}; 819};
838 820
839/*
840 * 'wd_timer' class
841 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
842 * overflow condition
843 */
844
845static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = {
846 .rev_offs = 0x0,
847 .sysc_offs = 0x0010,
848 .syss_offs = 0x0014,
849 .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
850 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
851 .sysc_fields = &omap_hwmod_sysc_type1,
852};
853
854static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = {
855 .name = "wd_timer",
856 .sysc = &omap2430_wd_timer_sysc,
857 .pre_shutdown = &omap2_wd_timer_disable
858};
859
860/* wd_timer2 */ 821/* wd_timer2 */
861static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { 822static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
862 &omap2430_l4_wkup__wd_timer2, 823 &omap2430_l4_wkup__wd_timer2,
@@ -864,7 +825,7 @@ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = {
864 825
865static struct omap_hwmod omap2430_wd_timer2_hwmod = { 826static struct omap_hwmod omap2430_wd_timer2_hwmod = {
866 .name = "wd_timer2", 827 .name = "wd_timer2",
867 .class = &omap2430_wd_timer_hwmod_class, 828 .class = &omap2xxx_wd_timer_hwmod_class,
868 .main_clk = "mpu_wdt_fck", 829 .main_clk = "mpu_wdt_fck",
869 .prcm = { 830 .prcm = {
870 .omap2 = { 831 .omap2 = {
@@ -880,24 +841,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = {
880 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 841 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
881}; 842};
882 843
883/* UART */
884
885static struct omap_hwmod_class_sysconfig uart_sysc = {
886 .rev_offs = 0x50,
887 .sysc_offs = 0x54,
888 .syss_offs = 0x58,
889 .sysc_flags = (SYSC_HAS_SIDLEMODE |
890 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
891 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
892 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
893 .sysc_fields = &omap_hwmod_sysc_type1,
894};
895
896static struct omap_hwmod_class uart_class = {
897 .name = "uart",
898 .sysc = &uart_sysc,
899};
900
901/* UART1 */ 844/* UART1 */
902 845
903static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { 846static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
@@ -920,7 +863,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
920 }, 863 },
921 .slaves = omap2430_uart1_slaves, 864 .slaves = omap2430_uart1_slaves,
922 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), 865 .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves),
923 .class = &uart_class, 866 .class = &omap2_uart_class,
924 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 867 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
925}; 868};
926 869
@@ -946,7 +889,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
946 }, 889 },
947 .slaves = omap2430_uart2_slaves, 890 .slaves = omap2430_uart2_slaves,
948 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), 891 .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves),
949 .class = &uart_class, 892 .class = &omap2_uart_class,
950 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 893 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
951}; 894};
952 895
@@ -972,28 +915,10 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
972 }, 915 },
973 .slaves = omap2430_uart3_slaves, 916 .slaves = omap2430_uart3_slaves,
974 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), 917 .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves),
975 .class = &uart_class, 918 .class = &omap2_uart_class,
976 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 919 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
977}; 920};
978 921
979/*
980 * 'dss' class
981 * display sub-system
982 */
983
984static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = {
985 .rev_offs = 0x0000,
986 .sysc_offs = 0x0010,
987 .syss_offs = 0x0014,
988 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
989 .sysc_fields = &omap_hwmod_sysc_type1,
990};
991
992static struct omap_hwmod_class omap2430_dss_hwmod_class = {
993 .name = "dss",
994 .sysc = &omap2430_dss_sysc,
995};
996
997/* dss */ 922/* dss */
998/* dss master ports */ 923/* dss master ports */
999static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { 924static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = {
@@ -1021,7 +946,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
1021 946
1022static struct omap_hwmod omap2430_dss_core_hwmod = { 947static struct omap_hwmod omap2430_dss_core_hwmod = {
1023 .name = "dss_core", 948 .name = "dss_core",
1024 .class = &omap2430_dss_hwmod_class, 949 .class = &omap2_dss_hwmod_class,
1025 .main_clk = "dss1_fck", /* instead of dss_fck */ 950 .main_clk = "dss1_fck", /* instead of dss_fck */
1026 .sdma_reqs = omap2xxx_dss_sdma_chs, 951 .sdma_reqs = omap2xxx_dss_sdma_chs,
1027 .prcm = { 952 .prcm = {
@@ -1043,27 +968,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
1043 .flags = HWMOD_NO_IDLEST, 968 .flags = HWMOD_NO_IDLEST,
1044}; 969};
1045 970
1046/*
1047 * 'dispc' class
1048 * display controller
1049 */
1050
1051static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = {
1052 .rev_offs = 0x0000,
1053 .sysc_offs = 0x0010,
1054 .syss_offs = 0x0014,
1055 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
1056 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1057 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1058 MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1059 .sysc_fields = &omap_hwmod_sysc_type1,
1060};
1061
1062static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
1063 .name = "dispc",
1064 .sysc = &omap2430_dispc_sysc,
1065};
1066
1067/* l4_core -> dss_dispc */ 971/* l4_core -> dss_dispc */
1068static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { 972static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = {
1069 .master = &omap2430_l4_core_hwmod, 973 .master = &omap2430_l4_core_hwmod,
@@ -1080,7 +984,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = {
1080 984
1081static struct omap_hwmod omap2430_dss_dispc_hwmod = { 985static struct omap_hwmod omap2430_dss_dispc_hwmod = {
1082 .name = "dss_dispc", 986 .name = "dss_dispc",
1083 .class = &omap2430_dispc_hwmod_class, 987 .class = &omap2_dispc_hwmod_class,
1084 .mpu_irqs = omap2_dispc_irqs, 988 .mpu_irqs = omap2_dispc_irqs,
1085 .main_clk = "dss1_fck", 989 .main_clk = "dss1_fck",
1086 .prcm = { 990 .prcm = {
@@ -1098,26 +1002,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
1098 .flags = HWMOD_NO_IDLEST, 1002 .flags = HWMOD_NO_IDLEST,
1099}; 1003};
1100 1004
1101/*
1102 * 'rfbi' class
1103 * remote frame buffer interface
1104 */
1105
1106static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = {
1107 .rev_offs = 0x0000,
1108 .sysc_offs = 0x0010,
1109 .syss_offs = 0x0014,
1110 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
1111 SYSC_HAS_AUTOIDLE),
1112 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1113 .sysc_fields = &omap_hwmod_sysc_type1,
1114};
1115
1116static struct omap_hwmod_class omap2430_rfbi_hwmod_class = {
1117 .name = "rfbi",
1118 .sysc = &omap2430_rfbi_sysc,
1119};
1120
1121/* l4_core -> dss_rfbi */ 1005/* l4_core -> dss_rfbi */
1122static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { 1006static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = {
1123 .master = &omap2430_l4_core_hwmod, 1007 .master = &omap2430_l4_core_hwmod,
@@ -1134,7 +1018,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
1134 1018
1135static struct omap_hwmod omap2430_dss_rfbi_hwmod = { 1019static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1136 .name = "dss_rfbi", 1020 .name = "dss_rfbi",
1137 .class = &omap2430_rfbi_hwmod_class, 1021 .class = &omap2_rfbi_hwmod_class,
1138 .main_clk = "dss1_fck", 1022 .main_clk = "dss1_fck",
1139 .prcm = { 1023 .prcm = {
1140 .omap2 = { 1024 .omap2 = {
@@ -1149,15 +1033,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
1149 .flags = HWMOD_NO_IDLEST, 1033 .flags = HWMOD_NO_IDLEST,
1150}; 1034};
1151 1035
1152/*
1153 * 'venc' class
1154 * video encoder
1155 */
1156
1157static struct omap_hwmod_class omap2430_venc_hwmod_class = {
1158 .name = "venc",
1159};
1160
1161/* l4_core -> dss_venc */ 1036/* l4_core -> dss_venc */
1162static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { 1037static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
1163 .master = &omap2430_l4_core_hwmod, 1038 .master = &omap2430_l4_core_hwmod,
@@ -1175,7 +1050,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
1175 1050
1176static struct omap_hwmod omap2430_dss_venc_hwmod = { 1051static struct omap_hwmod omap2430_dss_venc_hwmod = {
1177 .name = "dss_venc", 1052 .name = "dss_venc",
1178 .class = &omap2430_venc_hwmod_class, 1053 .class = &omap2_venc_hwmod_class,
1179 .main_clk = "dss1_fck", 1054 .main_clk = "dss1_fck",
1180 .prcm = { 1055 .prcm = {
1181 .omap2 = { 1056 .omap2 = {
@@ -1367,27 +1242,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
1367 .dbck_flag = false, 1242 .dbck_flag = false,
1368}; 1243};
1369 1244
1370static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = {
1371 .rev_offs = 0x0000,
1372 .sysc_offs = 0x0010,
1373 .syss_offs = 0x0014,
1374 .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
1375 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
1376 SYSS_HAS_RESET_STATUS),
1377 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1378 .sysc_fields = &omap_hwmod_sysc_type1,
1379};
1380
1381/*
1382 * 'gpio' class
1383 * general purpose io module
1384 */
1385static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
1386 .name = "gpio",
1387 .sysc = &omap243x_gpio_sysc,
1388 .rev = 0,
1389};
1390
1391/* gpio1 */ 1245/* gpio1 */
1392static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { 1246static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
1393 &omap2430_l4_wkup__gpio1, 1247 &omap2430_l4_wkup__gpio1,
@@ -1409,7 +1263,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
1409 }, 1263 },
1410 .slaves = omap2430_gpio1_slaves, 1264 .slaves = omap2430_gpio1_slaves,
1411 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), 1265 .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves),
1412 .class = &omap243x_gpio_hwmod_class, 1266 .class = &omap2xxx_gpio_hwmod_class,
1413 .dev_attr = &gpio_dev_attr, 1267 .dev_attr = &gpio_dev_attr,
1414 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1268 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1415}; 1269};
@@ -1435,7 +1289,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
1435 }, 1289 },
1436 .slaves = omap2430_gpio2_slaves, 1290 .slaves = omap2430_gpio2_slaves,
1437 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), 1291 .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves),
1438 .class = &omap243x_gpio_hwmod_class, 1292 .class = &omap2xxx_gpio_hwmod_class,
1439 .dev_attr = &gpio_dev_attr, 1293 .dev_attr = &gpio_dev_attr,
1440 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1294 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1441}; 1295};
@@ -1461,7 +1315,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
1461 }, 1315 },
1462 .slaves = omap2430_gpio3_slaves, 1316 .slaves = omap2430_gpio3_slaves,
1463 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), 1317 .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves),
1464 .class = &omap243x_gpio_hwmod_class, 1318 .class = &omap2xxx_gpio_hwmod_class,
1465 .dev_attr = &gpio_dev_attr, 1319 .dev_attr = &gpio_dev_attr,
1466 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1320 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1467}; 1321};
@@ -1487,7 +1341,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
1487 }, 1341 },
1488 .slaves = omap2430_gpio4_slaves, 1342 .slaves = omap2430_gpio4_slaves,
1489 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), 1343 .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves),
1490 .class = &omap243x_gpio_hwmod_class, 1344 .class = &omap2xxx_gpio_hwmod_class,
1491 .dev_attr = &gpio_dev_attr, 1345 .dev_attr = &gpio_dev_attr,
1492 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1346 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1493}; 1347};
@@ -1518,28 +1372,11 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
1518 }, 1372 },
1519 .slaves = omap2430_gpio5_slaves, 1373 .slaves = omap2430_gpio5_slaves,
1520 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), 1374 .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves),
1521 .class = &omap243x_gpio_hwmod_class, 1375 .class = &omap2xxx_gpio_hwmod_class,
1522 .dev_attr = &gpio_dev_attr, 1376 .dev_attr = &gpio_dev_attr,
1523 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1377 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1524}; 1378};
1525 1379
1526/* dma_system */
1527static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = {
1528 .rev_offs = 0x0000,
1529 .sysc_offs = 0x002c,
1530 .syss_offs = 0x0028,
1531 .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
1532 SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
1533 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1534 .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
1535 .sysc_fields = &omap_hwmod_sysc_type1,
1536};
1537
1538static struct omap_hwmod_class omap2430_dma_hwmod_class = {
1539 .name = "dma",
1540 .sysc = &omap2430_dma_sysc,
1541};
1542
1543/* dma attributes */ 1380/* dma attributes */
1544static struct omap_dma_dev_attr dma_dev_attr = { 1381static struct omap_dma_dev_attr dma_dev_attr = {
1545 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 1382 .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
@@ -1576,7 +1413,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = {
1576 1413
1577static struct omap_hwmod omap2430_dma_system_hwmod = { 1414static struct omap_hwmod omap2430_dma_system_hwmod = {
1578 .name = "dma", 1415 .name = "dma",
1579 .class = &omap2430_dma_hwmod_class, 1416 .class = &omap2xxx_dma_hwmod_class,
1580 .mpu_irqs = omap2_dma_system_irqs, 1417 .mpu_irqs = omap2_dma_system_irqs,
1581 .main_clk = "core_l3_ck", 1418 .main_clk = "core_l3_ck",
1582 .slaves = omap2430_dma_system_slaves, 1419 .slaves = omap2430_dma_system_slaves,
@@ -1588,27 +1425,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
1588 .flags = HWMOD_NO_IDLEST, 1425 .flags = HWMOD_NO_IDLEST,
1589}; 1426};
1590 1427
1591/*
1592 * 'mailbox' class
1593 * mailbox module allowing communication between the on-chip processors
1594 * using a queued mailbox-interrupt mechanism.
1595 */
1596
1597static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = {
1598 .rev_offs = 0x000,
1599 .sysc_offs = 0x010,
1600 .syss_offs = 0x014,
1601 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1602 SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
1603 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1604 .sysc_fields = &omap_hwmod_sysc_type1,
1605};
1606
1607static struct omap_hwmod_class omap2430_mailbox_hwmod_class = {
1608 .name = "mailbox",
1609 .sysc = &omap2430_mailbox_sysc,
1610};
1611
1612/* mailbox */ 1428/* mailbox */
1613static struct omap_hwmod omap2430_mailbox_hwmod; 1429static struct omap_hwmod omap2430_mailbox_hwmod;
1614static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { 1430static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
@@ -1631,7 +1447,7 @@ static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = {
1631 1447
1632static struct omap_hwmod omap2430_mailbox_hwmod = { 1448static struct omap_hwmod omap2430_mailbox_hwmod = {
1633 .name = "mailbox", 1449 .name = "mailbox",
1634 .class = &omap2430_mailbox_hwmod_class, 1450 .class = &omap2xxx_mailbox_hwmod_class,
1635 .mpu_irqs = omap2430_mailbox_irqs, 1451 .mpu_irqs = omap2430_mailbox_irqs,
1636 .main_clk = "mailboxes_ick", 1452 .main_clk = "mailboxes_ick",
1637 .prcm = { 1453 .prcm = {
@@ -1648,29 +1464,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
1648 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1464 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1649}; 1465};
1650 1466
1651/*
1652 * 'mcspi' class
1653 * multichannel serial port interface (mcspi) / master/slave synchronous serial
1654 * bus
1655 */
1656
1657static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = {
1658 .rev_offs = 0x0000,
1659 .sysc_offs = 0x0010,
1660 .syss_offs = 0x0014,
1661 .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
1662 SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
1663 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
1664 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1665 .sysc_fields = &omap_hwmod_sysc_type1,
1666};
1667
1668static struct omap_hwmod_class omap2430_mcspi_class = {
1669 .name = "mcspi",
1670 .sysc = &omap2430_mcspi_sysc,
1671 .rev = OMAP2_MCSPI_REV,
1672};
1673
1674/* mcspi1 */ 1467/* mcspi1 */
1675static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { 1468static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
1676 &omap2430_l4_core__mcspi1, 1469 &omap2430_l4_core__mcspi1,
@@ -1696,8 +1489,8 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
1696 }, 1489 },
1697 .slaves = omap2430_mcspi1_slaves, 1490 .slaves = omap2430_mcspi1_slaves,
1698 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), 1491 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves),
1699 .class = &omap2430_mcspi_class, 1492 .class = &omap2xxx_mcspi_class,
1700 .dev_attr = &omap_mcspi1_dev_attr, 1493 .dev_attr = &omap_mcspi1_dev_attr,
1701 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1494 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1702}; 1495};
1703 1496
@@ -1726,8 +1519,8 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
1726 }, 1519 },
1727 .slaves = omap2430_mcspi2_slaves, 1520 .slaves = omap2430_mcspi2_slaves,
1728 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), 1521 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves),
1729 .class = &omap2430_mcspi_class, 1522 .class = &omap2xxx_mcspi_class,
1730 .dev_attr = &omap_mcspi2_dev_attr, 1523 .dev_attr = &omap_mcspi2_dev_attr,
1731 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1524 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1732}; 1525};
1733 1526
@@ -1769,8 +1562,8 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
1769 }, 1562 },
1770 .slaves = omap2430_mcspi3_slaves, 1563 .slaves = omap2430_mcspi3_slaves,
1771 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), 1564 .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves),
1772 .class = &omap2430_mcspi_class, 1565 .class = &omap2xxx_mcspi_class,
1773 .dev_attr = &omap_mcspi3_dev_attr, 1566 .dev_attr = &omap_mcspi3_dev_attr,
1774 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1567 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
1775}; 1568};
1776 1569