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authorPaul Walmsley <paul@pwsan.com>2011-09-14 18:01:21 -0400
committerPaul Walmsley <paul@pwsan.com>2011-09-14 18:01:21 -0400
commita5ffef6af127721a813d70f87cd8cc348ea9d6ab (patch)
treec68df36339ab9a6842a35813d5ec3d05683b516c /arch/arm/mach-omap2/clockdomains44xx_data.c
parent08cb9703e2922db297d8f83ec110bde37823e021 (diff)
OMAP: clockdomain code/data: remove omap_chip bitmask from struct clockdomain
At Tony's request, remove the omap_chip bitmasks from the clockdomain and clockdomain dependency definitions. Instead, initialize clockdomains based on one or more lists that are applicable to a particular SoC family, variant, and silicon revision. Tony Lindgren <tony@atomide.com> found a bug in a previous version of this patch - thanks Tony. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/clockdomains44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c404
1 files changed, 76 insertions, 328 deletions
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index c75411a62207..9299ac291d28 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -34,350 +34,122 @@
34/* Static Dependencies for OMAP4 Clock Domains */ 34/* Static Dependencies for OMAP4 Clock Domains */
35 35
36static struct clkdm_dep d2d_wkup_sleep_deps[] = { 36static struct clkdm_dep d2d_wkup_sleep_deps[] = {
37 { 37 { .clkdm_name = "abe_clkdm" },
38 .clkdm_name = "abe_clkdm", 38 { .clkdm_name = "ivahd_clkdm" },
39 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 39 { .clkdm_name = "l3_1_clkdm" },
40 }, 40 { .clkdm_name = "l3_2_clkdm" },
41 { 41 { .clkdm_name = "l3_emif_clkdm" },
42 .clkdm_name = "ivahd_clkdm", 42 { .clkdm_name = "l3_init_clkdm" },
43 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 43 { .clkdm_name = "l4_cfg_clkdm" },
44 }, 44 { .clkdm_name = "l4_per_clkdm" },
45 {
46 .clkdm_name = "l3_1_clkdm",
47 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
48 },
49 {
50 .clkdm_name = "l3_2_clkdm",
51 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
52 },
53 {
54 .clkdm_name = "l3_emif_clkdm",
55 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
56 },
57 {
58 .clkdm_name = "l3_init_clkdm",
59 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
60 },
61 {
62 .clkdm_name = "l4_cfg_clkdm",
63 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
64 },
65 {
66 .clkdm_name = "l4_per_clkdm",
67 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
68 },
69 { NULL }, 45 { NULL },
70}; 46};
71 47
72static struct clkdm_dep ducati_wkup_sleep_deps[] = { 48static struct clkdm_dep ducati_wkup_sleep_deps[] = {
73 { 49 { .clkdm_name = "abe_clkdm" },
74 .clkdm_name = "abe_clkdm", 50 { .clkdm_name = "ivahd_clkdm" },
75 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 51 { .clkdm_name = "l3_1_clkdm" },
76 }, 52 { .clkdm_name = "l3_2_clkdm" },
77 { 53 { .clkdm_name = "l3_dss_clkdm" },
78 .clkdm_name = "ivahd_clkdm", 54 { .clkdm_name = "l3_emif_clkdm" },
79 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 55 { .clkdm_name = "l3_gfx_clkdm" },
80 }, 56 { .clkdm_name = "l3_init_clkdm" },
81 { 57 { .clkdm_name = "l4_cfg_clkdm" },
82 .clkdm_name = "l3_1_clkdm", 58 { .clkdm_name = "l4_per_clkdm" },
83 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 59 { .clkdm_name = "l4_secure_clkdm" },
84 }, 60 { .clkdm_name = "l4_wkup_clkdm" },
85 { 61 { .clkdm_name = "tesla_clkdm" },
86 .clkdm_name = "l3_2_clkdm",
87 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
88 },
89 {
90 .clkdm_name = "l3_dss_clkdm",
91 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
92 },
93 {
94 .clkdm_name = "l3_emif_clkdm",
95 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
96 },
97 {
98 .clkdm_name = "l3_gfx_clkdm",
99 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
100 },
101 {
102 .clkdm_name = "l3_init_clkdm",
103 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
104 },
105 {
106 .clkdm_name = "l4_cfg_clkdm",
107 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
108 },
109 {
110 .clkdm_name = "l4_per_clkdm",
111 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
112 },
113 {
114 .clkdm_name = "l4_secure_clkdm",
115 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
116 },
117 {
118 .clkdm_name = "l4_wkup_clkdm",
119 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
120 },
121 {
122 .clkdm_name = "tesla_clkdm",
123 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
124 },
125 { NULL }, 62 { NULL },
126}; 63};
127 64
128static struct clkdm_dep iss_wkup_sleep_deps[] = { 65static struct clkdm_dep iss_wkup_sleep_deps[] = {
129 { 66 { .clkdm_name = "ivahd_clkdm" },
130 .clkdm_name = "ivahd_clkdm", 67 { .clkdm_name = "l3_1_clkdm" },
131 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 68 { .clkdm_name = "l3_emif_clkdm" },
132 },
133 {
134 .clkdm_name = "l3_1_clkdm",
135 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
136 },
137 {
138 .clkdm_name = "l3_emif_clkdm",
139 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
140 },
141 { NULL }, 69 { NULL },
142}; 70};
143 71
144static struct clkdm_dep ivahd_wkup_sleep_deps[] = { 72static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
145 { 73 { .clkdm_name = "l3_1_clkdm" },
146 .clkdm_name = "l3_1_clkdm", 74 { .clkdm_name = "l3_emif_clkdm" },
147 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
148 },
149 {
150 .clkdm_name = "l3_emif_clkdm",
151 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
152 },
153 { NULL }, 75 { NULL },
154}; 76};
155 77
156static struct clkdm_dep l3_dma_wkup_sleep_deps[] = { 78static struct clkdm_dep l3_dma_wkup_sleep_deps[] = {
157 { 79 { .clkdm_name = "abe_clkdm" },
158 .clkdm_name = "abe_clkdm", 80 { .clkdm_name = "ducati_clkdm" },
159 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 81 { .clkdm_name = "ivahd_clkdm" },
160 }, 82 { .clkdm_name = "l3_1_clkdm" },
161 { 83 { .clkdm_name = "l3_dss_clkdm" },
162 .clkdm_name = "ducati_clkdm", 84 { .clkdm_name = "l3_emif_clkdm" },
163 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 85 { .clkdm_name = "l3_init_clkdm" },
164 }, 86 { .clkdm_name = "l4_cfg_clkdm" },
165 { 87 { .clkdm_name = "l4_per_clkdm" },
166 .clkdm_name = "ivahd_clkdm", 88 { .clkdm_name = "l4_secure_clkdm" },
167 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 89 { .clkdm_name = "l4_wkup_clkdm" },
168 },
169 {
170 .clkdm_name = "l3_1_clkdm",
171 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
172 },
173 {
174 .clkdm_name = "l3_dss_clkdm",
175 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
176 },
177 {
178 .clkdm_name = "l3_emif_clkdm",
179 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
180 },
181 {
182 .clkdm_name = "l3_init_clkdm",
183 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
184 },
185 {
186 .clkdm_name = "l4_cfg_clkdm",
187 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
188 },
189 {
190 .clkdm_name = "l4_per_clkdm",
191 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
192 },
193 {
194 .clkdm_name = "l4_secure_clkdm",
195 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
196 },
197 {
198 .clkdm_name = "l4_wkup_clkdm",
199 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
200 },
201 { NULL }, 90 { NULL },
202}; 91};
203 92
204static struct clkdm_dep l3_dss_wkup_sleep_deps[] = { 93static struct clkdm_dep l3_dss_wkup_sleep_deps[] = {
205 { 94 { .clkdm_name = "ivahd_clkdm" },
206 .clkdm_name = "ivahd_clkdm", 95 { .clkdm_name = "l3_2_clkdm" },
207 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 96 { .clkdm_name = "l3_emif_clkdm" },
208 },
209 {
210 .clkdm_name = "l3_2_clkdm",
211 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
212 },
213 {
214 .clkdm_name = "l3_emif_clkdm",
215 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
216 },
217 { NULL }, 97 { NULL },
218}; 98};
219 99
220static struct clkdm_dep l3_gfx_wkup_sleep_deps[] = { 100static struct clkdm_dep l3_gfx_wkup_sleep_deps[] = {
221 { 101 { .clkdm_name = "ivahd_clkdm" },
222 .clkdm_name = "ivahd_clkdm", 102 { .clkdm_name = "l3_1_clkdm" },
223 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 103 { .clkdm_name = "l3_emif_clkdm" },
224 },
225 {
226 .clkdm_name = "l3_1_clkdm",
227 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
228 },
229 {
230 .clkdm_name = "l3_emif_clkdm",
231 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
232 },
233 { NULL }, 104 { NULL },
234}; 105};
235 106
236static struct clkdm_dep l3_init_wkup_sleep_deps[] = { 107static struct clkdm_dep l3_init_wkup_sleep_deps[] = {
237 { 108 { .clkdm_name = "abe_clkdm" },
238 .clkdm_name = "abe_clkdm", 109 { .clkdm_name = "ivahd_clkdm" },
239 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 110 { .clkdm_name = "l3_emif_clkdm" },
240 }, 111 { .clkdm_name = "l4_cfg_clkdm" },
241 { 112 { .clkdm_name = "l4_per_clkdm" },
242 .clkdm_name = "ivahd_clkdm", 113 { .clkdm_name = "l4_secure_clkdm" },
243 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 114 { .clkdm_name = "l4_wkup_clkdm" },
244 },
245 {
246 .clkdm_name = "l3_emif_clkdm",
247 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
248 },
249 {
250 .clkdm_name = "l4_cfg_clkdm",
251 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
252 },
253 {
254 .clkdm_name = "l4_per_clkdm",
255 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
256 },
257 {
258 .clkdm_name = "l4_secure_clkdm",
259 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
260 },
261 {
262 .clkdm_name = "l4_wkup_clkdm",
263 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
264 },
265 { NULL }, 115 { NULL },
266}; 116};
267 117
268static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { 118static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
269 { 119 { .clkdm_name = "l3_1_clkdm" },
270 .clkdm_name = "l3_1_clkdm", 120 { .clkdm_name = "l3_emif_clkdm" },
271 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 121 { .clkdm_name = "l4_per_clkdm" },
272 },
273 {
274 .clkdm_name = "l3_emif_clkdm",
275 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
276 },
277 {
278 .clkdm_name = "l4_per_clkdm",
279 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
280 },
281 { NULL }, 122 { NULL },
282}; 123};
283 124
284static struct clkdm_dep mpu_wkup_sleep_deps[] = { 125static struct clkdm_dep mpu_wkup_sleep_deps[] = {
285 { 126 { .clkdm_name = "abe_clkdm" },
286 .clkdm_name = "abe_clkdm", 127 { .clkdm_name = "ducati_clkdm" },
287 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 128 { .clkdm_name = "ivahd_clkdm" },
288 }, 129 { .clkdm_name = "l3_1_clkdm" },
289 { 130 { .clkdm_name = "l3_2_clkdm" },
290 .clkdm_name = "ducati_clkdm", 131 { .clkdm_name = "l3_dss_clkdm" },
291 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 132 { .clkdm_name = "l3_emif_clkdm" },
292 }, 133 { .clkdm_name = "l3_gfx_clkdm" },
293 { 134 { .clkdm_name = "l3_init_clkdm" },
294 .clkdm_name = "ivahd_clkdm", 135 { .clkdm_name = "l4_cfg_clkdm" },
295 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 136 { .clkdm_name = "l4_per_clkdm" },
296 }, 137 { .clkdm_name = "l4_secure_clkdm" },
297 { 138 { .clkdm_name = "l4_wkup_clkdm" },
298 .clkdm_name = "l3_1_clkdm", 139 { .clkdm_name = "tesla_clkdm" },
299 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
300 },
301 {
302 .clkdm_name = "l3_2_clkdm",
303 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
304 },
305 {
306 .clkdm_name = "l3_dss_clkdm",
307 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
308 },
309 {
310 .clkdm_name = "l3_emif_clkdm",
311 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
312 },
313 {
314 .clkdm_name = "l3_gfx_clkdm",
315 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
316 },
317 {
318 .clkdm_name = "l3_init_clkdm",
319 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
320 },
321 {
322 .clkdm_name = "l4_cfg_clkdm",
323 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
324 },
325 {
326 .clkdm_name = "l4_per_clkdm",
327 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
328 },
329 {
330 .clkdm_name = "l4_secure_clkdm",
331 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
332 },
333 {
334 .clkdm_name = "l4_wkup_clkdm",
335 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
336 },
337 {
338 .clkdm_name = "tesla_clkdm",
339 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
340 },
341 { NULL }, 140 { NULL },
342}; 141};
343 142
344static struct clkdm_dep tesla_wkup_sleep_deps[] = { 143static struct clkdm_dep tesla_wkup_sleep_deps[] = {
345 { 144 { .clkdm_name = "abe_clkdm" },
346 .clkdm_name = "abe_clkdm", 145 { .clkdm_name = "ivahd_clkdm" },
347 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 146 { .clkdm_name = "l3_1_clkdm" },
348 }, 147 { .clkdm_name = "l3_2_clkdm" },
349 { 148 { .clkdm_name = "l3_emif_clkdm" },
350 .clkdm_name = "ivahd_clkdm", 149 { .clkdm_name = "l3_init_clkdm" },
351 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) 150 { .clkdm_name = "l4_cfg_clkdm" },
352 }, 151 { .clkdm_name = "l4_per_clkdm" },
353 { 152 { .clkdm_name = "l4_wkup_clkdm" },
354 .clkdm_name = "l3_1_clkdm",
355 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
356 },
357 {
358 .clkdm_name = "l3_2_clkdm",
359 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
360 },
361 {
362 .clkdm_name = "l3_emif_clkdm",
363 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
364 },
365 {
366 .clkdm_name = "l3_init_clkdm",
367 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
368 },
369 {
370 .clkdm_name = "l4_cfg_clkdm",
371 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
372 },
373 {
374 .clkdm_name = "l4_per_clkdm",
375 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
376 },
377 {
378 .clkdm_name = "l4_wkup_clkdm",
379 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
380 },
381 { NULL }, 153 { NULL },
382}; 154};
383 155
@@ -388,7 +160,6 @@ static struct clockdomain l4_cefuse_44xx_clkdm = {
388 .cm_inst = OMAP4430_CM2_CEFUSE_INST, 160 .cm_inst = OMAP4430_CM2_CEFUSE_INST,
389 .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS, 161 .clkdm_offs = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS,
390 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 162 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
391 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
392}; 163};
393 164
394static struct clockdomain l4_cfg_44xx_clkdm = { 165static struct clockdomain l4_cfg_44xx_clkdm = {
@@ -399,7 +170,6 @@ static struct clockdomain l4_cfg_44xx_clkdm = {
399 .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS, 170 .clkdm_offs = OMAP4430_CM2_CORE_L4CFG_CDOFFS,
400 .dep_bit = OMAP4430_L4CFG_STATDEP_SHIFT, 171 .dep_bit = OMAP4430_L4CFG_STATDEP_SHIFT,
401 .flags = CLKDM_CAN_HWSUP, 172 .flags = CLKDM_CAN_HWSUP,
402 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
403}; 173};
404 174
405static struct clockdomain tesla_44xx_clkdm = { 175static struct clockdomain tesla_44xx_clkdm = {
@@ -412,7 +182,6 @@ static struct clockdomain tesla_44xx_clkdm = {
412 .wkdep_srcs = tesla_wkup_sleep_deps, 182 .wkdep_srcs = tesla_wkup_sleep_deps,
413 .sleepdep_srcs = tesla_wkup_sleep_deps, 183 .sleepdep_srcs = tesla_wkup_sleep_deps,
414 .flags = CLKDM_CAN_HWSUP_SWSUP, 184 .flags = CLKDM_CAN_HWSUP_SWSUP,
415 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
416}; 185};
417 186
418static struct clockdomain l3_gfx_44xx_clkdm = { 187static struct clockdomain l3_gfx_44xx_clkdm = {
@@ -425,7 +194,6 @@ static struct clockdomain l3_gfx_44xx_clkdm = {
425 .wkdep_srcs = l3_gfx_wkup_sleep_deps, 194 .wkdep_srcs = l3_gfx_wkup_sleep_deps,
426 .sleepdep_srcs = l3_gfx_wkup_sleep_deps, 195 .sleepdep_srcs = l3_gfx_wkup_sleep_deps,
427 .flags = CLKDM_CAN_HWSUP_SWSUP, 196 .flags = CLKDM_CAN_HWSUP_SWSUP,
428 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
429}; 197};
430 198
431static struct clockdomain ivahd_44xx_clkdm = { 199static struct clockdomain ivahd_44xx_clkdm = {
@@ -438,7 +206,6 @@ static struct clockdomain ivahd_44xx_clkdm = {
438 .wkdep_srcs = ivahd_wkup_sleep_deps, 206 .wkdep_srcs = ivahd_wkup_sleep_deps,
439 .sleepdep_srcs = ivahd_wkup_sleep_deps, 207 .sleepdep_srcs = ivahd_wkup_sleep_deps,
440 .flags = CLKDM_CAN_HWSUP_SWSUP, 208 .flags = CLKDM_CAN_HWSUP_SWSUP,
441 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
442}; 209};
443 210
444static struct clockdomain l4_secure_44xx_clkdm = { 211static struct clockdomain l4_secure_44xx_clkdm = {
@@ -451,7 +218,6 @@ static struct clockdomain l4_secure_44xx_clkdm = {
451 .wkdep_srcs = l4_secure_wkup_sleep_deps, 218 .wkdep_srcs = l4_secure_wkup_sleep_deps,
452 .sleepdep_srcs = l4_secure_wkup_sleep_deps, 219 .sleepdep_srcs = l4_secure_wkup_sleep_deps,
453 .flags = CLKDM_CAN_HWSUP_SWSUP, 220 .flags = CLKDM_CAN_HWSUP_SWSUP,
454 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
455}; 221};
456 222
457static struct clockdomain l4_per_44xx_clkdm = { 223static struct clockdomain l4_per_44xx_clkdm = {
@@ -462,7 +228,6 @@ static struct clockdomain l4_per_44xx_clkdm = {
462 .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS, 228 .clkdm_offs = OMAP4430_CM2_L4PER_L4PER_CDOFFS,
463 .dep_bit = OMAP4430_L4PER_STATDEP_SHIFT, 229 .dep_bit = OMAP4430_L4PER_STATDEP_SHIFT,
464 .flags = CLKDM_CAN_HWSUP_SWSUP, 230 .flags = CLKDM_CAN_HWSUP_SWSUP,
465 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
466}; 231};
467 232
468static struct clockdomain abe_44xx_clkdm = { 233static struct clockdomain abe_44xx_clkdm = {
@@ -473,7 +238,6 @@ static struct clockdomain abe_44xx_clkdm = {
473 .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS, 238 .clkdm_offs = OMAP4430_CM1_ABE_ABE_CDOFFS,
474 .dep_bit = OMAP4430_ABE_STATDEP_SHIFT, 239 .dep_bit = OMAP4430_ABE_STATDEP_SHIFT,
475 .flags = CLKDM_CAN_HWSUP_SWSUP, 240 .flags = CLKDM_CAN_HWSUP_SWSUP,
476 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
477}; 241};
478 242
479static struct clockdomain l3_instr_44xx_clkdm = { 243static struct clockdomain l3_instr_44xx_clkdm = {
@@ -482,7 +246,6 @@ static struct clockdomain l3_instr_44xx_clkdm = {
482 .prcm_partition = OMAP4430_CM2_PARTITION, 246 .prcm_partition = OMAP4430_CM2_PARTITION,
483 .cm_inst = OMAP4430_CM2_CORE_INST, 247 .cm_inst = OMAP4430_CM2_CORE_INST,
484 .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS, 248 .clkdm_offs = OMAP4430_CM2_CORE_L3INSTR_CDOFFS,
485 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
486}; 249};
487 250
488static struct clockdomain l3_init_44xx_clkdm = { 251static struct clockdomain l3_init_44xx_clkdm = {
@@ -495,7 +258,6 @@ static struct clockdomain l3_init_44xx_clkdm = {
495 .wkdep_srcs = l3_init_wkup_sleep_deps, 258 .wkdep_srcs = l3_init_wkup_sleep_deps,
496 .sleepdep_srcs = l3_init_wkup_sleep_deps, 259 .sleepdep_srcs = l3_init_wkup_sleep_deps,
497 .flags = CLKDM_CAN_HWSUP_SWSUP, 260 .flags = CLKDM_CAN_HWSUP_SWSUP,
498 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
499}; 261};
500 262
501static struct clockdomain d2d_44xx_clkdm = { 263static struct clockdomain d2d_44xx_clkdm = {
@@ -507,7 +269,6 @@ static struct clockdomain d2d_44xx_clkdm = {
507 .wkdep_srcs = d2d_wkup_sleep_deps, 269 .wkdep_srcs = d2d_wkup_sleep_deps,
508 .sleepdep_srcs = d2d_wkup_sleep_deps, 270 .sleepdep_srcs = d2d_wkup_sleep_deps,
509 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 271 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
510 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
511}; 272};
512 273
513static struct clockdomain mpu0_44xx_clkdm = { 274static struct clockdomain mpu0_44xx_clkdm = {
@@ -517,7 +278,6 @@ static struct clockdomain mpu0_44xx_clkdm = {
517 .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST, 278 .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST,
518 .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS, 279 .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS,
519 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 280 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
520 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
521}; 281};
522 282
523static struct clockdomain mpu1_44xx_clkdm = { 283static struct clockdomain mpu1_44xx_clkdm = {
@@ -527,7 +287,6 @@ static struct clockdomain mpu1_44xx_clkdm = {
527 .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST, 287 .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST,
528 .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS, 288 .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS,
529 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 289 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
530 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
531}; 290};
532 291
533static struct clockdomain l3_emif_44xx_clkdm = { 292static struct clockdomain l3_emif_44xx_clkdm = {
@@ -538,7 +297,6 @@ static struct clockdomain l3_emif_44xx_clkdm = {
538 .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS, 297 .clkdm_offs = OMAP4430_CM2_CORE_MEMIF_CDOFFS,
539 .dep_bit = OMAP4430_MEMIF_STATDEP_SHIFT, 298 .dep_bit = OMAP4430_MEMIF_STATDEP_SHIFT,
540 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 299 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
541 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
542}; 300};
543 301
544static struct clockdomain l4_ao_44xx_clkdm = { 302static struct clockdomain l4_ao_44xx_clkdm = {
@@ -548,7 +306,6 @@ static struct clockdomain l4_ao_44xx_clkdm = {
548 .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST, 306 .cm_inst = OMAP4430_CM2_ALWAYS_ON_INST,
549 .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS, 307 .clkdm_offs = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS,
550 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 308 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
551 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
552}; 309};
553 310
554static struct clockdomain ducati_44xx_clkdm = { 311static struct clockdomain ducati_44xx_clkdm = {
@@ -561,7 +318,6 @@ static struct clockdomain ducati_44xx_clkdm = {
561 .wkdep_srcs = ducati_wkup_sleep_deps, 318 .wkdep_srcs = ducati_wkup_sleep_deps,
562 .sleepdep_srcs = ducati_wkup_sleep_deps, 319 .sleepdep_srcs = ducati_wkup_sleep_deps,
563 .flags = CLKDM_CAN_HWSUP_SWSUP, 320 .flags = CLKDM_CAN_HWSUP_SWSUP,
564 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
565}; 321};
566 322
567static struct clockdomain mpu_44xx_clkdm = { 323static struct clockdomain mpu_44xx_clkdm = {
@@ -573,7 +329,6 @@ static struct clockdomain mpu_44xx_clkdm = {
573 .wkdep_srcs = mpu_wkup_sleep_deps, 329 .wkdep_srcs = mpu_wkup_sleep_deps,
574 .sleepdep_srcs = mpu_wkup_sleep_deps, 330 .sleepdep_srcs = mpu_wkup_sleep_deps,
575 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 331 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
576 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
577}; 332};
578 333
579static struct clockdomain l3_2_44xx_clkdm = { 334static struct clockdomain l3_2_44xx_clkdm = {
@@ -584,7 +339,6 @@ static struct clockdomain l3_2_44xx_clkdm = {
584 .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS, 339 .clkdm_offs = OMAP4430_CM2_CORE_L3_2_CDOFFS,
585 .dep_bit = OMAP4430_L3_2_STATDEP_SHIFT, 340 .dep_bit = OMAP4430_L3_2_STATDEP_SHIFT,
586 .flags = CLKDM_CAN_HWSUP, 341 .flags = CLKDM_CAN_HWSUP,
587 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
588}; 342};
589 343
590static struct clockdomain l3_1_44xx_clkdm = { 344static struct clockdomain l3_1_44xx_clkdm = {
@@ -595,7 +349,6 @@ static struct clockdomain l3_1_44xx_clkdm = {
595 .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS, 349 .clkdm_offs = OMAP4430_CM2_CORE_L3_1_CDOFFS,
596 .dep_bit = OMAP4430_L3_1_STATDEP_SHIFT, 350 .dep_bit = OMAP4430_L3_1_STATDEP_SHIFT,
597 .flags = CLKDM_CAN_HWSUP, 351 .flags = CLKDM_CAN_HWSUP,
598 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
599}; 352};
600 353
601static struct clockdomain iss_44xx_clkdm = { 354static struct clockdomain iss_44xx_clkdm = {
@@ -607,7 +360,6 @@ static struct clockdomain iss_44xx_clkdm = {
607 .wkdep_srcs = iss_wkup_sleep_deps, 360 .wkdep_srcs = iss_wkup_sleep_deps,
608 .sleepdep_srcs = iss_wkup_sleep_deps, 361 .sleepdep_srcs = iss_wkup_sleep_deps,
609 .flags = CLKDM_CAN_HWSUP_SWSUP, 362 .flags = CLKDM_CAN_HWSUP_SWSUP,
610 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
611}; 363};
612 364
613static struct clockdomain l3_dss_44xx_clkdm = { 365static struct clockdomain l3_dss_44xx_clkdm = {
@@ -620,7 +372,6 @@ static struct clockdomain l3_dss_44xx_clkdm = {
620 .wkdep_srcs = l3_dss_wkup_sleep_deps, 372 .wkdep_srcs = l3_dss_wkup_sleep_deps,
621 .sleepdep_srcs = l3_dss_wkup_sleep_deps, 373 .sleepdep_srcs = l3_dss_wkup_sleep_deps,
622 .flags = CLKDM_CAN_HWSUP_SWSUP, 374 .flags = CLKDM_CAN_HWSUP_SWSUP,
623 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
624}; 375};
625 376
626static struct clockdomain l4_wkup_44xx_clkdm = { 377static struct clockdomain l4_wkup_44xx_clkdm = {
@@ -631,7 +382,6 @@ static struct clockdomain l4_wkup_44xx_clkdm = {
631 .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS, 382 .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
632 .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT, 383 .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT,
633 .flags = CLKDM_CAN_HWSUP, 384 .flags = CLKDM_CAN_HWSUP,
634 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
635}; 385};
636 386
637static struct clockdomain emu_sys_44xx_clkdm = { 387static struct clockdomain emu_sys_44xx_clkdm = {
@@ -641,7 +391,6 @@ static struct clockdomain emu_sys_44xx_clkdm = {
641 .cm_inst = OMAP4430_PRM_EMU_CM_INST, 391 .cm_inst = OMAP4430_PRM_EMU_CM_INST,
642 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS, 392 .clkdm_offs = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
643 .flags = CLKDM_CAN_HWSUP, 393 .flags = CLKDM_CAN_HWSUP,
644 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
645}; 394};
646 395
647static struct clockdomain l3_dma_44xx_clkdm = { 396static struct clockdomain l3_dma_44xx_clkdm = {
@@ -653,7 +402,6 @@ static struct clockdomain l3_dma_44xx_clkdm = {
653 .wkdep_srcs = l3_dma_wkup_sleep_deps, 402 .wkdep_srcs = l3_dma_wkup_sleep_deps,
654 .sleepdep_srcs = l3_dma_wkup_sleep_deps, 403 .sleepdep_srcs = l3_dma_wkup_sleep_deps,
655 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, 404 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
656 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
657}; 405};
658 406
659/* As clockdomains are added or removed above, this list must also be changed */ 407/* As clockdomains are added or removed above, this list must also be changed */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-31 21:29:43 -0500