diff options
author | Paul Walmsley <paul@pwsan.com> | 2012-05-29 05:56:40 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2012-06-26 22:57:22 -0400 |
commit | 571efa0d3ba8ef6ad857259bfa194e9b2ee403ad (patch) | |
tree | 1f83805326c90bf5a1a29b4ad9c685347572de6a /arch/arm/mach-omap2/clock3xxx_data.c | |
parent | 6fd8246b1c1167c983b089f9eaafa13ef9ca7adf (diff) |
ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file
OMAP3, OMAP4 and AM33xx share some common data like, clksel_rate
oscillator clock input (Virtual clock nodes), required for
clock tree; so move common data to common data file so that it
can be reused.
[hvaibhav@ti.com: Created separate commit from Paul's developement
branch]
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock3xxx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/clock3xxx_data.c | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 4e1a3b0e8cc8..9d7ef6c13745 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c | |||
@@ -93,18 +93,6 @@ static struct clk virt_16_8m_ck = { | |||
93 | .rate = 16800000, | 93 | .rate = 16800000, |
94 | }; | 94 | }; |
95 | 95 | ||
96 | static struct clk virt_19_2m_ck = { | ||
97 | .name = "virt_19_2m_ck", | ||
98 | .ops = &clkops_null, | ||
99 | .rate = 19200000, | ||
100 | }; | ||
101 | |||
102 | static struct clk virt_26m_ck = { | ||
103 | .name = "virt_26m_ck", | ||
104 | .ops = &clkops_null, | ||
105 | .rate = 26000000, | ||
106 | }; | ||
107 | |||
108 | static struct clk virt_38_4m_ck = { | 96 | static struct clk virt_38_4m_ck = { |
109 | .name = "virt_38_4m_ck", | 97 | .name = "virt_38_4m_ck", |
110 | .ops = &clkops_null, | 98 | .ops = &clkops_null, |
@@ -145,8 +133,8 @@ static const struct clksel osc_sys_clksel[] = { | |||
145 | { .parent = &virt_12m_ck, .rates = osc_sys_12m_rates }, | 133 | { .parent = &virt_12m_ck, .rates = osc_sys_12m_rates }, |
146 | { .parent = &virt_13m_ck, .rates = osc_sys_13m_rates }, | 134 | { .parent = &virt_13m_ck, .rates = osc_sys_13m_rates }, |
147 | { .parent = &virt_16_8m_ck, .rates = osc_sys_16_8m_rates }, | 135 | { .parent = &virt_16_8m_ck, .rates = osc_sys_16_8m_rates }, |
148 | { .parent = &virt_19_2m_ck, .rates = osc_sys_19_2m_rates }, | 136 | { .parent = &virt_19200000_ck, .rates = osc_sys_19_2m_rates }, |
149 | { .parent = &virt_26m_ck, .rates = osc_sys_26m_rates }, | 137 | { .parent = &virt_26000000_ck, .rates = osc_sys_26m_rates }, |
150 | { .parent = &virt_38_4m_ck, .rates = osc_sys_38_4m_rates }, | 138 | { .parent = &virt_38_4m_ck, .rates = osc_sys_38_4m_rates }, |
151 | { .parent = NULL }, | 139 | { .parent = NULL }, |
152 | }; | 140 | }; |
@@ -3230,8 +3218,8 @@ static struct omap_clk omap3xxx_clks[] = { | |||
3230 | CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_3XXX), | 3218 | CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_3XXX), |
3231 | CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_3XXX), | 3219 | CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_3XXX), |
3232 | CLK(NULL, "virt_16_8m_ck", &virt_16_8m_ck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | 3220 | CLK(NULL, "virt_16_8m_ck", &virt_16_8m_ck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), |
3233 | CLK(NULL, "virt_19_2m_ck", &virt_19_2m_ck, CK_3XXX), | 3221 | CLK(NULL, "virt_19200000_ck", &virt_19200000_ck, CK_3XXX), |
3234 | CLK(NULL, "virt_26m_ck", &virt_26m_ck, CK_3XXX), | 3222 | CLK(NULL, "virt_26000000_ck", &virt_26000000_ck, CK_3XXX), |
3235 | CLK(NULL, "virt_38_4m_ck", &virt_38_4m_ck, CK_3XXX), | 3223 | CLK(NULL, "virt_38_4m_ck", &virt_38_4m_ck, CK_3XXX), |
3236 | CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), | 3224 | CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), |
3237 | CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), | 3225 | CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), |