OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_"

Now that OMAP4-specific PRCM functions have been added, distinguish the
existing OMAP2/3-specific PRCM functions by prefixing them with "omap2_".

This patch should not result in any functional change.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>

1 files changed, 5 insertions, 5 deletions

diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c
index 954d11f37542..f51cffd1fc53 100644
--- a/arch/arm/mach-omap2/clkt2xxx_apll.c
+++ b/arch/arm/mach-omap2/clkt2xxx_apll.c
@@ -49,14 +49,14 @@ static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask)
 
         apll_mask = EN_APLL_LOCKED << clk->enable_bit;
 
-        cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+        cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
 
         if ((cval & apll_mask) == apll_mask)
                 return 0;   /* apll already enabled */
 
         cval &= ~apll_mask;
         cval |= apll_mask;
-        cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
+        omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
 
         omap2_cm_wait_idlest(cm_idlest_pll, status_mask,
                              OMAP24XX_CM_IDLEST_VAL, clk->name);
@@ -83,9 +83,9 @@ static void omap2_clk_apll_disable(struct clk *clk)
 {
         u32 cval;
 
-        cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN);
+        cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
         cval &= ~(EN_APLL_LOCKED << clk->enable_bit);
-        cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
+        omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN);
 }
 
 /* Public data */
@@ -106,7 +106,7 @@ u32 omap2xxx_get_apll_clkin(void)
 {
         u32 aplls, srate = 0;
 
-        aplls = cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
+        aplls = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1);
         aplls &= OMAP24XX_APLLS_CLKIN_MASK;
         aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT;