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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 18:27:22 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 18:27:22 -0500 |
commit | bab588fcfb6335c767d811a8955979f5440328e0 (patch) | |
tree | 2a862ddf47a82be885a8e7945a17cc3ff7a658b9 /arch/arm/mach-mxs | |
parent | 3298a3511f1e73255a8dc023efd909e569eea037 (diff) | |
parent | 9cb0d1babfcb1b4ac248c09425f7d5de1e771133 (diff) |
Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC-specific updates from Arnd Bergmann:
"This is a larger set of new functionality for the existing SoC
families, including:
- vt8500 gains support for new CPU cores, notably the Cortex-A9 based
wm8850
- prima2 gains support for the "marco" SoC family, its SMP based
cousin
- tegra gains support for the new Tegra4 (Tegra114) family
- socfpga now supports a newer version of the hardware including SMP
- i.mx31 and bcm2835 are now using DT probing for their clocks
- lots of updates for sh-mobile
- OMAP updates for clocks, power management and USB
- i.mx6q and tegra now support cpuidle
- kirkwood now supports PCIe hot plugging
- tegra clock support is updated
- tegra USB PHY probing gets implemented diffently"
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits)
ARM: prima2: remove duplicate v7_invalidate_l1
ARM: shmobile: r8a7779: Correct TMU clock support again
ARM: prima2: fix __init section for cpu hotplug
ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3)
ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3)
arm: socfpga: Add SMP support for actual socfpga harware
arm: Add v7_invalidate_l1 to cache-v7.S
arm: socfpga: Add entries to enable make dtbs socfpga
arm: socfpga: Add new device tree source for actual socfpga HW
ARM: tegra: sort Kconfig selects for Tegra114
ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114
ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC
ARM: tegra: Fix build error for gic update
ARM: tegra: remove empty tegra_smp_init_cpus()
ARM: shmobile: Register ARM architected timer
ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move
ARM: shmobile: r8a7779: Correct TMU clock support
ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT
ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles
ARM: mxs: use apbx bus clock to drive the timers on timrotv2
...
Diffstat (limited to 'arch/arm/mach-mxs')
-rw-r--r-- | arch/arm/mach-mxs/timer.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index 27451b1ba3f1..421020498a1b 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c | |||
@@ -72,8 +72,9 @@ | |||
72 | #define BM_TIMROT_TIMCTRLn_IRQ_EN (1 << 14) | 72 | #define BM_TIMROT_TIMCTRLn_IRQ_EN (1 << 14) |
73 | #define BM_TIMROT_TIMCTRLn_IRQ (1 << 15) | 73 | #define BM_TIMROT_TIMCTRLn_IRQ (1 << 15) |
74 | #define BP_TIMROT_TIMCTRLn_SELECT 0 | 74 | #define BP_TIMROT_TIMCTRLn_SELECT 0 |
75 | #define BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL 0x8 | 75 | #define BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL 0x8 |
76 | #define BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL 0xb | 76 | #define BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL 0xb |
77 | #define BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS 0xf | ||
77 | 78 | ||
78 | static struct clock_event_device mxs_clockevent_device; | 79 | static struct clock_event_device mxs_clockevent_device; |
79 | static enum clock_event_mode mxs_clockevent_mode = CLOCK_EVT_MODE_UNUSED; | 80 | static enum clock_event_mode mxs_clockevent_mode = CLOCK_EVT_MODE_UNUSED; |
@@ -206,7 +207,8 @@ static int __init mxs_clockevent_init(struct clk *timer_clk) | |||
206 | mxs_clockevent_device.set_next_event = timrotv1_set_next_event; | 207 | mxs_clockevent_device.set_next_event = timrotv1_set_next_event; |
207 | mxs_clockevent_device.cpumask = cpumask_of(0); | 208 | mxs_clockevent_device.cpumask = cpumask_of(0); |
208 | clockevents_config_and_register(&mxs_clockevent_device, | 209 | clockevents_config_and_register(&mxs_clockevent_device, |
209 | clk_get_rate(timer_clk), 0xf, | 210 | clk_get_rate(timer_clk), |
211 | timrot_is_v1() ? 0xf : 0x2, | ||
210 | timrot_is_v1() ? 0xfffe : 0xfffffffe); | 212 | timrot_is_v1() ? 0xfffe : 0xfffffffe); |
211 | 213 | ||
212 | return 0; | 214 | return 0; |
@@ -274,7 +276,7 @@ void __init mxs_timer_init(void) | |||
274 | /* one for clock_event */ | 276 | /* one for clock_event */ |
275 | __raw_writel((timrot_is_v1() ? | 277 | __raw_writel((timrot_is_v1() ? |
276 | BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL : | 278 | BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL : |
277 | BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL) | | 279 | BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS) | |
278 | BM_TIMROT_TIMCTRLn_UPDATE | | 280 | BM_TIMROT_TIMCTRLn_UPDATE | |
279 | BM_TIMROT_TIMCTRLn_IRQ_EN, | 281 | BM_TIMROT_TIMCTRLn_IRQ_EN, |
280 | mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); | 282 | mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); |
@@ -282,7 +284,7 @@ void __init mxs_timer_init(void) | |||
282 | /* another for clocksource */ | 284 | /* another for clocksource */ |
283 | __raw_writel((timrot_is_v1() ? | 285 | __raw_writel((timrot_is_v1() ? |
284 | BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL : | 286 | BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL : |
285 | BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL) | | 287 | BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS) | |
286 | BM_TIMROT_TIMCTRLn_RELOAD, | 288 | BM_TIMROT_TIMCTRLn_RELOAD, |
287 | mxs_timrot_base + HW_TIMROT_TIMCTRLn(1)); | 289 | mxs_timrot_base + HW_TIMROT_TIMCTRLn(1)); |
288 | 290 | ||