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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-01-06 17:33:32 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-01-06 17:33:32 -0500 |
commit | 404a02cbd2ae8bf256a2fa1169bdfe86bb5ebb34 (patch) | |
tree | 99119edc53fdca73ed7586829b8ee736e09440b3 /arch/arm/mach-mxc91231/mm.c | |
parent | 28cdac6690cb113856293bf79b40de33dbd8f974 (diff) | |
parent | 1051b9f0f9eab8091fe3bf98320741adf36b4cfa (diff) |
Merge branch 'devel-stable' into devel
Conflicts:
arch/arm/mach-pxa/clock.c
arch/arm/mach-pxa/clock.h
Diffstat (limited to 'arch/arm/mach-mxc91231/mm.c')
-rw-r--r-- | arch/arm/mach-mxc91231/mm.c | 53 |
1 files changed, 10 insertions, 43 deletions
diff --git a/arch/arm/mach-mxc91231/mm.c b/arch/arm/mach-mxc91231/mm.c index aeccfd755fee..7652c301da88 100644 --- a/arch/arm/mach-mxc91231/mm.c +++ b/arch/arm/mach-mxc91231/mm.c | |||
@@ -27,48 +27,15 @@ | |||
27 | /* | 27 | /* |
28 | * This structure defines the MXC memory map. | 28 | * This structure defines the MXC memory map. |
29 | */ | 29 | */ |
30 | static struct map_desc mxc_io_desc[] __initdata = { | 30 | static struct map_desc mxc91231_io_desc[] __initdata = { |
31 | { | 31 | imx_map_entry(MXC91231, L2CC, MT_DEVICE), |
32 | .virtual = MXC91231_L2CC_BASE_ADDR_VIRT, | 32 | imx_map_entry(MXC91231, X_MEMC, MT_DEVICE), |
33 | .pfn = __phys_to_pfn(MXC91231_L2CC_BASE_ADDR), | 33 | imx_map_entry(MXC91231, ROMP, MT_DEVICE), |
34 | .length = MXC91231_L2CC_SIZE, | 34 | imx_map_entry(MXC91231, AVIC, MT_DEVICE), |
35 | .type = MT_DEVICE, | 35 | imx_map_entry(MXC91231, AIPS1, MT_DEVICE), |
36 | }, { | 36 | imx_map_entry(MXC91231, SPBA0, MT_DEVICE), |
37 | .virtual = MXC91231_X_MEMC_BASE_ADDR_VIRT, | 37 | imx_map_entry(MXC91231, SPBA1, MT_DEVICE), |
38 | .pfn = __phys_to_pfn(MXC91231_X_MEMC_BASE_ADDR), | 38 | imx_map_entry(MXC91231, AIPS2, MT_DEVICE), |
39 | .length = MXC91231_X_MEMC_SIZE, | ||
40 | .type = MT_DEVICE, | ||
41 | }, { | ||
42 | .virtual = MXC91231_ROMP_BASE_ADDR_VIRT, | ||
43 | .pfn = __phys_to_pfn(MXC91231_ROMP_BASE_ADDR), | ||
44 | .length = MXC91231_ROMP_SIZE, | ||
45 | .type = MT_DEVICE, | ||
46 | }, { | ||
47 | .virtual = MXC91231_AVIC_BASE_ADDR_VIRT, | ||
48 | .pfn = __phys_to_pfn(MXC91231_AVIC_BASE_ADDR), | ||
49 | .length = MXC91231_AVIC_SIZE, | ||
50 | .type = MT_DEVICE, | ||
51 | }, { | ||
52 | .virtual = MXC91231_AIPS1_BASE_ADDR_VIRT, | ||
53 | .pfn = __phys_to_pfn(MXC91231_AIPS1_BASE_ADDR), | ||
54 | .length = MXC91231_AIPS1_SIZE, | ||
55 | .type = MT_DEVICE, | ||
56 | }, { | ||
57 | .virtual = MXC91231_SPBA0_BASE_ADDR_VIRT, | ||
58 | .pfn = __phys_to_pfn(MXC91231_SPBA0_BASE_ADDR), | ||
59 | .length = MXC91231_SPBA0_SIZE, | ||
60 | .type = MT_DEVICE, | ||
61 | }, { | ||
62 | .virtual = MXC91231_SPBA1_BASE_ADDR_VIRT, | ||
63 | .pfn = __phys_to_pfn(MXC91231_SPBA1_BASE_ADDR), | ||
64 | .length = MXC91231_SPBA1_SIZE, | ||
65 | .type = MT_DEVICE, | ||
66 | }, { | ||
67 | .virtual = MXC91231_AIPS2_BASE_ADDR_VIRT, | ||
68 | .pfn = __phys_to_pfn(MXC91231_AIPS2_BASE_ADDR), | ||
69 | .length = MXC91231_AIPS2_SIZE, | ||
70 | .type = MT_DEVICE, | ||
71 | }, | ||
72 | }; | 39 | }; |
73 | 40 | ||
74 | /* | 41 | /* |
@@ -80,7 +47,7 @@ void __init mxc91231_map_io(void) | |||
80 | { | 47 | { |
81 | mxc_set_cpu_type(MXC_CPU_MXC91231); | 48 | mxc_set_cpu_type(MXC_CPU_MXC91231); |
82 | 49 | ||
83 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 50 | iotable_init(mxc91231_io_desc, ARRAY_SIZE(mxc91231_io_desc)); |
84 | } | 51 | } |
85 | 52 | ||
86 | int mxc91231_register_gpios(void); | 53 | int mxc91231_register_gpios(void); |