diff options
author | Stepan Moskovchenko <stepanm@codeaurora.org> | 2011-02-24 21:00:41 -0500 |
---|---|---|
committer | David Brown <davidb@codeaurora.org> | 2011-03-08 17:40:58 -0500 |
commit | 2e8c8ba98376459e73d03a285f5d3406b630ea2d (patch) | |
tree | 774f957b4aab21d8799f9d42d761eb7b1f624ba8 /arch/arm/mach-msm/iommu.c | |
parent | b61401adf38f56dbfdac91f31425edf60595ed30 (diff) |
msm: iommu: Use ASID tagging instead of VMID tagging
Use ASID tags in the TLB instead of VMID tags in
preparation for changes to the secure environment.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/iommu.c')
-rw-r--r-- | arch/arm/mach-msm/iommu.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c index cde3cd0f8c0c..9c087405c635 100644 --- a/arch/arm/mach-msm/iommu.c +++ b/arch/arm/mach-msm/iommu.c | |||
@@ -137,7 +137,6 @@ static void __reset_context(void __iomem *base, int ctx) | |||
137 | SET_TLBLKCR(base, ctx, 0); | 137 | SET_TLBLKCR(base, ctx, 0); |
138 | SET_PRRR(base, ctx, 0); | 138 | SET_PRRR(base, ctx, 0); |
139 | SET_NMRR(base, ctx, 0); | 139 | SET_NMRR(base, ctx, 0); |
140 | SET_CONTEXTIDR(base, ctx, 0); | ||
141 | } | 140 | } |
142 | 141 | ||
143 | static void __program_context(void __iomem *base, int ctx, phys_addr_t pgtable) | 142 | static void __program_context(void __iomem *base, int ctx, phys_addr_t pgtable) |
@@ -418,11 +417,11 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va, | |||
418 | for (i = 0; i < 16; i++) | 417 | for (i = 0; i < 16; i++) |
419 | *(fl_pte+i) = (pa & 0xFF000000) | FL_SUPERSECTION | | 418 | *(fl_pte+i) = (pa & 0xFF000000) | FL_SUPERSECTION | |
420 | FL_AP_READ | FL_AP_WRITE | FL_TYPE_SECT | | 419 | FL_AP_READ | FL_AP_WRITE | FL_TYPE_SECT | |
421 | FL_SHARED | pgprot; | 420 | FL_SHARED | FL_NG | pgprot; |
422 | } | 421 | } |
423 | 422 | ||
424 | if (len == SZ_1M) | 423 | if (len == SZ_1M) |
425 | *fl_pte = (pa & 0xFFF00000) | FL_AP_READ | FL_AP_WRITE | | 424 | *fl_pte = (pa & 0xFFF00000) | FL_AP_READ | FL_AP_WRITE | FL_NG | |
426 | FL_TYPE_SECT | FL_SHARED | pgprot; | 425 | FL_TYPE_SECT | FL_SHARED | pgprot; |
427 | 426 | ||
428 | /* Need a 2nd level table */ | 427 | /* Need a 2nd level table */ |
@@ -447,7 +446,7 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va, | |||
447 | 446 | ||
448 | 447 | ||
449 | if (len == SZ_4K) | 448 | if (len == SZ_4K) |
450 | *sl_pte = (pa & SL_BASE_MASK_SMALL) | SL_AP0 | SL_AP1 | | 449 | *sl_pte = (pa & SL_BASE_MASK_SMALL) | SL_AP0 | SL_AP1 | SL_NG | |
451 | SL_SHARED | SL_TYPE_SMALL | pgprot; | 450 | SL_SHARED | SL_TYPE_SMALL | pgprot; |
452 | 451 | ||
453 | if (len == SZ_64K) { | 452 | if (len == SZ_64K) { |
@@ -455,7 +454,7 @@ static int msm_iommu_map(struct iommu_domain *domain, unsigned long va, | |||
455 | 454 | ||
456 | for (i = 0; i < 16; i++) | 455 | for (i = 0; i < 16; i++) |
457 | *(sl_pte+i) = (pa & SL_BASE_MASK_LARGE) | SL_AP0 | | 456 | *(sl_pte+i) = (pa & SL_BASE_MASK_LARGE) | SL_AP0 | |
458 | SL_AP1 | SL_SHARED | SL_TYPE_LARGE | pgprot; | 457 | SL_NG | SL_AP1 | SL_SHARED | SL_TYPE_LARGE | pgprot; |
459 | } | 458 | } |
460 | 459 | ||
461 | ret = __flush_iotlb(domain); | 460 | ret = __flush_iotlb(domain); |