Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM soc-specific updates from Olof Johansson:
 "Most notable here is probably the addition of basic support for the
  BCM2835, an SoC used in some of the Roku 2 players as well as the
  much-hyped Raspberry Pi, cleaned up and contributed by Stephen Warren.
  It's still early days on mainline support, with just the basics
  working.  But it has to start somewhere!

  Beyond that there's some conversions of clock infrastructure on tegra
  to common clock, misc updates for several other platforms, and OMAP
  now has its own bus (under drivers/bus) to manage its devices through.

  This branch adds two new directories outside of arch/arm:
  drivers/irqchip for new irq controllers, and drivers/bus for the above
  OMAP bus.  It's expected that some of the other platforms will migrate
  parts of their platforms to those directories over time as well."

Fix up trivial conflicts with the clk infrastructure changes.

* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (62 commits)
  ARM: shmobile: add new __iomem annotation for new code
  ARM: LPC32xx: Support GPI 28
  ARM: LPC32xx: Platform update for devicetree completion of spi-pl022
  ARM: LPC32xx: Board cleanup
  irqchip: fill in empty Kconfig
  ARM: SAMSUNG: Add check for NULL in clock interface
  ARM: EXYNOS: Put PCM, Slimbus, Spdif clocks to off state
  ARM: EXYNOS: Add bus clock for FIMD
  ARM: SAMSUNG: Fix HDMI related warnings
  ARM: S3C24XX: Add .get_rate callback for "camif-upll" clock
  ARM: EXYNOS: Fix incorrect help text
  ARM: EXYNOS: Turn off clocks for NAND, OneNAND and TSI controllers
  ARM: OMAP: AM33xx hwmod: fixup SPI after platform_data move
  MAINTAINERS: add an entry for the BCM2835 ARM sub-architecture
  ARM: bcm2835: instantiate console UART
  ARM: bcm2835: add stub clock driver
  ARM: bcm2835: add system timer
  ARM: bcm2835: add interrupt controller driver
  ARM: add infra-structure for BCM2835 and Raspberry Pi
  ARM: tegra20: add CPU hotplug support
  ...

3 files changed, 21 insertions, 30 deletions

diff --git a/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h b/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h
index 1816e22a3479..a544e962a818 100644
--- a/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h
+++ b/arch/arm/mach-lpc32xx/include/mach/gpio-lpc32xx.h
@@ -30,7 +30,7 @@
 #define LPC32XX_GPIO_P1_MAX 24
 #define LPC32XX_GPIO_P2_MAX 13
 #define LPC32XX_GPIO_P3_MAX 6
-#define LPC32XX_GPI_P3_MAX 28
+#define LPC32XX_GPI_P3_MAX 29
 #define LPC32XX_GPO_P3_MAX 24
 
 #define LPC32XX_GPIO_P0_GRP 0
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c
index 5b1cc35e6fba..3c6332753358 100644
--- a/arch/arm/mach-lpc32xx/irq.c
+++ b/arch/arm/mach-lpc32xx/irq.c
@@ -283,21 +283,25 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
         case IRQ_TYPE_EDGE_RISING:
                 /* Rising edge sensitive */
                 __lpc32xx_set_irq_type(d->hwirq, 1, 1);
+                __irq_set_handler_locked(d->hwirq, handle_edge_irq);
                 break;
 
         case IRQ_TYPE_EDGE_FALLING:
                 /* Falling edge sensitive */
                 __lpc32xx_set_irq_type(d->hwirq, 0, 1);
+                __irq_set_handler_locked(d->hwirq, handle_edge_irq);
                 break;
 
         case IRQ_TYPE_LEVEL_LOW:
                 /* Low level sensitive */
                 __lpc32xx_set_irq_type(d->hwirq, 0, 0);
+                __irq_set_handler_locked(d->hwirq, handle_level_irq);
                 break;
 
         case IRQ_TYPE_LEVEL_HIGH:
                 /* High level sensitive */
                 __lpc32xx_set_irq_type(d->hwirq, 1, 0);
+                __irq_set_handler_locked(d->hwirq, handle_level_irq);
                 break;
 
         /* Other modes are not supported */
@@ -305,9 +309,6 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type)
                 return -EINVAL;
         }
 
-        /* Ok to use the level handler for all types */
-        irq_set_handler(d->hwirq, handle_level_irq);
-
         return 0;
 }
 
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index b07dcc90829d..e8ff4c3f0566 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -24,12 +24,9 @@
 #include <linux/irq.h>
 #include <linux/dma-mapping.h>
 #include <linux/device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/eeprom.h>
 #include <linux/gpio.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/clcd.h>
-#include <linux/amba/pl022.h>
 #include <linux/amba/pl08x.h>
 #include <linux/amba/mmci.h>
 #include <linux/of.h>
@@ -37,6 +34,8 @@
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/clk.h>
+#include <linux/mtd/lpc32xx_slc.h>
+#include <linux/mtd/lpc32xx_mlc.h>
 
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -156,21 +155,6 @@ static struct clcd_board lpc32xx_clcd_data = {
         .remove         = lpc32xx_clcd_remove,
 };
 
-/*
- * AMBA SSP (SPI)
- */
-static struct pl022_ssp_controller lpc32xx_ssp0_data = {
-        .bus_id                 = 0,
-        .num_chipselect         = 1,
-        .enable_dma             = 0,
-};
-
-static struct pl022_ssp_controller lpc32xx_ssp1_data = {
-        .bus_id                 = 1,
-        .num_chipselect         = 1,
-        .enable_dma             = 0,
-};
-
 static struct pl08x_channel_data pl08x_slave_channels[] = {
         {
                 .bus_id = "nand-slc",
@@ -223,13 +207,25 @@ static struct mmci_platform_data lpc32xx_mmci_data = {
          * gather, and the MMCI driver doesn't do it this way */
 };
 
+static struct lpc32xx_slc_platform_data lpc32xx_slc_data = {
+        .dma_filter = pl08x_filter_id,
+};
+
+static struct lpc32xx_mlc_platform_data lpc32xx_mlc_data = {
+        .dma_filter = pl08x_filter_id,
+};
+
 static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = {
-        OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", &lpc32xx_ssp0_data),
-        OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", &lpc32xx_ssp1_data),
+        OF_DEV_AUXDATA("arm,pl022", 0x20084000, "dev:ssp0", NULL),
+        OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", NULL),
         OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &lpc32xx_clcd_data),
         OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd),
         OF_DEV_AUXDATA("arm,pl18x", 0x20098000, "20098000.sd",
                        &lpc32xx_mmci_data),
+        OF_DEV_AUXDATA("nxp,lpc3220-slc", 0x20020000, "20020000.flash",
+                       &lpc32xx_slc_data),
+        OF_DEV_AUXDATA("nxp,lpc3220-mlc", 0x200a8000, "200a8000.flash",
+                       &lpc32xx_mlc_data),
         { }
 };
 
@@ -253,12 +249,6 @@ static void __init lpc3250_machine_init(void)
 
         of_platform_populate(NULL, of_default_bus_match_table,
                              lpc32xx_auxdata_lookup, NULL);
-
-        /* Register GPIOs used on this board */
-        if (gpio_request(MMC_PWR_ENABLE_GPIO, "mmc_power_en"))
-                pr_err("Error requesting gpio %u", MMC_PWR_ENABLE_GPIO);
-        else if (gpio_direction_output(MMC_PWR_ENABLE_GPIO, 1))
-                pr_err("Error setting gpio %u to output", MMC_PWR_ENABLE_GPIO);
 }
 
 static char const *lpc32xx_dt_compat[] __initdata = {