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authorSascha Hauer <s.hauer@pengutronix.de>2012-03-09 03:11:55 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2012-05-02 06:07:53 -0400
commit2af9e6db14db9a7a0a6510227352fb2e69f9d032 (patch)
tree82ed54efd520f694d3b8689e0a0ab5f4e3feb15b /arch/arm/mach-imx
parent6c7b06850c5a1615cc9e660e0d24ce2025bb9bcf (diff)
ARM i.MX: Add common clock support for pllv1
The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35. Currently only reading the rate is supported. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/Makefile2
-rw-r--r--arch/arm/mach-imx/clk-pllv1.c66
-rw-r--r--arch/arm/mach-imx/clk.h2
3 files changed, 69 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index ab939c5046c3..7e71b39f4073 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -11,6 +11,8 @@ obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clock-imx35.o ehci-imx35.o pm-i
11 11
12obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clock-mx51-mx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o 12obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clock-mx51-mx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
13 13
14obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o
15
14# Support for CMOS sensor interface 16# Support for CMOS sensor interface
15obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o 17obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
16 18
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c
new file mode 100644
index 000000000000..2d856f9ccf59
--- /dev/null
+++ b/arch/arm/mach-imx/clk-pllv1.c
@@ -0,0 +1,66 @@
1#include <linux/clk.h>
2#include <linux/clk-provider.h>
3#include <linux/io.h>
4#include <linux/slab.h>
5#include <linux/kernel.h>
6#include <linux/err.h>
7#include <mach/common.h>
8#include <mach/hardware.h>
9#include <mach/clock.h>
10#include "clk.h"
11
12/**
13 * pll v1
14 *
15 * @clk_hw clock source
16 * @parent the parent clock name
17 * @base base address of pll registers
18 *
19 * PLL clock version 1, found on i.MX1/21/25/27/31/35
20 */
21struct clk_pllv1 {
22 struct clk_hw hw;
23 void __iomem *base;
24};
25
26#define to_clk_pllv1(clk) (container_of(clk, struct clk_pllv1, clk))
27
28static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,
29 unsigned long parent_rate)
30{
31 struct clk_pllv1 *pll = to_clk_pllv1(hw);
32
33 return mxc_decode_pll(readl(pll->base), parent_rate);
34}
35
36struct clk_ops clk_pllv1_ops = {
37 .recalc_rate = clk_pllv1_recalc_rate,
38};
39
40struct clk *imx_clk_pllv1(const char *name, const char *parent,
41 void __iomem *base)
42{
43 struct clk_pllv1 *pll;
44 struct clk *clk;
45 struct clk_init_data init;
46
47 pll = kmalloc(sizeof(*pll), GFP_KERNEL);
48 if (!pll)
49 return ERR_PTR(-ENOMEM);
50
51 pll->base = base;
52
53 init.name = name;
54 init.ops = &clk_pllv1_ops;
55 init.flags = 0;
56 init.parent_names = &parent;
57 init.num_parents = 1;
58
59 pll->hw.init = &init;
60
61 clk = clk_register(NULL, &pll->hw);
62 if (IS_ERR(clk))
63 kfree(pll);
64
65 return clk;
66}
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h
index 00f2590e0b38..8a4aee61866a 100644
--- a/arch/arm/mach-imx/clk.h
+++ b/arch/arm/mach-imx/clk.h
@@ -5,7 +5,7 @@
5#include <linux/clk-provider.h> 5#include <linux/clk-provider.h>
6#include <mach/clock.h> 6#include <mach/clock.h>
7 7
8struct clk *imx_clk_pllv1(const char *name, char *parent, 8struct clk *imx_clk_pllv1(const char *name, const char *parent,
9 void __iomem *base); 9 void __iomem *base);
10 10
11static inline struct clk *imx_clk_fixed(const char *name, int rate) 11static inline struct clk *imx_clk_fixed(const char *name, int rate)