ARM: Orion: DT support for IRQ and GPIO Controllers

Both IRQ and GPIO controllers can now be represented in DT.  The IRQ
controllers are setup first, and then the GPIO controllers. Interrupts
for GPIO lines are placed directly after the main interrupts in the
interrupt space.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Josh Coombs <josh.coombs@gmail.com>
Tested-by: Simon Baatz <gmbnomis@gmail.com>

1 files changed, 29 insertions, 29 deletions

diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index f07fd16e0c9b..9bc97a5baaa8 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -20,22 +20,6 @@
 #include <mach/bridge-regs.h>
 #include "common.h"
 
-static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
-        int irqoff;
-        BUG_ON(irq < IRQ_DOVE_GPIO_0_7 || irq > IRQ_DOVE_HIGH_GPIO);
-
-        irqoff = irq <= IRQ_DOVE_GPIO_16_23 ? irq - IRQ_DOVE_GPIO_0_7 :
-                3 + irq - IRQ_DOVE_GPIO_24_31;
-
-        orion_gpio_irq_handler(irqoff << 3);
-        if (irq == IRQ_DOVE_HIGH_GPIO) {
-                orion_gpio_irq_handler(40);
-                orion_gpio_irq_handler(48);
-                orion_gpio_irq_handler(56);
-        }
-}
-
 static void pmu_irq_mask(struct irq_data *d)
 {
         int pin = irq_to_pmu(d->irq);
@@ -90,6 +74,27 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
         }
 }
 
+static int __initdata gpio0_irqs[4] = {
+        IRQ_DOVE_GPIO_0_7,
+        IRQ_DOVE_GPIO_8_15,
+        IRQ_DOVE_GPIO_16_23,
+        IRQ_DOVE_GPIO_24_31,
+};
+
+static int __initdata gpio1_irqs[4] = {
+        IRQ_DOVE_HIGH_GPIO,
+        0,
+        0,
+        0,
+};
+
+static int __initdata gpio2_irqs[4] = {
+        0,
+        0,
+        0,
+        0,
+};
+
 void __init dove_init_irq(void)
 {
         int i;
@@ -100,19 +105,14 @@ void __init dove_init_irq(void)
         /*
          * Initialize gpiolib for GPIOs 0-71.
          */
-        orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
-                        IRQ_DOVE_GPIO_START);
-        irq_set_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
-        irq_set_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
-        irq_set_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
-        irq_set_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
-
-        orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
-                        IRQ_DOVE_GPIO_START + 32);
-        irq_set_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
-
-        orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
-                        IRQ_DOVE_GPIO_START + 64);
+        orion_gpio_init(NULL, 0, 32, (void __iomem *)DOVE_GPIO_LO_VIRT_BASE, 0,
+                        IRQ_DOVE_GPIO_START, gpio0_irqs);
+
+        orion_gpio_init(NULL, 32, 32, (void __iomem *)DOVE_GPIO_HI_VIRT_BASE, 0,
+                        IRQ_DOVE_GPIO_START + 32, gpio1_irqs);
+
+        orion_gpio_init(NULL, 64, 8, (void __iomem *)DOVE_GPIO2_VIRT_BASE, 0,
+                        IRQ_DOVE_GPIO_START + 64, gpio2_irqs);
 
         /*
          * Mask and clear PMU interrupts