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authorMac Lin <mkl0301@gmail.com>2010-11-22 11:32:44 -0500
committerAnton Vorontsov <cbouatmailru@gmail.com>2010-11-26 13:10:51 -0500
commitcf36797f35676dafae9d44484391ac7f56b2485a (patch)
treecd2b6a20e50a0ffb96411ceb0d9b0906e2faf674 /arch/arm/mach-cns3xxx/include
parent38e64ba0f13918d11e50bbd5bb775781ccd6439d (diff)
ARM: cns3xxx: Add architecture definition for EHCI/OHCI controller
This patch add plateform_device for EHCI and OHCI controller on CNS3XXX. Power reference count (usb_pwr_ref) is used to control enabling and disabling the single clock control for both EHCI and OHCI controller. It also removes EHCI/OHCI unused virtual address definitions. Signed-off-by: Mac Lin <mkl0301@gmail.com> Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
Diffstat (limited to 'arch/arm/mach-cns3xxx/include')
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/cns3xxx.h2
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/pm.h4
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
index 6dbce13771ca..191c8e57f289 100644
--- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
+++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
@@ -165,7 +165,6 @@
165#define CNS3XXX_USBOTG_BASE_VIRT 0xFFF15000 165#define CNS3XXX_USBOTG_BASE_VIRT 0xFFF15000
166 166
167#define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */ 167#define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */
168#define CNS3XXX_USB_BASE_VIRT 0xFFF16000
169 168
170#define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */ 169#define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */
171#define CNS3XXX_SATA2_SIZE SZ_16M 170#define CNS3XXX_SATA2_SIZE SZ_16M
@@ -184,7 +183,6 @@
184#define CNS3XXX_2DG_BASE_VIRT 0xFFF1B000 183#define CNS3XXX_2DG_BASE_VIRT 0xFFF1B000
185 184
186#define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */ 185#define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */
187#define CNS3XXX_USB_OHCI_BASE_VIRT 0xFFF1C000
188 186
189#define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */ 187#define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */
190#define CNS3XXX_L2C_BASE_VIRT 0xFFF27000 188#define CNS3XXX_L2C_BASE_VIRT 0xFFF27000
diff --git a/arch/arm/mach-cns3xxx/include/mach/pm.h b/arch/arm/mach-cns3xxx/include/mach/pm.h
index 102617bdb45b..6eae7f764d1d 100644
--- a/arch/arm/mach-cns3xxx/include/mach/pm.h
+++ b/arch/arm/mach-cns3xxx/include/mach/pm.h
@@ -11,9 +11,13 @@
11#ifndef __CNS3XXX_PM_H 11#ifndef __CNS3XXX_PM_H
12#define __CNS3XXX_PM_H 12#define __CNS3XXX_PM_H
13 13
14#include <asm/atomic.h>
15
14void cns3xxx_pwr_clk_en(unsigned int block); 16void cns3xxx_pwr_clk_en(unsigned int block);
15void cns3xxx_pwr_clk_dis(unsigned int block); 17void cns3xxx_pwr_clk_dis(unsigned int block);
16void cns3xxx_pwr_power_up(unsigned int block); 18void cns3xxx_pwr_power_up(unsigned int block);
17void cns3xxx_pwr_power_down(unsigned int block); 19void cns3xxx_pwr_power_down(unsigned int block);
18 20
21extern atomic_t usb_pwr_ref;
22
19#endif /* __CNS3XXX_PM_H */ 23#endif /* __CNS3XXX_PM_H */