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authorNicolas Ferre <nicolas.ferre@atmel.com>2010-07-20 13:18:51 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2012-03-01 07:38:50 -0500
commit582d5fbd4e81e7debe5f3a0e6ce1a0bcdf636c6e (patch)
treedd51bedcd86e887b44d85b79b9d506a79599af0f /arch/arm/mach-at91/include/mach
parent9a9fe01ecf68c9b100499908122944597c63f21f (diff)
ARM: at91/pio: add new PIO3 features
This patch adds the support for new PIO controller found on some at91sam SOCs. - more peripheral multiplexing - more features to configure on a PIO (pull-down, Schmitt trigger, debouncer) - support for several IRQ triggering features (type and polarity) Support for those new features are retrieved from the device tree compatibility string. Debugfs at91_gpio file is updated to monitor configuration. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach')
-rw-r--r--arch/arm/mach-at91/include/mach/at91_pio.h25
-rw-r--r--arch/arm/mach-at91/include/mach/gpio.h5
2 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h
index c6a31bf8a5c6..732b11c37f1a 100644
--- a/arch/arm/mach-at91/include/mach/at91_pio.h
+++ b/arch/arm/mach-at91/include/mach/at91_pio.h
@@ -40,10 +40,35 @@
40#define PIO_PUER 0x64 /* Pull-up Enable Register */ 40#define PIO_PUER 0x64 /* Pull-up Enable Register */
41#define PIO_PUSR 0x68 /* Pull-up Status Register */ 41#define PIO_PUSR 0x68 /* Pull-up Status Register */
42#define PIO_ASR 0x70 /* Peripheral A Select Register */ 42#define PIO_ASR 0x70 /* Peripheral A Select Register */
43#define PIO_ABCDSR1 0x70 /* Peripheral ABCD Select Register 1 [some sam9 only] */
43#define PIO_BSR 0x74 /* Peripheral B Select Register */ 44#define PIO_BSR 0x74 /* Peripheral B Select Register */
45#define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */
44#define PIO_ABSR 0x78 /* AB Status Register */ 46#define PIO_ABSR 0x78 /* AB Status Register */
47#define PIO_IFSCDR 0x80 /* Input Filter Slow Clock Disable Register */
48#define PIO_IFSCER 0x84 /* Input Filter Slow Clock Enable Register */
49#define PIO_IFSCSR 0x88 /* Input Filter Slow Clock Status Register */
50#define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */
51#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */
52#define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */
53#define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */
54#define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */
45#define PIO_OWER 0xa0 /* Output Write Enable Register */ 55#define PIO_OWER 0xa0 /* Output Write Enable Register */
46#define PIO_OWDR 0xa4 /* Output Write Disable Register */ 56#define PIO_OWDR 0xa4 /* Output Write Disable Register */
47#define PIO_OWSR 0xa8 /* Output Write Status Register */ 57#define PIO_OWSR 0xa8 /* Output Write Status Register */
58#define PIO_AIMER 0xb0 /* Additional Interrupt Modes Enable Register */
59#define PIO_AIMDR 0xb4 /* Additional Interrupt Modes Disable Register */
60#define PIO_AIMMR 0xb8 /* Additional Interrupt Modes Mask Register */
61#define PIO_ESR 0xc0 /* Edge Select Register */
62#define PIO_LSR 0xc4 /* Level Select Register */
63#define PIO_ELSR 0xc8 /* Edge/Level Status Register */
64#define PIO_FELLSR 0xd0 /* Falling Edge/Low Level Select Register */
65#define PIO_REHLSR 0xd4 /* Rising Edge/ High Level Select Register */
66#define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */
67#define PIO_SCHMITT 0x100 /* Schmitt Trigger Register */
68
69#define ABCDSR_PERIPH_A 0x0
70#define ABCDSR_PERIPH_B 0x1
71#define ABCDSR_PERIPH_C 0x2
72#define ABCDSR_PERIPH_D 0x3
48 73
49#endif 74#endif
diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h
index 7cf009be8d0d..eed465ab0dd7 100644
--- a/arch/arm/mach-at91/include/mach/gpio.h
+++ b/arch/arm/mach-at91/include/mach/gpio.h
@@ -191,10 +191,15 @@
191extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup); 191extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup);
192extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup); 192extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
193extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup); 193extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup);
194extern int __init_or_module at91_set_C_periph(unsigned pin, int use_pullup);
195extern int __init_or_module at91_set_D_periph(unsigned pin, int use_pullup);
194extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup); 196extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup);
195extern int __init_or_module at91_set_gpio_output(unsigned pin, int value); 197extern int __init_or_module at91_set_gpio_output(unsigned pin, int value);
196extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on); 198extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on);
199extern int __init_or_module at91_set_debounce(unsigned pin, int is_on, int div);
197extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on); 200extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on);
201extern int __init_or_module at91_set_pulldown(unsigned pin, int is_on);
202extern int __init_or_module at91_disable_schmitt_trig(unsigned pin);
198 203
199/* callable at any time */ 204/* callable at any time */
200extern int at91_set_gpio_value(unsigned pin, int value); 205extern int at91_set_gpio_value(unsigned pin, int value);
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-17 20:11:29 -0400