diff options
author | Alexander Shiyan <shc_work@mail.ru> | 2012-05-12 18:40:57 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-05-13 15:53:03 -0400 |
commit | 94bd32792e905ae25f63491f06d7d3018b350dd2 (patch) | |
tree | 354e3637ab09679d1a31feceb640cf095bc11332 /arch/arm/include | |
parent | 304b2c684e42af5b72d643322f783d88538dc817 (diff) |
ARM: clps711x: Combine header files into one for clps711x-targets
Current ARM7 Cirrus Logic product line contains only 3 cpu.
EP7312 - Fully functional.
EP7309 - Missing SDRAM interface.
EP7311 - Missing DAI.
It makes no sense to separate the header files to identify these differences,
it is only necessary to keep in mind the presence or lack of any features of
a specific CPU when writing code.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/hardware/clps7111.h | 59 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/cs89712.h | 49 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/ep7211.h | 31 | ||||
-rw-r--r-- | arch/arm/include/asm/hardware/ep7212.h | 71 |
4 files changed, 59 insertions, 151 deletions
diff --git a/arch/arm/include/asm/hardware/clps7111.h b/arch/arm/include/asm/hardware/clps7111.h index 78e2856b06dc..0998606920b1 100644 --- a/arch/arm/include/asm/hardware/clps7111.h +++ b/arch/arm/include/asm/hardware/clps7111.h | |||
@@ -27,9 +27,11 @@ | |||
27 | 27 | ||
28 | #define PADR (0x0000) | 28 | #define PADR (0x0000) |
29 | #define PBDR (0x0001) | 29 | #define PBDR (0x0001) |
30 | #define PCDR (0x0002) | ||
30 | #define PDDR (0x0003) | 31 | #define PDDR (0x0003) |
31 | #define PADDR (0x0040) | 32 | #define PADDR (0x0040) |
32 | #define PBDDR (0x0041) | 33 | #define PBDDR (0x0041) |
34 | #define PCDDR (0x0042) | ||
33 | #define PDDDR (0x0043) | 35 | #define PDDDR (0x0043) |
34 | #define PEDR (0x0080) | 36 | #define PEDR (0x0080) |
35 | #define PEDDR (0x00c0) | 37 | #define PEDDR (0x00c0) |
@@ -76,6 +78,18 @@ | |||
76 | #define SS2POP (0x16c0) | 78 | #define SS2POP (0x16c0) |
77 | #define KBDEOI (0x1700) | 79 | #define KBDEOI (0x1700) |
78 | 80 | ||
81 | #define DAIR (0x2000) | ||
82 | #define DAIR0 (0x2040) | ||
83 | #define DAIDR1 (0x2080) | ||
84 | #define DAIDR2 (0x20c0) | ||
85 | #define DAISR (0x2100) | ||
86 | #define SYSCON3 (0x2200) | ||
87 | #define INTSR3 (0x2240) | ||
88 | #define INTMR3 (0x2280) | ||
89 | #define LEDFLSH (0x22c0) | ||
90 | #define SDCONF (0x2300) | ||
91 | #define SDRFPR (0x2340) | ||
92 | |||
79 | /* common bits: SYSCON1 / SYSCON2 */ | 93 | /* common bits: SYSCON1 / SYSCON2 */ |
80 | #define SYSCON_UARTEN (1 << 8) | 94 | #define SYSCON_UARTEN (1 << 8) |
81 | 95 | ||
@@ -172,4 +186,49 @@ | |||
172 | #define SYNCIO_SMCKEN (1 << 13) | 186 | #define SYNCIO_SMCKEN (1 << 13) |
173 | #define SYNCIO_TXFRMEN (1 << 14) | 187 | #define SYNCIO_TXFRMEN (1 << 14) |
174 | 188 | ||
189 | #define DAIR_DAIEN (1 << 16) | ||
190 | #define DAIR_ECS (1 << 17) | ||
191 | #define DAIR_LCTM (1 << 19) | ||
192 | #define DAIR_LCRM (1 << 20) | ||
193 | #define DAIR_RCTM (1 << 21) | ||
194 | #define DAIR_RCRM (1 << 22) | ||
195 | #define DAIR_LBM (1 << 23) | ||
196 | |||
197 | #define DAIDR2_FIFOEN (1 << 15) | ||
198 | #define DAIDR2_FIFOLEFT (0x0d << 16) | ||
199 | #define DAIDR2_FIFORIGHT (0x11 << 16) | ||
200 | |||
201 | #define DAISR_RCTS (1 << 0) | ||
202 | #define DAISR_RCRS (1 << 1) | ||
203 | #define DAISR_LCTS (1 << 2) | ||
204 | #define DAISR_LCRS (1 << 3) | ||
205 | #define DAISR_RCTU (1 << 4) | ||
206 | #define DAISR_RCRO (1 << 5) | ||
207 | #define DAISR_LCTU (1 << 6) | ||
208 | #define DAISR_LCRO (1 << 7) | ||
209 | #define DAISR_RCNF (1 << 8) | ||
210 | #define DAISR_RCNE (1 << 9) | ||
211 | #define DAISR_LCNF (1 << 10) | ||
212 | #define DAISR_LCNE (1 << 11) | ||
213 | #define DAISR_FIFO (1 << 12) | ||
214 | |||
215 | #define SYSCON3_ADCCON (1 << 0) | ||
216 | #define SYSCON3_DAISEL (1 << 3) | ||
217 | #define SYSCON3_ADCCKNSEN (1 << 4) | ||
218 | #define SYSCON3_FASTWAKE (1 << 8) | ||
219 | #define SYSCON3_DAIEN (1 << 9) | ||
220 | |||
221 | #define SDCONF_ACTIVE (1 << 10) | ||
222 | #define SDCONF_CLKCTL (1 << 9) | ||
223 | #define SDCONF_WIDTH_4 (0 << 7) | ||
224 | #define SDCONF_WIDTH_8 (1 << 7) | ||
225 | #define SDCONF_WIDTH_16 (2 << 7) | ||
226 | #define SDCONF_WIDTH_32 (3 << 7) | ||
227 | #define SDCONF_SIZE_16 (0 << 5) | ||
228 | #define SDCONF_SIZE_64 (1 << 5) | ||
229 | #define SDCONF_SIZE_128 (2 << 5) | ||
230 | #define SDCONF_SIZE_256 (3 << 5) | ||
231 | #define SDCONF_CASLAT_2 (2) | ||
232 | #define SDCONF_CASLAT_3 (3) | ||
233 | |||
175 | #endif /* __ASM_HARDWARE_CLPS7111_H */ | 234 | #endif /* __ASM_HARDWARE_CLPS7111_H */ |
diff --git a/arch/arm/include/asm/hardware/cs89712.h b/arch/arm/include/asm/hardware/cs89712.h deleted file mode 100644 index f75626933e94..000000000000 --- a/arch/arm/include/asm/hardware/cs89712.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/hardware/cs89712.h | ||
3 | * | ||
4 | * This file contains the hardware definitions of the CS89712 | ||
5 | * additional internal registers. | ||
6 | * | ||
7 | * Copyright (C) 2001 Thomas Gleixner autronix automation <gleixner@autronix.de> | ||
8 | * | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | */ | ||
24 | #ifndef __ASM_HARDWARE_CS89712_H | ||
25 | #define __ASM_HARDWARE_CS89712_H | ||
26 | |||
27 | /* | ||
28 | * CS89712 additional registers | ||
29 | */ | ||
30 | |||
31 | #define PCDR 0x0002 /* Port C Data register ---------------------------- */ | ||
32 | #define PCDDR 0x0042 /* Port C Data Direction register ------------------ */ | ||
33 | #define SDCONF 0x2300 /* SDRAM Configuration register ---------------------*/ | ||
34 | #define SDRFPR 0x2340 /* SDRAM Refresh period register --------------------*/ | ||
35 | |||
36 | #define SDCONF_ACTIVE (1 << 10) | ||
37 | #define SDCONF_CLKCTL (1 << 9) | ||
38 | #define SDCONF_WIDTH_4 (0 << 7) | ||
39 | #define SDCONF_WIDTH_8 (1 << 7) | ||
40 | #define SDCONF_WIDTH_16 (2 << 7) | ||
41 | #define SDCONF_WIDTH_32 (3 << 7) | ||
42 | #define SDCONF_SIZE_16 (0 << 5) | ||
43 | #define SDCONF_SIZE_64 (1 << 5) | ||
44 | #define SDCONF_SIZE_128 (2 << 5) | ||
45 | #define SDCONF_SIZE_256 (3 << 5) | ||
46 | #define SDCONF_CASLAT_2 (2) | ||
47 | #define SDCONF_CASLAT_3 (3) | ||
48 | |||
49 | #endif /* __ASM_HARDWARE_CS89712_H */ | ||
diff --git a/arch/arm/include/asm/hardware/ep7211.h b/arch/arm/include/asm/hardware/ep7211.h deleted file mode 100644 index 4b3f86bf1bfc..000000000000 --- a/arch/arm/include/asm/hardware/ep7211.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/hardware/ep7211.h | ||
3 | * | ||
4 | * This file contains the hardware definitions of the EP7211 internal | ||
5 | * registers. | ||
6 | * | ||
7 | * Copyright (C) 2001 Blue Mug, Inc. All Rights Reserved. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | #ifndef __ASM_HARDWARE_EP7211_H | ||
24 | #define __ASM_HARDWARE_EP7211_H | ||
25 | |||
26 | /* | ||
27 | * XXX miket@bluemug.com: need to introduce EP7211 registers (those not | ||
28 | * present in 7212) here. | ||
29 | */ | ||
30 | |||
31 | #endif /* __ASM_HARDWARE_EP7211_H */ | ||
diff --git a/arch/arm/include/asm/hardware/ep7212.h b/arch/arm/include/asm/hardware/ep7212.h deleted file mode 100644 index aad07f77dcff..000000000000 --- a/arch/arm/include/asm/hardware/ep7212.h +++ /dev/null | |||
@@ -1,71 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/include/asm/hardware/ep7212.h | ||
3 | * | ||
4 | * This file contains the hardware definitions of the EP7212 internal | ||
5 | * registers. | ||
6 | * | ||
7 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | #ifndef __ASM_HARDWARE_EP7212_H | ||
24 | #define __ASM_HARDWARE_EP7212_H | ||
25 | |||
26 | /* | ||
27 | * These registers are specific to the EP7212 only | ||
28 | */ | ||
29 | #define DAIR 0x2000 | ||
30 | #define DAIR0 0x2040 | ||
31 | #define DAIDR1 0x2080 | ||
32 | #define DAIDR2 0x20c0 | ||
33 | #define DAISR 0x2100 | ||
34 | #define SYSCON3 0x2200 | ||
35 | #define INTSR3 0x2240 | ||
36 | #define INTMR3 0x2280 | ||
37 | #define LEDFLSH 0x22c0 | ||
38 | |||
39 | #define DAIR_DAIEN (1 << 16) | ||
40 | #define DAIR_ECS (1 << 17) | ||
41 | #define DAIR_LCTM (1 << 19) | ||
42 | #define DAIR_LCRM (1 << 20) | ||
43 | #define DAIR_RCTM (1 << 21) | ||
44 | #define DAIR_RCRM (1 << 22) | ||
45 | #define DAIR_LBM (1 << 23) | ||
46 | |||
47 | #define DAIDR2_FIFOEN (1 << 15) | ||
48 | #define DAIDR2_FIFOLEFT (0x0d << 16) | ||
49 | #define DAIDR2_FIFORIGHT (0x11 << 16) | ||
50 | |||
51 | #define DAISR_RCTS (1 << 0) | ||
52 | #define DAISR_RCRS (1 << 1) | ||
53 | #define DAISR_LCTS (1 << 2) | ||
54 | #define DAISR_LCRS (1 << 3) | ||
55 | #define DAISR_RCTU (1 << 4) | ||
56 | #define DAISR_RCRO (1 << 5) | ||
57 | #define DAISR_LCTU (1 << 6) | ||
58 | #define DAISR_LCRO (1 << 7) | ||
59 | #define DAISR_RCNF (1 << 8) | ||
60 | #define DAISR_RCNE (1 << 9) | ||
61 | #define DAISR_LCNF (1 << 10) | ||
62 | #define DAISR_LCNE (1 << 11) | ||
63 | #define DAISR_FIFO (1 << 12) | ||
64 | |||
65 | #define SYSCON3_ADCCON (1 << 0) | ||
66 | #define SYSCON3_DAISEL (1 << 3) | ||
67 | #define SYSCON3_ADCCKNSEN (1 << 4) | ||
68 | #define SYSCON3_FASTWAKE (1 << 8) | ||
69 | #define SYSCON3_DAIEN (1 << 9) | ||
70 | |||
71 | #endif /* __ASM_HARDWARE_EP7212_H */ | ||