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authorOlof Johansson <olof@lixom.net>2012-09-24 00:51:39 -0400
committerOlof Johansson <olof@lixom.net>2012-09-24 00:51:39 -0400
commitdb404e72bb5432c886ff0ea42e7b31d16be0c837 (patch)
tree91cf9618fa0b5233115abe6863d2f8a36390c050 /arch/arm/boot
parent40169a7c399346281da55ed9905a104d3da47945 (diff)
parente9a91de7602a0a6999f23a2981db68b69aa695a7 (diff)
Merge tag 'vt8500-for-next' of git://git.code.sf.net/p/linuxwmt/code into next/dt
From Tony Prisk: Update arch-vt8500 and drivers to device tree and remove existing non-dt code. * tag 'vt8500-for-next' of git://git.code.sf.net/p/linuxwmt/code: arm: vt8500: Update arch-vt8500 to devicetree support. arm: vt8500: gpio: Devicetree support for arch-vt8500 arm: vt8500: doc: Add device tree bindings for arch-vt8500 devices arm: vt8500: clk: Add Common Clock Framework support video: vt8500: Add devicetree support for vt8500-fb and wm8505-fb serial: vt8500: Add devicetree support for vt8500-serial rtc: vt8500: Add devicetree support for vt8500-rtc arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Resolved add/change conflict in drivers/clk/Makefile. Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/vt8500-bv07.dts36
-rw-r--r--arch/arm/boot/dts/vt8500.dtsi116
-rw-r--r--arch/arm/boot/dts/wm8505-ref.dts36
-rw-r--r--arch/arm/boot/dts/wm8505.dtsi143
-rw-r--r--arch/arm/boot/dts/wm8650-mid.dts36
-rw-r--r--arch/arm/boot/dts/wm8650.dtsi147
6 files changed, 514 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vt8500-bv07.dts b/arch/arm/boot/dts/vt8500-bv07.dts
new file mode 100644
index 000000000000..567cf4e8ab84
--- /dev/null
+++ b/arch/arm/boot/dts/vt8500-bv07.dts
@@ -0,0 +1,36 @@
1/*
2 * vt8500-bv07.dts - Device tree file for Benign BV07 Netbook
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * Licensed under GPLv2 or later
7 */
8
9/dts-v1/;
10/include/ "vt8500.dtsi"
11
12/ {
13 model = "Benign BV07 Netbook";
14
15 /*
16 * Display node is based on Sascha Hauer's patch on dri-devel.
17 * Added a bpp property to calculate the size of the framebuffer
18 * until the binding is formalized.
19 */
20 display: display@0 {
21 modes {
22 mode0: mode@0 {
23 hactive = <800>;
24 vactive = <480>;
25 hback-porch = <88>;
26 hfront-porch = <40>;
27 hsync-len = <0>;
28 vback-porch = <32>;
29 vfront-porch = <11>;
30 vsync-len = <1>;
31 clock = <0>; /* unused but required */
32 bpp = <16>; /* non-standard but required */
33 };
34 };
35 };
36};
diff --git a/arch/arm/boot/dts/vt8500.dtsi b/arch/arm/boot/dts/vt8500.dtsi
new file mode 100644
index 000000000000..d8645e990b21
--- /dev/null
+++ b/arch/arm/boot/dts/vt8500.dtsi
@@ -0,0 +1,116 @@
1/*
2 * vt8500.dtsi - Device tree file for VIA VT8500 SoC
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * Licensed under GPLv2 or later
7 */
8
9/include/ "skeleton.dtsi"
10
11/ {
12 compatible = "via,vt8500";
13
14 soc {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "simple-bus";
18 ranges;
19 interrupt-parent = <&intc>;
20
21 intc: interrupt-controller@d8140000 {
22 compatible = "via,vt8500-intc";
23 interrupt-controller;
24 reg = <0xd8140000 0x10000>;
25 #interrupt-cells = <1>;
26 };
27
28 gpio: gpio-controller@d8110000 {
29 compatible = "via,vt8500-gpio";
30 gpio-controller;
31 reg = <0xd8110000 0x10000>;
32 #gpio-cells = <3>;
33 };
34
35 pmc@d8130000 {
36 compatible = "via,vt8500-pmc";
37 reg = <0xd8130000 0x1000>;
38
39 clocks {
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 ref24: ref24M {
44 #clock-cells = <0>;
45 compatible = "fixed-clock";
46 clock-frequency = <24000000>;
47 };
48 };
49 };
50
51 timer@d8130100 {
52 compatible = "via,vt8500-timer";
53 reg = <0xd8130100 0x28>;
54 interrupts = <36>;
55 };
56
57 ehci@d8007900 {
58 compatible = "via,vt8500-ehci";
59 reg = <0xd8007900 0x200>;
60 interrupts = <43>;
61 };
62
63 uhci@d8007b00 {
64 compatible = "platform-uhci";
65 reg = <0xd8007b00 0x200>;
66 interrupts = <43>;
67 };
68
69 fb@d800e400 {
70 compatible = "via,vt8500-fb";
71 reg = <0xd800e400 0x400>;
72 interrupts = <12>;
73 display = <&display>;
74 default-mode = <&mode0>;
75 };
76
77 ge_rops@d8050400 {
78 compatible = "wm,prizm-ge-rops";
79 reg = <0xd8050400 0x100>;
80 };
81
82 uart@d8200000 {
83 compatible = "via,vt8500-uart";
84 reg = <0xd8200000 0x1040>;
85 interrupts = <32>;
86 clocks = <&ref24>;
87 };
88
89 uart@d82b0000 {
90 compatible = "via,vt8500-uart";
91 reg = <0xd82b0000 0x1040>;
92 interrupts = <33>;
93 clocks = <&ref24>;
94 };
95
96 uart@d8210000 {
97 compatible = "via,vt8500-uart";
98 reg = <0xd8210000 0x1040>;
99 interrupts = <47>;
100 clocks = <&ref24>;
101 };
102
103 uart@d82c0000 {
104 compatible = "via,vt8500-uart";
105 reg = <0xd82c0000 0x1040>;
106 interrupts = <50>;
107 clocks = <&ref24>;
108 };
109
110 rtc@d8100000 {
111 compatible = "via,vt8500-rtc";
112 reg = <0xd8100000 0x10000>;
113 interrupts = <48>;
114 };
115 };
116};
diff --git a/arch/arm/boot/dts/wm8505-ref.dts b/arch/arm/boot/dts/wm8505-ref.dts
new file mode 100644
index 000000000000..fd4e248074c6
--- /dev/null
+++ b/arch/arm/boot/dts/wm8505-ref.dts
@@ -0,0 +1,36 @@
1/*
2 * wm8505-ref.dts - Device tree file for Wondermedia WM8505 reference netbook
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * Licensed under GPLv2 or later
7 */
8
9/dts-v1/;
10/include/ "wm8505.dtsi"
11
12/ {
13 model = "Wondermedia WM8505 Netbook";
14
15 /*
16 * Display node is based on Sascha Hauer's patch on dri-devel.
17 * Added a bpp property to calculate the size of the framebuffer
18 * until the binding is formalized.
19 */
20 display: display@0 {
21 modes {
22 mode0: mode@0 {
23 hactive = <800>;
24 vactive = <480>;
25 hback-porch = <88>;
26 hfront-porch = <40>;
27 hsync-len = <0>;
28 vback-porch = <32>;
29 vfront-porch = <11>;
30 vsync-len = <1>;
31 clock = <0>; /* unused but required */
32 bpp = <32>; /* non-standard but required */
33 };
34 };
35 };
36};
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
new file mode 100644
index 000000000000..b459691655ab
--- /dev/null
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -0,0 +1,143 @@
1/*
2 * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * Licensed under GPLv2 or later
7 */
8
9/include/ "skeleton.dtsi"
10
11/ {
12 compatible = "wm,wm8505";
13
14 cpus {
15 cpu@0 {
16 compatible = "arm,arm926ejs";
17 };
18 };
19
20 soc {
21 #address-cells = <1>;
22 #size-cells = <1>;
23 compatible = "simple-bus";
24 ranges;
25 interrupt-parent = <&intc0>;
26
27 intc0: interrupt-controller@d8140000 {
28 compatible = "via,vt8500-intc";
29 interrupt-controller;
30 reg = <0xd8140000 0x10000>;
31 #interrupt-cells = <1>;
32 };
33
34 /* Secondary IC cascaded to intc0 */
35 intc1: interrupt-controller@d8150000 {
36 compatible = "via,vt8500-intc";
37 interrupt-controller;
38 #interrupt-cells = <1>;
39 reg = <0xD8150000 0x10000>;
40 interrupts = <56 57 58 59 60 61 62 63>;
41 };
42
43 gpio: gpio-controller@d8110000 {
44 compatible = "wm,wm8505-gpio";
45 gpio-controller;
46 reg = <0xd8110000 0x10000>;
47 #gpio-cells = <3>;
48 };
49
50 pmc@d8130000 {
51 compatible = "via,vt8500-pmc";
52 reg = <0xd8130000 0x1000>;
53 clocks {
54 #address-cells = <1>;
55 #size-cells = <0>;
56
57 ref24: ref24M {
58 #clock-cells = <0>;
59 compatible = "fixed-clock";
60 clock-frequency = <24000000>;
61 };
62 };
63 };
64
65 timer@d8130100 {
66 compatible = "via,vt8500-timer";
67 reg = <0xd8130100 0x28>;
68 interrupts = <36>;
69 };
70
71 ehci@d8007100 {
72 compatible = "via,vt8500-ehci";
73 reg = <0xd8007100 0x200>;
74 interrupts = <43>;
75 };
76
77 uhci@d8007300 {
78 compatible = "platform-uhci";
79 reg = <0xd8007300 0x200>;
80 interrupts = <43>;
81 };
82
83 fb@d8050800 {
84 compatible = "wm,wm8505-fb";
85 reg = <0xd8050800 0x200>;
86 display = <&display>;
87 default-mode = <&mode0>;
88 };
89
90 ge_rops@d8050400 {
91 compatible = "wm,prizm-ge-rops";
92 reg = <0xd8050400 0x100>;
93 };
94
95 uart@d8200000 {
96 compatible = "via,vt8500-uart";
97 reg = <0xd8200000 0x1040>;
98 interrupts = <32>;
99 clocks = <&ref24>;
100 };
101
102 uart@d82b0000 {
103 compatible = "via,vt8500-uart";
104 reg = <0xd82b0000 0x1040>;
105 interrupts = <33>;
106 clocks = <&ref24>;
107 };
108
109 uart@d8210000 {
110 compatible = "via,vt8500-uart";
111 reg = <0xd8210000 0x1040>;
112 interrupts = <47>;
113 clocks = <&ref24>;
114 };
115
116 uart@d82c0000 {
117 compatible = "via,vt8500-uart";
118 reg = <0xd82c0000 0x1040>;
119 interrupts = <50>;
120 clocks = <&ref24>;
121 };
122
123 uart@d8370000 {
124 compatible = "via,vt8500-uart";
125 reg = <0xd8370000 0x1040>;
126 interrupts = <31>;
127 clocks = <&ref24>;
128 };
129
130 uart@d8380000 {
131 compatible = "via,vt8500-uart";
132 reg = <0xd8380000 0x1040>;
133 interrupts = <30>;
134 clocks = <&ref24>;
135 };
136
137 rtc@d8100000 {
138 compatible = "via,vt8500-rtc";
139 reg = <0xd8100000 0x10000>;
140 interrupts = <48>;
141 };
142 };
143};
diff --git a/arch/arm/boot/dts/wm8650-mid.dts b/arch/arm/boot/dts/wm8650-mid.dts
new file mode 100644
index 000000000000..cefd938f842f
--- /dev/null
+++ b/arch/arm/boot/dts/wm8650-mid.dts
@@ -0,0 +1,36 @@
1/*
2 * wm8650-mid.dts - Device tree file for Wondermedia WM8650-MID Tablet
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * Licensed under GPLv2 or later
7 */
8
9/dts-v1/;
10/include/ "wm8650.dtsi"
11
12/ {
13 model = "Wondermedia WM8650-MID Tablet";
14
15 /*
16 * Display node is based on Sascha Hauer's patch on dri-devel.
17 * Added a bpp property to calculate the size of the framebuffer
18 * until the binding is formalized.
19 */
20 display: display@0 {
21 modes {
22 mode0: mode@0 {
23 hactive = <800>;
24 vactive = <480>;
25 hback-porch = <88>;
26 hfront-porch = <40>;
27 hsync-len = <0>;
28 vback-porch = <32>;
29 vfront-porch = <11>;
30 vsync-len = <1>;
31 clock = <0>; /* unused but required */
32 bpp = <16>; /* non-standard but required */
33 };
34 };
35 };
36};
diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
new file mode 100644
index 000000000000..83b9467559bb
--- /dev/null
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -0,0 +1,147 @@
1/*
2 * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
3 *
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
5 *
6 * Licensed under GPLv2 or later
7 */
8
9/include/ "skeleton.dtsi"
10
11/ {
12 compatible = "wm,wm8650";
13
14 soc {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "simple-bus";
18 ranges;
19 interrupt-parent = <&intc0>;
20
21 intc0: interrupt-controller@d8140000 {
22 compatible = "via,vt8500-intc";
23 interrupt-controller;
24 reg = <0xd8140000 0x10000>;
25 #interrupt-cells = <1>;
26 };
27
28 /* Secondary IC cascaded to intc0 */
29 intc1: interrupt-controller@d8150000 {
30 compatible = "via,vt8500-intc";
31 interrupt-controller;
32 #interrupt-cells = <1>;
33 reg = <0xD8150000 0x10000>;
34 interrupts = <56 57 58 59 60 61 62 63>;
35 };
36
37 gpio: gpio-controller@d8110000 {
38 compatible = "wm,wm8650-gpio";
39 gpio-controller;
40 reg = <0xd8110000 0x10000>;
41 #gpio-cells = <3>;
42 };
43
44 pmc@d8130000 {
45 compatible = "via,vt8500-pmc";
46 reg = <0xd8130000 0x1000>;
47
48 clocks {
49 #address-cells = <1>;
50 #size-cells = <0>;
51
52 ref25: ref25M {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
55 clock-frequency = <25000000>;
56 };
57
58 ref24: ref24M {
59 #clock-cells = <0>;
60 compatible = "fixed-clock";
61 clock-frequency = <24000000>;
62 };
63
64 plla: plla {
65 #clock-cells = <0>;
66 compatible = "wm,wm8650-pll-clock";
67 clocks = <&ref25>;
68 reg = <0x200>;
69 };
70
71 pllb: pllb {
72 #clock-cells = <0>;
73 compatible = "wm,wm8650-pll-clock";
74 clocks = <&ref25>;
75 reg = <0x204>;
76 };
77
78 arm: arm {
79 #clock-cells = <0>;
80 compatible = "via,vt8500-device-clock";
81 clocks = <&plla>;
82 divisor-reg = <0x300>;
83 };
84
85 sdhc: sdhc {
86 #clock-cells = <0>;
87 compatible = "via,vt8500-device-clock";
88 clocks = <&pllb>;
89 divisor-reg = <0x328>;
90 divisor-mask = <0x3f>;
91 enable-reg = <0x254>;
92 enable-bit = <18>;
93 };
94 };
95 };
96
97 timer@d8130100 {
98 compatible = "via,vt8500-timer";
99 reg = <0xd8130100 0x28>;
100 interrupts = <36>;
101 };
102
103 ehci@d8007900 {
104 compatible = "via,vt8500-ehci";
105 reg = <0xd8007900 0x200>;
106 interrupts = <43>;
107 };
108
109 uhci@d8007b00 {
110 compatible = "platform-uhci";
111 reg = <0xd8007b00 0x200>;
112 interrupts = <43>;
113 };
114
115 fb@d8050800 {
116 compatible = "wm,wm8505-fb";
117 reg = <0xd8050800 0x200>;
118 display = <&display>;
119 default-mode = <&mode0>;
120 };
121
122 ge_rops@d8050400 {
123 compatible = "wm,prizm-ge-rops";
124 reg = <0xd8050400 0x100>;
125 };
126
127 uart@d8200000 {
128 compatible = "via,vt8500-uart";
129 reg = <0xd8200000 0x1040>;
130 interrupts = <32>;
131 clocks = <&ref24>;
132 };
133
134 uart@d82b0000 {
135 compatible = "via,vt8500-uart";
136 reg = <0xd82b0000 0x1040>;
137 interrupts = <33>;
138 clocks = <&ref24>;
139 };
140
141 rtc@d8100000 {
142 compatible = "via,vt8500-rtc";
143 reg = <0xd8100000 0x10000>;
144 interrupts = <48>;
145 };
146 };
147};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 15:58:43 -0500