ENGR00300439-1 dts: imx6sx-17x17-arm2: add usdhc2 and usdhc4 support

add usdhc2 and usdhc4 support

Signed-off-by: Dong Aisheng <b29396@freescale.com>

2 files changed, 55 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/imx6sx-17x17-arm2.dts b/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
index f653b2130dbd..89d9591f04d5 100644
--- a/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
@@ -209,6 +209,8 @@
         hog {
                 pinctrl_hog_1: hoggrp-1 {
                         fsl,pins = <
+                                MX6SX_PAD_KEY_COL0__GPIO2_IO_10         0x1f059
+                                MX6SX_PAD_KEY_ROW0__GPIO2_IO_15         0x1f059
                                 MX6SX_PAD_QSPI1A_SS0_B__GPIO4_IO_22     0x80000000
                          >;
                 };
@@ -269,6 +271,16 @@
         status = "okay";
 };
 
+&usdhc2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc2_1>;
+        /* need hw rework to enable signal voltage switch */
+        no-1-8-v;
+        keep-power-in-suspend;
+        enable-sdio-wakeup;
+        status = "okay";
+};
+
 &usdhc3 {
         pinctrl-names = "default", "state_100mhz", "state_200mhz";
         pinctrl-0 = <&pinctrl_usdhc3_1>;
@@ -281,3 +293,13 @@
         enable-sdio-wakeup;
         status = "okay";
 };
+
+&usdhc4 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_usdhc4_1>;
+        bus-width = <8>;
+        non-removable;
+        /* need hw rework to enable signal voltage switch */
+        no-1-8-v;
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 5c2e239ae9c8..34bb5d927710 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -338,6 +338,26 @@
                                 status = "disabled";
                         };
 
+                        usdhc1: usdhc@02190000 {
+                                compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
+                                reg = <0x02190000 0x4000>;
+                                interrupts = <0 22 0x04>;
+                                clocks = <&clks IMX6SX_CLK_USDHC1>, <&clks IMX6SX_CLK_USDHC1>, <&clks IMX6SX_CLK_USDHC1>;
+                                clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
+                                status = "disabled";
+                        };
+
+                        usdhc2: usdhc@02194000 {
+                                compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
+                                reg = <0x02194000 0x4000>;
+                                interrupts = <0 23 0x04>;
+                                clocks = <&clks IMX6SX_CLK_USDHC2>, <&clks IMX6SX_CLK_USDHC2>, <&clks IMX6SX_CLK_USDHC2>;
+                                clock-names = "ipg", "ahb", "per";
+                                bus-width = <4>;
+                                status = "disabled";
+                        };
+
                         usdhc3: usdhc@02198000 {
                                 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
                                 reg = <0x02198000 0x4000>;
@@ -621,6 +641,19 @@
                 };
         };
 
+        usdhc2 {
+                pinctrl_usdhc2_1: usdhc2grp-1 {
+                        fsl,pins = <
+                                MX6SX_PAD_SD2_CMD__USDHC2_CMD     0x17059
+                                MX6SX_PAD_SD2_CLK__USDHC2_CLK     0x10059
+                                MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
+                                MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
+                                MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
+                                MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
+                        >;
+                };
+        };
+
         usdhc3 {
                 pinctrl_usdhc3_1: usdhc3grp-1 {
                         fsl,pins = <