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authorSandor Yu <R01008@freescale.com>2014-07-01 03:54:47 -0400
committerSandor Yu <R01008@freescale.com>2014-07-03 04:17:18 -0400
commit80af1b70e6a3a0a470d65bf44dc80e952ad4d1aa (patch)
tree94a85cacb34197a0670edad49e20ac59bd335284 /arch/arm/boot
parentfde566fe793ef0ee2ccc236e975ecd4d26ce1b51 (diff)
ENGR00317086-5 dts: Enable dcic driver for imx6sx
Enable dcic driver for imx6sx ARM2 and SDB board. Setting LCDIF pins bit 4 for loopback to dcic. Signed-off-by: Sandor Yu <R01008@freescale.com> (cherry picked from commit bf508e6be22d077043c071477250e208621aefd2)
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6sx-19x19-arm2.dts12
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb.dts12
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi81
3 files changed, 75 insertions, 30 deletions
diff --git a/arch/arm/boot/dts/imx6sx-19x19-arm2.dts b/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
index 131f330decfe..fbcff0c22a4d 100644
--- a/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
@@ -405,6 +405,18 @@
405 }; 405 };
406}; 406};
407 407
408&dcic1 {
409 dcic_id = <0>;
410 dcic_mux = "dcic-lcdif1";
411 status = "okay";
412};
413
414&dcic2 {
415 dcic_id = <1>;
416 dcic_mux = "dcic-lvds";
417 status = "okay";
418};
419
408&pwm3 { 420&pwm3 {
409 pinctrl-names = "default"; 421 pinctrl-names = "default";
410 pinctrl-0 = <&pinctrl_pwm3_0>; 422 pinctrl-0 = <&pinctrl_pwm3_0>;
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index efe80cb19b75..65d69ba36c88 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -602,6 +602,18 @@
602 }; 602 };
603}; 603};
604 604
605&dcic1 {
606 dcic_id = <0>;
607 dcic_mux = "dcic-lcdif1";
608 status = "okay";
609};
610
611&dcic2 {
612 dcic_id = <1>;
613 dcic_mux = "dcic-lvds";
614 status = "okay";
615};
616
605&pwm3 { 617&pwm3 {
606 pinctrl-names = "default"; 618 pinctrl-names = "default";
607 pinctrl-0 = <&pinctrl_pwm3_1>; 619 pinctrl-0 = <&pinctrl_pwm3_1>;
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 231c6afc6887..1da492574901 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -1080,6 +1080,28 @@
1080 reg = <0x02240000 0x40000>; 1080 reg = <0x02240000 0x40000>;
1081 ranges; 1081 ranges;
1082 1082
1083 dcic1: dcic@0220c000 {
1084 compatible = "fsl,imx6sx-dcic";
1085 reg = <0x0220c000 0x4000>;
1086 interrupts = <0 124 0x04>;
1087 clocks = <&clks IMX6SX_CLK_DCIC1>,
1088 <&clks IMX6SX_CLK_DISPLAY_AXI>;
1089 clock-names = "dcic", "disp-axi";
1090 gpr = <&gpr>;
1091 status = "disabled";
1092 };
1093
1094 dcic2: dcic@02210000 {
1095 compatible = "fsl,imx6sx-dcic";
1096 reg = <0x02210000 0x4000>;
1097 interrupts = <0 125 0x04>;
1098 clocks = <&clks IMX6SX_CLK_DCIC2>,
1099 <&clks IMX6SX_CLK_DISPLAY_AXI>;
1100 clock-names = "dcic", "disp-axi";
1101 gpr = <&gpr>;
1102 status = "disabled";
1103 };
1104
1083 csi1: csi@02214000 { 1105 csi1: csi@02214000 {
1084 compatible = "fsl,imx6sx-csi", "fsl,imx6sl-csi"; 1106 compatible = "fsl,imx6sx-csi", "fsl,imx6sl-csi";
1085 reg = <0x02214000 0x4000>; 1107 reg = <0x02214000 0x4000>;
@@ -1141,7 +1163,6 @@
1141 clocks = <&clks IMX6SX_CLK_VADC>, 1163 clocks = <&clks IMX6SX_CLK_VADC>,
1142 <&clks IMX6SX_CLK_CSI>; 1164 <&clks IMX6SX_CLK_CSI>;
1143 clock-names = "vadc", "csi"; 1165 clock-names = "vadc", "csi";
1144 gpr = <&gpr>;
1145 csi_id = <0>; 1166 csi_id = <0>;
1146 status = "disabled"; 1167 status = "disabled";
1147 }; 1168 };
@@ -1477,40 +1498,40 @@
1477 lcdif1 { 1498 lcdif1 {
1478 pinctrl_lcdif_dat_0: lcdifdatgrp-0 { 1499 pinctrl_lcdif_dat_0: lcdifdatgrp-0 {
1479 fsl,pins = < 1500 fsl,pins = <
1480 MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x1b0b0 1501 MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
1481 MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x1b0b0 1502 MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
1482 MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x1b0b0 1503 MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
1483 MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x1b0b0 1504 MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
1484 MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x1b0b0 1505 MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
1485 MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x1b0b0 1506 MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
1486 MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x1b0b0 1507 MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
1487 MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x1b0b0 1508 MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
1488 MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x1b0b0 1509 MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
1489 MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x1b0b0 1510 MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
1490 MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x1b0b0 1511 MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
1491 MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x1b0b0 1512 MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
1492 MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x1b0b0 1513 MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
1493 MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x1b0b0 1514 MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
1494 MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x1b0b0 1515 MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
1495 MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x1b0b0 1516 MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
1496 MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x1b0b0 1517 MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
1497 MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x1b0b0 1518 MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
1498 MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x1b0b0 1519 MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
1499 MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x1b0b0 1520 MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
1500 MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x1b0b0 1521 MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
1501 MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x1b0b0 1522 MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
1502 MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x1b0b0 1523 MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
1503 MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x1b0b0 1524 MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
1504 >; 1525 >;
1505 }; 1526 };
1506 1527
1507 pinctrl_lcdif_ctrl_0: lcdifctrlgrp-0 { 1528 pinctrl_lcdif_ctrl_0: lcdifctrlgrp-0 {
1508 fsl,pins = < 1529 fsl,pins = <
1509 MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x1b0b0 1530 MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0
1510 MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x1b0b0 1531 MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
1511 MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x1b0b0 1532 MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
1512 MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x1b0b0 1533 MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
1513 MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x1b0b0 1534 MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
1514 >; 1535 >;
1515 }; 1536 };
1516 }; 1537 };