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authorSandor Yu <R01008@freescale.com>2014-07-09 04:54:39 -0400
committerSandor Yu <R01008@freescale.com>2014-07-15 04:35:59 -0400
commit7a54f8b82299825d14bea563bf2baa823a22646f (patch)
tree28ad8bd4e96f23f201e82122b4f80b08a20a5055 /arch/arm/boot
parent9168b9154cf97a9c9c367eb639e92a10f3382144 (diff)
ENGR00322015 dts: imx6qdl: dcic: set dcic1 as disp-axi clock for dcic2
On imx6dl dcic2 clock gate depend on dcic1, so setting dcic1 as disp-axi clock for dcic2 in imx6qdl dts. Signed-off-by: Sandor Yu <R01008@freescale.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 511a1544a60d..5a4ac38bfa6d 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -144,6 +144,11 @@
144 compatible = "fsl,imx6dl-iomuxc"; 144 compatible = "fsl,imx6dl-iomuxc";
145 }; 145 };
146 146
147 dcic2: dcic@020e8000 {
148 clocks = <&clks 232>, <&clks 231>; /* DCIC2 depend on DCIC1 clock in imx6dl*/
149 clock-names = "dcic", "disp-axi";
150 };
151
147 pxp: pxp@020f0000 { 152 pxp: pxp@020f0000 {
148 compatible = "fsl,imx6dl-pxp-dma"; 153 compatible = "fsl,imx6dl-pxp-dma";
149 reg = <0x020f0000 0x4000>; 154 reg = <0x020f0000 0x4000>;