ENGR00300439-4 dts: imx6sx-arm2: add flexcan support

Add flexcan support

Signed-off-by: Dong Aisheng <b29396@freescale.com>

2 files changed, 122 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/imx6sx-17x17-arm2.dts b/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
index 89d9591f04d5..7221634da52d 100644
--- a/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
@@ -57,6 +57,24 @@
         status = "disabled";
 };
 
+&flexcan1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_flexcan1_1>;
+        trx-en-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+        trx-stby-gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
+        trx-err-gpio = <&gpio4 24 GPIO_ACTIVE_HIGH>;
+        status = "okay";
+};
+
+&flexcan2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_flexcan2_1>;
+        trx-en-gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+        trx-stby-gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
+        trx-err-gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+        status = "okay";
+};
+
 &gpc {
         fsl,cpu_pupscr_sw2iso = <0xf>;
         fsl,cpu_pupscr_sw = <0xf>;
@@ -212,7 +230,15 @@
                                 MX6SX_PAD_KEY_COL0__GPIO2_IO_10         0x1f059
                                 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15         0x1f059
                                 MX6SX_PAD_QSPI1A_SS0_B__GPIO4_IO_22     0x80000000
-                         >;
+                                /* CAN1_2_EN */
+                                MX6SX_PAD_QSPI1B_DATA1__GPIO4_IO_25     0x80000000
+                                /* CAN1_2_STBY_B */
+                                MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27     0x80000000
+                                /* CAN1_ERR_B */
+                                MX6SX_PAD_QSPI1B_DATA0__GPIO4_IO_24     0x80000000
+                                /* CAN2_ERR_B */
+                                MX6SX_PAD_QSPI1B_SS0_B__GPIO4_IO_30     0x80000000
+                        >;
                 };
         };
 };
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 34bb5d927710..c6fc4fd1e4f1 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -17,8 +17,15 @@
 
 / {
         aliases {
+                flexcan0 = &flexcan1;
+                flexcan1 = &flexcan2;
+                gpio0 = &gpio1;
                 gpio1 = &gpio2;
+                gpio2 = &gpio3;
                 gpio3 = &gpio4;
+                gpio4 = &gpio5;
+                gpio5 = &gpio6;
+                gpio6 = &gpio7;
                 serial0 = &uart1;
                 serial1 = &uart2;
         };
@@ -155,6 +162,26 @@
                                 interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
                         };
 
+                        flexcan1: can@02090000 {
+                                compatible = "fsl,imx6q-flexcan";
+                                reg = <0x02090000 0x4000>;
+                                interrupts = <0 110 0x04>;
+                                clocks = <&clks IMX6SX_CLK_CAN1_IPG>, <&clks IMX6SX_CLK_CAN1_SERIAL>;
+                                clock-names = "ipg", "per";
+                                gpr = <&gpr>;
+                                status = "disabled";
+                        };
+
+                        flexcan2: can@02094000 {
+                                compatible = "fsl,imx6q-flexcan";
+                                reg = <0x02094000 0x4000>;
+                                interrupts = <0 111 0x04>;
+                                clocks = <&clks IMX6SX_CLK_CAN2_IPG>, <&clks IMX6SX_CLK_CAN2_SERIAL>;
+                                clock-names = "ipg", "per";
+                                gpr = <&gpr>;
+                                status = "disabled";
+                        };
+
                         snvs@020cc000 {
                                 compatible = "fsl,sec-v4.0-mon", "simple-bus";
                                 #address-cells = <1>;
@@ -181,6 +208,16 @@
                                 interrupts = <0 89 0x04>;
                         };
 
+                        gpio1: gpio@0209c000 {
+                                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+                                reg = <0x0209c000 0x4000>;
+                                interrupts = <0 66 0x04 0 67 0x04>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
                         gpio2: gpio@020a0000 {
                                 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                                 reg = <0x020a0000 0x4000>;
@@ -191,6 +228,16 @@
                                 #interrupt-cells = <2>;
                         };
 
+                        gpio3: gpio@020a4000 {
+                                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+                                reg = <0x020a4000 0x4000>;
+                                interrupts = <0 70 0x04 0 71 0x04>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
                         gpio4: gpio@020a8000 {
                                 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
                                 reg = <0x020a8000 0x4000>;
@@ -201,6 +248,36 @@
                                 #interrupt-cells = <2>;
                         };
 
+                        gpio5: gpio@020ac000 {
+                                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+                                reg = <0x020ac000 0x4000>;
+                                interrupts = <0 74 0x04 0 75 0x04>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        gpio6: gpio@020b0000 {
+                                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+                                reg = <0x020b0000 0x4000>;
+                                interrupts = <0 76 0x04 0 77 0x04>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
+                        gpio7: gpio@020b4000 {
+                                compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+                                reg = <0x020b4000 0x4000>;
+                                interrupts = <0 78 0x04 0 79 0x04>;
+                                gpio-controller;
+                                #gpio-cells = <2>;
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+                        };
+
                         wdog1: wdog@020bc000 {
                                 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
                                 reg = <0x020bc000 0x4000>;
@@ -510,6 +587,24 @@
                 };
         };
 
+        flexcan1 {
+                pinctrl_flexcan1_1: flexcan1grp-1 {
+                        fsl,pins = <
+                                MX6SX_PAD_QSPI1B_DQS__CAN1_TX   0x1b0b0
+                                MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b0b0
+                        >;
+                };
+        };
+
+        flexcan2 {
+                pinctrl_flexcan2_1: flexcan2grp-1 {
+                        fsl,pins = <
+                                MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b0b0
+                                MX6SX_PAD_QSPI1A_DQS__CAN2_TX   0x1b0b0
+                        >;
+                };
+        };
+
         i2c1 {
                 pinctrl_i2c1_1: i2c1grp-1 {
                         fsl,pins = <