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authorFugang Duan <B38611@freescale.com>2014-02-20 03:05:40 -0500
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:57:35 -0400
commit1baedad9d4eecfd9d9f1b7477ab31391303c8012 (patch)
tree526bb057393e0707c159fc01ec7cff22c662ef45 /arch/arm/boot
parent556f225e75e3ddf8a4ad789cae6fe3b0790a75ce (diff)
ENGR00300036 ARM: dts: imx6sx: add fec support for sdb board
Add fec support for imx6sx-sdb board. Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6sx-sdb.dts33
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi17
2 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index c5df2209f453..bb633e01946e 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -19,6 +19,25 @@
19 }; 19 };
20}; 20};
21 21
22&fec1 {
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_enet1_1 &pinctrl_enet1_clkout_1>;
25 pinctrl-assert-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>, <&gpio2 6 GPIO_ACTIVE_LOW>;
26 phy-mode = "rgmii";
27 fsl,num_tx_queues=<3>;
28 fsl,num_rx_queues=<3>;
29 status = "okay";
30};
31
32&fec2 {
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_enet2_1>;
35 phy-mode = "rgmii";
36 fsl,num_tx_queues=<3>;
37 fsl,num_rx_queues=<3>;
38 status = "okay";
39};
40
22&gpc { 41&gpc {
23 fsl,cpu_pupscr_sw2iso = <0xf>; 42 fsl,cpu_pupscr_sw2iso = <0xf>;
24 fsl,cpu_pupscr_sw = <0xf>; 43 fsl,cpu_pupscr_sw = <0xf>;
@@ -56,6 +75,20 @@
56 status = "okay"; 75 status = "okay";
57}; 76};
58 77
78&iomuxc {
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_hog>;
81
82 hog {
83 pinctrl_hog: hoggrp {
84 fsl,pins = <
85 MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000
86 MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000
87 >;
88 };
89 };
90};
91
59&uart1 { 92&uart1 {
60 pinctrl-names = "default"; 93 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_uart1_1>; 94 pinctrl-0 = <&pinctrl_uart1_1>;
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index d81e674f8218..3e02158889e3 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -18,6 +18,7 @@
18/ { 18/ {
19 aliases { 19 aliases {
20 gpio1 = &gpio2; 20 gpio1 = &gpio2;
21 gpio3 = &gpio4;
21 serial0 = &uart1; 22 serial0 = &uart1;
22 serial1 = &uart2; 23 serial1 = &uart2;
23 }; 24 };
@@ -190,6 +191,16 @@
190 #interrupt-cells = <2>; 191 #interrupt-cells = <2>;
191 }; 192 };
192 193
194 gpio4: gpio@020a8000 {
195 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
196 reg = <0x020a8000 0x4000>;
197 interrupts = <0 72 0x04 0 73 0x04>;
198 gpio-controller;
199 #gpio-cells = <2>;
200 interrupt-controller;
201 #interrupt-cells = <2>;
202 };
203
193 wdog1: wdog@020bc000 { 204 wdog1: wdog@020bc000 {
194 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; 205 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
195 reg = <0x020bc000 0x4000>; 206 reg = <0x020bc000 0x4000>;
@@ -382,6 +393,12 @@
382 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081 393 MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
383 >; 394 >;
384 }; 395 };
396
397 pinctrl_enet1_clkout_1: enet1_clkoutgrp-1 {
398 fsl,pins = <
399 MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91
400 >;
401 };
385 }; 402 };
386 403
387 enet2 { 404 enet2 {