ENGR00302869-1 ARM: dts: imx6qdl: add cfg_clk for MIPI CSI2

MIPI CSI2 depends on this clock to work.
This patch also updates the binding document.

Signed-off-by: Robby Cai <R63905@freescale.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 01414a575ab6..79af4b686e81 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -960,13 +960,13 @@
                                 compatible = "fsl,imx6q-mipi-csi2";
                                 reg = <0x021dc000 0x4000>;
                                 interrupts = <0 100 0x04>, <0 101 0x04>;
-                                clocks = <&clks 138>, <&clks 53>;
+                                clocks = <&clks 138>, <&clks 53>, <&clks 204>;
                                 /* Note: clks 138 is hsi_tx, however, the dphy_c
                                  * hsi_tx and pll_refclk use the same clk gate.
                                  * In current clk driver, open/close clk gate do
                                  * use hsi_tx for a temporary debug purpose.
                                  */
-                                clock-names = "dphy_clk", "pixel_clk";
+                                clock-names = "dphy_clk", "pixel_clk", "cfg_clk";
                                 status = "disabled";
                         };