ARM: SPEAr13xx: Pass generic DW DMAC platform data from DT

This replaces an earlier patch from Viresh Kumar to move
the spear platform over to the generic DMA binding. This
version is now based on the merged multiplatform capable
spear platform, rather than the separate spear13xx/3xx/6xx
directories.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vinod Koul <vinod.koul@linux.intel.com>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: spear-devel@list.st.com

2 files changed, 27 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index 34da11aa6795..e1786a0b2fcd 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -113,6 +113,9 @@
                                 reg = <0xb4100000 0x1000>;
                                 interrupts = <0 105 0x4>;
                                 status = "disabled";
+                                dmas = <&dwdma0 0x600 0 0 1>, /* 0xC << 11 */
+                                        <&dwdma0 0x680 0 1 0>; /* 0xD << 7 */
+                                dma-names = "tx", "rx";
                         };
 
                         thermal@e07008c4 {
diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi
index b4ca60f4eb42..45597fd91050 100644
--- a/arch/arm/boot/dts/spear13xx.dtsi
+++ b/arch/arm/boot/dts/spear13xx.dtsi
@@ -98,13 +98,24 @@
                         reg = <0xb2800000 0x1000>;
                         interrupts = <0 29 0x4>;
                         status = "disabled";
+                        dmas = <&dwdma0 0 0 0 0>;
+                        dma-names = "data";
                 };
 
-                dma@ea800000 {
+                dwdma0: dma@ea800000 {
                         compatible = "snps,dma-spear1340";
                         reg = <0xea800000 0x1000>;
                         interrupts = <0 19 0x4>;
                         status = "disabled";
+
+                        dma-channels = <8>;
+                        #dma-cells = <3>;
+                        dma-requests = <32>;
+                        chan_allocation_order = <1>;
+                        chan_priority = <1>;
+                        block_size = <0xfff>;
+                        dma-masters = <2>;
+                        data_width = <3 3 0 0>;
                 };
 
                 dma@eb000000 {
@@ -112,6 +123,15 @@
                         reg = <0xeb000000 0x1000>;
                         interrupts = <0 59 0x4>;
                         status = "disabled";
+
+                        dma-requests = <32>;
+                        dma-channels = <8>;
+                        dma-masters = <2>;
+                        #dma-cells = <3>;
+                        chan_allocation_order = <1>;
+                        chan_priority = <1>;
+                        block_size = <0xfff>;
+                        data_width = <3 3 0 0>;
                 };
 
                 fsmc: flash@b0000000 {
@@ -261,6 +281,9 @@
                                 #size-cells = <0>;
                                 interrupts = <0 31 0x4>;
                                 status = "disabled";
+                                dmas = <&dwdma0 0x2000 0 0 0>, /* 0x4 << 11 */
+                                        <&dwdma0 0x0280 0 0 0>;  /* 0x5 << 7 */
+                                dma-names = "tx", "rx";
                         };
 
                         rtc@e0580000 {