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authorPeter Chen <peter.chen@freescale.com>2013-09-16 00:09:21 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:11:54 -0400
commit21861bf9ada67047a2ad04ffa85e3e5b9224b75b (patch)
tree189767d54baab2450fa19a35b8281b1af4497704 /arch/arm/boot/dts/imx6sl.dtsi
parent50cffc14a134b291bb5ecc0bf16012f4926c7757 (diff)
ENGR00286426-5 ARM: dts: imx6: add anatop phandle for usbphy
Add anatop phandle for usbphy Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 39cd91a7d002..339109cff16f 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -549,6 +549,7 @@
549 reg = <0x020c9000 0x1000>; 549 reg = <0x020c9000 0x1000>;
550 interrupts = <0 44 0x04>; 550 interrupts = <0 44 0x04>;
551 clocks = <&clks IMX6SL_CLK_USBPHY1>; 551 clocks = <&clks IMX6SL_CLK_USBPHY1>;
552 fsl,anatop = <&anatop>;
552 }; 553 };
553 554
554 usbphy2: usbphy@020ca000 { 555 usbphy2: usbphy@020ca000 {
@@ -556,6 +557,7 @@
556 reg = <0x020ca000 0x1000>; 557 reg = <0x020ca000 0x1000>;
557 interrupts = <0 45 0x04>; 558 interrupts = <0 45 0x04>;
558 clocks = <&clks IMX6SL_CLK_USBPHY2>; 559 clocks = <&clks IMX6SL_CLK_USBPHY2>;
560 fsl,anatop = <&anatop>;
559 }; 561 };
560 562
561 snvs@020cc000 { 563 snvs@020cc000 {