ENGR00289278 dts: imx6qdl-sabreauto: fix usdhc1 pin conflict with gpmi

The SD1 on sabreauto baseboard is conflict with gpmi nand. The conflict
pins are DAT4~DAT7. Since the SD3 on cpu board already supports 8 bit bus
width, we do not want add an extra dts file for it, so we disable 8 bit and use
4 bit width for this issue.

Signed-off-by: Dong Aisheng <b29396@freescale.com>

1 files changed, 0 insertions, 4 deletions

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 9eb8034480ec..9dd4cbdf6cef 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -1535,10 +1535,6 @@
                                 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
                                 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
                                 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
-                                MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071
-                                MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071
-                                MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071
-                                MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17071
                         >;
                 };
         };