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authorLiu Ying <Ying.Liu@freescale.com>2014-03-10 06:31:51 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:57:57 -0400
commitcb9327ca90a29af88a3116edd59d5eabe2c0d79e (patch)
tree7f3cc6d757069c86197b78c34f77c7e811d3373b /arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
parent16a37658d909957b8badc4dc835cdc808e2bd350 (diff)
ENGR00302472-6 video: mxc: LDB driver refactor
This patch almost reworks the LDB driver to make the implementation simpler and clearer. The new version should support all the LDB modules embedded in imx53, imx6qdl and imx6sx. The lvds-channel subsidiary DT node is introduced to represent each LVDS channel. People may specify a channel's CRTC, working mode(dual mode or split mode), data width, data mapping, display timing and if it is a primary channel in the node. Change logs: * Use CTRC concept so that the driver may support both IPU and LCDIF as the display engines. * Add mxc dispdrv enable() callback. * Cache LDB ctrl register value at probe()/setup()/ enable() stages and finally write to the register at enable() stage. * Simplify logics for setting ctrl/bus muxing/clocks. * Use regmap to write crtl and bus muxing registers. * Remove LDB description in DT binding doc fsl_ipuv3_fb.txt. Instead, add a new one in fsl,ldb.txt. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabreauto.dtsi49
1 files changed, 43 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index d9c3af9f58e9..c5dacc0d528d 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -588,13 +588,50 @@
588}; 588};
589 589
590&ldb { 590&ldb {
591 ipu_id = <1>;
592 disp_id = <0>;
593 ext_ref = <1>;
594 mode = "sep0";
595 sec_ipu_id = <1>;
596 sec_disp_id = <1>;
597 status = "okay"; 591 status = "okay";
592
593 lvds-channel@0 {
594 fsl,data-mapping = "spwg";
595 fsl,data-width = <18>;
596 primary;
597 status = "okay";
598
599 display-timings {
600 native-mode = <&timing0>;
601 timing0: hsd100pxn1 {
602 clock-frequency = <65000000>;
603 hactive = <1024>;
604 vactive = <768>;
605 hback-porch = <220>;
606 hfront-porch = <40>;
607 vback-porch = <21>;
608 vfront-porch = <7>;
609 hsync-len = <60>;
610 vsync-len = <10>;
611 };
612 };
613 };
614
615 lvds-channel@1 {
616 fsl,data-mapping = "spwg";
617 fsl,data-width = <18>;
618 status = "okay";
619
620 display-timings {
621 native-mode = <&timing1>;
622 timing1: hsd100pxn1 {
623 clock-frequency = <65000000>;
624 hactive = <1024>;
625 vactive = <768>;
626 hback-porch = <220>;
627 hfront-porch = <40>;
628 vback-porch = <21>;
629 vfront-porch = <7>;
630 hsync-len = <60>;
631 vsync-len = <10>;
632 };
633 };
634 };
598}; 635};
599 636
600&mipi_csi { 637&mipi_csi {