ARC: Setup Vector Table Base in early boot

commit 05b016ecf5e7a8c24409d8e9effb5d2ec9107708 upstream.

Otherwise early boot exceptions such as instructions errors due to
configuration mismatch between kernel and hardware go off to la-la land,
as opposed to hitting the handler and panic()'ing properly.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2 files changed, 2 insertions, 2 deletions

diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 006dec3fc353..2a913f85a747 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -27,6 +27,8 @@ stext:
         ; Don't clobber r0-r4 yet. It might have bootloader provided info
         ;-------------------------------------------------------------------
 
+        sr      @_int_vec_base_lds, [AUX_INTR_VEC_BASE]
+
 #ifdef CONFIG_SMP
         ; Only Boot (Master) proceeds. Others wait in platform dependent way
         ;       IDENTITY Reg [ 3  2  1  0 ]
diff --git a/arch/arc/kernel/irq.c b/arch/arc/kernel/irq.c
index 8115fa531575..e7fd6d2abce7 100644
--- a/arch/arc/kernel/irq.c
+++ b/arch/arc/kernel/irq.c
@@ -32,8 +32,6 @@ void __cpuinit arc_init_IRQ(void)
 {
         int level_mask = 0;
 
-        write_aux_reg(AUX_INTR_VEC_BASE, _int_vec_base_lds);
-
         /* Disable all IRQs: enable them as devices request */
         write_aux_reg(AUX_IENABLE, 0);