diff options
author | Olof Johansson <olof@lixom.net> | 2013-04-14 23:49:21 -0400 |
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committer | Olof Johansson <olof@lixom.net> | 2013-04-14 23:49:28 -0400 |
commit | b56a7f9206efa2982140837e36aca88cfedd66bc (patch) | |
tree | a1270fbf47cbaf6e056b2a06ede71cd622df987a /Documentation | |
parent | 56c5c13f7080f9299a92b3fb6a1bf22689d607cc (diff) | |
parent | e25e3d1fef2c57e49aef64535341c15fe2b29b4a (diff) |
Merge tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/soc
From David Brown:
Patches for MSM core
These patches are changes to the MSM timer code that will be for
upcoming targets, including a generalization of the binding and
preventing a missing timer interrupt.
* tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
ARM: msm: Wait for timer clear to complete
ARM: msm: Rework timer binding to be more general
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/arm/msm/timer.txt | 41 |
1 files changed, 20 insertions, 21 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/timer.txt b/Documentation/devicetree/bindings/arm/msm/timer.txt index 8c5907b9cae8..c6ef8f13dc7e 100644 --- a/Documentation/devicetree/bindings/arm/msm/timer.txt +++ b/Documentation/devicetree/bindings/arm/msm/timer.txt | |||
@@ -3,36 +3,35 @@ | |||
3 | Properties: | 3 | Properties: |
4 | 4 | ||
5 | - compatible : Should at least contain "qcom,msm-timer". More specific | 5 | - compatible : Should at least contain "qcom,msm-timer". More specific |
6 | properties such as "qcom,msm-gpt" and "qcom,msm-dgt" specify a general | 6 | properties specify which subsystem the timers are paired with. |
7 | purpose timer and a debug timer respectively. | ||
8 | 7 | ||
9 | - interrupts : Interrupt indicating a match event. | 8 | "qcom,kpss-timer" - krait subsystem |
9 | "qcom,scss-timer" - scorpion subsystem | ||
10 | 10 | ||
11 | - reg : Specifies the base address of the timer registers. The second region | 11 | - interrupts : Interrupts for the the debug timer, the first general purpose |
12 | specifies an optional register used to configure the clock divider. | 12 | timer, and optionally a second general purpose timer in that |
13 | order. | ||
13 | 14 | ||
14 | - clock-frequency : The frequency of the timer in Hz. | 15 | - reg : Specifies the base address of the timer registers. |
16 | |||
17 | - clock-frequency : The frequency of the debug timer and the general purpose | ||
18 | timer(s) in Hz in that order. | ||
15 | 19 | ||
16 | Optional: | 20 | Optional: |
17 | 21 | ||
18 | - cpu-offset : per-cpu offset used when the timer is accessed without the | 22 | - cpu-offset : per-cpu offset used when the timer is accessed without the |
19 | CPU remapping facilities. The offset is cpu-offset * cpu-nr. | 23 | CPU remapping facilities. The offset is |
24 | cpu-offset + (0x10000 * cpu-nr). | ||
20 | 25 | ||
21 | Example: | 26 | Example: |
22 | 27 | ||
23 | timer@200a004 { | 28 | timer@200a000 { |
24 | compatible = "qcom,msm-gpt", "qcom,msm-timer"; | 29 | compatible = "qcom,scss-timer", "qcom,msm-timer"; |
25 | interrupts = <1 2 0x301>; | 30 | interrupts = <1 1 0x301>, |
26 | reg = <0x0200a004 0x10>; | 31 | <1 2 0x301>, |
27 | clock-frequency = <32768>; | 32 | <1 3 0x301>; |
28 | cpu-offset = <0x40000>; | 33 | reg = <0x0200a000 0x100>; |
29 | }; | 34 | clock-frequency = <19200000>, |
30 | 35 | <32768>; | |
31 | timer@200a024 { | ||
32 | compatible = "qcom,msm-dgt", "qcom,msm-timer"; | ||
33 | interrupts = <1 3 0x301>; | ||
34 | reg = <0x0200a024 0x10>, | ||
35 | <0x0200a034 0x4>; | ||
36 | clock-frequency = <6750000>; | ||
37 | cpu-offset = <0x40000>; | 36 | cpu-offset = <0x40000>; |
38 | }; | 37 | }; |