aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation
diff options
context:
space:
mode:
authorLiu Ying <Ying.Liu@freescale.com>2013-08-20 02:37:47 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:01:24 -0400
commitaae58d71b525e099a3da96af1c3b0bd2e784fc6d (patch)
tree8ba86a918637883fc9dce4129b6a5694ffa40641 /Documentation
parent707f3cc69c06b84e4987b65204a63609eba4a277 (diff)
ENGR00274172-1 ARM: imx6q: refactor some ldb related clocks
The ldb_di[0|1]_ipu_div dividers may divide their parent clock frequencies by either 3.5 or 7. The non-integral dividers cannot be dealt with the common clock framework, so they cannot be registered as common clock dividers. So this patch adds a fixed factor clock of 1/7 and introduces ldb_di[0|1]_div_sel multiplexers so that the fixed factor clocks of 1/3.5 and 1/7 can be set to be the parents of ldb_di[0|1]_div_sel multiplexers. The ldb_di[0|1]_podf dividers are no longer used then. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/imx6q-clock.txt6
1 files changed, 4 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index 74535417dc33..f51a2e77f9b3 100644
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -89,8 +89,6 @@ clocks and IDs.
89 gpu3d_shader 74 89 gpu3d_shader 74
90 ipu1_podf 75 90 ipu1_podf 75
91 ipu2_podf 76 91 ipu2_podf 76
92 ldb_di0_podf 77
93 ldb_di1_podf 78
94 ipu1_di0_pre 79 92 ipu1_di0_pre 79
95 ipu1_di1_pre 80 93 ipu1_di1_pre 80
96 ipu2_di0_pre 81 94 ipu2_di0_pre 81
@@ -217,6 +215,10 @@ clocks and IDs.
217 vdoa 202 215 vdoa 202
218 gpt_3m 203 216 gpt_3m 203
219 video_27m 204 217 video_27m 204
218 ldb_di0_div_7 205
219 ldb_di1_div_7 206
220 ldb_di0_div_sel 207
221 ldb_di1_div_sel 208
220 222
221Examples: 223Examples:
222 224