aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree
diff options
context:
space:
mode:
authorNicolin Chen <Guangyu.Chen@freescale.com>2014-04-10 11:26:15 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:58:17 -0400
commit80f676b476d21c22bda1daf62998e5a837f8e4df (patch)
tree448392361dc9db831ea923836e4454b0907f6639 /Documentation/devicetree
parente3e74c9e6e4f68826d672f18c60066883956e118 (diff)
ASoC: fsl_sai: Add clock controls for SAI
The SAI mainly has the following clocks: bus clock control and configure registers and to generate synchronous interrupts and DMA requests. mclk1, mclk2, mclk3 to generate the bit clock when the receiver or transmitter is configured for an internally generated bit clock. So this patch adds these clocks and their clock controls to the driver. [ To concern the old DTB cases, I've added a bit of extra code to make the driver compatible with them. And by marking clock NULL if failed to get, the clk_prepare() or clk_get_rate() would easily return 0 so no further path should be broken. -- by Nicolin ] Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Acked-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit 17d1eb6628e70488c44c46003dcfe583696bb7b7)
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/sound/fsl-sai.txt9
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt
index 35c09fe5847a..0f4e23828190 100644
--- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
+++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
@@ -10,7 +10,8 @@ Required properties:
10- compatible: Compatible list, contains "fsl,vf610-sai" or "fsl,imx6sx-sai". 10- compatible: Compatible list, contains "fsl,vf610-sai" or "fsl,imx6sx-sai".
11- reg: Offset and length of the register set for the device. 11- reg: Offset and length of the register set for the device.
12- clocks: Must contain an entry for each entry in clock-names. 12- clocks: Must contain an entry for each entry in clock-names.
13- clock-names : Must include the "sai" entry. 13- clock-names : Must include the "bus" for register access and "mclk1" "mclk2"
14 "mclk3" for bit clock and frame clock providing.
14- dmas : Generic dma devicetree binding as described in 15- dmas : Generic dma devicetree binding as described in
15 Documentation/devicetree/bindings/dma/dma.txt. 16 Documentation/devicetree/bindings/dma/dma.txt.
16- dma-names : Two dmas have to be defined, "tx" and "rx". 17- dma-names : Two dmas have to be defined, "tx" and "rx".
@@ -30,8 +31,10 @@ sai2: sai@40031000 {
30 reg = <0x40031000 0x1000>; 31 reg = <0x40031000 0x1000>;
31 pinctrl-names = "default"; 32 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_sai2_1>; 33 pinctrl-0 = <&pinctrl_sai2_1>;
33 clocks = <&clks VF610_CLK_SAI2>; 34 clocks = <&clks VF610_CLK_PLATFORM_BUS>,
34 clock-names = "sai"; 35 <&clks VF610_CLK_SAI2>,
36 <&clks 0>, <&clks 0>;
37 clock-names = "bus", "mclk1", "mclk2", "mclk3";
35 dma-names = "tx", "rx"; 38 dma-names = "tx", "rx";
36 dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>, 39 dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>,
37 <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>; 40 <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>;