Staging: silicom: bp_mod.h: checkpatch tab and space cleanup

ninth chunk of bp_mod.h's cleanup

Signed-off-by: Daniel Cotey <puff65537@bansheeslibrary.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 24 insertions, 24 deletions

diff --git a/drivers/staging/silicom/bp_mod.h b/drivers/staging/silicom/bp_mod.h
index 7b01f48acd56..3a97b2d483e9 100644
--- a/drivers/staging/silicom/bp_mod.h
+++ b/drivers/staging/silicom/bp_mod.h
@@ -419,30 +419,30 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j)
          (pid == SILICOM_PEG2BPI5_SSID))
 
 #define PEG80_IF_SERIES(pid) \
-((pid==SILICOM_M1E2G4BPi80_SSID)|| \
-(pid==SILICOM_M6E2G8BPi80_SSID)|| \
-(pid==SILICOM_PE2G4BPi80L_SSID)|| \
-(pid==SILICOM_M6E2G8BPi80A_SSID)|| \
-(pid==SILICOM_PE2G2BPi35_SSID)|| \
-(pid==SILICOM_PAC1200BPi35_SSID)|| \
-(pid==SILICOM_PE2G4BPi35_SSID)|| \
-(pid==SILICOM_PE2G4BPi35L_SSID)|| \
-(pid==SILICOM_PE2G6BPi35_SSID)|| \
-(pid==SILICOM_PE2G2BPi80_SSID)|| \
-(pid==SILICOM_PE2G4BPi80_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35ZX_SSID))
+        ((pid == SILICOM_M1E2G4BPi80_SSID) || \
+         (pid == SILICOM_M6E2G8BPi80_SSID) || \
+         (pid == SILICOM_PE2G4BPi80L_SSID) || \
+         (pid == SILICOM_M6E2G8BPi80A_SSID) || \
+         (pid == SILICOM_PE2G2BPi35_SSID) || \
+         (pid == SILICOM_PAC1200BPi35_SSID) || \
+         (pid == SILICOM_PE2G4BPi35_SSID) || \
+         (pid == SILICOM_PE2G4BPi35L_SSID) || \
+         (pid == SILICOM_PE2G6BPi35_SSID) || \
+         (pid == SILICOM_PE2G2BPi80_SSID) || \
+         (pid == SILICOM_PE2G4BPi80_SSID) || \
+         (pid == SILICOM_PE2G4BPFi80_SSID) || \
+         (pid == SILICOM_PE2G4BPFi80LX_SSID) || \
+         (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+         (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+         (pid == SILICOM_PE2G2BPFi80_SSID) || \
+         (pid == SILICOM_PE2G2BPFi80LX_SSID) || \
+         (pid == SILICOM_PE2G2BPFi80ZX_SSID) || \
+         (pid == SILICOM_PE2G2BPFi35_SSID) || \
+         (pid == SILICOM_PE2G2BPFi35LX_SSID) || \
+         (pid == SILICOM_PE2G2BPFi35ZX_SSID) || \
+         (pid == SILICOM_PE2G4BPFi35_SSID) || \
+         (pid == SILICOM_PE2G4BPFi35LX_SSID) || \
+         (pid == SILICOM_PE2G4BPFi35ZX_SSID))
 
 #define PEGF80_IF_SERIES(pid) \
 ((pid==SILICOM_PE2G4BPFi80_SSID)|| \