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authorMauro Carvalho Chehab <mchehab@redhat.com>2013-04-09 17:19:50 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-04-16 20:25:52 -0400
commitfa4bfd2bd0548c0e5e0d931147df45157686de71 (patch)
tree64958d6744bb2f7cf3c4eb08361d432dd72aed77
parentf60f5bcbe47d1a7c83b278740d22482a49a70269 (diff)
[media] rtl2832: add code to bind r820t on it
There are some init stuff to be done for each new tuner at the demod code. Add the code there for r820t. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com> Tested-by: Antti Palosaari <crope@iki.fi>
-rw-r--r--drivers/media/dvb-frontends/rtl2832.c76
-rw-r--r--drivers/media/dvb-frontends/rtl2832.h1
-rw-r--r--drivers/media/dvb-frontends/rtl2832_priv.h28
3 files changed, 88 insertions, 17 deletions
diff --git a/drivers/media/dvb-frontends/rtl2832.c b/drivers/media/dvb-frontends/rtl2832.c
index 73887690b046..b6f50c7a15e6 100644
--- a/drivers/media/dvb-frontends/rtl2832.c
+++ b/drivers/media/dvb-frontends/rtl2832.c
@@ -432,22 +432,12 @@ static int rtl2832_init(struct dvb_frontend *fe)
432 {DVBT_TR_THD_SET2, 0x6}, 432 {DVBT_TR_THD_SET2, 0x6},
433 {DVBT_TRK_KC_I2, 0x5}, 433 {DVBT_TRK_KC_I2, 0x5},
434 {DVBT_CR_THD_SET2, 0x1}, 434 {DVBT_CR_THD_SET2, 0x1},
435 {DVBT_SPEC_INV, 0x0},
436 }; 435 };
437 436
438 dev_dbg(&priv->i2c->dev, "%s:\n", __func__); 437 dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
439 438
440 en_bbin = (priv->cfg.if_dvbt == 0 ? 0x1 : 0x0); 439 en_bbin = (priv->cfg.if_dvbt == 0 ? 0x1 : 0x0);
441 440
442 /*
443 * PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)
444 * / CrystalFreqHz)
445 */
446 pset_iffreq = priv->cfg.if_dvbt % priv->cfg.xtal;
447 pset_iffreq *= 0x400000;
448 pset_iffreq = div_u64(pset_iffreq, priv->cfg.xtal);
449 pset_iffreq = pset_iffreq & 0x3fffff;
450
451 for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) { 441 for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {
452 ret = rtl2832_wr_demod_reg(priv, rtl2832_initial_regs[i].reg, 442 ret = rtl2832_wr_demod_reg(priv, rtl2832_initial_regs[i].reg,
453 rtl2832_initial_regs[i].value); 443 rtl2832_initial_regs[i].value);
@@ -472,6 +462,10 @@ static int rtl2832_init(struct dvb_frontend *fe)
472 len = ARRAY_SIZE(rtl2832_tuner_init_e4000); 462 len = ARRAY_SIZE(rtl2832_tuner_init_e4000);
473 init = rtl2832_tuner_init_e4000; 463 init = rtl2832_tuner_init_e4000;
474 break; 464 break;
465 case RTL2832_TUNER_R820T:
466 len = ARRAY_SIZE(rtl2832_tuner_init_r820t);
467 init = rtl2832_tuner_init_r820t;
468 break;
475 default: 469 default:
476 ret = -EINVAL; 470 ret = -EINVAL;
477 goto err; 471 goto err;
@@ -483,14 +477,43 @@ static int rtl2832_init(struct dvb_frontend *fe)
483 goto err; 477 goto err;
484 } 478 }
485 479
486 /* if frequency settings */ 480 /*
487 ret = rtl2832_wr_demod_reg(priv, DVBT_EN_BBIN, en_bbin); 481 * if frequency settings
488 if (ret) 482 * Some tuners (r820t) don't initialize IF here; instead; they do it
489 goto err; 483 * at set_params()
484 */
485 if (!fe->ops.tuner_ops.get_if_frequency) {
486 /*
487 * PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)
488 * / CrystalFreqHz)
489 */
490 pset_iffreq = priv->cfg.if_dvbt % priv->cfg.xtal;
491 pset_iffreq *= 0x400000;
492 pset_iffreq = div_u64(pset_iffreq, priv->cfg.xtal);
493 pset_iffreq = pset_iffreq & 0x3fffff;
494 ret = rtl2832_wr_demod_reg(priv, DVBT_EN_BBIN, en_bbin);
495 if (ret)
496 goto err;
497
498 ret = rtl2832_wr_demod_reg(priv, DVBT_PSET_IFFREQ, pset_iffreq);
499 if (ret)
500 goto err;
501 }
490 502
491 ret = rtl2832_wr_demod_reg(priv, DVBT_PSET_IFFREQ, pset_iffreq); 503 /*
492 if (ret) 504 * r820t NIM code does a software reset here at the demod -
493 goto err; 505 * may not be needed, as there's already a software reset at set_params()
506 */
507#if 1
508 /* soft reset */
509 ret = rtl2832_wr_demod_reg(priv, DVBT_SOFT_RST, 0x1);
510 if (ret)
511 goto err;
512
513 ret = rtl2832_wr_demod_reg(priv, DVBT_SOFT_RST, 0x0);
514 if (ret)
515 goto err;
516#endif
494 517
495 priv->sleeping = false; 518 priv->sleeping = false;
496 519
@@ -564,6 +587,25 @@ static int rtl2832_set_frontend(struct dvb_frontend *fe)
564 if (fe->ops.tuner_ops.set_params) 587 if (fe->ops.tuner_ops.set_params)
565 fe->ops.tuner_ops.set_params(fe); 588 fe->ops.tuner_ops.set_params(fe);
566 589
590 /* If the frontend has get_if_frequency(), use it */
591 if (fe->ops.tuner_ops.get_if_frequency) {
592 u32 if_freq;
593 u64 pset_iffreq;
594
595 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
596 if (ret)
597 goto err;
598
599 pset_iffreq = if_freq % priv->cfg.xtal;
600 pset_iffreq *= 0x400000;
601 pset_iffreq = div_u64(pset_iffreq, priv->cfg.xtal);
602 pset_iffreq = pset_iffreq & 0x3fffff;
603
604 ret = rtl2832_wr_demod_reg(priv, DVBT_PSET_IFFREQ, pset_iffreq);
605 if (ret)
606 goto err;
607 }
608
567 switch (c->bandwidth_hz) { 609 switch (c->bandwidth_hz) {
568 case 6000000: 610 case 6000000:
569 i = 0; 611 i = 0;
diff --git a/drivers/media/dvb-frontends/rtl2832.h b/drivers/media/dvb-frontends/rtl2832.h
index fefba0e9ba30..91b2dcf5a6ea 100644
--- a/drivers/media/dvb-frontends/rtl2832.h
+++ b/drivers/media/dvb-frontends/rtl2832.h
@@ -52,6 +52,7 @@ struct rtl2832_config {
52#define RTL2832_TUNER_FC0012 0x26 52#define RTL2832_TUNER_FC0012 0x26
53#define RTL2832_TUNER_E4000 0x27 53#define RTL2832_TUNER_E4000 0x27
54#define RTL2832_TUNER_FC0013 0x29 54#define RTL2832_TUNER_FC0013 0x29
55#define RTL2832_TUNER_R820T 0x2a
55 u8 tuner; 56 u8 tuner;
56}; 57};
57 58
diff --git a/drivers/media/dvb-frontends/rtl2832_priv.h b/drivers/media/dvb-frontends/rtl2832_priv.h
index 7d97ce9d2193..b5f2b80092ee 100644
--- a/drivers/media/dvb-frontends/rtl2832_priv.h
+++ b/drivers/media/dvb-frontends/rtl2832_priv.h
@@ -267,6 +267,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_tua9001[] = {
267 {DVBT_OPT_ADC_IQ, 0x1}, 267 {DVBT_OPT_ADC_IQ, 0x1},
268 {DVBT_AD_AVI, 0x0}, 268 {DVBT_AD_AVI, 0x0},
269 {DVBT_AD_AVQ, 0x0}, 269 {DVBT_AD_AVQ, 0x0},
270 {DVBT_SPEC_INV, 0x0},
270}; 271};
271 272
272static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = { 273static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
@@ -300,6 +301,7 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_fc0012[] = {
300 {DVBT_GI_PGA_STATE, 0x0}, 301 {DVBT_GI_PGA_STATE, 0x0},
301 {DVBT_EN_AGC_PGA, 0x1}, 302 {DVBT_EN_AGC_PGA, 0x1},
302 {DVBT_IF_AGC_MAN, 0x0}, 303 {DVBT_IF_AGC_MAN, 0x0},
304 {DVBT_SPEC_INV, 0x0},
303}; 305};
304 306
305static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = { 307static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
@@ -337,6 +339,32 @@ static const struct rtl2832_reg_value rtl2832_tuner_init_e4000[] = {
337 {DVBT_REG_MONSEL, 0x1}, 339 {DVBT_REG_MONSEL, 0x1},
338 {DVBT_REG_MON, 0x1}, 340 {DVBT_REG_MON, 0x1},
339 {DVBT_REG_4MSEL, 0x0}, 341 {DVBT_REG_4MSEL, 0x0},
342 {DVBT_SPEC_INV, 0x0},
343};
344
345static const struct rtl2832_reg_value rtl2832_tuner_init_r820t[] = {
346 {DVBT_DAGC_TRG_VAL, 0x39},
347 {DVBT_AGC_TARG_VAL_0, 0x0},
348 {DVBT_AGC_TARG_VAL_8_1, 0x40},
349 {DVBT_AAGC_LOOP_GAIN, 0x16},
350 {DVBT_LOOP_GAIN2_3_0, 0x8},
351 {DVBT_LOOP_GAIN2_4, 0x1},
352 {DVBT_LOOP_GAIN3, 0x18},
353 {DVBT_VTOP1, 0x35},
354 {DVBT_VTOP2, 0x21},
355 {DVBT_VTOP3, 0x21},
356 {DVBT_KRF1, 0x0},
357 {DVBT_KRF2, 0x40},
358 {DVBT_KRF3, 0x10},
359 {DVBT_KRF4, 0x10},
360 {DVBT_IF_AGC_MIN, 0x80},
361 {DVBT_IF_AGC_MAX, 0x7f},
362 {DVBT_RF_AGC_MIN, 0x80},
363 {DVBT_RF_AGC_MAX, 0x7f},
364 {DVBT_POLAR_RF_AGC, 0x0},
365 {DVBT_POLAR_IF_AGC, 0x0},
366 {DVBT_AD7_SETTING, 0xe9f4},
367 {DVBT_SPEC_INV, 0x1},
340}; 368};
341 369
342#endif /* RTL2832_PRIV_H */ 370#endif /* RTL2832_PRIV_H */