aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorKalle Valo <kvalo@qca.qualcomm.com>2011-09-22 03:33:13 -0400
committerKalle Valo <kvalo@qca.qualcomm.com>2011-09-22 03:33:13 -0400
commitf3674ee97b11c97c9d314a8dae1d1d281b90aea1 (patch)
treec51d01c04e6684c8e0af6f9928653e531a92888a
parent32c1087460626f9cfa2b397eafd247bf039bacac (diff)
parented46fdfc54d2d4523fdd727708fe0b9e2be993cc (diff)
Merge remote branch 'wireless-next/master' into ath6kl-next
-rw-r--r--MAINTAINERS16
-rw-r--r--drivers/bcma/driver_chipcommon_pmu.c38
-rw-r--r--drivers/bcma/main.c12
-rw-r--r--drivers/bcma/sprom.c9
-rw-r--r--drivers/bluetooth/ath3k.c1
-rw-r--r--drivers/bluetooth/btusb.c19
-rw-r--r--drivers/bluetooth/btwilink.c16
-rw-r--r--drivers/net/wireless/ath/ath.h3
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c23
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.c10
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.h1
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_initvals.h131
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_phy.c32
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9001_initvals.h266
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_calib.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_hw.c48
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_initvals.h3403
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_mac.c257
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_calib.c21
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c127
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.h3
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_hw.c581
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_mac.c331
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_paprd.c15
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c26
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.h102
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9480_1p0_initvals.h1833
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9480_2p0_initvals.h1928
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h14
-rw-r--r--drivers/net/wireless/ath/ath9k/beacon.c56
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.c41
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.h6
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_4k.c108
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_9287.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_def.c46
-rw-r--r--drivers/net/wireless/ath/ath9k/gpio.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_init.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/htc_drv_main.c3
-rw-r--r--drivers/net/wireless/ath/ath9k/hw-ops.h63
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c102
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h29
-rw-r--r--drivers/net/wireless/ath/ath9k/init.c43
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.c14
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.h46
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c546
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c5
-rw-r--r--drivers/net/wireless/ath/ath9k/recv.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h66
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c559
-rw-r--r--drivers/net/wireless/ath/carl9170/main.c4
-rw-r--r--drivers/net/wireless/b43/b43.h2
-rw-r--r--drivers/net/wireless/b43/bus.c2
-rw-r--r--drivers/net/wireless/b43/dma.c20
-rw-r--r--drivers/net/wireless/b43/main.c6
-rw-r--r--drivers/net/wireless/b43/phy_ht.c2
-rw-r--r--drivers/net/wireless/b43/phy_lcn.c690
-rw-r--r--drivers/net/wireless/b43/phy_lcn.h3
-rw-r--r--drivers/net/wireless/b43/phy_n.c535
-rw-r--r--drivers/net/wireless/b43/phy_n.h4
-rw-r--r--drivers/net/wireless/b43/radio_2055.c1
-rw-r--r--drivers/net/wireless/b43/radio_2056.c2
-rw-r--r--drivers/net/wireless/b43/radio_2056.h26
-rw-r--r--drivers/net/wireless/b43/radio_2059.c2
-rw-r--r--drivers/net/wireless/b43/tables_nphy.c1
-rw-r--r--drivers/net/wireless/b43/tables_phy_ht.c2
-rw-r--r--drivers/net/wireless/b43/tables_phy_lcn.c255
-rw-r--r--drivers/net/wireless/b43/tables_phy_lcn.h2
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.c21
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c39
-rw-r--r--drivers/net/wireless/iwlegacy/iwl-3945-rs.c13
-rw-r--r--drivers/net/wireless/iwlwifi/Makefile23
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-1000.c5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-2000.c13
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000-hw.h4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-calib.c21
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c299
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-lib.c443
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c16
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rxon.c4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-tt.c4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-tt.h1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-tx.c25
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-ucode.c68
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c177
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.h21
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-bus.h72
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-cfg.h (renamed from drivers/net/wireless/iwlwifi/iwl-pci.h)5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-commands.h15
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c66
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h31
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h18
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debugfs.c157
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h219
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c239
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.h10
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-helpers.h23
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-led.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-pci.c45
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-rx.c178
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-scan.c517
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-shared.h191
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.c37
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.h5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sv-open.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h (renamed from drivers/net/wireless/iwlwifi/iwl-trans-int-pcie.h)114
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c (renamed from drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c)72
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c (renamed from drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c)208
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans-pcie.c1986
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans.c2040
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-trans.h86
-rw-r--r--drivers/net/wireless/libertas/if_usb.c21
-rw-r--r--drivers/net/wireless/mwifiex/join.c3
-rw-r--r--drivers/net/wireless/mwifiex/scan.c6
-rw-r--r--drivers/net/wireless/mwifiex/sta_ioctl.c14
-rw-r--r--drivers/net/wireless/mwl8k.c8
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h3
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c238
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.h5
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.c15
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c27
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h30
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c21
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00mac.c50
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.c7
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.h5
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.c31
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c1
-rw-r--r--drivers/net/wireless/rtlwifi/core.c8
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/sw.c12
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/trx.h6
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192cu/mac.h6
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192cu/sw.c11
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192cu/trx.c11
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192de/sw.c12
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192de/trx.h6
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192se/def.h2
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192se/sw.c14
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192se/trx.c2
-rw-r--r--drivers/net/wireless/rtlwifi/wifi.h6
-rw-r--r--drivers/net/wireless/wl1251/acx.c6
-rw-r--r--drivers/net/wireless/wl1251/cmd.c2
-rw-r--r--drivers/net/wireless/wl12xx/Kconfig10
-rw-r--r--drivers/net/wireless/wl12xx/acx.c46
-rw-r--r--drivers/net/wireless/wl12xx/acx.h18
-rw-r--r--drivers/net/wireless/wl12xx/boot.c4
-rw-r--r--drivers/net/wireless/wl12xx/cmd.c17
-rw-r--r--drivers/net/wireless/wl12xx/cmd.h7
-rw-r--r--drivers/net/wireless/wl12xx/conf.h23
-rw-r--r--drivers/net/wireless/wl12xx/debugfs.c88
-rw-r--r--drivers/net/wireless/wl12xx/event.c37
-rw-r--r--drivers/net/wireless/wl12xx/init.c5
-rw-r--r--drivers/net/wireless/wl12xx/main.c144
-rw-r--r--drivers/net/wireless/wl12xx/ps.c8
-rw-r--r--drivers/net/wireless/wl12xx/rx.c9
-rw-r--r--drivers/net/wireless/wl12xx/scan.c124
-rw-r--r--drivers/net/wireless/wl12xx/sdio.c2
-rw-r--r--drivers/net/wireless/wl12xx/testmode.c50
-rw-r--r--drivers/net/wireless/wl12xx/tx.c30
-rw-r--r--drivers/net/wireless/wl12xx/tx.h5
-rw-r--r--drivers/net/wireless/wl12xx/wl12xx.h11
-rw-r--r--drivers/nfc/Kconfig11
-rw-r--r--drivers/nfc/Makefile1
-rw-r--r--drivers/nfc/nfcwilink.c342
-rw-r--r--drivers/nfc/pn533.c4
-rw-r--r--include/linux/bcma/bcma_driver_chipcommon.h9
-rw-r--r--include/linux/ieee80211.h12
-rw-r--r--include/linux/nfc.h6
-rw-r--r--include/linux/nl80211.h90
-rw-r--r--include/linux/ssb/ssb.h2
-rw-r--r--include/net/cfg80211.h63
-rw-r--r--include/net/mac80211.h31
-rw-r--r--include/net/nfc/nci.h313
-rw-r--r--include/net/nfc/nci_core.h183
-rw-r--r--include/net/nfc/nfc.h (renamed from include/net/nfc.h)4
-rw-r--r--net/bluetooth/af_bluetooth.c6
-rw-r--r--net/bluetooth/bnep/bnep.h1
-rw-r--r--net/bluetooth/bnep/core.c13
-rw-r--r--net/bluetooth/cmtp/capi.c3
-rw-r--r--net/bluetooth/cmtp/cmtp.h1
-rw-r--r--net/bluetooth/cmtp/core.c20
-rw-r--r--net/bluetooth/hci_core.c8
-rw-r--r--net/bluetooth/hci_event.c17
-rw-r--r--net/bluetooth/hidp/core.c19
-rw-r--r--net/bluetooth/l2cap_core.c6
-rw-r--r--net/bluetooth/l2cap_sock.c30
-rw-r--r--net/bluetooth/rfcomm/core.c17
-rw-r--r--net/bluetooth/rfcomm/sock.c28
-rw-r--r--net/bluetooth/sco.c28
-rw-r--r--net/mac80211/agg-rx.c19
-rw-r--r--net/mac80211/agg-tx.c42
-rw-r--r--net/mac80211/cfg.c21
-rw-r--r--net/mac80211/debugfs.c5
-rw-r--r--net/mac80211/debugfs_netdev.c3
-rw-r--r--net/mac80211/ht.c6
-rw-r--r--net/mac80211/ibss.c2
-rw-r--r--net/mac80211/ieee80211_i.h3
-rw-r--r--net/mac80211/iface.c16
-rw-r--r--net/mac80211/main.c2
-rw-r--r--net/mac80211/mesh.c8
-rw-r--r--net/mac80211/mesh.h6
-rw-r--r--net/mac80211/mesh_hwmp.c31
-rw-r--r--net/mac80211/mesh_pathtbl.c192
-rw-r--r--net/mac80211/mesh_plink.c10
-rw-r--r--net/mac80211/mlme.c47
-rw-r--r--net/mac80211/rc80211_minstrel_ht.c3
-rw-r--r--net/mac80211/rx.c35
-rw-r--r--net/mac80211/spectmgmt.c6
-rw-r--r--net/mac80211/sta_info.c12
-rw-r--r--net/mac80211/sta_info.h5
-rw-r--r--net/mac80211/status.c53
-rw-r--r--net/mac80211/tx.c26
-rw-r--r--net/mac80211/util.c13
-rw-r--r--net/mac80211/wme.c16
-rw-r--r--net/mac80211/wme.h3
-rw-r--r--net/mac80211/work.c6
-rw-r--r--net/nfc/Kconfig2
-rw-r--r--net/nfc/Makefile1
-rw-r--r--net/nfc/core.c77
-rw-r--r--net/nfc/nci/Kconfig10
-rw-r--r--net/nfc/nci/Makefile7
-rw-r--r--net/nfc/nci/core.c790
-rw-r--r--net/nfc/nci/data.c245
-rw-r--r--net/nfc/nci/lib.c94
-rw-r--r--net/nfc/nci/ntf.c258
-rw-r--r--net/nfc/nci/rsp.c226
-rw-r--r--net/nfc/netlink.c56
-rw-r--r--net/nfc/nfc.h6
-rw-r--r--net/rfkill/core.c2
-rw-r--r--net/rfkill/rfkill-regulator.c1
-rw-r--r--net/wireless/core.c9
-rw-r--r--net/wireless/core.h2
-rw-r--r--net/wireless/lib80211_crypt_ccmp.c2
-rw-r--r--net/wireless/lib80211_crypt_tkip.c4
-rw-r--r--net/wireless/lib80211_crypt_wep.c4
-rw-r--r--net/wireless/mlme.c11
-rw-r--r--net/wireless/nl80211.c125
-rw-r--r--net/wireless/nl80211.h4
-rw-r--r--net/wireless/reg.c34
-rw-r--r--net/wireless/reg.h2
-rw-r--r--net/wireless/scan.c27
-rw-r--r--net/wireless/sme.c17
-rw-r--r--net/wireless/sysfs.c6
-rw-r--r--net/wireless/util.c5
246 files changed, 17034 insertions, 8223 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index c66c093978d7..1789ce22ea8c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1246,6 +1246,14 @@ W: http://wireless.kernel.org/en/users/Drivers/ath5k
1246S: Maintained 1246S: Maintained
1247F: drivers/net/wireless/ath/ath5k/ 1247F: drivers/net/wireless/ath/ath5k/
1248 1248
1249ATHEROS ATH6KL WIRELESS DRIVER
1250M: Kalle Valo <kvalo@qca.qualcomm.com>
1251L: linux-wireless@vger.kernel.org
1252W: http://wireless.kernel.org/en/users/Drivers/ath6kl
1253T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath6kl.git
1254S: Supported
1255F: drivers/net/wireless/ath/ath6kl/
1256
1249ATHEROS ATH9K WIRELESS DRIVER 1257ATHEROS ATH9K WIRELESS DRIVER
1250M: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com> 1258M: "Luis R. Rodriguez" <mcgrof@qca.qualcomm.com>
1251M: Jouni Malinen <jouni@qca.qualcomm.com> 1259M: Jouni Malinen <jouni@qca.qualcomm.com>
@@ -4500,7 +4508,7 @@ L: linux-wireless@vger.kernel.org
4500S: Maintained 4508S: Maintained
4501F: net/nfc/ 4509F: net/nfc/
4502F: include/linux/nfc.h 4510F: include/linux/nfc.h
4503F: include/net/nfc.h 4511F: include/net/nfc/
4504F: drivers/nfc/ 4512F: drivers/nfc/
4505 4513
4506NFS, SUNRPC, AND LOCKD CLIENTS 4514NFS, SUNRPC, AND LOCKD CLIENTS
@@ -6122,12 +6130,6 @@ M: Jakub Schmidtke <sjakub@gmail.com>
6122S: Odd Fixes 6130S: Odd Fixes
6123F: drivers/staging/asus_oled/ 6131F: drivers/staging/asus_oled/
6124 6132
6125STAGING - ATHEROS ATH6KL WIRELESS DRIVER
6126M: Luis R. Rodriguez <mcgrof@gmail.com>
6127M: Naveen Singh <nsingh@atheros.com>
6128S: Odd Fixes
6129F: drivers/staging/ath6kl/
6130
6131STAGING - COMEDI 6133STAGING - COMEDI
6132M: Ian Abbott <abbotti@mev.co.uk> 6134M: Ian Abbott <abbotti@mev.co.uk>
6133M: Mori Hess <fmhess@users.sourceforge.net> 6135M: Mori Hess <fmhess@users.sourceforge.net>
diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c
index 4bc10aa57bd4..2968d809d49f 100644
--- a/drivers/bcma/driver_chipcommon_pmu.c
+++ b/drivers/bcma/driver_chipcommon_pmu.c
@@ -18,20 +18,40 @@ static u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset)
18 return bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA); 18 return bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA);
19} 19}
20 20
21static void bcma_chipco_chipctl_maskset(struct bcma_drv_cc *cc, 21void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset, u32 value)
22 u32 offset, u32 mask, u32 set)
23{ 22{
24 u32 value; 23 bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset);
24 bcma_cc_read32(cc, BCMA_CC_PLLCTL_ADDR);
25 bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, value);
26}
27EXPORT_SYMBOL_GPL(bcma_chipco_pll_write);
25 28
26 bcma_cc_read32(cc, BCMA_CC_CHIPCTL_ADDR); 29void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask,
30 u32 set)
31{
32 bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset);
33 bcma_cc_read32(cc, BCMA_CC_PLLCTL_ADDR);
34 bcma_cc_maskset32(cc, BCMA_CC_PLLCTL_DATA, mask, set);
35}
36EXPORT_SYMBOL_GPL(bcma_chipco_pll_maskset);
37
38void bcma_chipco_chipctl_maskset(struct bcma_drv_cc *cc,
39 u32 offset, u32 mask, u32 set)
40{
27 bcma_cc_write32(cc, BCMA_CC_CHIPCTL_ADDR, offset); 41 bcma_cc_write32(cc, BCMA_CC_CHIPCTL_ADDR, offset);
28 bcma_cc_read32(cc, BCMA_CC_CHIPCTL_ADDR); 42 bcma_cc_read32(cc, BCMA_CC_CHIPCTL_ADDR);
29 value = bcma_cc_read32(cc, BCMA_CC_CHIPCTL_DATA); 43 bcma_cc_maskset32(cc, BCMA_CC_CHIPCTL_DATA, mask, set);
30 value &= mask; 44}
31 value |= set; 45EXPORT_SYMBOL_GPL(bcma_chipco_chipctl_maskset);
32 bcma_cc_write32(cc, BCMA_CC_CHIPCTL_DATA, value); 46
33 bcma_cc_read32(cc, BCMA_CC_CHIPCTL_DATA); 47void bcma_chipco_regctl_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask,
48 u32 set)
49{
50 bcma_cc_write32(cc, BCMA_CC_REGCTL_ADDR, offset);
51 bcma_cc_read32(cc, BCMA_CC_REGCTL_ADDR);
52 bcma_cc_maskset32(cc, BCMA_CC_REGCTL_DATA, mask, set);
34} 53}
54EXPORT_SYMBOL_GPL(bcma_chipco_regctl_maskset);
35 55
36static void bcma_pmu_pll_init(struct bcma_drv_cc *cc) 56static void bcma_pmu_pll_init(struct bcma_drv_cc *cc)
37{ 57{
diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c
index 7072216a2a3f..8c09c3e547cd 100644
--- a/drivers/bcma/main.c
+++ b/drivers/bcma/main.c
@@ -15,6 +15,7 @@ MODULE_LICENSE("GPL");
15static int bcma_bus_match(struct device *dev, struct device_driver *drv); 15static int bcma_bus_match(struct device *dev, struct device_driver *drv);
16static int bcma_device_probe(struct device *dev); 16static int bcma_device_probe(struct device *dev);
17static int bcma_device_remove(struct device *dev); 17static int bcma_device_remove(struct device *dev);
18static int bcma_device_uevent(struct device *dev, struct kobj_uevent_env *env);
18 19
19static ssize_t manuf_show(struct device *dev, struct device_attribute *attr, char *buf) 20static ssize_t manuf_show(struct device *dev, struct device_attribute *attr, char *buf)
20{ 21{
@@ -49,6 +50,7 @@ static struct bus_type bcma_bus_type = {
49 .match = bcma_bus_match, 50 .match = bcma_bus_match,
50 .probe = bcma_device_probe, 51 .probe = bcma_device_probe,
51 .remove = bcma_device_remove, 52 .remove = bcma_device_remove,
53 .uevent = bcma_device_uevent,
52 .dev_attrs = bcma_device_attrs, 54 .dev_attrs = bcma_device_attrs,
53}; 55};
54 56
@@ -295,6 +297,16 @@ static int bcma_device_remove(struct device *dev)
295 return 0; 297 return 0;
296} 298}
297 299
300static int bcma_device_uevent(struct device *dev, struct kobj_uevent_env *env)
301{
302 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
303
304 return add_uevent_var(env,
305 "MODALIAS=bcma:m%04Xid%04Xrev%02Xcl%02X",
306 core->id.manuf, core->id.id,
307 core->id.rev, core->id.class);
308}
309
298static int __init bcma_modinit(void) 310static int __init bcma_modinit(void)
299{ 311{
300 int err; 312 int err;
diff --git a/drivers/bcma/sprom.c b/drivers/bcma/sprom.c
index 166ed13ec066..d7292390d236 100644
--- a/drivers/bcma/sprom.c
+++ b/drivers/bcma/sprom.c
@@ -133,6 +133,15 @@ static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom)
133 v = sprom[SPOFF(SSB_SPROM8_IL0MAC) + i]; 133 v = sprom[SPOFF(SSB_SPROM8_IL0MAC) + i];
134 *(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v); 134 *(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v);
135 } 135 }
136
137 bus->sprom.board_rev = sprom[SPOFF(SSB_SPROM8_BOARDREV)];
138
139 bus->sprom.boardflags_lo = sprom[SPOFF(SSB_SPROM8_BFLLO)];
140 bus->sprom.boardflags_hi = sprom[SPOFF(SSB_SPROM8_BFLHI)];
141 bus->sprom.boardflags2_lo = sprom[SPOFF(SSB_SPROM8_BFL2LO)];
142 bus->sprom.boardflags2_hi = sprom[SPOFF(SSB_SPROM8_BFL2HI)];
143
144 bus->sprom.country_code = sprom[SPOFF(SSB_SPROM8_CCODE)];
136} 145}
137 146
138int bcma_sprom_get(struct bcma_bus *bus) 147int bcma_sprom_get(struct bcma_bus *bus)
diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c
index a5854735bb2e..db7cb8111fbe 100644
--- a/drivers/bluetooth/ath3k.c
+++ b/drivers/bluetooth/ath3k.c
@@ -63,6 +63,7 @@ static struct usb_device_id ath3k_table[] = {
63 /* Atheros AR3011 with sflash firmware*/ 63 /* Atheros AR3011 with sflash firmware*/
64 { USB_DEVICE(0x0CF3, 0x3002) }, 64 { USB_DEVICE(0x0CF3, 0x3002) },
65 { USB_DEVICE(0x13d3, 0x3304) }, 65 { USB_DEVICE(0x13d3, 0x3304) },
66 { USB_DEVICE(0x0930, 0x0215) },
66 67
67 /* Atheros AR9285 Malbec with sflash firmware */ 68 /* Atheros AR9285 Malbec with sflash firmware */
68 { USB_DEVICE(0x03F0, 0x311D) }, 69 { USB_DEVICE(0x03F0, 0x311D) },
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 91d13a9e8c65..9cbac6b445e1 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -72,9 +72,15 @@ static struct usb_device_id btusb_table[] = {
72 /* Apple MacBookAir3,1, MacBookAir3,2 */ 72 /* Apple MacBookAir3,1, MacBookAir3,2 */
73 { USB_DEVICE(0x05ac, 0x821b) }, 73 { USB_DEVICE(0x05ac, 0x821b) },
74 74
75 /* Apple MacBookAir4,1 */
76 { USB_DEVICE(0x05ac, 0x821f) },
77
75 /* Apple MacBookPro8,2 */ 78 /* Apple MacBookPro8,2 */
76 { USB_DEVICE(0x05ac, 0x821a) }, 79 { USB_DEVICE(0x05ac, 0x821a) },
77 80
81 /* Apple MacMini5,1 */
82 { USB_DEVICE(0x05ac, 0x8281) },
83
78 /* AVM BlueFRITZ! USB v2.0 */ 84 /* AVM BlueFRITZ! USB v2.0 */
79 { USB_DEVICE(0x057c, 0x3800) }, 85 { USB_DEVICE(0x057c, 0x3800) },
80 86
@@ -106,6 +112,7 @@ static struct usb_device_id blacklist_table[] = {
106 /* Atheros 3011 with sflash firmware */ 112 /* Atheros 3011 with sflash firmware */
107 { USB_DEVICE(0x0cf3, 0x3002), .driver_info = BTUSB_IGNORE }, 113 { USB_DEVICE(0x0cf3, 0x3002), .driver_info = BTUSB_IGNORE },
108 { USB_DEVICE(0x13d3, 0x3304), .driver_info = BTUSB_IGNORE }, 114 { USB_DEVICE(0x13d3, 0x3304), .driver_info = BTUSB_IGNORE },
115 { USB_DEVICE(0x0930, 0x0215), .driver_info = BTUSB_IGNORE },
109 116
110 /* Atheros AR9285 Malbec with sflash firmware */ 117 /* Atheros AR9285 Malbec with sflash firmware */
111 { USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE }, 118 { USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE },
@@ -256,7 +263,9 @@ static void btusb_intr_complete(struct urb *urb)
256 263
257 err = usb_submit_urb(urb, GFP_ATOMIC); 264 err = usb_submit_urb(urb, GFP_ATOMIC);
258 if (err < 0) { 265 if (err < 0) {
259 if (err != -EPERM) 266 /* -EPERM: urb is being killed;
267 * -ENODEV: device got disconnected */
268 if (err != -EPERM && err != -ENODEV)
260 BT_ERR("%s urb %p failed to resubmit (%d)", 269 BT_ERR("%s urb %p failed to resubmit (%d)",
261 hdev->name, urb, -err); 270 hdev->name, urb, -err);
262 usb_unanchor_urb(urb); 271 usb_unanchor_urb(urb);
@@ -341,7 +350,9 @@ static void btusb_bulk_complete(struct urb *urb)
341 350
342 err = usb_submit_urb(urb, GFP_ATOMIC); 351 err = usb_submit_urb(urb, GFP_ATOMIC);
343 if (err < 0) { 352 if (err < 0) {
344 if (err != -EPERM) 353 /* -EPERM: urb is being killed;
354 * -ENODEV: device got disconnected */
355 if (err != -EPERM && err != -ENODEV)
345 BT_ERR("%s urb %p failed to resubmit (%d)", 356 BT_ERR("%s urb %p failed to resubmit (%d)",
346 hdev->name, urb, -err); 357 hdev->name, urb, -err);
347 usb_unanchor_urb(urb); 358 usb_unanchor_urb(urb);
@@ -431,7 +442,9 @@ static void btusb_isoc_complete(struct urb *urb)
431 442
432 err = usb_submit_urb(urb, GFP_ATOMIC); 443 err = usb_submit_urb(urb, GFP_ATOMIC);
433 if (err < 0) { 444 if (err < 0) {
434 if (err != -EPERM) 445 /* -EPERM: urb is being killed;
446 * -ENODEV: device got disconnected */
447 if (err != -EPERM && err != -ENODEV)
435 BT_ERR("%s urb %p failed to resubmit (%d)", 448 BT_ERR("%s urb %p failed to resubmit (%d)",
436 hdev->name, urb, -err); 449 hdev->name, urb, -err);
437 usb_unanchor_urb(urb); 450 usb_unanchor_urb(urb);
diff --git a/drivers/bluetooth/btwilink.c b/drivers/bluetooth/btwilink.c
index 65d27aff553a..04d353f58d71 100644
--- a/drivers/bluetooth/btwilink.c
+++ b/drivers/bluetooth/btwilink.c
@@ -125,6 +125,13 @@ static long st_receive(void *priv_data, struct sk_buff *skb)
125/* protocol structure registered with shared transport */ 125/* protocol structure registered with shared transport */
126static struct st_proto_s ti_st_proto[MAX_BT_CHNL_IDS] = { 126static struct st_proto_s ti_st_proto[MAX_BT_CHNL_IDS] = {
127 { 127 {
128 .chnl_id = HCI_EVENT_PKT, /* HCI Events */
129 .hdr_len = sizeof(struct hci_event_hdr),
130 .offset_len_in_hdr = offsetof(struct hci_event_hdr, plen),
131 .len_size = 1, /* sizeof(plen) in struct hci_event_hdr */
132 .reserve = 8,
133 },
134 {
128 .chnl_id = HCI_ACLDATA_PKT, /* ACL */ 135 .chnl_id = HCI_ACLDATA_PKT, /* ACL */
129 .hdr_len = sizeof(struct hci_acl_hdr), 136 .hdr_len = sizeof(struct hci_acl_hdr),
130 .offset_len_in_hdr = offsetof(struct hci_acl_hdr, dlen), 137 .offset_len_in_hdr = offsetof(struct hci_acl_hdr, dlen),
@@ -138,13 +145,6 @@ static struct st_proto_s ti_st_proto[MAX_BT_CHNL_IDS] = {
138 .len_size = 1, /* sizeof(dlen) in struct hci_sco_hdr */ 145 .len_size = 1, /* sizeof(dlen) in struct hci_sco_hdr */
139 .reserve = 8, 146 .reserve = 8,
140 }, 147 },
141 {
142 .chnl_id = HCI_EVENT_PKT, /* HCI Events */
143 .hdr_len = sizeof(struct hci_event_hdr),
144 .offset_len_in_hdr = offsetof(struct hci_event_hdr, plen),
145 .len_size = 1, /* sizeof(plen) in struct hci_event_hdr */
146 .reserve = 8,
147 },
148}; 148};
149 149
150/* Called from HCI core to initialize the device */ 150/* Called from HCI core to initialize the device */
@@ -240,7 +240,7 @@ static int ti_st_close(struct hci_dev *hdev)
240 if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags)) 240 if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags))
241 return 0; 241 return 0;
242 242
243 for (i = 0; i < MAX_BT_CHNL_IDS; i++) { 243 for (i = MAX_BT_CHNL_IDS-1; i >= 0; i--) {
244 err = st_unregister(&ti_st_proto[i]); 244 err = st_unregister(&ti_st_proto[i]);
245 if (err) 245 if (err)
246 BT_ERR("st_unregister(%d) failed with error %d", 246 BT_ERR("st_unregister(%d) failed with error %d",
diff --git a/drivers/net/wireless/ath/ath.h b/drivers/net/wireless/ath/ath.h
index 9891fb605a01..4ed7f248a577 100644
--- a/drivers/net/wireless/ath/ath.h
+++ b/drivers/net/wireless/ath/ath.h
@@ -140,9 +140,6 @@ struct ath_common {
140 u8 curbssid[ETH_ALEN]; 140 u8 curbssid[ETH_ALEN];
141 u8 bssidmask[ETH_ALEN]; 141 u8 bssidmask[ETH_ALEN];
142 142
143 u8 tx_chainmask;
144 u8 rx_chainmask;
145
146 u32 rx_bufsize; 143 u32 rx_bufsize;
147 144
148 u32 keymax; 145 u32 keymax;
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 108d55a06965..e9ea38d0fff6 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -1729,6 +1729,8 @@ ath5k_beacon_setup(struct ath5k_hw *ah, struct ath5k_buf *bf)
1729 1729
1730 if (dma_mapping_error(ah->dev, bf->skbaddr)) { 1730 if (dma_mapping_error(ah->dev, bf->skbaddr)) {
1731 ATH5K_ERR(ah, "beacon DMA mapping failed\n"); 1731 ATH5K_ERR(ah, "beacon DMA mapping failed\n");
1732 dev_kfree_skb_any(skb);
1733 bf->skb = NULL;
1732 return -EIO; 1734 return -EIO;
1733 } 1735 }
1734 1736
@@ -1813,8 +1815,6 @@ ath5k_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1813 ath5k_txbuf_free_skb(ah, avf->bbuf); 1815 ath5k_txbuf_free_skb(ah, avf->bbuf);
1814 avf->bbuf->skb = skb; 1816 avf->bbuf->skb = skb;
1815 ret = ath5k_beacon_setup(ah, avf->bbuf); 1817 ret = ath5k_beacon_setup(ah, avf->bbuf);
1816 if (ret)
1817 avf->bbuf->skb = NULL;
1818out: 1818out:
1819 return ret; 1819 return ret;
1820} 1820}
@@ -1834,6 +1834,7 @@ ath5k_beacon_send(struct ath5k_hw *ah)
1834 struct ath5k_vif *avf; 1834 struct ath5k_vif *avf;
1835 struct ath5k_buf *bf; 1835 struct ath5k_buf *bf;
1836 struct sk_buff *skb; 1836 struct sk_buff *skb;
1837 int err;
1837 1838
1838 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "in beacon_send\n"); 1839 ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_BEACON, "in beacon_send\n");
1839 1840
@@ -1882,11 +1883,6 @@ ath5k_beacon_send(struct ath5k_hw *ah)
1882 1883
1883 avf = (void *)vif->drv_priv; 1884 avf = (void *)vif->drv_priv;
1884 bf = avf->bbuf; 1885 bf = avf->bbuf;
1885 if (unlikely(bf->skb == NULL || ah->opmode == NL80211_IFTYPE_STATION ||
1886 ah->opmode == NL80211_IFTYPE_MONITOR)) {
1887 ATH5K_WARN(ah, "bf=%p bf_skb=%p\n", bf, bf ? bf->skb : NULL);
1888 return;
1889 }
1890 1886
1891 /* 1887 /*
1892 * Stop any current dma and put the new frame on the queue. 1888 * Stop any current dma and put the new frame on the queue.
@@ -1900,8 +1896,17 @@ ath5k_beacon_send(struct ath5k_hw *ah)
1900 1896
1901 /* refresh the beacon for AP or MESH mode */ 1897 /* refresh the beacon for AP or MESH mode */
1902 if (ah->opmode == NL80211_IFTYPE_AP || 1898 if (ah->opmode == NL80211_IFTYPE_AP ||
1903 ah->opmode == NL80211_IFTYPE_MESH_POINT) 1899 ah->opmode == NL80211_IFTYPE_MESH_POINT) {
1904 ath5k_beacon_update(ah->hw, vif); 1900 err = ath5k_beacon_update(ah->hw, vif);
1901 if (err)
1902 return;
1903 }
1904
1905 if (unlikely(bf->skb == NULL || ah->opmode == NL80211_IFTYPE_STATION ||
1906 ah->opmode == NL80211_IFTYPE_MONITOR)) {
1907 ATH5K_WARN(ah, "bf=%p bf_skb=%p\n", bf, bf->skb);
1908 return;
1909 }
1905 1910
1906 trace_ath5k_tx(ah, bf->skb, &ah->txqs[ah->bhalq]); 1911 trace_ath5k_tx(ah, bf->skb, &ah->txqs[ah->bhalq]);
1907 1912
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
index d969a11e3425..01240d63896e 100644
--- a/drivers/net/wireless/ath/ath9k/ani.c
+++ b/drivers/net/wireless/ath/ath9k/ani.c
@@ -273,7 +273,8 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)
273 immunityLevel, aniState->noiseFloor, 273 immunityLevel, aniState->noiseFloor,
274 aniState->rssiThrLow, aniState->rssiThrHigh); 274 aniState->rssiThrLow, aniState->rssiThrHigh);
275 275
276 aniState->ofdmNoiseImmunityLevel = immunityLevel; 276 if (aniState->update_ani)
277 aniState->ofdmNoiseImmunityLevel = immunityLevel;
277 278
278 entry_ofdm = &ofdm_level_table[aniState->ofdmNoiseImmunityLevel]; 279 entry_ofdm = &ofdm_level_table[aniState->ofdmNoiseImmunityLevel];
279 entry_cck = &cck_level_table[aniState->cckNoiseImmunityLevel]; 280 entry_cck = &cck_level_table[aniState->cckNoiseImmunityLevel];
@@ -346,7 +347,8 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel)
346 immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI) 347 immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
347 immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI; 348 immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;
348 349
349 aniState->cckNoiseImmunityLevel = immunityLevel; 350 if (aniState->update_ani)
351 aniState->cckNoiseImmunityLevel = immunityLevel;
350 352
351 entry_ofdm = &ofdm_level_table[aniState->ofdmNoiseImmunityLevel]; 353 entry_ofdm = &ofdm_level_table[aniState->ofdmNoiseImmunityLevel];
352 entry_cck = &cck_level_table[aniState->cckNoiseImmunityLevel]; 354 entry_cck = &cck_level_table[aniState->cckNoiseImmunityLevel];
@@ -593,6 +595,7 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning)
593 aniState->ofdmNoiseImmunityLevel, 595 aniState->ofdmNoiseImmunityLevel,
594 aniState->cckNoiseImmunityLevel); 596 aniState->cckNoiseImmunityLevel);
595 597
598 aniState->update_ani = false;
596 ath9k_hw_set_ofdm_nil(ah, ATH9K_ANI_OFDM_DEF_LEVEL); 599 ath9k_hw_set_ofdm_nil(ah, ATH9K_ANI_OFDM_DEF_LEVEL);
597 ath9k_hw_set_cck_nil(ah, ATH9K_ANI_CCK_DEF_LEVEL); 600 ath9k_hw_set_cck_nil(ah, ATH9K_ANI_CCK_DEF_LEVEL);
598 } 601 }
@@ -609,6 +612,7 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning)
609 aniState->ofdmNoiseImmunityLevel, 612 aniState->ofdmNoiseImmunityLevel,
610 aniState->cckNoiseImmunityLevel); 613 aniState->cckNoiseImmunityLevel);
611 614
615 aniState->update_ani = true;
612 ath9k_hw_set_ofdm_nil(ah, 616 ath9k_hw_set_ofdm_nil(ah,
613 aniState->ofdmNoiseImmunityLevel); 617 aniState->ofdmNoiseImmunityLevel);
614 ath9k_hw_set_cck_nil(ah, 618 ath9k_hw_set_cck_nil(ah,
@@ -892,6 +896,8 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
892 ani->ofdmWeakSigDetectOff = 896 ani->ofdmWeakSigDetectOff =
893 !ATH9K_ANI_USE_OFDM_WEAK_SIG; 897 !ATH9K_ANI_USE_OFDM_WEAK_SIG;
894 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL; 898 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
899 ani->ofdmNoiseImmunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL;
900 ani->update_ani = false;
895 } 901 }
896 902
897 /* 903 /*
diff --git a/drivers/net/wireless/ath/ath9k/ani.h b/drivers/net/wireless/ath/ath9k/ani.h
index a547005572e7..83029d6c7b22 100644
--- a/drivers/net/wireless/ath/ath9k/ani.h
+++ b/drivers/net/wireless/ath/ath9k/ani.h
@@ -122,6 +122,7 @@ struct ar5416AniState {
122 u8 firstepLevel; 122 u8 firstepLevel;
123 u8 ofdmWeakSigDetectOff; 123 u8 ofdmWeakSigDetectOff;
124 u8 cckWeakSigThreshold; 124 u8 cckWeakSigThreshold;
125 bool update_ani;
125 u32 listenTime; 126 u32 listenTime;
126 int32_t rssiThrLow; 127 int32_t rssiThrLow;
127 int32_t rssiThrHigh; 128 int32_t rssiThrHigh;
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_initvals.h b/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
index 234617c948a1..f81e7fc60a36 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
@@ -14,70 +14,71 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17static const u32 ar5416Modes[][6] = { 17static const u32 ar5416Modes[][5] = {
18 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0}, 18 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
19 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0}, 19 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
20 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180}, 20 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
21 {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008}, 21 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
22 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0}, 22 {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000},
23 {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab, 0x098813cf}, 23 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
24 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810, 0x08f04810}, 24 {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab},
25 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a, 0x0000320a}, 25 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
26 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303}, 26 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
27 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200}, 27 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300},
28 {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 28 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
29 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001}, 29 {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
30 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 30 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001},
31 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007}, 31 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
32 {0x00009844, 0x1372161e, 0x1372161e, 0x137216a0, 0x137216a0, 0x137216a0}, 32 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007},
33 {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 33 {0x00009844, 0x1372161e, 0x1372161e, 0x137216a0, 0x137216a0},
34 {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 34 {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
35 {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 35 {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
36 {0x00009850, 0x6c48b4e0, 0x6d48b4e0, 0x6d48b0de, 0x6c48b0de, 0x6c48b0de}, 36 {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
37 {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e}, 37 {0x00009850, 0x6c48b4e0, 0x6d48b4e0, 0x6d48b0de, 0x6c48b0de},
38 {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e, 0x31395d5e}, 38 {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e},
39 {0x00009860, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18}, 39 {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
40 {0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00}, 40 {0x00009860, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18},
41 {0x00009868, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190}, 41 {0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00},
42 {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081}, 42 {0x00009868, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190},
43 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0}, 43 {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081},
44 {0x00009918, 0x000001b8, 0x00000370, 0x00000268, 0x00000134, 0x00000134}, 44 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
45 {0x00009924, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b}, 45 {0x00009918, 0x000001b8, 0x00000370, 0x00000268, 0x00000134},
46 {0x00009944, 0xffb81020, 0xffb81020, 0xffb81020, 0xffb81020, 0xffb81020}, 46 {0x00009924, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b, 0xd0058a0b},
47 {0x00009960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80}, 47 {0x00009944, 0xffb81020, 0xffb81020, 0xffb81020, 0xffb81020},
48 {0x0000a960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80}, 48 {0x00009960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80},
49 {0x0000b960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80}, 49 {0x0000a960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80},
50 {0x00009964, 0x00000000, 0x00000000, 0x00001120, 0x00001120, 0x00001120}, 50 {0x0000b960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80},
51 {0x000099bc, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00}, 51 {0x00009964, 0x00000000, 0x00000000, 0x00001120, 0x00001120},
52 {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be, 0x038919be}, 52 {0x000099bc, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00},
53 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77}, 53 {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be},
54 {0x000099c8, 0x6af6532c, 0x6af6532c, 0x6af6532c, 0x6af6532c, 0x6af6532c}, 54 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77},
55 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8}, 55 {0x000099c8, 0x6af6532c, 0x6af6532c, 0x6af6532c, 0x6af6532c},
56 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384}, 56 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8},
57 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 57 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384},
58 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 58 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
59 {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880, 0x00000880}, 59 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
60 {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788, 0xd03e4788}, 60 {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880},
61 {0x0000a20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120, 0x002ac120}, 61 {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788},
62 {0x0000b20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120, 0x002ac120}, 62 {0x0000a20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120},
63 {0x0000c20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120, 0x002ac120}, 63 {0x0000b20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120},
64 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a}, 64 {0x0000c20c, 0x002ec1e0, 0x002ec1e0, 0x002ac120, 0x002ac120},
65 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000}, 65 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
66 {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa, 0x0a1a7caa}, 66 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
67 {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000, 0x18010000}, 67 {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa},
68 {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402, 0x2e032402}, 68 {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000},
69 {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06, 0x4a0a3c06}, 69 {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402},
70 {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b, 0x621a540b}, 70 {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06},
71 {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b, 0x764f6c1b}, 71 {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b},
72 {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a, 0x845b7a5a}, 72 {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b},
73 {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf, 0x950f8ccf}, 73 {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a},
74 {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f, 0xa5cf9b4f}, 74 {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf},
75 {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f, 0xbddfaf1f}, 75 {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f},
76 {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f, 0xd1ffc93f}, 76 {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f},
77 {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000, 0x00000000}, 77 {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f},
78 {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 78 {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000},
79 {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 79 {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
80 {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 80 {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
81 {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
81}; 82};
82 83
83static const u32 ar5416Common[][2] = { 84static const u32 ar5416Common[][2] = {
@@ -668,6 +669,6 @@ static const u32 ar5416Addac[][2] = {
668 {0x0000989c, 0x00000000}, 669 {0x0000989c, 0x00000000},
669 {0x0000989c, 0x00000000}, 670 {0x0000989c, 0x00000000},
670 {0x0000989c, 0x00000000}, 671 {0x0000989c, 0x00000000},
671 {0x000098cc, 0x00000000}, 672 {0x000098c4, 0x00000000},
672}; 673};
673 674
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index fac2c6da6ca4..0a749c8fa634 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -704,8 +704,10 @@ static void ar5008_hw_override_ini(struct ath_hw *ah,
704 REG_WRITE(ah, AR_PCU_MISC_MODE2, val); 704 REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
705 } 705 }
706 706
707 if (!AR_SREV_5416_20_OR_LATER(ah) || 707 REG_SET_BIT(ah, AR_PHY_CCK_DETECT,
708 AR_SREV_9280_20_OR_LATER(ah)) 708 AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
709
710 if (AR_SREV_9280_20_OR_LATER(ah))
709 return; 711 return;
710 /* 712 /*
711 * Disable BB clock gating 713 * Disable BB clock gating
@@ -802,7 +804,8 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,
802 804
803 /* Write ADDAC shifts */ 805 /* Write ADDAC shifts */
804 REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO); 806 REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO);
805 ah->eep_ops->set_addac(ah, chan); 807 if (ah->eep_ops->set_addac)
808 ah->eep_ops->set_addac(ah, chan);
806 809
807 if (AR_SREV_5416_22_OR_LATER(ah)) { 810 if (AR_SREV_5416_22_OR_LATER(ah)) {
808 REG_WRITE_ARRAY(&ah->iniAddac, 1, regWrites); 811 REG_WRITE_ARRAY(&ah->iniAddac, 1, regWrites);
@@ -1007,24 +1010,6 @@ static void ar5008_restore_chainmask(struct ath_hw *ah)
1007 } 1010 }
1008} 1011}
1009 1012
1010static void ar5008_set_diversity(struct ath_hw *ah, bool value)
1011{
1012 u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
1013 if (value)
1014 v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
1015 else
1016 v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
1017 REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
1018}
1019
1020static u32 ar9100_hw_compute_pll_control(struct ath_hw *ah,
1021 struct ath9k_channel *chan)
1022{
1023 if (chan && IS_CHAN_5GHZ(chan))
1024 return 0x1450;
1025 return 0x1458;
1026}
1027
1028static u32 ar9160_hw_compute_pll_control(struct ath_hw *ah, 1013static u32 ar9160_hw_compute_pll_control(struct ath_hw *ah,
1029 struct ath9k_channel *chan) 1014 struct ath9k_channel *chan)
1030{ 1015{
@@ -1654,7 +1639,6 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
1654 priv_ops->rfbus_req = ar5008_hw_rfbus_req; 1639 priv_ops->rfbus_req = ar5008_hw_rfbus_req;
1655 priv_ops->rfbus_done = ar5008_hw_rfbus_done; 1640 priv_ops->rfbus_done = ar5008_hw_rfbus_done;
1656 priv_ops->restore_chainmask = ar5008_restore_chainmask; 1641 priv_ops->restore_chainmask = ar5008_restore_chainmask;
1657 priv_ops->set_diversity = ar5008_set_diversity;
1658 priv_ops->do_getnf = ar5008_hw_do_getnf; 1642 priv_ops->do_getnf = ar5008_hw_do_getnf;
1659 priv_ops->set_radar_params = ar5008_hw_set_radar_params; 1643 priv_ops->set_radar_params = ar5008_hw_set_radar_params;
1660 1644
@@ -1664,9 +1648,7 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
1664 } else 1648 } else
1665 priv_ops->ani_control = ar5008_hw_ani_control_old; 1649 priv_ops->ani_control = ar5008_hw_ani_control_old;
1666 1650
1667 if (AR_SREV_9100(ah)) 1651 if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
1668 priv_ops->compute_pll_control = ar9100_hw_compute_pll_control;
1669 else if (AR_SREV_9160_10_OR_LATER(ah))
1670 priv_ops->compute_pll_control = ar9160_hw_compute_pll_control; 1652 priv_ops->compute_pll_control = ar9160_hw_compute_pll_control;
1671 else 1653 else
1672 priv_ops->compute_pll_control = ar5008_hw_compute_pll_control; 1654 priv_ops->compute_pll_control = ar5008_hw_compute_pll_control;
diff --git a/drivers/net/wireless/ath/ath9k/ar9001_initvals.h b/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
index 6d2e2f3303f9..e8bdc75405f1 100644
--- a/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
@@ -14,73 +14,74 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17static const u32 ar5416Modes_9100[][6] = { 17static const u32 ar5416Modes_9100[][5] = {
18 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0}, 18 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
19 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0}, 19 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
20 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180}, 20 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
21 {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008}, 21 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
22 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0}, 22 {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000},
23 {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab, 0x098813cf}, 23 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
24 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810, 0x08f04810}, 24 {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab},
25 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a, 0x0000320a}, 25 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
26 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303}, 26 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
27 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200}, 27 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300},
28 {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 28 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
29 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001}, 29 {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
30 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 30 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001},
31 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007}, 31 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
32 {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0, 0x037216a0}, 32 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007},
33 {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 33 {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},
34 {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 34 {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
35 {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 35 {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
36 {0x00009850, 0x6c48b4e2, 0x6d48b4e2, 0x6d48b0e2, 0x6c48b0e2, 0x6c48b0e2}, 36 {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
37 {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e}, 37 {0x00009850, 0x6c48b4e2, 0x6d48b4e2, 0x6d48b0e2, 0x6c48b0e2},
38 {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e, 0x31395d5e}, 38 {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e},
39 {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20, 0x00048d18}, 39 {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
40 {0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00}, 40 {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20},
41 {0x00009868, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0}, 41 {0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00},
42 {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081}, 42 {0x00009868, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0},
43 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0}, 43 {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081},
44 {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016}, 44 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
45 {0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d}, 45 {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
46 {0x00009940, 0x00750604, 0x00754604, 0xfff81204, 0xfff81204, 0xfff81204}, 46 {0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d},
47 {0x00009944, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020}, 47 {0x00009940, 0x00750604, 0x00754604, 0xfff81204, 0xfff81204},
48 {0x00009954, 0x5f3ca3de, 0x5f3ca3de, 0xe250a51e, 0xe250a51e, 0xe250a51e}, 48 {0x00009944, 0xdfb81020, 0xdfb81020, 0xdfb81020, 0xdfb81020},
49 {0x00009958, 0x2108ecff, 0x2108ecff, 0x3388ffff, 0x3388ffff, 0x3388ffff}, 49 {0x00009954, 0x5f3ca3de, 0x5f3ca3de, 0xe250a51e, 0xe250a51e},
50 {0x00009960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0}, 50 {0x00009958, 0x2108ecff, 0x2108ecff, 0x3388ffff, 0x3388ffff},
51 {0x0000a960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0}, 51 {0x00009960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0},
52 {0x0000b960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0}, 52 {0x0000a960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0},
53 {0x00009964, 0x00001120, 0x00001120, 0x00001120, 0x00001120, 0x00001120}, 53 {0x0000b960, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0, 0x0001bfc0},
54 {0x0000c9bc, 0x001a0600, 0x001a0600, 0x001a1000, 0x001a0c00, 0x001a0c00}, 54 {0x00009964, 0x00001120, 0x00001120, 0x00001120, 0x00001120},
55 {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be, 0x038919be}, 55 {0x0000c9bc, 0x001a0600, 0x001a0600, 0x001a1000, 0x001a0c00},
56 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77}, 56 {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be},
57 {0x000099c8, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329}, 57 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77},
58 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8}, 58 {0x000099c8, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329},
59 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384}, 59 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8},
60 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 60 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384},
61 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 61 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
62 {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880, 0x00000880}, 62 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
63 {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788, 0xd03e4788}, 63 {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880},
64 {0x0000a20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120}, 64 {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788},
65 {0x0000b20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120}, 65 {0x0000a20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120},
66 {0x0000c20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120}, 66 {0x0000b20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120},
67 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a}, 67 {0x0000c20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120},
68 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000}, 68 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
69 {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa, 0x0a1a7caa}, 69 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
70 {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000, 0x18010000}, 70 {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa},
71 {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402, 0x2e032402}, 71 {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000},
72 {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06, 0x4a0a3c06}, 72 {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402},
73 {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b, 0x621a540b}, 73 {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06},
74 {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b, 0x764f6c1b}, 74 {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b},
75 {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a, 0x845b7a5a}, 75 {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b},
76 {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf, 0x950f8ccf}, 76 {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a},
77 {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f, 0xa5cf9b4f}, 77 {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf},
78 {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f, 0xbddfaf1f}, 78 {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f},
79 {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f, 0xd1ffc93f}, 79 {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f},
80 {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000, 0x00000000}, 80 {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f},
81 {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 81 {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000},
82 {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 82 {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
83 {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 83 {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
84 {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
84}; 85};
85 86
86static const u32 ar5416Common_9100[][2] = { 87static const u32 ar5416Common_9100[][2] = {
@@ -666,71 +667,72 @@ static const u32 ar5416Addac_9100[][2] = {
666 {0x000098cc, 0x00000000}, 667 {0x000098cc, 0x00000000},
667}; 668};
668 669
669static const u32 ar5416Modes_9160[][6] = { 670static const u32 ar5416Modes_9160[][5] = {
670 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0}, 671 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
671 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0}, 672 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
672 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180}, 673 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
673 {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008}, 674 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
674 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0}, 675 {0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000},
675 {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab, 0x098813cf}, 676 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
676 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810, 0x08f04810}, 677 {0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab},
677 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a, 0x0000320a}, 678 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
678 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303}, 679 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
679 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200}, 680 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300},
680 {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 681 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
681 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001}, 682 {0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
682 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 683 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001},
683 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007}, 684 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
684 {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0, 0x037216a0}, 685 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007},
685 {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 686 {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},
686 {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 687 {0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
687 {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68}, 688 {0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
688 {0x00009850, 0x6c48b4e2, 0x6d48b4e2, 0x6d48b0e2, 0x6c48b0e2, 0x6c48b0e2}, 689 {0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68},
689 {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e}, 690 {0x00009850, 0x6c48b4e2, 0x6d48b4e2, 0x6d48b0e2, 0x6c48b0e2},
690 {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e, 0x31395d5e}, 691 {0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e},
691 {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20, 0x00048d18}, 692 {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
692 {0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00}, 693 {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20},
693 {0x00009868, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0}, 694 {0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00},
694 {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081}, 695 {0x00009868, 0x409a40d0, 0x409a40d0, 0x409a40d0, 0x409a40d0},
695 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0}, 696 {0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081},
696 {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016}, 697 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
697 {0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d}, 698 {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
698 {0x00009944, 0xffb81020, 0xffb81020, 0xffb81020, 0xffb81020, 0xffb81020}, 699 {0x00009924, 0xd00a8a07, 0xd00a8a07, 0xd00a8a0d, 0xd00a8a0d},
699 {0x00009960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40}, 700 {0x00009944, 0xffb81020, 0xffb81020, 0xffb81020, 0xffb81020},
700 {0x0000a960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40}, 701 {0x00009960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40},
701 {0x0000b960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40}, 702 {0x0000a960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40},
702 {0x00009964, 0x00001120, 0x00001120, 0x00001120, 0x00001120, 0x00001120}, 703 {0x0000b960, 0x00009b40, 0x00009b40, 0x00009b40, 0x00009b40},
703 {0x0000c968, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce, 0x000003ce}, 704 {0x00009964, 0x00001120, 0x00001120, 0x00001120, 0x00001120},
704 {0x000099bc, 0x001a0600, 0x001a0600, 0x001a0c00, 0x001a0c00, 0x001a0c00}, 705 {0x0000c968, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
705 {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be, 0x038919be}, 706 {0x000099bc, 0x001a0600, 0x001a0600, 0x001a0c00, 0x001a0c00},
706 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77}, 707 {0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be},
707 {0x000099c8, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329}, 708 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77},
708 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8}, 709 {0x000099c8, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329},
709 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384}, 710 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8},
710 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 711 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384},
711 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 712 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
712 {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880, 0x00000880}, 713 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
713 {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788, 0xd03e4788}, 714 {0x0000a204, 0x00000880, 0x00000880, 0x00000880, 0x00000880},
714 {0x0000a20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120}, 715 {0x0000a208, 0xd6be4788, 0xd6be4788, 0xd03e4788, 0xd03e4788},
715 {0x0000b20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120}, 716 {0x0000a20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120},
716 {0x0000c20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120, 0x002ac120}, 717 {0x0000b20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120},
717 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a}, 718 {0x0000c20c, 0x002fc160, 0x002fc160, 0x002ac120, 0x002ac120},
718 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000}, 719 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
719 {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa, 0x0a1a7caa}, 720 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
720 {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000, 0x18010000}, 721 {0x0000a274, 0x0a1a9caa, 0x0a1a9caa, 0x0a1a7caa, 0x0a1a7caa},
721 {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402, 0x2e032402}, 722 {0x0000a300, 0x18010000, 0x18010000, 0x18010000, 0x18010000},
722 {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06, 0x4a0a3c06}, 723 {0x0000a304, 0x30032602, 0x30032602, 0x2e032402, 0x2e032402},
723 {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b, 0x621a540b}, 724 {0x0000a308, 0x48073e06, 0x48073e06, 0x4a0a3c06, 0x4a0a3c06},
724 {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b, 0x764f6c1b}, 725 {0x0000a30c, 0x560b4c0a, 0x560b4c0a, 0x621a540b, 0x621a540b},
725 {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a, 0x845b7a5a}, 726 {0x0000a310, 0x641a600f, 0x641a600f, 0x764f6c1b, 0x764f6c1b},
726 {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf, 0x950f8ccf}, 727 {0x0000a314, 0x7a4f6e1b, 0x7a4f6e1b, 0x845b7a5a, 0x845b7a5a},
727 {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f, 0xa5cf9b4f}, 728 {0x0000a318, 0x8c5b7e5a, 0x8c5b7e5a, 0x950f8ccf, 0x950f8ccf},
728 {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f, 0xbddfaf1f}, 729 {0x0000a31c, 0x9d0f96cf, 0x9d0f96cf, 0xa5cf9b4f, 0xa5cf9b4f},
729 {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f, 0xd1ffc93f}, 730 {0x0000a320, 0xb51fa69f, 0xb51fa69f, 0xbddfaf1f, 0xbddfaf1f},
730 {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000, 0x00000000}, 731 {0x0000a324, 0xcb3fbd07, 0xcb3fbcbf, 0xd1ffc93f, 0xd1ffc93f},
731 {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 732 {0x0000a328, 0x0000d7bf, 0x0000d7bf, 0x00000000, 0x00000000},
732 {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 733 {0x0000a32c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
733 {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 734 {0x0000a330, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
735 {0x0000a334, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
734}; 736};
735 737
736static const u32 ar5416Common_9160[][2] = { 738static const u32 ar5416Common_9160[][2] = {
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
index 2d4c0910295b..e0ab0657cc3a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
@@ -41,7 +41,8 @@ static bool ar9002_hw_is_cal_supported(struct ath_hw *ah,
41 case ADC_DC_CAL: 41 case ADC_DC_CAL:
42 /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */ 42 /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */
43 if (!IS_CHAN_B(chan) && 43 if (!IS_CHAN_B(chan) &&
44 !(IS_CHAN_2GHZ(chan) && IS_CHAN_HT20(chan))) 44 !((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) &&
45 IS_CHAN_HT20(chan)))
45 supported = true; 46 supported = true;
46 break; 47 break;
47 } 48 }
@@ -868,6 +869,7 @@ static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
868 ar9002_hw_pa_cal(ah, true); 869 ar9002_hw_pa_cal(ah, true);
869 870
870 /* Do NF Calibration after DC offset and other calibrations */ 871 /* Do NF Calibration after DC offset and other calibrations */
872 ath9k_hw_loadnf(ah, chan);
871 ath9k_hw_start_nfcal(ah, true); 873 ath9k_hw_start_nfcal(ah, true);
872 874
873 if (ah->caldata) 875 if (ah->caldata)
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
index b54ab78fb092..626d547d2f06 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
@@ -30,7 +30,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
30{ 30{
31 if (AR_SREV_9271(ah)) { 31 if (AR_SREV_9271(ah)) {
32 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271, 32 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
33 ARRAY_SIZE(ar9271Modes_9271), 6); 33 ARRAY_SIZE(ar9271Modes_9271), 5);
34 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271, 34 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
35 ARRAY_SIZE(ar9271Common_9271), 2); 35 ARRAY_SIZE(ar9271Common_9271), 2);
36 INIT_INI_ARRAY(&ah->iniCommon_normal_cck_fir_coeff_9271, 36 INIT_INI_ARRAY(&ah->iniCommon_normal_cck_fir_coeff_9271,
@@ -41,21 +41,21 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
41 ARRAY_SIZE(ar9271Common_japan_2484_cck_fir_coeff_9271), 2); 41 ARRAY_SIZE(ar9271Common_japan_2484_cck_fir_coeff_9271), 2);
42 INIT_INI_ARRAY(&ah->iniModes_9271_1_0_only, 42 INIT_INI_ARRAY(&ah->iniModes_9271_1_0_only,
43 ar9271Modes_9271_1_0_only, 43 ar9271Modes_9271_1_0_only,
44 ARRAY_SIZE(ar9271Modes_9271_1_0_only), 6); 44 ARRAY_SIZE(ar9271Modes_9271_1_0_only), 5);
45 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg, 45 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg,
46 ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 6); 46 ARRAY_SIZE(ar9271Modes_9271_ANI_reg), 5);
47 INIT_INI_ARRAY(&ah->iniModes_high_power_tx_gain_9271, 47 INIT_INI_ARRAY(&ah->iniModes_high_power_tx_gain_9271,
48 ar9271Modes_high_power_tx_gain_9271, 48 ar9271Modes_high_power_tx_gain_9271,
49 ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 6); 49 ARRAY_SIZE(ar9271Modes_high_power_tx_gain_9271), 5);
50 INIT_INI_ARRAY(&ah->iniModes_normal_power_tx_gain_9271, 50 INIT_INI_ARRAY(&ah->iniModes_normal_power_tx_gain_9271,
51 ar9271Modes_normal_power_tx_gain_9271, 51 ar9271Modes_normal_power_tx_gain_9271,
52 ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 6); 52 ARRAY_SIZE(ar9271Modes_normal_power_tx_gain_9271), 5);
53 return; 53 return;
54 } 54 }
55 55
56 if (AR_SREV_9287_11_OR_LATER(ah)) { 56 if (AR_SREV_9287_11_OR_LATER(ah)) {
57 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1, 57 INIT_INI_ARRAY(&ah->iniModes, ar9287Modes_9287_1_1,
58 ARRAY_SIZE(ar9287Modes_9287_1_1), 6); 58 ARRAY_SIZE(ar9287Modes_9287_1_1), 5);
59 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1, 59 INIT_INI_ARRAY(&ah->iniCommon, ar9287Common_9287_1_1,
60 ARRAY_SIZE(ar9287Common_9287_1_1), 2); 60 ARRAY_SIZE(ar9287Common_9287_1_1), 2);
61 if (ah->config.pcie_clock_req) 61 if (ah->config.pcie_clock_req)
@@ -71,7 +71,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
71 71
72 72
73 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2, 73 INIT_INI_ARRAY(&ah->iniModes, ar9285Modes_9285_1_2,
74 ARRAY_SIZE(ar9285Modes_9285_1_2), 6); 74 ARRAY_SIZE(ar9285Modes_9285_1_2), 5);
75 INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2, 75 INIT_INI_ARRAY(&ah->iniCommon, ar9285Common_9285_1_2,
76 ARRAY_SIZE(ar9285Common_9285_1_2), 2); 76 ARRAY_SIZE(ar9285Common_9285_1_2), 2);
77 77
@@ -87,7 +87,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
87 } 87 }
88 } else if (AR_SREV_9280_20_OR_LATER(ah)) { 88 } else if (AR_SREV_9280_20_OR_LATER(ah)) {
89 INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2, 89 INIT_INI_ARRAY(&ah->iniModes, ar9280Modes_9280_2,
90 ARRAY_SIZE(ar9280Modes_9280_2), 6); 90 ARRAY_SIZE(ar9280Modes_9280_2), 5);
91 INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2, 91 INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
92 ARRAY_SIZE(ar9280Common_9280_2), 2); 92 ARRAY_SIZE(ar9280Common_9280_2), 2);
93 93
@@ -105,7 +105,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
105 ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3); 105 ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
106 } else if (AR_SREV_9160_10_OR_LATER(ah)) { 106 } else if (AR_SREV_9160_10_OR_LATER(ah)) {
107 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160, 107 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9160,
108 ARRAY_SIZE(ar5416Modes_9160), 6); 108 ARRAY_SIZE(ar5416Modes_9160), 5);
109 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160, 109 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9160,
110 ARRAY_SIZE(ar5416Common_9160), 2); 110 ARRAY_SIZE(ar5416Common_9160), 2);
111 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9160, 111 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9160,
@@ -134,7 +134,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
134 } 134 }
135 } else if (AR_SREV_9100_OR_LATER(ah)) { 135 } else if (AR_SREV_9100_OR_LATER(ah)) {
136 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100, 136 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100,
137 ARRAY_SIZE(ar5416Modes_9100), 6); 137 ARRAY_SIZE(ar5416Modes_9100), 5);
138 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100, 138 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100,
139 ARRAY_SIZE(ar5416Common_9100), 2); 139 ARRAY_SIZE(ar5416Common_9100), 2);
140 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9100, 140 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0_9100,
@@ -157,7 +157,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
157 ARRAY_SIZE(ar5416Addac_9100), 2); 157 ARRAY_SIZE(ar5416Addac_9100), 2);
158 } else { 158 } else {
159 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes, 159 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes,
160 ARRAY_SIZE(ar5416Modes), 6); 160 ARRAY_SIZE(ar5416Modes), 5);
161 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common, 161 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common,
162 ARRAY_SIZE(ar5416Common), 2); 162 ARRAY_SIZE(ar5416Common), 2);
163 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0, 163 INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0,
@@ -207,19 +207,19 @@ static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
207 if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF) 207 if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)
208 INIT_INI_ARRAY(&ah->iniModesRxGain, 208 INIT_INI_ARRAY(&ah->iniModesRxGain,
209 ar9280Modes_backoff_13db_rxgain_9280_2, 209 ar9280Modes_backoff_13db_rxgain_9280_2,
210 ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 6); 210 ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 5);
211 else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF) 211 else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)
212 INIT_INI_ARRAY(&ah->iniModesRxGain, 212 INIT_INI_ARRAY(&ah->iniModesRxGain,
213 ar9280Modes_backoff_23db_rxgain_9280_2, 213 ar9280Modes_backoff_23db_rxgain_9280_2,
214 ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 6); 214 ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 5);
215 else 215 else
216 INIT_INI_ARRAY(&ah->iniModesRxGain, 216 INIT_INI_ARRAY(&ah->iniModesRxGain,
217 ar9280Modes_original_rxgain_9280_2, 217 ar9280Modes_original_rxgain_9280_2,
218 ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 6); 218 ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
219 } else { 219 } else {
220 INIT_INI_ARRAY(&ah->iniModesRxGain, 220 INIT_INI_ARRAY(&ah->iniModesRxGain,
221 ar9280Modes_original_rxgain_9280_2, 221 ar9280Modes_original_rxgain_9280_2,
222 ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 6); 222 ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 5);
223 } 223 }
224} 224}
225 225
@@ -234,15 +234,15 @@ static void ar9280_20_hw_init_txgain_ini(struct ath_hw *ah)
234 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER) 234 if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)
235 INIT_INI_ARRAY(&ah->iniModesTxGain, 235 INIT_INI_ARRAY(&ah->iniModesTxGain,
236 ar9280Modes_high_power_tx_gain_9280_2, 236 ar9280Modes_high_power_tx_gain_9280_2,
237 ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 6); 237 ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 5);
238 else 238 else
239 INIT_INI_ARRAY(&ah->iniModesTxGain, 239 INIT_INI_ARRAY(&ah->iniModesTxGain,
240 ar9280Modes_original_tx_gain_9280_2, 240 ar9280Modes_original_tx_gain_9280_2,
241 ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 6); 241 ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
242 } else { 242 } else {
243 INIT_INI_ARRAY(&ah->iniModesTxGain, 243 INIT_INI_ARRAY(&ah->iniModesTxGain,
244 ar9280Modes_original_tx_gain_9280_2, 244 ar9280Modes_original_tx_gain_9280_2,
245 ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 6); 245 ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 5);
246 } 246 }
247} 247}
248 248
@@ -251,14 +251,14 @@ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
251 if (AR_SREV_9287_11_OR_LATER(ah)) 251 if (AR_SREV_9287_11_OR_LATER(ah))
252 INIT_INI_ARRAY(&ah->iniModesRxGain, 252 INIT_INI_ARRAY(&ah->iniModesRxGain,
253 ar9287Modes_rx_gain_9287_1_1, 253 ar9287Modes_rx_gain_9287_1_1,
254 ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 6); 254 ARRAY_SIZE(ar9287Modes_rx_gain_9287_1_1), 5);
255 else if (AR_SREV_9280_20(ah)) 255 else if (AR_SREV_9280_20(ah))
256 ar9280_20_hw_init_rxgain_ini(ah); 256 ar9280_20_hw_init_rxgain_ini(ah);
257 257
258 if (AR_SREV_9287_11_OR_LATER(ah)) { 258 if (AR_SREV_9287_11_OR_LATER(ah)) {
259 INIT_INI_ARRAY(&ah->iniModesTxGain, 259 INIT_INI_ARRAY(&ah->iniModesTxGain,
260 ar9287Modes_tx_gain_9287_1_1, 260 ar9287Modes_tx_gain_9287_1_1,
261 ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 6); 261 ARRAY_SIZE(ar9287Modes_tx_gain_9287_1_1), 5);
262 } else if (AR_SREV_9280_20(ah)) { 262 } else if (AR_SREV_9280_20(ah)) {
263 ar9280_20_hw_init_txgain_ini(ah); 263 ar9280_20_hw_init_txgain_ini(ah);
264 } else if (AR_SREV_9285_12_OR_LATER(ah)) { 264 } else if (AR_SREV_9285_12_OR_LATER(ah)) {
@@ -270,24 +270,24 @@ static void ar9002_hw_init_mode_gain_regs(struct ath_hw *ah)
270 INIT_INI_ARRAY(&ah->iniModesTxGain, 270 INIT_INI_ARRAY(&ah->iniModesTxGain,
271 ar9285Modes_XE2_0_high_power, 271 ar9285Modes_XE2_0_high_power,
272 ARRAY_SIZE( 272 ARRAY_SIZE(
273 ar9285Modes_XE2_0_high_power), 6); 273 ar9285Modes_XE2_0_high_power), 5);
274 } else { 274 } else {
275 INIT_INI_ARRAY(&ah->iniModesTxGain, 275 INIT_INI_ARRAY(&ah->iniModesTxGain,
276 ar9285Modes_high_power_tx_gain_9285_1_2, 276 ar9285Modes_high_power_tx_gain_9285_1_2,
277 ARRAY_SIZE( 277 ARRAY_SIZE(
278 ar9285Modes_high_power_tx_gain_9285_1_2), 6); 278 ar9285Modes_high_power_tx_gain_9285_1_2), 5);
279 } 279 }
280 } else { 280 } else {
281 if (AR_SREV_9285E_20(ah)) { 281 if (AR_SREV_9285E_20(ah)) {
282 INIT_INI_ARRAY(&ah->iniModesTxGain, 282 INIT_INI_ARRAY(&ah->iniModesTxGain,
283 ar9285Modes_XE2_0_normal_power, 283 ar9285Modes_XE2_0_normal_power,
284 ARRAY_SIZE( 284 ARRAY_SIZE(
285 ar9285Modes_XE2_0_normal_power), 6); 285 ar9285Modes_XE2_0_normal_power), 5);
286 } else { 286 } else {
287 INIT_INI_ARRAY(&ah->iniModesTxGain, 287 INIT_INI_ARRAY(&ah->iniModesTxGain,
288 ar9285Modes_original_tx_gain_9285_1_2, 288 ar9285Modes_original_tx_gain_9285_1_2,
289 ARRAY_SIZE( 289 ARRAY_SIZE(
290 ar9285Modes_original_tx_gain_9285_1_2), 6); 290 ar9285Modes_original_tx_gain_9285_1_2), 5);
291 } 291 }
292 } 292 }
293 } 293 }
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_initvals.h b/drivers/net/wireless/ath/ath9k/ar9002_initvals.h
index 7573257731b6..863db321070d 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9002_initvals.h
@@ -14,53 +14,54 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17static const u32 ar9280Modes_9280_2[][6] = { 17static const u32 ar9280Modes_9280_2[][5] = {
18 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0}, 18 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
19 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0}, 19 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
20 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180}, 20 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
21 {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008}, 21 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
22 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0}, 22 {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
23 {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b, 0x0988004f}, 23 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
24 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810, 0x08f04810}, 24 {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
25 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a, 0x0000320a}, 25 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
26 {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880}, 26 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
27 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303}, 27 {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
28 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200}, 28 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300},
29 {0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, 29 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
30 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001}, 30 {0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
31 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 31 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001},
32 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007}, 32 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
33 {0x00009840, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e, 0x206a012e}, 33 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007},
34 {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0, 0x037216a0}, 34 {0x00009840, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
35 {0x00009850, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2, 0x6c4000e2}, 35 {0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0},
36 {0x00009858, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e}, 36 {0x00009850, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
37 {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e, 0x31395d5e}, 37 {0x00009858, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
38 {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20, 0x00048d18}, 38 {0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
39 {0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00}, 39 {0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20},
40 {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, 40 {0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00},
41 {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881}, 41 {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
42 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0}, 42 {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
43 {0x00009918, 0x0000000a, 0x00000014, 0x00000268, 0x0000000b, 0x00000016}, 43 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
44 {0x00009924, 0xd00a8a0b, 0xd00a8a0b, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d}, 44 {0x00009918, 0x0000000a, 0x00000014, 0x00000268, 0x0000000b},
45 {0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1010, 0xffbc1010, 0xffbc1010}, 45 {0x00009924, 0xd00a8a0b, 0xd00a8a0b, 0xd00a8a0d, 0xd00a8a0d},
46 {0x00009960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010}, 46 {0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1010, 0xffbc1010},
47 {0x0000a960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010}, 47 {0x00009960, 0x00000010, 0x00000010, 0x00000010, 0x00000010},
48 {0x00009964, 0x00000210, 0x00000210, 0x00000210, 0x00000210, 0x00000210}, 48 {0x0000a960, 0x00000010, 0x00000010, 0x00000010, 0x00000010},
49 {0x0000c968, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce, 0x000003ce}, 49 {0x00009964, 0x00000210, 0x00000210, 0x00000210, 0x00000210},
50 {0x000099b8, 0x0000001c, 0x0000001c, 0x0000001c, 0x0000001c, 0x0000001c}, 50 {0x0000c968, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
51 {0x000099bc, 0x00000a00, 0x00000a00, 0x00000c00, 0x00000c00, 0x00000c00}, 51 {0x000099b8, 0x0000001c, 0x0000001c, 0x0000001c, 0x0000001c},
52 {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, 52 {0x000099bc, 0x00000a00, 0x00000a00, 0x00000c00, 0x00000c00},
53 {0x0000a204, 0x00000444, 0x00000444, 0x00000444, 0x00000444, 0x00000444}, 53 {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
54 {0x0000a20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019, 0x0001f019}, 54 {0x0000a204, 0x00000444, 0x00000444, 0x00000444, 0x00000444},
55 {0x0000b20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019, 0x0001f019}, 55 {0x0000a20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019},
56 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a}, 56 {0x0000b20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019},
57 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000}, 57 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
58 {0x0000a23c, 0x13c88000, 0x13c88000, 0x13c88001, 0x13c88000, 0x13c88000}, 58 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
59 {0x0000a250, 0x001ff000, 0x001ff000, 0x0004a000, 0x0004a000, 0x0004a000}, 59 {0x0000a23c, 0x13c88000, 0x13c88000, 0x13c88001, 0x13c88000},
60 {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e}, 60 {0x0000a250, 0x001ff000, 0x001ff000, 0x0004a000, 0x0004a000},
61 {0x0000a388, 0x0c000000, 0x0c000000, 0x08000000, 0x0c000000, 0x0c000000}, 61 {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e},
62 {0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 62 {0x0000a388, 0x0c000000, 0x0c000000, 0x08000000, 0x0c000000},
63 {0x00007894, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000}, 63 {0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
64 {0x00007894, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000},
64}; 65};
65 66
66static const u32 ar9280Common_9280_2[][2] = { 67static const u32 ar9280Common_9280_2[][2] = {
@@ -424,471 +425,476 @@ static const u32 ar9280Modes_fast_clock_9280_2[][3] = {
424 {0x00009918, 0x0000000b, 0x00000016}, 425 {0x00009918, 0x0000000b, 0x00000016},
425}; 426};
426 427
427static const u32 ar9280Modes_backoff_23db_rxgain_9280_2[][6] = { 428static const u32 ar9280Modes_backoff_23db_rxgain_9280_2[][5] = {
428 {0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290, 0x00000290}, 429 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
429 {0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300, 0x00000300}, 430 {0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290},
430 {0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304, 0x00000304}, 431 {0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300},
431 {0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308, 0x00000308}, 432 {0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304},
432 {0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c, 0x0000030c}, 433 {0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308},
433 {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000, 0x00008000}, 434 {0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c},
434 {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004, 0x00008004}, 435 {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000},
435 {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008, 0x00008008}, 436 {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004},
436 {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c, 0x0000800c}, 437 {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008},
437 {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080, 0x00008080}, 438 {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c},
438 {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084, 0x00008084}, 439 {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080},
439 {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088, 0x00008088}, 440 {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084},
440 {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c, 0x0000808c}, 441 {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088},
441 {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100, 0x00008100}, 442 {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c},
442 {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104, 0x00008104}, 443 {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100},
443 {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108, 0x00008108}, 444 {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104},
444 {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c, 0x0000810c}, 445 {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108},
445 {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110, 0x00008110}, 446 {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c},
446 {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114, 0x00008114}, 447 {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110},
447 {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180, 0x00008180}, 448 {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114},
448 {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184, 0x00008184}, 449 {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180},
449 {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188, 0x00008188}, 450 {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184},
450 {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c, 0x0000818c}, 451 {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188},
451 {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190, 0x00008190}, 452 {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c},
452 {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194, 0x00008194}, 453 {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190},
453 {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0, 0x000081a0}, 454 {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194},
454 {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c, 0x0000820c}, 455 {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0},
455 {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8, 0x000081a8}, 456 {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c},
456 {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284, 0x00008284}, 457 {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8},
457 {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288, 0x00008288}, 458 {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284},
458 {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224, 0x00008224}, 459 {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288},
459 {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290, 0x00008290}, 460 {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224},
460 {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300, 0x00008300}, 461 {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290},
461 {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304, 0x00008304}, 462 {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300},
462 {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308, 0x00008308}, 463 {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304},
463 {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c, 0x0000830c}, 464 {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308},
464 {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380, 0x00008380}, 465 {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c},
465 {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384, 0x00008384}, 466 {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380},
466 {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700, 0x00008700}, 467 {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384},
467 {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704, 0x00008704}, 468 {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700},
468 {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708, 0x00008708}, 469 {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704},
469 {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c, 0x0000870c}, 470 {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708},
470 {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780, 0x00008780}, 471 {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c},
471 {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784, 0x00008784}, 472 {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780},
472 {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00, 0x00008b00}, 473 {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784},
473 {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04, 0x00008b04}, 474 {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00},
474 {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08, 0x00008b08}, 475 {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04},
475 {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c, 0x00008b0c}, 476 {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08},
476 {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b10, 0x00008b10, 0x00008b10}, 477 {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c},
477 {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b80, 0x00008b80, 0x00008b80}, 478 {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b10, 0x00008b10},
478 {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b84, 0x00008b84, 0x00008b84}, 479 {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b80, 0x00008b80},
479 {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b88, 0x00008b88, 0x00008b88}, 480 {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b84, 0x00008b84},
480 {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b8c, 0x00008b8c, 0x00008b8c}, 481 {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b88, 0x00008b88},
481 {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008b90, 0x00008b90, 0x00008b90}, 482 {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b8c, 0x00008b8c},
482 {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008b94, 0x00008b94, 0x00008b94}, 483 {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008b90, 0x00008b90},
483 {0x00009adc, 0x0000b390, 0x0000b390, 0x00008b98, 0x00008b98, 0x00008b98}, 484 {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008b94, 0x00008b94},
484 {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008ba4, 0x00008ba4, 0x00008ba4}, 485 {0x00009adc, 0x0000b390, 0x0000b390, 0x00008b98, 0x00008b98},
485 {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008ba8, 0x00008ba8, 0x00008ba8}, 486 {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008ba4, 0x00008ba4},
486 {0x00009ae8, 0x0000b780, 0x0000b780, 0x00008bac, 0x00008bac, 0x00008bac}, 487 {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008ba8, 0x00008ba8},
487 {0x00009aec, 0x0000b784, 0x0000b784, 0x00008bb0, 0x00008bb0, 0x00008bb0}, 488 {0x00009ae8, 0x0000b780, 0x0000b780, 0x00008bac, 0x00008bac},
488 {0x00009af0, 0x0000b788, 0x0000b788, 0x00008bb4, 0x00008bb4, 0x00008bb4}, 489 {0x00009aec, 0x0000b784, 0x0000b784, 0x00008bb0, 0x00008bb0},
489 {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00008ba1, 0x00008ba1, 0x00008ba1}, 490 {0x00009af0, 0x0000b788, 0x0000b788, 0x00008bb4, 0x00008bb4},
490 {0x00009af8, 0x0000b790, 0x0000b790, 0x00008ba5, 0x00008ba5, 0x00008ba5}, 491 {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00008ba1, 0x00008ba1},
491 {0x00009afc, 0x0000b794, 0x0000b794, 0x00008ba9, 0x00008ba9, 0x00008ba9}, 492 {0x00009af8, 0x0000b790, 0x0000b790, 0x00008ba5, 0x00008ba5},
492 {0x00009b00, 0x0000b798, 0x0000b798, 0x00008bad, 0x00008bad, 0x00008bad}, 493 {0x00009afc, 0x0000b794, 0x0000b794, 0x00008ba9, 0x00008ba9},
493 {0x00009b04, 0x0000d784, 0x0000d784, 0x00008bb1, 0x00008bb1, 0x00008bb1}, 494 {0x00009b00, 0x0000b798, 0x0000b798, 0x00008bad, 0x00008bad},
494 {0x00009b08, 0x0000d788, 0x0000d788, 0x00008bb5, 0x00008bb5, 0x00008bb5}, 495 {0x00009b04, 0x0000d784, 0x0000d784, 0x00008bb1, 0x00008bb1},
495 {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00008ba2, 0x00008ba2, 0x00008ba2}, 496 {0x00009b08, 0x0000d788, 0x0000d788, 0x00008bb5, 0x00008bb5},
496 {0x00009b10, 0x0000d790, 0x0000d790, 0x00008ba6, 0x00008ba6, 0x00008ba6}, 497 {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00008ba2, 0x00008ba2},
497 {0x00009b14, 0x0000f780, 0x0000f780, 0x00008baa, 0x00008baa, 0x00008baa}, 498 {0x00009b10, 0x0000d790, 0x0000d790, 0x00008ba6, 0x00008ba6},
498 {0x00009b18, 0x0000f784, 0x0000f784, 0x00008bae, 0x00008bae, 0x00008bae}, 499 {0x00009b14, 0x0000f780, 0x0000f780, 0x00008baa, 0x00008baa},
499 {0x00009b1c, 0x0000f788, 0x0000f788, 0x00008bb2, 0x00008bb2, 0x00008bb2}, 500 {0x00009b18, 0x0000f784, 0x0000f784, 0x00008bae, 0x00008bae},
500 {0x00009b20, 0x0000f78c, 0x0000f78c, 0x00008bb6, 0x00008bb6, 0x00008bb6}, 501 {0x00009b1c, 0x0000f788, 0x0000f788, 0x00008bb2, 0x00008bb2},
501 {0x00009b24, 0x0000f790, 0x0000f790, 0x00008ba3, 0x00008ba3, 0x00008ba3}, 502 {0x00009b20, 0x0000f78c, 0x0000f78c, 0x00008bb6, 0x00008bb6},
502 {0x00009b28, 0x0000f794, 0x0000f794, 0x00008ba7, 0x00008ba7, 0x00008ba7}, 503 {0x00009b24, 0x0000f790, 0x0000f790, 0x00008ba3, 0x00008ba3},
503 {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x00008bab, 0x00008bab, 0x00008bab}, 504 {0x00009b28, 0x0000f794, 0x0000f794, 0x00008ba7, 0x00008ba7},
504 {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x00008baf, 0x00008baf, 0x00008baf}, 505 {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x00008bab, 0x00008bab},
505 {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x00008bb3, 0x00008bb3, 0x00008bb3}, 506 {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x00008baf, 0x00008baf},
506 {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x00008bb7, 0x00008bb7, 0x00008bb7}, 507 {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x00008bb3, 0x00008bb3},
507 {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x00008bc3, 0x00008bc3, 0x00008bc3}, 508 {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x00008bb7, 0x00008bb7},
508 {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x00008bc7, 0x00008bc7, 0x00008bc7}, 509 {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x00008bc3, 0x00008bc3},
509 {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x00008bcb, 0x00008bcb, 0x00008bcb}, 510 {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x00008bc7, 0x00008bc7},
510 {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x00008bcf, 0x00008bcf, 0x00008bcf}, 511 {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x00008bcb, 0x00008bcb},
511 {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x00008bd3, 0x00008bd3, 0x00008bd3}, 512 {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x00008bcf, 0x00008bcf},
512 {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x00008bd7, 0x00008bd7, 0x00008bd7}, 513 {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x00008bd3, 0x00008bd3},
513 {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 514 {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x00008bd7, 0x00008bd7},
514 {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 515 {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x00008bdb, 0x00008bdb},
515 {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 516 {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x00008bdb, 0x00008bdb},
516 {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 517 {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x00008bdb, 0x00008bdb},
517 {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 518 {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x00008bdb, 0x00008bdb},
518 {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 519 {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x00008bdb, 0x00008bdb},
519 {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 520 {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x00008bdb, 0x00008bdb},
520 {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 521 {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x00008bdb, 0x00008bdb},
521 {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 522 {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x00008bdb, 0x00008bdb},
522 {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 523 {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x00008bdb, 0x00008bdb},
523 {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 524 {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x00008bdb, 0x00008bdb},
524 {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 525 {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x00008bdb, 0x00008bdb},
525 {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 526 {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x00008bdb, 0x00008bdb},
526 {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 527 {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x00008bdb, 0x00008bdb},
527 {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 528 {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x00008bdb, 0x00008bdb},
528 {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 529 {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x00008bdb, 0x00008bdb},
529 {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 530 {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x00008bdb, 0x00008bdb},
530 {0x00009b98, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 531 {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x00008bdb, 0x00008bdb},
531 {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 532 {0x00009b98, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
532 {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 533 {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
533 {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 534 {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
534 {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 535 {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
535 {0x00009bac, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 536 {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
536 {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 537 {0x00009bac, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
537 {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 538 {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
538 {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 539 {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
539 {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 540 {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
540 {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 541 {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
541 {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 542 {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
542 {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 543 {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
543 {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 544 {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
544 {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 545 {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
545 {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 546 {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
546 {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 547 {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
547 {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 548 {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
548 {0x00009be0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 549 {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
549 {0x00009be4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 550 {0x00009be0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
550 {0x00009be8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 551 {0x00009be4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
551 {0x00009bec, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 552 {0x00009be8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
552 {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 553 {0x00009bec, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
553 {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 554 {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
554 {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 555 {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
555 {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb, 0x00008bdb}, 556 {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
556 {0x00009848, 0x00001066, 0x00001066, 0x00001055, 0x00001055, 0x00001055}, 557 {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x00008bdb, 0x00008bdb},
557 {0x0000a848, 0x00001066, 0x00001066, 0x00001055, 0x00001055, 0x00001055}, 558 {0x00009848, 0x00001066, 0x00001066, 0x00001055, 0x00001055},
559 {0x0000a848, 0x00001066, 0x00001066, 0x00001055, 0x00001055},
558}; 560};
559 561
560static const u32 ar9280Modes_original_rxgain_9280_2[][6] = { 562static const u32 ar9280Modes_original_rxgain_9280_2[][5] = {
561 {0x00009a00, 0x00008184, 0x00008184, 0x00008000, 0x00008000, 0x00008000}, 563 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
562 {0x00009a04, 0x00008188, 0x00008188, 0x00008000, 0x00008000, 0x00008000}, 564 {0x00009a00, 0x00008184, 0x00008184, 0x00008000, 0x00008000},
563 {0x00009a08, 0x0000818c, 0x0000818c, 0x00008000, 0x00008000, 0x00008000}, 565 {0x00009a04, 0x00008188, 0x00008188, 0x00008000, 0x00008000},
564 {0x00009a0c, 0x00008190, 0x00008190, 0x00008000, 0x00008000, 0x00008000}, 566 {0x00009a08, 0x0000818c, 0x0000818c, 0x00008000, 0x00008000},
565 {0x00009a10, 0x00008194, 0x00008194, 0x00008000, 0x00008000, 0x00008000}, 567 {0x00009a0c, 0x00008190, 0x00008190, 0x00008000, 0x00008000},
566 {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000, 0x00008000}, 568 {0x00009a10, 0x00008194, 0x00008194, 0x00008000, 0x00008000},
567 {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004, 0x00008004}, 569 {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000},
568 {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008, 0x00008008}, 570 {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004},
569 {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c, 0x0000800c}, 571 {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008},
570 {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080, 0x00008080}, 572 {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c},
571 {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084, 0x00008084}, 573 {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080},
572 {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088, 0x00008088}, 574 {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084},
573 {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c, 0x0000808c}, 575 {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088},
574 {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100, 0x00008100}, 576 {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c},
575 {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104, 0x00008104}, 577 {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100},
576 {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108, 0x00008108}, 578 {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104},
577 {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c, 0x0000810c}, 579 {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108},
578 {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110, 0x00008110}, 580 {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c},
579 {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114, 0x00008114}, 581 {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110},
580 {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180, 0x00008180}, 582 {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114},
581 {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184, 0x00008184}, 583 {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180},
582 {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188, 0x00008188}, 584 {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184},
583 {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c, 0x0000818c}, 585 {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188},
584 {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190, 0x00008190}, 586 {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c},
585 {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194, 0x00008194}, 587 {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190},
586 {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0, 0x000081a0}, 588 {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194},
587 {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c, 0x0000820c}, 589 {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0},
588 {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8, 0x000081a8}, 590 {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c},
589 {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284, 0x00008284}, 591 {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8},
590 {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288, 0x00008288}, 592 {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284},
591 {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224, 0x00008224}, 593 {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288},
592 {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290, 0x00008290}, 594 {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224},
593 {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300, 0x00008300}, 595 {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290},
594 {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304, 0x00008304}, 596 {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300},
595 {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308, 0x00008308}, 597 {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304},
596 {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c, 0x0000830c}, 598 {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308},
597 {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380, 0x00008380}, 599 {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c},
598 {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384, 0x00008384}, 600 {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380},
599 {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700, 0x00008700}, 601 {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384},
600 {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704, 0x00008704}, 602 {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700},
601 {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708, 0x00008708}, 603 {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704},
602 {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c, 0x0000870c}, 604 {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708},
603 {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780, 0x00008780}, 605 {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c},
604 {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784, 0x00008784}, 606 {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780},
605 {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00, 0x00008b00}, 607 {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784},
606 {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04, 0x00008b04}, 608 {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00},
607 {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08, 0x00008b08}, 609 {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04},
608 {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c, 0x00008b0c}, 610 {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08},
609 {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80, 0x00008b80}, 611 {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c},
610 {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84, 0x00008b84}, 612 {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80},
611 {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88, 0x00008b88}, 613 {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84},
612 {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c, 0x00008b8c}, 614 {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88},
613 {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90, 0x00008b90}, 615 {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c},
614 {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80, 0x00008f80}, 616 {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90},
615 {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84, 0x00008f84}, 617 {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80},
616 {0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88, 0x00008f88}, 618 {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84},
617 {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c, 0x00008f8c}, 619 {0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88},
618 {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90, 0x00008f90}, 620 {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c},
619 {0x00009ae8, 0x0000b780, 0x0000b780, 0x0000930c, 0x0000930c, 0x0000930c}, 621 {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90},
620 {0x00009aec, 0x0000b784, 0x0000b784, 0x00009310, 0x00009310, 0x00009310}, 622 {0x00009ae8, 0x0000b780, 0x0000b780, 0x0000930c, 0x0000930c},
621 {0x00009af0, 0x0000b788, 0x0000b788, 0x00009384, 0x00009384, 0x00009384}, 623 {0x00009aec, 0x0000b784, 0x0000b784, 0x00009310, 0x00009310},
622 {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009388, 0x00009388, 0x00009388}, 624 {0x00009af0, 0x0000b788, 0x0000b788, 0x00009384, 0x00009384},
623 {0x00009af8, 0x0000b790, 0x0000b790, 0x00009324, 0x00009324, 0x00009324}, 625 {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009388, 0x00009388},
624 {0x00009afc, 0x0000b794, 0x0000b794, 0x00009704, 0x00009704, 0x00009704}, 626 {0x00009af8, 0x0000b790, 0x0000b790, 0x00009324, 0x00009324},
625 {0x00009b00, 0x0000b798, 0x0000b798, 0x000096a4, 0x000096a4, 0x000096a4}, 627 {0x00009afc, 0x0000b794, 0x0000b794, 0x00009704, 0x00009704},
626 {0x00009b04, 0x0000d784, 0x0000d784, 0x000096a8, 0x000096a8, 0x000096a8}, 628 {0x00009b00, 0x0000b798, 0x0000b798, 0x000096a4, 0x000096a4},
627 {0x00009b08, 0x0000d788, 0x0000d788, 0x00009710, 0x00009710, 0x00009710}, 629 {0x00009b04, 0x0000d784, 0x0000d784, 0x000096a8, 0x000096a8},
628 {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009714, 0x00009714, 0x00009714}, 630 {0x00009b08, 0x0000d788, 0x0000d788, 0x00009710, 0x00009710},
629 {0x00009b10, 0x0000d790, 0x0000d790, 0x00009720, 0x00009720, 0x00009720}, 631 {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009714, 0x00009714},
630 {0x00009b14, 0x0000f780, 0x0000f780, 0x00009724, 0x00009724, 0x00009724}, 632 {0x00009b10, 0x0000d790, 0x0000d790, 0x00009720, 0x00009720},
631 {0x00009b18, 0x0000f784, 0x0000f784, 0x00009728, 0x00009728, 0x00009728}, 633 {0x00009b14, 0x0000f780, 0x0000f780, 0x00009724, 0x00009724},
632 {0x00009b1c, 0x0000f788, 0x0000f788, 0x0000972c, 0x0000972c, 0x0000972c}, 634 {0x00009b18, 0x0000f784, 0x0000f784, 0x00009728, 0x00009728},
633 {0x00009b20, 0x0000f78c, 0x0000f78c, 0x000097a0, 0x000097a0, 0x000097a0}, 635 {0x00009b1c, 0x0000f788, 0x0000f788, 0x0000972c, 0x0000972c},
634 {0x00009b24, 0x0000f790, 0x0000f790, 0x000097a4, 0x000097a4, 0x000097a4}, 636 {0x00009b20, 0x0000f78c, 0x0000f78c, 0x000097a0, 0x000097a0},
635 {0x00009b28, 0x0000f794, 0x0000f794, 0x000097a8, 0x000097a8, 0x000097a8}, 637 {0x00009b24, 0x0000f790, 0x0000f790, 0x000097a4, 0x000097a4},
636 {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x000097b0, 0x000097b0, 0x000097b0}, 638 {0x00009b28, 0x0000f794, 0x0000f794, 0x000097a8, 0x000097a8},
637 {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x000097b4, 0x000097b4, 0x000097b4}, 639 {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x000097b0, 0x000097b0},
638 {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x000097b8, 0x000097b8, 0x000097b8}, 640 {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x000097b4, 0x000097b4},
639 {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x000097a5, 0x000097a5, 0x000097a5}, 641 {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x000097b8, 0x000097b8},
640 {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x000097a9, 0x000097a9, 0x000097a9}, 642 {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x000097a5, 0x000097a5},
641 {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x000097ad, 0x000097ad, 0x000097ad}, 643 {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x000097a9, 0x000097a9},
642 {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x000097b1, 0x000097b1, 0x000097b1}, 644 {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x000097ad, 0x000097ad},
643 {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x000097b5, 0x000097b5, 0x000097b5}, 645 {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x000097b1, 0x000097b1},
644 {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x000097b9, 0x000097b9, 0x000097b9}, 646 {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x000097b5, 0x000097b5},
645 {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x000097c5, 0x000097c5, 0x000097c5}, 647 {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x000097b9, 0x000097b9},
646 {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x000097c9, 0x000097c9, 0x000097c9}, 648 {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x000097c5, 0x000097c5},
647 {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x000097d1, 0x000097d1, 0x000097d1}, 649 {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x000097c9, 0x000097c9},
648 {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x000097d5, 0x000097d5, 0x000097d5}, 650 {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x000097d1, 0x000097d1},
649 {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x000097d9, 0x000097d9, 0x000097d9}, 651 {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x000097d5, 0x000097d5},
650 {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x000097c6, 0x000097c6, 0x000097c6}, 652 {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x000097d9, 0x000097d9},
651 {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x000097ca, 0x000097ca, 0x000097ca}, 653 {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x000097c6, 0x000097c6},
652 {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x000097ce, 0x000097ce, 0x000097ce}, 654 {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x000097ca, 0x000097ca},
653 {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x000097d2, 0x000097d2, 0x000097d2}, 655 {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x000097ce, 0x000097ce},
654 {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x000097d6, 0x000097d6, 0x000097d6}, 656 {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x000097d2, 0x000097d2},
655 {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x000097c3, 0x000097c3, 0x000097c3}, 657 {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x000097d6, 0x000097d6},
656 {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x000097c7, 0x000097c7, 0x000097c7}, 658 {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x000097c3, 0x000097c3},
657 {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x000097cb, 0x000097cb, 0x000097cb}, 659 {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x000097c7, 0x000097c7},
658 {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x000097cf, 0x000097cf, 0x000097cf}, 660 {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x000097cb, 0x000097cb},
659 {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x000097d7, 0x000097d7, 0x000097d7}, 661 {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x000097cf, 0x000097cf},
660 {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x000097db, 0x000097db, 0x000097db}, 662 {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x000097d7, 0x000097d7},
661 {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x000097db, 0x000097db, 0x000097db}, 663 {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x000097db, 0x000097db},
662 {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x000097db, 0x000097db, 0x000097db}, 664 {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x000097db, 0x000097db},
663 {0x00009b98, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 665 {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x000097db, 0x000097db},
664 {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 666 {0x00009b98, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
665 {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 667 {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
666 {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 668 {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
667 {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 669 {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
668 {0x00009bac, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 670 {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
669 {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 671 {0x00009bac, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
670 {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 672 {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
671 {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 673 {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
672 {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 674 {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
673 {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 675 {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
674 {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 676 {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
675 {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 677 {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
676 {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 678 {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
677 {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 679 {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
678 {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 680 {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
679 {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 681 {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
680 {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 682 {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
681 {0x00009be0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 683 {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
682 {0x00009be4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 684 {0x00009be0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
683 {0x00009be8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 685 {0x00009be4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
684 {0x00009bec, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 686 {0x00009be8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
685 {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 687 {0x00009bec, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
686 {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 688 {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
687 {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 689 {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
688 {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db, 0x000097db}, 690 {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
689 {0x00009848, 0x00001066, 0x00001066, 0x00001063, 0x00001063, 0x00001063}, 691 {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x000097db, 0x000097db},
690 {0x0000a848, 0x00001066, 0x00001066, 0x00001063, 0x00001063, 0x00001063}, 692 {0x00009848, 0x00001066, 0x00001066, 0x00001063, 0x00001063},
693 {0x0000a848, 0x00001066, 0x00001066, 0x00001063, 0x00001063},
691}; 694};
692 695
693static const u32 ar9280Modes_backoff_13db_rxgain_9280_2[][6] = { 696static const u32 ar9280Modes_backoff_13db_rxgain_9280_2[][5] = {
694 {0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290, 0x00000290}, 697 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
695 {0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300, 0x00000300}, 698 {0x00009a00, 0x00008184, 0x00008184, 0x00000290, 0x00000290},
696 {0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304, 0x00000304}, 699 {0x00009a04, 0x00008188, 0x00008188, 0x00000300, 0x00000300},
697 {0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308, 0x00000308}, 700 {0x00009a08, 0x0000818c, 0x0000818c, 0x00000304, 0x00000304},
698 {0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c, 0x0000030c}, 701 {0x00009a0c, 0x00008190, 0x00008190, 0x00000308, 0x00000308},
699 {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000, 0x00008000}, 702 {0x00009a10, 0x00008194, 0x00008194, 0x0000030c, 0x0000030c},
700 {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004, 0x00008004}, 703 {0x00009a14, 0x00008200, 0x00008200, 0x00008000, 0x00008000},
701 {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008, 0x00008008}, 704 {0x00009a18, 0x00008204, 0x00008204, 0x00008004, 0x00008004},
702 {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c, 0x0000800c}, 705 {0x00009a1c, 0x00008208, 0x00008208, 0x00008008, 0x00008008},
703 {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080, 0x00008080}, 706 {0x00009a20, 0x0000820c, 0x0000820c, 0x0000800c, 0x0000800c},
704 {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084, 0x00008084}, 707 {0x00009a24, 0x00008210, 0x00008210, 0x00008080, 0x00008080},
705 {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088, 0x00008088}, 708 {0x00009a28, 0x00008214, 0x00008214, 0x00008084, 0x00008084},
706 {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c, 0x0000808c}, 709 {0x00009a2c, 0x00008280, 0x00008280, 0x00008088, 0x00008088},
707 {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100, 0x00008100}, 710 {0x00009a30, 0x00008284, 0x00008284, 0x0000808c, 0x0000808c},
708 {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104, 0x00008104}, 711 {0x00009a34, 0x00008288, 0x00008288, 0x00008100, 0x00008100},
709 {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108, 0x00008108}, 712 {0x00009a38, 0x0000828c, 0x0000828c, 0x00008104, 0x00008104},
710 {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c, 0x0000810c}, 713 {0x00009a3c, 0x00008290, 0x00008290, 0x00008108, 0x00008108},
711 {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110, 0x00008110}, 714 {0x00009a40, 0x00008300, 0x00008300, 0x0000810c, 0x0000810c},
712 {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114, 0x00008114}, 715 {0x00009a44, 0x00008304, 0x00008304, 0x00008110, 0x00008110},
713 {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180, 0x00008180}, 716 {0x00009a48, 0x00008308, 0x00008308, 0x00008114, 0x00008114},
714 {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184, 0x00008184}, 717 {0x00009a4c, 0x0000830c, 0x0000830c, 0x00008180, 0x00008180},
715 {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188, 0x00008188}, 718 {0x00009a50, 0x00008310, 0x00008310, 0x00008184, 0x00008184},
716 {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c, 0x0000818c}, 719 {0x00009a54, 0x00008314, 0x00008314, 0x00008188, 0x00008188},
717 {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190, 0x00008190}, 720 {0x00009a58, 0x00008380, 0x00008380, 0x0000818c, 0x0000818c},
718 {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194, 0x00008194}, 721 {0x00009a5c, 0x00008384, 0x00008384, 0x00008190, 0x00008190},
719 {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0, 0x000081a0}, 722 {0x00009a60, 0x00008388, 0x00008388, 0x00008194, 0x00008194},
720 {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c, 0x0000820c}, 723 {0x00009a64, 0x0000838c, 0x0000838c, 0x000081a0, 0x000081a0},
721 {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8, 0x000081a8}, 724 {0x00009a68, 0x00008390, 0x00008390, 0x0000820c, 0x0000820c},
722 {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284, 0x00008284}, 725 {0x00009a6c, 0x00008394, 0x00008394, 0x000081a8, 0x000081a8},
723 {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288, 0x00008288}, 726 {0x00009a70, 0x0000a380, 0x0000a380, 0x00008284, 0x00008284},
724 {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224, 0x00008224}, 727 {0x00009a74, 0x0000a384, 0x0000a384, 0x00008288, 0x00008288},
725 {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290, 0x00008290}, 728 {0x00009a78, 0x0000a388, 0x0000a388, 0x00008224, 0x00008224},
726 {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300, 0x00008300}, 729 {0x00009a7c, 0x0000a38c, 0x0000a38c, 0x00008290, 0x00008290},
727 {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304, 0x00008304}, 730 {0x00009a80, 0x0000a390, 0x0000a390, 0x00008300, 0x00008300},
728 {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308, 0x00008308}, 731 {0x00009a84, 0x0000a394, 0x0000a394, 0x00008304, 0x00008304},
729 {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c, 0x0000830c}, 732 {0x00009a88, 0x0000a780, 0x0000a780, 0x00008308, 0x00008308},
730 {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380, 0x00008380}, 733 {0x00009a8c, 0x0000a784, 0x0000a784, 0x0000830c, 0x0000830c},
731 {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384, 0x00008384}, 734 {0x00009a90, 0x0000a788, 0x0000a788, 0x00008380, 0x00008380},
732 {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700, 0x00008700}, 735 {0x00009a94, 0x0000a78c, 0x0000a78c, 0x00008384, 0x00008384},
733 {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704, 0x00008704}, 736 {0x00009a98, 0x0000a790, 0x0000a790, 0x00008700, 0x00008700},
734 {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708, 0x00008708}, 737 {0x00009a9c, 0x0000a794, 0x0000a794, 0x00008704, 0x00008704},
735 {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c, 0x0000870c}, 738 {0x00009aa0, 0x0000ab84, 0x0000ab84, 0x00008708, 0x00008708},
736 {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780, 0x00008780}, 739 {0x00009aa4, 0x0000ab88, 0x0000ab88, 0x0000870c, 0x0000870c},
737 {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784, 0x00008784}, 740 {0x00009aa8, 0x0000ab8c, 0x0000ab8c, 0x00008780, 0x00008780},
738 {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00, 0x00008b00}, 741 {0x00009aac, 0x0000ab90, 0x0000ab90, 0x00008784, 0x00008784},
739 {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04, 0x00008b04}, 742 {0x00009ab0, 0x0000ab94, 0x0000ab94, 0x00008b00, 0x00008b00},
740 {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08, 0x00008b08}, 743 {0x00009ab4, 0x0000af80, 0x0000af80, 0x00008b04, 0x00008b04},
741 {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c, 0x00008b0c}, 744 {0x00009ab8, 0x0000af84, 0x0000af84, 0x00008b08, 0x00008b08},
742 {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80, 0x00008b80}, 745 {0x00009abc, 0x0000af88, 0x0000af88, 0x00008b0c, 0x00008b0c},
743 {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84, 0x00008b84}, 746 {0x00009ac0, 0x0000af8c, 0x0000af8c, 0x00008b80, 0x00008b80},
744 {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88, 0x00008b88}, 747 {0x00009ac4, 0x0000af90, 0x0000af90, 0x00008b84, 0x00008b84},
745 {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c, 0x00008b8c}, 748 {0x00009ac8, 0x0000af94, 0x0000af94, 0x00008b88, 0x00008b88},
746 {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90, 0x00008b90}, 749 {0x00009acc, 0x0000b380, 0x0000b380, 0x00008b8c, 0x00008b8c},
747 {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80, 0x00008f80}, 750 {0x00009ad0, 0x0000b384, 0x0000b384, 0x00008b90, 0x00008b90},
748 {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84, 0x00008f84}, 751 {0x00009ad4, 0x0000b388, 0x0000b388, 0x00008f80, 0x00008f80},
749 {0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88, 0x00008f88}, 752 {0x00009ad8, 0x0000b38c, 0x0000b38c, 0x00008f84, 0x00008f84},
750 {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c, 0x00008f8c}, 753 {0x00009adc, 0x0000b390, 0x0000b390, 0x00008f88, 0x00008f88},
751 {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90, 0x00008f90}, 754 {0x00009ae0, 0x0000b394, 0x0000b394, 0x00008f8c, 0x00008f8c},
752 {0x00009ae8, 0x0000b780, 0x0000b780, 0x00009310, 0x00009310, 0x00009310}, 755 {0x00009ae4, 0x0000b398, 0x0000b398, 0x00008f90, 0x00008f90},
753 {0x00009aec, 0x0000b784, 0x0000b784, 0x00009314, 0x00009314, 0x00009314}, 756 {0x00009ae8, 0x0000b780, 0x0000b780, 0x00009310, 0x00009310},
754 {0x00009af0, 0x0000b788, 0x0000b788, 0x00009320, 0x00009320, 0x00009320}, 757 {0x00009aec, 0x0000b784, 0x0000b784, 0x00009314, 0x00009314},
755 {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009324, 0x00009324, 0x00009324}, 758 {0x00009af0, 0x0000b788, 0x0000b788, 0x00009320, 0x00009320},
756 {0x00009af8, 0x0000b790, 0x0000b790, 0x00009328, 0x00009328, 0x00009328}, 759 {0x00009af4, 0x0000b78c, 0x0000b78c, 0x00009324, 0x00009324},
757 {0x00009afc, 0x0000b794, 0x0000b794, 0x0000932c, 0x0000932c, 0x0000932c}, 760 {0x00009af8, 0x0000b790, 0x0000b790, 0x00009328, 0x00009328},
758 {0x00009b00, 0x0000b798, 0x0000b798, 0x00009330, 0x00009330, 0x00009330}, 761 {0x00009afc, 0x0000b794, 0x0000b794, 0x0000932c, 0x0000932c},
759 {0x00009b04, 0x0000d784, 0x0000d784, 0x00009334, 0x00009334, 0x00009334}, 762 {0x00009b00, 0x0000b798, 0x0000b798, 0x00009330, 0x00009330},
760 {0x00009b08, 0x0000d788, 0x0000d788, 0x00009321, 0x00009321, 0x00009321}, 763 {0x00009b04, 0x0000d784, 0x0000d784, 0x00009334, 0x00009334},
761 {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009325, 0x00009325, 0x00009325}, 764 {0x00009b08, 0x0000d788, 0x0000d788, 0x00009321, 0x00009321},
762 {0x00009b10, 0x0000d790, 0x0000d790, 0x00009329, 0x00009329, 0x00009329}, 765 {0x00009b0c, 0x0000d78c, 0x0000d78c, 0x00009325, 0x00009325},
763 {0x00009b14, 0x0000f780, 0x0000f780, 0x0000932d, 0x0000932d, 0x0000932d}, 766 {0x00009b10, 0x0000d790, 0x0000d790, 0x00009329, 0x00009329},
764 {0x00009b18, 0x0000f784, 0x0000f784, 0x00009331, 0x00009331, 0x00009331}, 767 {0x00009b14, 0x0000f780, 0x0000f780, 0x0000932d, 0x0000932d},
765 {0x00009b1c, 0x0000f788, 0x0000f788, 0x00009335, 0x00009335, 0x00009335}, 768 {0x00009b18, 0x0000f784, 0x0000f784, 0x00009331, 0x00009331},
766 {0x00009b20, 0x0000f78c, 0x0000f78c, 0x00009322, 0x00009322, 0x00009322}, 769 {0x00009b1c, 0x0000f788, 0x0000f788, 0x00009335, 0x00009335},
767 {0x00009b24, 0x0000f790, 0x0000f790, 0x00009326, 0x00009326, 0x00009326}, 770 {0x00009b20, 0x0000f78c, 0x0000f78c, 0x00009322, 0x00009322},
768 {0x00009b28, 0x0000f794, 0x0000f794, 0x0000932a, 0x0000932a, 0x0000932a}, 771 {0x00009b24, 0x0000f790, 0x0000f790, 0x00009326, 0x00009326},
769 {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x0000932e, 0x0000932e, 0x0000932e}, 772 {0x00009b28, 0x0000f794, 0x0000f794, 0x0000932a, 0x0000932a},
770 {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x00009332, 0x00009332, 0x00009332}, 773 {0x00009b2c, 0x0000f7a4, 0x0000f7a4, 0x0000932e, 0x0000932e},
771 {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x00009336, 0x00009336, 0x00009336}, 774 {0x00009b30, 0x0000f7a8, 0x0000f7a8, 0x00009332, 0x00009332},
772 {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x00009323, 0x00009323, 0x00009323}, 775 {0x00009b34, 0x0000f7ac, 0x0000f7ac, 0x00009336, 0x00009336},
773 {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x00009327, 0x00009327, 0x00009327}, 776 {0x00009b38, 0x0000f7b0, 0x0000f7b0, 0x00009323, 0x00009323},
774 {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x0000932b, 0x0000932b, 0x0000932b}, 777 {0x00009b3c, 0x0000f7b4, 0x0000f7b4, 0x00009327, 0x00009327},
775 {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x0000932f, 0x0000932f, 0x0000932f}, 778 {0x00009b40, 0x0000f7a1, 0x0000f7a1, 0x0000932b, 0x0000932b},
776 {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x00009333, 0x00009333, 0x00009333}, 779 {0x00009b44, 0x0000f7a5, 0x0000f7a5, 0x0000932f, 0x0000932f},
777 {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x00009337, 0x00009337, 0x00009337}, 780 {0x00009b48, 0x0000f7a9, 0x0000f7a9, 0x00009333, 0x00009333},
778 {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x00009343, 0x00009343, 0x00009343}, 781 {0x00009b4c, 0x0000f7ad, 0x0000f7ad, 0x00009337, 0x00009337},
779 {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x00009347, 0x00009347, 0x00009347}, 782 {0x00009b50, 0x0000f7b1, 0x0000f7b1, 0x00009343, 0x00009343},
780 {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x0000934b, 0x0000934b, 0x0000934b}, 783 {0x00009b54, 0x0000f7b5, 0x0000f7b5, 0x00009347, 0x00009347},
781 {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x0000934f, 0x0000934f, 0x0000934f}, 784 {0x00009b58, 0x0000f7c5, 0x0000f7c5, 0x0000934b, 0x0000934b},
782 {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x00009353, 0x00009353, 0x00009353}, 785 {0x00009b5c, 0x0000f7c9, 0x0000f7c9, 0x0000934f, 0x0000934f},
783 {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x00009357, 0x00009357, 0x00009357}, 786 {0x00009b60, 0x0000f7cd, 0x0000f7cd, 0x00009353, 0x00009353},
784 {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x0000935b, 0x0000935b, 0x0000935b}, 787 {0x00009b64, 0x0000f7d1, 0x0000f7d1, 0x00009357, 0x00009357},
785 {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x0000935b, 0x0000935b, 0x0000935b}, 788 {0x00009b68, 0x0000f7d5, 0x0000f7d5, 0x0000935b, 0x0000935b},
786 {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x0000935b, 0x0000935b, 0x0000935b}, 789 {0x00009b6c, 0x0000f7c2, 0x0000f7c2, 0x0000935b, 0x0000935b},
787 {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x0000935b, 0x0000935b, 0x0000935b}, 790 {0x00009b70, 0x0000f7c6, 0x0000f7c6, 0x0000935b, 0x0000935b},
788 {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x0000935b, 0x0000935b, 0x0000935b}, 791 {0x00009b74, 0x0000f7ca, 0x0000f7ca, 0x0000935b, 0x0000935b},
789 {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x0000935b, 0x0000935b, 0x0000935b}, 792 {0x00009b78, 0x0000f7ce, 0x0000f7ce, 0x0000935b, 0x0000935b},
790 {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x0000935b, 0x0000935b, 0x0000935b}, 793 {0x00009b7c, 0x0000f7d2, 0x0000f7d2, 0x0000935b, 0x0000935b},
791 {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x0000935b, 0x0000935b, 0x0000935b}, 794 {0x00009b80, 0x0000f7d6, 0x0000f7d6, 0x0000935b, 0x0000935b},
792 {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x0000935b, 0x0000935b, 0x0000935b}, 795 {0x00009b84, 0x0000f7c3, 0x0000f7c3, 0x0000935b, 0x0000935b},
793 {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x0000935b, 0x0000935b, 0x0000935b}, 796 {0x00009b88, 0x0000f7c7, 0x0000f7c7, 0x0000935b, 0x0000935b},
794 {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x0000935b, 0x0000935b, 0x0000935b}, 797 {0x00009b8c, 0x0000f7cb, 0x0000f7cb, 0x0000935b, 0x0000935b},
795 {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x0000935b, 0x0000935b, 0x0000935b}, 798 {0x00009b90, 0x0000f7d3, 0x0000f7d3, 0x0000935b, 0x0000935b},
796 {0x00009b98, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 799 {0x00009b94, 0x0000f7d7, 0x0000f7d7, 0x0000935b, 0x0000935b},
797 {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 800 {0x00009b98, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
798 {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 801 {0x00009b9c, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
799 {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 802 {0x00009ba0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
800 {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 803 {0x00009ba4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
801 {0x00009bac, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 804 {0x00009ba8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
802 {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 805 {0x00009bac, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
803 {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 806 {0x00009bb0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
804 {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 807 {0x00009bb4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
805 {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 808 {0x00009bb8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
806 {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 809 {0x00009bbc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
807 {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 810 {0x00009bc0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
808 {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 811 {0x00009bc4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
809 {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 812 {0x00009bc8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
810 {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 813 {0x00009bcc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
811 {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 814 {0x00009bd0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
812 {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 815 {0x00009bd4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
813 {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 816 {0x00009bd8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
814 {0x00009be0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 817 {0x00009bdc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
815 {0x00009be4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 818 {0x00009be0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
816 {0x00009be8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 819 {0x00009be4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
817 {0x00009bec, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 820 {0x00009be8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
818 {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 821 {0x00009bec, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
819 {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 822 {0x00009bf0, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
820 {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 823 {0x00009bf4, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
821 {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b, 0x0000935b}, 824 {0x00009bf8, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
822 {0x00009848, 0x00001066, 0x00001066, 0x0000105a, 0x0000105a, 0x0000105a}, 825 {0x00009bfc, 0x0000f7db, 0x0000f7db, 0x0000935b, 0x0000935b},
823 {0x0000a848, 0x00001066, 0x00001066, 0x0000105a, 0x0000105a, 0x0000105a}, 826 {0x00009848, 0x00001066, 0x00001066, 0x0000105a, 0x0000105a},
827 {0x0000a848, 0x00001066, 0x00001066, 0x0000105a, 0x0000105a},
824}; 828};
825 829
826static const u32 ar9280Modes_high_power_tx_gain_9280_2[][6] = { 830static const u32 ar9280Modes_high_power_tx_gain_9280_2[][5] = {
827 {0x0000a274, 0x0a19e652, 0x0a19e652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652}, 831 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
828 {0x0000a27c, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce}, 832 {0x0000a274, 0x0a19e652, 0x0a19e652, 0x0a1aa652, 0x0a1aa652},
829 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 833 {0x0000a27c, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce},
830 {0x0000a304, 0x00003002, 0x00003002, 0x00004002, 0x00004002, 0x00004002}, 834 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
831 {0x0000a308, 0x00006004, 0x00006004, 0x00007008, 0x00007008, 0x00007008}, 835 {0x0000a304, 0x00003002, 0x00003002, 0x00004002, 0x00004002},
832 {0x0000a30c, 0x0000a006, 0x0000a006, 0x0000c010, 0x0000c010, 0x0000c010}, 836 {0x0000a308, 0x00006004, 0x00006004, 0x00007008, 0x00007008},
833 {0x0000a310, 0x0000e012, 0x0000e012, 0x00010012, 0x00010012, 0x00010012}, 837 {0x0000a30c, 0x0000a006, 0x0000a006, 0x0000c010, 0x0000c010},
834 {0x0000a314, 0x00011014, 0x00011014, 0x00013014, 0x00013014, 0x00013014}, 838 {0x0000a310, 0x0000e012, 0x0000e012, 0x00010012, 0x00010012},
835 {0x0000a318, 0x0001504a, 0x0001504a, 0x0001820a, 0x0001820a, 0x0001820a}, 839 {0x0000a314, 0x00011014, 0x00011014, 0x00013014, 0x00013014},
836 {0x0000a31c, 0x0001904c, 0x0001904c, 0x0001b211, 0x0001b211, 0x0001b211}, 840 {0x0000a318, 0x0001504a, 0x0001504a, 0x0001820a, 0x0001820a},
837 {0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213, 0x0001e213}, 841 {0x0000a31c, 0x0001904c, 0x0001904c, 0x0001b211, 0x0001b211},
838 {0x0000a324, 0x00021092, 0x00021092, 0x00022411, 0x00022411, 0x00022411}, 842 {0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213},
839 {0x0000a328, 0x0002510a, 0x0002510a, 0x00025413, 0x00025413, 0x00025413}, 843 {0x0000a324, 0x00021092, 0x00021092, 0x00022411, 0x00022411},
840 {0x0000a32c, 0x0002910c, 0x0002910c, 0x00029811, 0x00029811, 0x00029811}, 844 {0x0000a328, 0x0002510a, 0x0002510a, 0x00025413, 0x00025413},
841 {0x0000a330, 0x0002c18b, 0x0002c18b, 0x0002c813, 0x0002c813, 0x0002c813}, 845 {0x0000a32c, 0x0002910c, 0x0002910c, 0x00029811, 0x00029811},
842 {0x0000a334, 0x0002f1cc, 0x0002f1cc, 0x00030a14, 0x00030a14, 0x00030a14}, 846 {0x0000a330, 0x0002c18b, 0x0002c18b, 0x0002c813, 0x0002c813},
843 {0x0000a338, 0x000321eb, 0x000321eb, 0x00035a50, 0x00035a50, 0x00035a50}, 847 {0x0000a334, 0x0002f1cc, 0x0002f1cc, 0x00030a14, 0x00030a14},
844 {0x0000a33c, 0x000341ec, 0x000341ec, 0x00039c4c, 0x00039c4c, 0x00039c4c}, 848 {0x0000a338, 0x000321eb, 0x000321eb, 0x00035a50, 0x00035a50},
845 {0x0000a340, 0x000341ec, 0x000341ec, 0x0003de8a, 0x0003de8a, 0x0003de8a}, 849 {0x0000a33c, 0x000341ec, 0x000341ec, 0x00039c4c, 0x00039c4c},
846 {0x0000a344, 0x000341ec, 0x000341ec, 0x00042e92, 0x00042e92, 0x00042e92}, 850 {0x0000a340, 0x000341ec, 0x000341ec, 0x0003de8a, 0x0003de8a},
847 {0x0000a348, 0x000341ec, 0x000341ec, 0x00046ed2, 0x00046ed2, 0x00046ed2}, 851 {0x0000a344, 0x000341ec, 0x000341ec, 0x00042e92, 0x00042e92},
848 {0x0000a34c, 0x000341ec, 0x000341ec, 0x0004bed5, 0x0004bed5, 0x0004bed5}, 852 {0x0000a348, 0x000341ec, 0x000341ec, 0x00046ed2, 0x00046ed2},
849 {0x0000a350, 0x000341ec, 0x000341ec, 0x0004ff54, 0x0004ff54, 0x0004ff54}, 853 {0x0000a34c, 0x000341ec, 0x000341ec, 0x0004bed5, 0x0004bed5},
850 {0x0000a354, 0x000341ec, 0x000341ec, 0x00055fd5, 0x00055fd5, 0x00055fd5}, 854 {0x0000a350, 0x000341ec, 0x000341ec, 0x0004ff54, 0x0004ff54},
851 {0x0000a3ec, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081}, 855 {0x0000a354, 0x000341ec, 0x000341ec, 0x00055fd5, 0x00055fd5},
852 {0x00007814, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff}, 856 {0x0000a3ec, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081},
853 {0x00007838, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff}, 857 {0x00007814, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff},
854 {0x0000781c, 0x00172000, 0x00172000, 0x00172000, 0x00172000, 0x00172000}, 858 {0x00007838, 0x00198eff, 0x00198eff, 0x00198eff, 0x00198eff},
855 {0x00007840, 0x00172000, 0x00172000, 0x00172000, 0x00172000, 0x00172000}, 859 {0x0000781c, 0x00172000, 0x00172000, 0x00172000, 0x00172000},
856 {0x00007820, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480}, 860 {0x00007840, 0x00172000, 0x00172000, 0x00172000, 0x00172000},
857 {0x00007844, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480}, 861 {0x00007820, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480},
862 {0x00007844, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480},
858}; 863};
859 864
860static const u32 ar9280Modes_original_tx_gain_9280_2[][6] = { 865static const u32 ar9280Modes_original_tx_gain_9280_2[][5] = {
861 {0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652}, 866 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
862 {0x0000a27c, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce}, 867 {0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652},
863 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 868 {0x0000a27c, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce},
864 {0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002, 0x00003002}, 869 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
865 {0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009, 0x00008009}, 870 {0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002},
866 {0x0000a30c, 0x0000a006, 0x0000a006, 0x0000b00b, 0x0000b00b, 0x0000b00b}, 871 {0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009},
867 {0x0000a310, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012}, 872 {0x0000a30c, 0x0000a006, 0x0000a006, 0x0000b00b, 0x0000b00b},
868 {0x0000a314, 0x00011014, 0x00011014, 0x00012048, 0x00012048, 0x00012048}, 873 {0x0000a310, 0x0000e012, 0x0000e012, 0x0000e012, 0x0000e012},
869 {0x0000a318, 0x0001504a, 0x0001504a, 0x0001604a, 0x0001604a, 0x0001604a}, 874 {0x0000a314, 0x00011014, 0x00011014, 0x00012048, 0x00012048},
870 {0x0000a31c, 0x0001904c, 0x0001904c, 0x0001a211, 0x0001a211, 0x0001a211}, 875 {0x0000a318, 0x0001504a, 0x0001504a, 0x0001604a, 0x0001604a},
871 {0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213, 0x0001e213}, 876 {0x0000a31c, 0x0001904c, 0x0001904c, 0x0001a211, 0x0001a211},
872 {0x0000a324, 0x00020092, 0x00020092, 0x0002121b, 0x0002121b, 0x0002121b}, 877 {0x0000a320, 0x0001c04e, 0x0001c04e, 0x0001e213, 0x0001e213},
873 {0x0000a328, 0x0002410a, 0x0002410a, 0x00024412, 0x00024412, 0x00024412}, 878 {0x0000a324, 0x00020092, 0x00020092, 0x0002121b, 0x0002121b},
874 {0x0000a32c, 0x0002710c, 0x0002710c, 0x00028414, 0x00028414, 0x00028414}, 879 {0x0000a328, 0x0002410a, 0x0002410a, 0x00024412, 0x00024412},
875 {0x0000a330, 0x0002b18b, 0x0002b18b, 0x0002b44a, 0x0002b44a, 0x0002b44a}, 880 {0x0000a32c, 0x0002710c, 0x0002710c, 0x00028414, 0x00028414},
876 {0x0000a334, 0x0002e1cc, 0x0002e1cc, 0x00030649, 0x00030649, 0x00030649}, 881 {0x0000a330, 0x0002b18b, 0x0002b18b, 0x0002b44a, 0x0002b44a},
877 {0x0000a338, 0x000321ec, 0x000321ec, 0x0003364b, 0x0003364b, 0x0003364b}, 882 {0x0000a334, 0x0002e1cc, 0x0002e1cc, 0x00030649, 0x00030649},
878 {0x0000a33c, 0x000321ec, 0x000321ec, 0x00038a49, 0x00038a49, 0x00038a49}, 883 {0x0000a338, 0x000321ec, 0x000321ec, 0x0003364b, 0x0003364b},
879 {0x0000a340, 0x000321ec, 0x000321ec, 0x0003be48, 0x0003be48, 0x0003be48}, 884 {0x0000a33c, 0x000321ec, 0x000321ec, 0x00038a49, 0x00038a49},
880 {0x0000a344, 0x000321ec, 0x000321ec, 0x0003ee4a, 0x0003ee4a, 0x0003ee4a}, 885 {0x0000a340, 0x000321ec, 0x000321ec, 0x0003be48, 0x0003be48},
881 {0x0000a348, 0x000321ec, 0x000321ec, 0x00042e88, 0x00042e88, 0x00042e88}, 886 {0x0000a344, 0x000321ec, 0x000321ec, 0x0003ee4a, 0x0003ee4a},
882 {0x0000a34c, 0x000321ec, 0x000321ec, 0x00046e8a, 0x00046e8a, 0x00046e8a}, 887 {0x0000a348, 0x000321ec, 0x000321ec, 0x00042e88, 0x00042e88},
883 {0x0000a350, 0x000321ec, 0x000321ec, 0x00049ec9, 0x00049ec9, 0x00049ec9}, 888 {0x0000a34c, 0x000321ec, 0x000321ec, 0x00046e8a, 0x00046e8a},
884 {0x0000a354, 0x000321ec, 0x000321ec, 0x0004bf42, 0x0004bf42, 0x0004bf42}, 889 {0x0000a350, 0x000321ec, 0x000321ec, 0x00049ec9, 0x00049ec9},
885 {0x0000a3ec, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081}, 890 {0x0000a354, 0x000321ec, 0x000321ec, 0x0004bf42, 0x0004bf42},
886 {0x00007814, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff}, 891 {0x0000a3ec, 0x00f70081, 0x00f70081, 0x00f70081, 0x00f70081},
887 {0x00007838, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff}, 892 {0x00007814, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff},
888 {0x0000781c, 0x00392000, 0x00392000, 0x00392000, 0x00392000, 0x00392000}, 893 {0x00007838, 0x0019beff, 0x0019beff, 0x0019beff, 0x0019beff},
889 {0x00007840, 0x00392000, 0x00392000, 0x00392000, 0x00392000, 0x00392000}, 894 {0x0000781c, 0x00392000, 0x00392000, 0x00392000, 0x00392000},
890 {0x00007820, 0x92592480, 0x92592480, 0x92592480, 0x92592480, 0x92592480}, 895 {0x00007840, 0x00392000, 0x00392000, 0x00392000, 0x00392000},
891 {0x00007844, 0x92592480, 0x92592480, 0x92592480, 0x92592480, 0x92592480}, 896 {0x00007820, 0x92592480, 0x92592480, 0x92592480, 0x92592480},
897 {0x00007844, 0x92592480, 0x92592480, 0x92592480, 0x92592480},
892}; 898};
893 899
894static const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = { 900static const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = {
@@ -947,309 +953,310 @@ static const u32 ar9285PciePhy_clkreq_off_L1_9285[][2] = {
947 {0x00004044, 0x00000000}, 953 {0x00004044, 0x00000000},
948}; 954};
949 955
950static const u32 ar9285Modes_9285_1_2[][6] = { 956static const u32 ar9285Modes_9285_1_2[][5] = {
951 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0}, 957 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
952 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0}, 958 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
953 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180}, 959 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
954 {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008}, 960 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
955 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0}, 961 {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
956 {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b, 0x0988004f}, 962 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
957 {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880}, 963 {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
958 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303}, 964 {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
959 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200}, 965 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300},
960 {0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, 966 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
961 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001}, 967 {0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
962 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 968 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001},
963 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007}, 969 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
964 {0x00009840, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e}, 970 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007},
965 {0x00009844, 0x0372161e, 0x0372161e, 0x03721620, 0x03721620, 0x037216a0}, 971 {0x00009840, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e},
966 {0x00009848, 0x00001066, 0x00001066, 0x00001053, 0x00001053, 0x00001059}, 972 {0x00009844, 0x0372161e, 0x0372161e, 0x03721620, 0x03721620},
967 {0x0000a848, 0x00001066, 0x00001066, 0x00001053, 0x00001053, 0x00001059}, 973 {0x00009848, 0x00001066, 0x00001066, 0x00001053, 0x00001053},
968 {0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2}, 974 {0x0000a848, 0x00001066, 0x00001066, 0x00001053, 0x00001053},
969 {0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e}, 975 {0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2},
970 {0x0000985c, 0x3139605e, 0x3139605e, 0x3137605e, 0x3137605e, 0x3139605e}, 976 {0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e},
971 {0x00009860, 0x00058d18, 0x00058d18, 0x00058d20, 0x00058d20, 0x00058d18}, 977 {0x0000985c, 0x3139605e, 0x3139605e, 0x3137605e, 0x3137605e},
972 {0x00009864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00, 0x0001ce00}, 978 {0x00009860, 0x00058d18, 0x00058d18, 0x00058d20, 0x00058d20},
973 {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, 979 {0x00009864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00},
974 {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881}, 980 {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
975 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0}, 981 {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
976 {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016}, 982 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
977 {0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d, 0xd00a800d}, 983 {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
978 {0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1020, 0xffbc1020, 0xffbc1010}, 984 {0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d},
979 {0x00009960, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 985 {0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1020, 0xffbc1020},
980 {0x00009964, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 986 {0x00009960, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
981 {0x000099b8, 0x0000421c, 0x0000421c, 0x0000421c, 0x0000421c, 0x0000421c}, 987 {0x00009964, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
982 {0x000099bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00, 0x00000c00}, 988 {0x000099b8, 0x0000421c, 0x0000421c, 0x0000421c, 0x0000421c},
983 {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, 989 {0x000099bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00},
984 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77}, 990 {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
985 {0x000099c8, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f}, 991 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77},
986 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8}, 992 {0x000099c8, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f},
987 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384}, 993 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8},
988 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 994 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384},
989 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 995 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
990 {0x00009a00, 0x00000000, 0x00000000, 0x00058084, 0x00058084, 0x00000000}, 996 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
991 {0x00009a04, 0x00000000, 0x00000000, 0x00058088, 0x00058088, 0x00000000}, 997 {0x00009a00, 0x00000000, 0x00000000, 0x00058084, 0x00058084},
992 {0x00009a08, 0x00000000, 0x00000000, 0x0005808c, 0x0005808c, 0x00000000}, 998 {0x00009a04, 0x00000000, 0x00000000, 0x00058088, 0x00058088},
993 {0x00009a0c, 0x00000000, 0x00000000, 0x00058100, 0x00058100, 0x00000000}, 999 {0x00009a08, 0x00000000, 0x00000000, 0x0005808c, 0x0005808c},
994 {0x00009a10, 0x00000000, 0x00000000, 0x00058104, 0x00058104, 0x00000000}, 1000 {0x00009a0c, 0x00000000, 0x00000000, 0x00058100, 0x00058100},
995 {0x00009a14, 0x00000000, 0x00000000, 0x00058108, 0x00058108, 0x00000000}, 1001 {0x00009a10, 0x00000000, 0x00000000, 0x00058104, 0x00058104},
996 {0x00009a18, 0x00000000, 0x00000000, 0x0005810c, 0x0005810c, 0x00000000}, 1002 {0x00009a14, 0x00000000, 0x00000000, 0x00058108, 0x00058108},
997 {0x00009a1c, 0x00000000, 0x00000000, 0x00058110, 0x00058110, 0x00000000}, 1003 {0x00009a18, 0x00000000, 0x00000000, 0x0005810c, 0x0005810c},
998 {0x00009a20, 0x00000000, 0x00000000, 0x00058114, 0x00058114, 0x00000000}, 1004 {0x00009a1c, 0x00000000, 0x00000000, 0x00058110, 0x00058110},
999 {0x00009a24, 0x00000000, 0x00000000, 0x00058180, 0x00058180, 0x00000000}, 1005 {0x00009a20, 0x00000000, 0x00000000, 0x00058114, 0x00058114},
1000 {0x00009a28, 0x00000000, 0x00000000, 0x00058184, 0x00058184, 0x00000000}, 1006 {0x00009a24, 0x00000000, 0x00000000, 0x00058180, 0x00058180},
1001 {0x00009a2c, 0x00000000, 0x00000000, 0x00058188, 0x00058188, 0x00000000}, 1007 {0x00009a28, 0x00000000, 0x00000000, 0x00058184, 0x00058184},
1002 {0x00009a30, 0x00000000, 0x00000000, 0x0005818c, 0x0005818c, 0x00000000}, 1008 {0x00009a2c, 0x00000000, 0x00000000, 0x00058188, 0x00058188},
1003 {0x00009a34, 0x00000000, 0x00000000, 0x00058190, 0x00058190, 0x00000000}, 1009 {0x00009a30, 0x00000000, 0x00000000, 0x0005818c, 0x0005818c},
1004 {0x00009a38, 0x00000000, 0x00000000, 0x00058194, 0x00058194, 0x00000000}, 1010 {0x00009a34, 0x00000000, 0x00000000, 0x00058190, 0x00058190},
1005 {0x00009a3c, 0x00000000, 0x00000000, 0x000581a0, 0x000581a0, 0x00000000}, 1011 {0x00009a38, 0x00000000, 0x00000000, 0x00058194, 0x00058194},
1006 {0x00009a40, 0x00000000, 0x00000000, 0x0005820c, 0x0005820c, 0x00000000}, 1012 {0x00009a3c, 0x00000000, 0x00000000, 0x000581a0, 0x000581a0},
1007 {0x00009a44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8, 0x00000000}, 1013 {0x00009a40, 0x00000000, 0x00000000, 0x0005820c, 0x0005820c},
1008 {0x00009a48, 0x00000000, 0x00000000, 0x00058284, 0x00058284, 0x00000000}, 1014 {0x00009a44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8},
1009 {0x00009a4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288, 0x00000000}, 1015 {0x00009a48, 0x00000000, 0x00000000, 0x00058284, 0x00058284},
1010 {0x00009a50, 0x00000000, 0x00000000, 0x00058224, 0x00058224, 0x00000000}, 1016 {0x00009a4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288},
1011 {0x00009a54, 0x00000000, 0x00000000, 0x00058290, 0x00058290, 0x00000000}, 1017 {0x00009a50, 0x00000000, 0x00000000, 0x00058224, 0x00058224},
1012 {0x00009a58, 0x00000000, 0x00000000, 0x00058300, 0x00058300, 0x00000000}, 1018 {0x00009a54, 0x00000000, 0x00000000, 0x00058290, 0x00058290},
1013 {0x00009a5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304, 0x00000000}, 1019 {0x00009a58, 0x00000000, 0x00000000, 0x00058300, 0x00058300},
1014 {0x00009a60, 0x00000000, 0x00000000, 0x00058308, 0x00058308, 0x00000000}, 1020 {0x00009a5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304},
1015 {0x00009a64, 0x00000000, 0x00000000, 0x0005830c, 0x0005830c, 0x00000000}, 1021 {0x00009a60, 0x00000000, 0x00000000, 0x00058308, 0x00058308},
1016 {0x00009a68, 0x00000000, 0x00000000, 0x00058380, 0x00058380, 0x00000000}, 1022 {0x00009a64, 0x00000000, 0x00000000, 0x0005830c, 0x0005830c},
1017 {0x00009a6c, 0x00000000, 0x00000000, 0x00058384, 0x00058384, 0x00000000}, 1023 {0x00009a68, 0x00000000, 0x00000000, 0x00058380, 0x00058380},
1018 {0x00009a70, 0x00000000, 0x00000000, 0x00068700, 0x00068700, 0x00000000}, 1024 {0x00009a6c, 0x00000000, 0x00000000, 0x00058384, 0x00058384},
1019 {0x00009a74, 0x00000000, 0x00000000, 0x00068704, 0x00068704, 0x00000000}, 1025 {0x00009a70, 0x00000000, 0x00000000, 0x00068700, 0x00068700},
1020 {0x00009a78, 0x00000000, 0x00000000, 0x00068708, 0x00068708, 0x00000000}, 1026 {0x00009a74, 0x00000000, 0x00000000, 0x00068704, 0x00068704},
1021 {0x00009a7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c, 0x00000000}, 1027 {0x00009a78, 0x00000000, 0x00000000, 0x00068708, 0x00068708},
1022 {0x00009a80, 0x00000000, 0x00000000, 0x00068780, 0x00068780, 0x00000000}, 1028 {0x00009a7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c},
1023 {0x00009a84, 0x00000000, 0x00000000, 0x00068784, 0x00068784, 0x00000000}, 1029 {0x00009a80, 0x00000000, 0x00000000, 0x00068780, 0x00068780},
1024 {0x00009a88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00, 0x00000000}, 1030 {0x00009a84, 0x00000000, 0x00000000, 0x00068784, 0x00068784},
1025 {0x00009a8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04, 0x00000000}, 1031 {0x00009a88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00},
1026 {0x00009a90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08, 0x00000000}, 1032 {0x00009a8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04},
1027 {0x00009a94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c, 0x00000000}, 1033 {0x00009a90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08},
1028 {0x00009a98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80, 0x00000000}, 1034 {0x00009a94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c},
1029 {0x00009a9c, 0x00000000, 0x00000000, 0x00078b84, 0x00078b84, 0x00000000}, 1035 {0x00009a98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80},
1030 {0x00009aa0, 0x00000000, 0x00000000, 0x00078b88, 0x00078b88, 0x00000000}, 1036 {0x00009a9c, 0x00000000, 0x00000000, 0x00078b84, 0x00078b84},
1031 {0x00009aa4, 0x00000000, 0x00000000, 0x00078b8c, 0x00078b8c, 0x00000000}, 1037 {0x00009aa0, 0x00000000, 0x00000000, 0x00078b88, 0x00078b88},
1032 {0x00009aa8, 0x00000000, 0x00000000, 0x00078b90, 0x00078b90, 0x00000000}, 1038 {0x00009aa4, 0x00000000, 0x00000000, 0x00078b8c, 0x00078b8c},
1033 {0x00009aac, 0x00000000, 0x00000000, 0x000caf80, 0x000caf80, 0x00000000}, 1039 {0x00009aa8, 0x00000000, 0x00000000, 0x00078b90, 0x00078b90},
1034 {0x00009ab0, 0x00000000, 0x00000000, 0x000caf84, 0x000caf84, 0x00000000}, 1040 {0x00009aac, 0x00000000, 0x00000000, 0x000caf80, 0x000caf80},
1035 {0x00009ab4, 0x00000000, 0x00000000, 0x000caf88, 0x000caf88, 0x00000000}, 1041 {0x00009ab0, 0x00000000, 0x00000000, 0x000caf84, 0x000caf84},
1036 {0x00009ab8, 0x00000000, 0x00000000, 0x000caf8c, 0x000caf8c, 0x00000000}, 1042 {0x00009ab4, 0x00000000, 0x00000000, 0x000caf88, 0x000caf88},
1037 {0x00009abc, 0x00000000, 0x00000000, 0x000caf90, 0x000caf90, 0x00000000}, 1043 {0x00009ab8, 0x00000000, 0x00000000, 0x000caf8c, 0x000caf8c},
1038 {0x00009ac0, 0x00000000, 0x00000000, 0x000db30c, 0x000db30c, 0x00000000}, 1044 {0x00009abc, 0x00000000, 0x00000000, 0x000caf90, 0x000caf90},
1039 {0x00009ac4, 0x00000000, 0x00000000, 0x000db310, 0x000db310, 0x00000000}, 1045 {0x00009ac0, 0x00000000, 0x00000000, 0x000db30c, 0x000db30c},
1040 {0x00009ac8, 0x00000000, 0x00000000, 0x000db384, 0x000db384, 0x00000000}, 1046 {0x00009ac4, 0x00000000, 0x00000000, 0x000db310, 0x000db310},
1041 {0x00009acc, 0x00000000, 0x00000000, 0x000db388, 0x000db388, 0x00000000}, 1047 {0x00009ac8, 0x00000000, 0x00000000, 0x000db384, 0x000db384},
1042 {0x00009ad0, 0x00000000, 0x00000000, 0x000db324, 0x000db324, 0x00000000}, 1048 {0x00009acc, 0x00000000, 0x00000000, 0x000db388, 0x000db388},
1043 {0x00009ad4, 0x00000000, 0x00000000, 0x000eb704, 0x000eb704, 0x00000000}, 1049 {0x00009ad0, 0x00000000, 0x00000000, 0x000db324, 0x000db324},
1044 {0x00009ad8, 0x00000000, 0x00000000, 0x000eb6a4, 0x000eb6a4, 0x00000000}, 1050 {0x00009ad4, 0x00000000, 0x00000000, 0x000eb704, 0x000eb704},
1045 {0x00009adc, 0x00000000, 0x00000000, 0x000eb6a8, 0x000eb6a8, 0x00000000}, 1051 {0x00009ad8, 0x00000000, 0x00000000, 0x000eb6a4, 0x000eb6a4},
1046 {0x00009ae0, 0x00000000, 0x00000000, 0x000eb710, 0x000eb710, 0x00000000}, 1052 {0x00009adc, 0x00000000, 0x00000000, 0x000eb6a8, 0x000eb6a8},
1047 {0x00009ae4, 0x00000000, 0x00000000, 0x000eb714, 0x000eb714, 0x00000000}, 1053 {0x00009ae0, 0x00000000, 0x00000000, 0x000eb710, 0x000eb710},
1048 {0x00009ae8, 0x00000000, 0x00000000, 0x000eb720, 0x000eb720, 0x00000000}, 1054 {0x00009ae4, 0x00000000, 0x00000000, 0x000eb714, 0x000eb714},
1049 {0x00009aec, 0x00000000, 0x00000000, 0x000eb724, 0x000eb724, 0x00000000}, 1055 {0x00009ae8, 0x00000000, 0x00000000, 0x000eb720, 0x000eb720},
1050 {0x00009af0, 0x00000000, 0x00000000, 0x000eb728, 0x000eb728, 0x00000000}, 1056 {0x00009aec, 0x00000000, 0x00000000, 0x000eb724, 0x000eb724},
1051 {0x00009af4, 0x00000000, 0x00000000, 0x000eb72c, 0x000eb72c, 0x00000000}, 1057 {0x00009af0, 0x00000000, 0x00000000, 0x000eb728, 0x000eb728},
1052 {0x00009af8, 0x00000000, 0x00000000, 0x000eb7a0, 0x000eb7a0, 0x00000000}, 1058 {0x00009af4, 0x00000000, 0x00000000, 0x000eb72c, 0x000eb72c},
1053 {0x00009afc, 0x00000000, 0x00000000, 0x000eb7a4, 0x000eb7a4, 0x00000000}, 1059 {0x00009af8, 0x00000000, 0x00000000, 0x000eb7a0, 0x000eb7a0},
1054 {0x00009b00, 0x00000000, 0x00000000, 0x000eb7a8, 0x000eb7a8, 0x00000000}, 1060 {0x00009afc, 0x00000000, 0x00000000, 0x000eb7a4, 0x000eb7a4},
1055 {0x00009b04, 0x00000000, 0x00000000, 0x000eb7b0, 0x000eb7b0, 0x00000000}, 1061 {0x00009b00, 0x00000000, 0x00000000, 0x000eb7a8, 0x000eb7a8},
1056 {0x00009b08, 0x00000000, 0x00000000, 0x000eb7b4, 0x000eb7b4, 0x00000000}, 1062 {0x00009b04, 0x00000000, 0x00000000, 0x000eb7b0, 0x000eb7b0},
1057 {0x00009b0c, 0x00000000, 0x00000000, 0x000eb7b8, 0x000eb7b8, 0x00000000}, 1063 {0x00009b08, 0x00000000, 0x00000000, 0x000eb7b4, 0x000eb7b4},
1058 {0x00009b10, 0x00000000, 0x00000000, 0x000eb7a5, 0x000eb7a5, 0x00000000}, 1064 {0x00009b0c, 0x00000000, 0x00000000, 0x000eb7b8, 0x000eb7b8},
1059 {0x00009b14, 0x00000000, 0x00000000, 0x000eb7a9, 0x000eb7a9, 0x00000000}, 1065 {0x00009b10, 0x00000000, 0x00000000, 0x000eb7a5, 0x000eb7a5},
1060 {0x00009b18, 0x00000000, 0x00000000, 0x000eb7ad, 0x000eb7ad, 0x00000000}, 1066 {0x00009b14, 0x00000000, 0x00000000, 0x000eb7a9, 0x000eb7a9},
1061 {0x00009b1c, 0x00000000, 0x00000000, 0x000eb7b1, 0x000eb7b1, 0x00000000}, 1067 {0x00009b18, 0x00000000, 0x00000000, 0x000eb7ad, 0x000eb7ad},
1062 {0x00009b20, 0x00000000, 0x00000000, 0x000eb7b5, 0x000eb7b5, 0x00000000}, 1068 {0x00009b1c, 0x00000000, 0x00000000, 0x000eb7b1, 0x000eb7b1},
1063 {0x00009b24, 0x00000000, 0x00000000, 0x000eb7b9, 0x000eb7b9, 0x00000000}, 1069 {0x00009b20, 0x00000000, 0x00000000, 0x000eb7b5, 0x000eb7b5},
1064 {0x00009b28, 0x00000000, 0x00000000, 0x000eb7c5, 0x000eb7c5, 0x00000000}, 1070 {0x00009b24, 0x00000000, 0x00000000, 0x000eb7b9, 0x000eb7b9},
1065 {0x00009b2c, 0x00000000, 0x00000000, 0x000eb7c9, 0x000eb7c9, 0x00000000}, 1071 {0x00009b28, 0x00000000, 0x00000000, 0x000eb7c5, 0x000eb7c5},
1066 {0x00009b30, 0x00000000, 0x00000000, 0x000eb7d1, 0x000eb7d1, 0x00000000}, 1072 {0x00009b2c, 0x00000000, 0x00000000, 0x000eb7c9, 0x000eb7c9},
1067 {0x00009b34, 0x00000000, 0x00000000, 0x000eb7d5, 0x000eb7d5, 0x00000000}, 1073 {0x00009b30, 0x00000000, 0x00000000, 0x000eb7d1, 0x000eb7d1},
1068 {0x00009b38, 0x00000000, 0x00000000, 0x000eb7d9, 0x000eb7d9, 0x00000000}, 1074 {0x00009b34, 0x00000000, 0x00000000, 0x000eb7d5, 0x000eb7d5},
1069 {0x00009b3c, 0x00000000, 0x00000000, 0x000eb7c6, 0x000eb7c6, 0x00000000}, 1075 {0x00009b38, 0x00000000, 0x00000000, 0x000eb7d9, 0x000eb7d9},
1070 {0x00009b40, 0x00000000, 0x00000000, 0x000eb7ca, 0x000eb7ca, 0x00000000}, 1076 {0x00009b3c, 0x00000000, 0x00000000, 0x000eb7c6, 0x000eb7c6},
1071 {0x00009b44, 0x00000000, 0x00000000, 0x000eb7ce, 0x000eb7ce, 0x00000000}, 1077 {0x00009b40, 0x00000000, 0x00000000, 0x000eb7ca, 0x000eb7ca},
1072 {0x00009b48, 0x00000000, 0x00000000, 0x000eb7d2, 0x000eb7d2, 0x00000000}, 1078 {0x00009b44, 0x00000000, 0x00000000, 0x000eb7ce, 0x000eb7ce},
1073 {0x00009b4c, 0x00000000, 0x00000000, 0x000eb7d6, 0x000eb7d6, 0x00000000}, 1079 {0x00009b48, 0x00000000, 0x00000000, 0x000eb7d2, 0x000eb7d2},
1074 {0x00009b50, 0x00000000, 0x00000000, 0x000eb7c3, 0x000eb7c3, 0x00000000}, 1080 {0x00009b4c, 0x00000000, 0x00000000, 0x000eb7d6, 0x000eb7d6},
1075 {0x00009b54, 0x00000000, 0x00000000, 0x000eb7c7, 0x000eb7c7, 0x00000000}, 1081 {0x00009b50, 0x00000000, 0x00000000, 0x000eb7c3, 0x000eb7c3},
1076 {0x00009b58, 0x00000000, 0x00000000, 0x000eb7cb, 0x000eb7cb, 0x00000000}, 1082 {0x00009b54, 0x00000000, 0x00000000, 0x000eb7c7, 0x000eb7c7},
1077 {0x00009b5c, 0x00000000, 0x00000000, 0x000eb7cf, 0x000eb7cf, 0x00000000}, 1083 {0x00009b58, 0x00000000, 0x00000000, 0x000eb7cb, 0x000eb7cb},
1078 {0x00009b60, 0x00000000, 0x00000000, 0x000eb7d7, 0x000eb7d7, 0x00000000}, 1084 {0x00009b5c, 0x00000000, 0x00000000, 0x000eb7cf, 0x000eb7cf},
1079 {0x00009b64, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1085 {0x00009b60, 0x00000000, 0x00000000, 0x000eb7d7, 0x000eb7d7},
1080 {0x00009b68, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1086 {0x00009b64, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1081 {0x00009b6c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1087 {0x00009b68, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1082 {0x00009b70, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1088 {0x00009b6c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1083 {0x00009b74, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1089 {0x00009b70, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1084 {0x00009b78, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1090 {0x00009b74, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1085 {0x00009b7c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1091 {0x00009b78, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1086 {0x00009b80, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1092 {0x00009b7c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1087 {0x00009b84, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1093 {0x00009b80, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1088 {0x00009b88, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1094 {0x00009b84, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1089 {0x00009b8c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1095 {0x00009b88, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1090 {0x00009b90, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1096 {0x00009b8c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1091 {0x00009b94, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1097 {0x00009b90, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1092 {0x00009b98, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1098 {0x00009b94, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1093 {0x00009b9c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1099 {0x00009b98, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1094 {0x00009ba0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1100 {0x00009b9c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1095 {0x00009ba4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1101 {0x00009ba0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1096 {0x00009ba8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1102 {0x00009ba4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1097 {0x00009bac, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1103 {0x00009ba8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1098 {0x00009bb0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1104 {0x00009bac, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1099 {0x00009bb4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1105 {0x00009bb0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1100 {0x00009bb8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1106 {0x00009bb4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1101 {0x00009bbc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1107 {0x00009bb8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1102 {0x00009bc0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1108 {0x00009bbc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1103 {0x00009bc4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1109 {0x00009bc0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1104 {0x00009bc8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1110 {0x00009bc4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1105 {0x00009bcc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1111 {0x00009bc8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1106 {0x00009bd0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1112 {0x00009bcc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1107 {0x00009bd4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1113 {0x00009bd0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1108 {0x00009bd8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1114 {0x00009bd4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1109 {0x00009bdc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1115 {0x00009bd8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1110 {0x00009be0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1116 {0x00009bdc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1111 {0x00009be4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1117 {0x00009be0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1112 {0x00009be8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1118 {0x00009be4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1113 {0x00009bec, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1119 {0x00009be8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1114 {0x00009bf0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1120 {0x00009bec, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1115 {0x00009bf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1121 {0x00009bf0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1116 {0x00009bf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1122 {0x00009bf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1117 {0x00009bfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1123 {0x00009bf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1118 {0x0000aa00, 0x00000000, 0x00000000, 0x00058084, 0x00058084, 0x00000000}, 1124 {0x00009bfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1119 {0x0000aa04, 0x00000000, 0x00000000, 0x00058088, 0x00058088, 0x00000000}, 1125 {0x0000aa00, 0x00000000, 0x00000000, 0x00058084, 0x00058084},
1120 {0x0000aa08, 0x00000000, 0x00000000, 0x0005808c, 0x0005808c, 0x00000000}, 1126 {0x0000aa04, 0x00000000, 0x00000000, 0x00058088, 0x00058088},
1121 {0x0000aa0c, 0x00000000, 0x00000000, 0x00058100, 0x00058100, 0x00000000}, 1127 {0x0000aa08, 0x00000000, 0x00000000, 0x0005808c, 0x0005808c},
1122 {0x0000aa10, 0x00000000, 0x00000000, 0x00058104, 0x00058104, 0x00000000}, 1128 {0x0000aa0c, 0x00000000, 0x00000000, 0x00058100, 0x00058100},
1123 {0x0000aa14, 0x00000000, 0x00000000, 0x00058108, 0x00058108, 0x00000000}, 1129 {0x0000aa10, 0x00000000, 0x00000000, 0x00058104, 0x00058104},
1124 {0x0000aa18, 0x00000000, 0x00000000, 0x0005810c, 0x0005810c, 0x00000000}, 1130 {0x0000aa14, 0x00000000, 0x00000000, 0x00058108, 0x00058108},
1125 {0x0000aa1c, 0x00000000, 0x00000000, 0x00058110, 0x00058110, 0x00000000}, 1131 {0x0000aa18, 0x00000000, 0x00000000, 0x0005810c, 0x0005810c},
1126 {0x0000aa20, 0x00000000, 0x00000000, 0x00058114, 0x00058114, 0x00000000}, 1132 {0x0000aa1c, 0x00000000, 0x00000000, 0x00058110, 0x00058110},
1127 {0x0000aa24, 0x00000000, 0x00000000, 0x00058180, 0x00058180, 0x00000000}, 1133 {0x0000aa20, 0x00000000, 0x00000000, 0x00058114, 0x00058114},
1128 {0x0000aa28, 0x00000000, 0x00000000, 0x00058184, 0x00058184, 0x00000000}, 1134 {0x0000aa24, 0x00000000, 0x00000000, 0x00058180, 0x00058180},
1129 {0x0000aa2c, 0x00000000, 0x00000000, 0x00058188, 0x00058188, 0x00000000}, 1135 {0x0000aa28, 0x00000000, 0x00000000, 0x00058184, 0x00058184},
1130 {0x0000aa30, 0x00000000, 0x00000000, 0x0005818c, 0x0005818c, 0x00000000}, 1136 {0x0000aa2c, 0x00000000, 0x00000000, 0x00058188, 0x00058188},
1131 {0x0000aa34, 0x00000000, 0x00000000, 0x00058190, 0x00058190, 0x00000000}, 1137 {0x0000aa30, 0x00000000, 0x00000000, 0x0005818c, 0x0005818c},
1132 {0x0000aa38, 0x00000000, 0x00000000, 0x00058194, 0x00058194, 0x00000000}, 1138 {0x0000aa34, 0x00000000, 0x00000000, 0x00058190, 0x00058190},
1133 {0x0000aa3c, 0x00000000, 0x00000000, 0x000581a0, 0x000581a0, 0x00000000}, 1139 {0x0000aa38, 0x00000000, 0x00000000, 0x00058194, 0x00058194},
1134 {0x0000aa40, 0x00000000, 0x00000000, 0x0005820c, 0x0005820c, 0x00000000}, 1140 {0x0000aa3c, 0x00000000, 0x00000000, 0x000581a0, 0x000581a0},
1135 {0x0000aa44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8, 0x00000000}, 1141 {0x0000aa40, 0x00000000, 0x00000000, 0x0005820c, 0x0005820c},
1136 {0x0000aa48, 0x00000000, 0x00000000, 0x00058284, 0x00058284, 0x00000000}, 1142 {0x0000aa44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8},
1137 {0x0000aa4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288, 0x00000000}, 1143 {0x0000aa48, 0x00000000, 0x00000000, 0x00058284, 0x00058284},
1138 {0x0000aa50, 0x00000000, 0x00000000, 0x00058224, 0x00058224, 0x00000000}, 1144 {0x0000aa4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288},
1139 {0x0000aa54, 0x00000000, 0x00000000, 0x00058290, 0x00058290, 0x00000000}, 1145 {0x0000aa50, 0x00000000, 0x00000000, 0x00058224, 0x00058224},
1140 {0x0000aa58, 0x00000000, 0x00000000, 0x00058300, 0x00058300, 0x00000000}, 1146 {0x0000aa54, 0x00000000, 0x00000000, 0x00058290, 0x00058290},
1141 {0x0000aa5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304, 0x00000000}, 1147 {0x0000aa58, 0x00000000, 0x00000000, 0x00058300, 0x00058300},
1142 {0x0000aa60, 0x00000000, 0x00000000, 0x00058308, 0x00058308, 0x00000000}, 1148 {0x0000aa5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304},
1143 {0x0000aa64, 0x00000000, 0x00000000, 0x0005830c, 0x0005830c, 0x00000000}, 1149 {0x0000aa60, 0x00000000, 0x00000000, 0x00058308, 0x00058308},
1144 {0x0000aa68, 0x00000000, 0x00000000, 0x00058380, 0x00058380, 0x00000000}, 1150 {0x0000aa64, 0x00000000, 0x00000000, 0x0005830c, 0x0005830c},
1145 {0x0000aa6c, 0x00000000, 0x00000000, 0x00058384, 0x00058384, 0x00000000}, 1151 {0x0000aa68, 0x00000000, 0x00000000, 0x00058380, 0x00058380},
1146 {0x0000aa70, 0x00000000, 0x00000000, 0x00068700, 0x00068700, 0x00000000}, 1152 {0x0000aa6c, 0x00000000, 0x00000000, 0x00058384, 0x00058384},
1147 {0x0000aa74, 0x00000000, 0x00000000, 0x00068704, 0x00068704, 0x00000000}, 1153 {0x0000aa70, 0x00000000, 0x00000000, 0x00068700, 0x00068700},
1148 {0x0000aa78, 0x00000000, 0x00000000, 0x00068708, 0x00068708, 0x00000000}, 1154 {0x0000aa74, 0x00000000, 0x00000000, 0x00068704, 0x00068704},
1149 {0x0000aa7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c, 0x00000000}, 1155 {0x0000aa78, 0x00000000, 0x00000000, 0x00068708, 0x00068708},
1150 {0x0000aa80, 0x00000000, 0x00000000, 0x00068780, 0x00068780, 0x00000000}, 1156 {0x0000aa7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c},
1151 {0x0000aa84, 0x00000000, 0x00000000, 0x00068784, 0x00068784, 0x00000000}, 1157 {0x0000aa80, 0x00000000, 0x00000000, 0x00068780, 0x00068780},
1152 {0x0000aa88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00, 0x00000000}, 1158 {0x0000aa84, 0x00000000, 0x00000000, 0x00068784, 0x00068784},
1153 {0x0000aa8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04, 0x00000000}, 1159 {0x0000aa88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00},
1154 {0x0000aa90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08, 0x00000000}, 1160 {0x0000aa8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04},
1155 {0x0000aa94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c, 0x00000000}, 1161 {0x0000aa90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08},
1156 {0x0000aa98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80, 0x00000000}, 1162 {0x0000aa94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c},
1157 {0x0000aa9c, 0x00000000, 0x00000000, 0x00078b84, 0x00078b84, 0x00000000}, 1163 {0x0000aa98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80},
1158 {0x0000aaa0, 0x00000000, 0x00000000, 0x00078b88, 0x00078b88, 0x00000000}, 1164 {0x0000aa9c, 0x00000000, 0x00000000, 0x00078b84, 0x00078b84},
1159 {0x0000aaa4, 0x00000000, 0x00000000, 0x00078b8c, 0x00078b8c, 0x00000000}, 1165 {0x0000aaa0, 0x00000000, 0x00000000, 0x00078b88, 0x00078b88},
1160 {0x0000aaa8, 0x00000000, 0x00000000, 0x00078b90, 0x00078b90, 0x00000000}, 1166 {0x0000aaa4, 0x00000000, 0x00000000, 0x00078b8c, 0x00078b8c},
1161 {0x0000aaac, 0x00000000, 0x00000000, 0x000caf80, 0x000caf80, 0x00000000}, 1167 {0x0000aaa8, 0x00000000, 0x00000000, 0x00078b90, 0x00078b90},
1162 {0x0000aab0, 0x00000000, 0x00000000, 0x000caf84, 0x000caf84, 0x00000000}, 1168 {0x0000aaac, 0x00000000, 0x00000000, 0x000caf80, 0x000caf80},
1163 {0x0000aab4, 0x00000000, 0x00000000, 0x000caf88, 0x000caf88, 0x00000000}, 1169 {0x0000aab0, 0x00000000, 0x00000000, 0x000caf84, 0x000caf84},
1164 {0x0000aab8, 0x00000000, 0x00000000, 0x000caf8c, 0x000caf8c, 0x00000000}, 1170 {0x0000aab4, 0x00000000, 0x00000000, 0x000caf88, 0x000caf88},
1165 {0x0000aabc, 0x00000000, 0x00000000, 0x000caf90, 0x000caf90, 0x00000000}, 1171 {0x0000aab8, 0x00000000, 0x00000000, 0x000caf8c, 0x000caf8c},
1166 {0x0000aac0, 0x00000000, 0x00000000, 0x000db30c, 0x000db30c, 0x00000000}, 1172 {0x0000aabc, 0x00000000, 0x00000000, 0x000caf90, 0x000caf90},
1167 {0x0000aac4, 0x00000000, 0x00000000, 0x000db310, 0x000db310, 0x00000000}, 1173 {0x0000aac0, 0x00000000, 0x00000000, 0x000db30c, 0x000db30c},
1168 {0x0000aac8, 0x00000000, 0x00000000, 0x000db384, 0x000db384, 0x00000000}, 1174 {0x0000aac4, 0x00000000, 0x00000000, 0x000db310, 0x000db310},
1169 {0x0000aacc, 0x00000000, 0x00000000, 0x000db388, 0x000db388, 0x00000000}, 1175 {0x0000aac8, 0x00000000, 0x00000000, 0x000db384, 0x000db384},
1170 {0x0000aad0, 0x00000000, 0x00000000, 0x000db324, 0x000db324, 0x00000000}, 1176 {0x0000aacc, 0x00000000, 0x00000000, 0x000db388, 0x000db388},
1171 {0x0000aad4, 0x00000000, 0x00000000, 0x000eb704, 0x000eb704, 0x00000000}, 1177 {0x0000aad0, 0x00000000, 0x00000000, 0x000db324, 0x000db324},
1172 {0x0000aad8, 0x00000000, 0x00000000, 0x000eb6a4, 0x000eb6a4, 0x00000000}, 1178 {0x0000aad4, 0x00000000, 0x00000000, 0x000eb704, 0x000eb704},
1173 {0x0000aadc, 0x00000000, 0x00000000, 0x000eb6a8, 0x000eb6a8, 0x00000000}, 1179 {0x0000aad8, 0x00000000, 0x00000000, 0x000eb6a4, 0x000eb6a4},
1174 {0x0000aae0, 0x00000000, 0x00000000, 0x000eb710, 0x000eb710, 0x00000000}, 1180 {0x0000aadc, 0x00000000, 0x00000000, 0x000eb6a8, 0x000eb6a8},
1175 {0x0000aae4, 0x00000000, 0x00000000, 0x000eb714, 0x000eb714, 0x00000000}, 1181 {0x0000aae0, 0x00000000, 0x00000000, 0x000eb710, 0x000eb710},
1176 {0x0000aae8, 0x00000000, 0x00000000, 0x000eb720, 0x000eb720, 0x00000000}, 1182 {0x0000aae4, 0x00000000, 0x00000000, 0x000eb714, 0x000eb714},
1177 {0x0000aaec, 0x00000000, 0x00000000, 0x000eb724, 0x000eb724, 0x00000000}, 1183 {0x0000aae8, 0x00000000, 0x00000000, 0x000eb720, 0x000eb720},
1178 {0x0000aaf0, 0x00000000, 0x00000000, 0x000eb728, 0x000eb728, 0x00000000}, 1184 {0x0000aaec, 0x00000000, 0x00000000, 0x000eb724, 0x000eb724},
1179 {0x0000aaf4, 0x00000000, 0x00000000, 0x000eb72c, 0x000eb72c, 0x00000000}, 1185 {0x0000aaf0, 0x00000000, 0x00000000, 0x000eb728, 0x000eb728},
1180 {0x0000aaf8, 0x00000000, 0x00000000, 0x000eb7a0, 0x000eb7a0, 0x00000000}, 1186 {0x0000aaf4, 0x00000000, 0x00000000, 0x000eb72c, 0x000eb72c},
1181 {0x0000aafc, 0x00000000, 0x00000000, 0x000eb7a4, 0x000eb7a4, 0x00000000}, 1187 {0x0000aaf8, 0x00000000, 0x00000000, 0x000eb7a0, 0x000eb7a0},
1182 {0x0000ab00, 0x00000000, 0x00000000, 0x000eb7a8, 0x000eb7a8, 0x00000000}, 1188 {0x0000aafc, 0x00000000, 0x00000000, 0x000eb7a4, 0x000eb7a4},
1183 {0x0000ab04, 0x00000000, 0x00000000, 0x000eb7b0, 0x000eb7b0, 0x00000000}, 1189 {0x0000ab00, 0x00000000, 0x00000000, 0x000eb7a8, 0x000eb7a8},
1184 {0x0000ab08, 0x00000000, 0x00000000, 0x000eb7b4, 0x000eb7b4, 0x00000000}, 1190 {0x0000ab04, 0x00000000, 0x00000000, 0x000eb7b0, 0x000eb7b0},
1185 {0x0000ab0c, 0x00000000, 0x00000000, 0x000eb7b8, 0x000eb7b8, 0x00000000}, 1191 {0x0000ab08, 0x00000000, 0x00000000, 0x000eb7b4, 0x000eb7b4},
1186 {0x0000ab10, 0x00000000, 0x00000000, 0x000eb7a5, 0x000eb7a5, 0x00000000}, 1192 {0x0000ab0c, 0x00000000, 0x00000000, 0x000eb7b8, 0x000eb7b8},
1187 {0x0000ab14, 0x00000000, 0x00000000, 0x000eb7a9, 0x000eb7a9, 0x00000000}, 1193 {0x0000ab10, 0x00000000, 0x00000000, 0x000eb7a5, 0x000eb7a5},
1188 {0x0000ab18, 0x00000000, 0x00000000, 0x000eb7ad, 0x000eb7ad, 0x00000000}, 1194 {0x0000ab14, 0x00000000, 0x00000000, 0x000eb7a9, 0x000eb7a9},
1189 {0x0000ab1c, 0x00000000, 0x00000000, 0x000eb7b1, 0x000eb7b1, 0x00000000}, 1195 {0x0000ab18, 0x00000000, 0x00000000, 0x000eb7ad, 0x000eb7ad},
1190 {0x0000ab20, 0x00000000, 0x00000000, 0x000eb7b5, 0x000eb7b5, 0x00000000}, 1196 {0x0000ab1c, 0x00000000, 0x00000000, 0x000eb7b1, 0x000eb7b1},
1191 {0x0000ab24, 0x00000000, 0x00000000, 0x000eb7b9, 0x000eb7b9, 0x00000000}, 1197 {0x0000ab20, 0x00000000, 0x00000000, 0x000eb7b5, 0x000eb7b5},
1192 {0x0000ab28, 0x00000000, 0x00000000, 0x000eb7c5, 0x000eb7c5, 0x00000000}, 1198 {0x0000ab24, 0x00000000, 0x00000000, 0x000eb7b9, 0x000eb7b9},
1193 {0x0000ab2c, 0x00000000, 0x00000000, 0x000eb7c9, 0x000eb7c9, 0x00000000}, 1199 {0x0000ab28, 0x00000000, 0x00000000, 0x000eb7c5, 0x000eb7c5},
1194 {0x0000ab30, 0x00000000, 0x00000000, 0x000eb7d1, 0x000eb7d1, 0x00000000}, 1200 {0x0000ab2c, 0x00000000, 0x00000000, 0x000eb7c9, 0x000eb7c9},
1195 {0x0000ab34, 0x00000000, 0x00000000, 0x000eb7d5, 0x000eb7d5, 0x00000000}, 1201 {0x0000ab30, 0x00000000, 0x00000000, 0x000eb7d1, 0x000eb7d1},
1196 {0x0000ab38, 0x00000000, 0x00000000, 0x000eb7d9, 0x000eb7d9, 0x00000000}, 1202 {0x0000ab34, 0x00000000, 0x00000000, 0x000eb7d5, 0x000eb7d5},
1197 {0x0000ab3c, 0x00000000, 0x00000000, 0x000eb7c6, 0x000eb7c6, 0x00000000}, 1203 {0x0000ab38, 0x00000000, 0x00000000, 0x000eb7d9, 0x000eb7d9},
1198 {0x0000ab40, 0x00000000, 0x00000000, 0x000eb7ca, 0x000eb7ca, 0x00000000}, 1204 {0x0000ab3c, 0x00000000, 0x00000000, 0x000eb7c6, 0x000eb7c6},
1199 {0x0000ab44, 0x00000000, 0x00000000, 0x000eb7ce, 0x000eb7ce, 0x00000000}, 1205 {0x0000ab40, 0x00000000, 0x00000000, 0x000eb7ca, 0x000eb7ca},
1200 {0x0000ab48, 0x00000000, 0x00000000, 0x000eb7d2, 0x000eb7d2, 0x00000000}, 1206 {0x0000ab44, 0x00000000, 0x00000000, 0x000eb7ce, 0x000eb7ce},
1201 {0x0000ab4c, 0x00000000, 0x00000000, 0x000eb7d6, 0x000eb7d6, 0x00000000}, 1207 {0x0000ab48, 0x00000000, 0x00000000, 0x000eb7d2, 0x000eb7d2},
1202 {0x0000ab50, 0x00000000, 0x00000000, 0x000eb7c3, 0x000eb7c3, 0x00000000}, 1208 {0x0000ab4c, 0x00000000, 0x00000000, 0x000eb7d6, 0x000eb7d6},
1203 {0x0000ab54, 0x00000000, 0x00000000, 0x000eb7c7, 0x000eb7c7, 0x00000000}, 1209 {0x0000ab50, 0x00000000, 0x00000000, 0x000eb7c3, 0x000eb7c3},
1204 {0x0000ab58, 0x00000000, 0x00000000, 0x000eb7cb, 0x000eb7cb, 0x00000000}, 1210 {0x0000ab54, 0x00000000, 0x00000000, 0x000eb7c7, 0x000eb7c7},
1205 {0x0000ab5c, 0x00000000, 0x00000000, 0x000eb7cf, 0x000eb7cf, 0x00000000}, 1211 {0x0000ab58, 0x00000000, 0x00000000, 0x000eb7cb, 0x000eb7cb},
1206 {0x0000ab60, 0x00000000, 0x00000000, 0x000eb7d7, 0x000eb7d7, 0x00000000}, 1212 {0x0000ab5c, 0x00000000, 0x00000000, 0x000eb7cf, 0x000eb7cf},
1207 {0x0000ab64, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1213 {0x0000ab60, 0x00000000, 0x00000000, 0x000eb7d7, 0x000eb7d7},
1208 {0x0000ab68, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1214 {0x0000ab64, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1209 {0x0000ab6c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1215 {0x0000ab68, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1210 {0x0000ab70, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1216 {0x0000ab6c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1211 {0x0000ab74, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1217 {0x0000ab70, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1212 {0x0000ab78, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1218 {0x0000ab74, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1213 {0x0000ab7c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1219 {0x0000ab78, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1214 {0x0000ab80, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1220 {0x0000ab7c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1215 {0x0000ab84, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1221 {0x0000ab80, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1216 {0x0000ab88, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1222 {0x0000ab84, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1217 {0x0000ab8c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1223 {0x0000ab88, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1218 {0x0000ab90, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1224 {0x0000ab8c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1219 {0x0000ab94, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1225 {0x0000ab90, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1220 {0x0000ab98, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1226 {0x0000ab94, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1221 {0x0000ab9c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1227 {0x0000ab98, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1222 {0x0000aba0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1228 {0x0000ab9c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1223 {0x0000aba4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1229 {0x0000aba0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1224 {0x0000aba8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1230 {0x0000aba4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1225 {0x0000abac, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1231 {0x0000aba8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1226 {0x0000abb0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1232 {0x0000abac, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1227 {0x0000abb4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1233 {0x0000abb0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1228 {0x0000abb8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1234 {0x0000abb4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1229 {0x0000abbc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1235 {0x0000abb8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1230 {0x0000abc0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1236 {0x0000abbc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1231 {0x0000abc4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1237 {0x0000abc0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1232 {0x0000abc8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1238 {0x0000abc4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1233 {0x0000abcc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1239 {0x0000abc8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1234 {0x0000abd0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1240 {0x0000abcc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1235 {0x0000abd4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1241 {0x0000abd0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1236 {0x0000abd8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1242 {0x0000abd4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1237 {0x0000abdc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1243 {0x0000abd8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1238 {0x0000abe0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1244 {0x0000abdc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1239 {0x0000abe4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1245 {0x0000abe0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1240 {0x0000abe8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1246 {0x0000abe4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1241 {0x0000abec, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1247 {0x0000abe8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1242 {0x0000abf0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1248 {0x0000abec, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1243 {0x0000abf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1249 {0x0000abf0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1244 {0x0000abf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1250 {0x0000abf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1245 {0x0000abfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 1251 {0x0000abf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1246 {0x0000a204, 0x00000004, 0x00000004, 0x00000004, 0x00000004, 0x00000004}, 1252 {0x0000abfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
1247 {0x0000a20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000, 0x0001f000}, 1253 {0x0000a204, 0x00000004, 0x00000004, 0x00000004, 0x00000004},
1248 {0x0000b20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000, 0x0001f000}, 1254 {0x0000a20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000},
1249 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a}, 1255 {0x0000b20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000},
1250 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000}, 1256 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
1251 {0x0000a250, 0x0004f000, 0x0004f000, 0x0004a000, 0x0004a000, 0x0004a000}, 1257 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
1252 {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e}, 1258 {0x0000a250, 0x0004f000, 0x0004f000, 0x0004a000, 0x0004a000},
1259 {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e},
1253}; 1260};
1254 1261
1255static const u32 ar9285Common_9285_1_2[][2] = { 1262static const u32 ar9285Common_9285_1_2[][2] = {
@@ -1572,164 +1579,168 @@ static const u32 ar9285Common_9285_1_2[][2] = {
1572 {0x00007870, 0x10142c00}, 1579 {0x00007870, 0x10142c00},
1573}; 1580};
1574 1581
1575static const u32 ar9285Modes_high_power_tx_gain_9285_1_2[][6] = { 1582static const u32 ar9285Modes_high_power_tx_gain_9285_1_2[][5] = {
1576 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1583 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1577 {0x0000a304, 0x00000000, 0x00000000, 0x00006200, 0x00006200, 0x00000000}, 1584 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1578 {0x0000a308, 0x00000000, 0x00000000, 0x00008201, 0x00008201, 0x00000000}, 1585 {0x0000a304, 0x00000000, 0x00000000, 0x00006200, 0x00006200},
1579 {0x0000a30c, 0x00000000, 0x00000000, 0x0000b240, 0x0000b240, 0x00000000}, 1586 {0x0000a308, 0x00000000, 0x00000000, 0x00008201, 0x00008201},
1580 {0x0000a310, 0x00000000, 0x00000000, 0x0000d241, 0x0000d241, 0x00000000}, 1587 {0x0000a30c, 0x00000000, 0x00000000, 0x0000b240, 0x0000b240},
1581 {0x0000a314, 0x00000000, 0x00000000, 0x0000f600, 0x0000f600, 0x00000000}, 1588 {0x0000a310, 0x00000000, 0x00000000, 0x0000d241, 0x0000d241},
1582 {0x0000a318, 0x00000000, 0x00000000, 0x00012800, 0x00012800, 0x00000000}, 1589 {0x0000a314, 0x00000000, 0x00000000, 0x0000f600, 0x0000f600},
1583 {0x0000a31c, 0x00000000, 0x00000000, 0x00016802, 0x00016802, 0x00000000}, 1590 {0x0000a318, 0x00000000, 0x00000000, 0x00012800, 0x00012800},
1584 {0x0000a320, 0x00000000, 0x00000000, 0x0001b805, 0x0001b805, 0x00000000}, 1591 {0x0000a31c, 0x00000000, 0x00000000, 0x00016802, 0x00016802},
1585 {0x0000a324, 0x00000000, 0x00000000, 0x00021a80, 0x00021a80, 0x00000000}, 1592 {0x0000a320, 0x00000000, 0x00000000, 0x0001b805, 0x0001b805},
1586 {0x0000a328, 0x00000000, 0x00000000, 0x00028b00, 0x00028b00, 0x00000000}, 1593 {0x0000a324, 0x00000000, 0x00000000, 0x00021a80, 0x00021a80},
1587 {0x0000a32c, 0x00000000, 0x00000000, 0x0002ab40, 0x0002ab40, 0x00000000}, 1594 {0x0000a328, 0x00000000, 0x00000000, 0x00028b00, 0x00028b00},
1588 {0x0000a330, 0x00000000, 0x00000000, 0x0002cd80, 0x0002cd80, 0x00000000}, 1595 {0x0000a32c, 0x00000000, 0x00000000, 0x0002ab40, 0x0002ab40},
1589 {0x0000a334, 0x00000000, 0x00000000, 0x00033d82, 0x00033d82, 0x00000000}, 1596 {0x0000a330, 0x00000000, 0x00000000, 0x0002cd80, 0x0002cd80},
1590 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000}, 1597 {0x0000a334, 0x00000000, 0x00000000, 0x00033d82, 0x00033d82},
1591 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000}, 1598 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e},
1592 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1599 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e},
1593 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1600 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1594 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1601 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1595 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1602 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1596 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1603 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1597 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1604 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1598 {0x00007814, 0x924934a8, 0x924934a8, 0x924934a8, 0x924934a8, 0x924934a8}, 1605 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1599 {0x00007828, 0x26d2491b, 0x26d2491b, 0x26d2491b, 0x26d2491b, 0x26d2491b}, 1606 {0x00007814, 0x924934a8, 0x924934a8, 0x924934a8, 0x924934a8},
1600 {0x00007830, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e}, 1607 {0x00007828, 0x26d2491b, 0x26d2491b, 0x26d2491b, 0x26d2491b},
1601 {0x00007838, 0xfac68803, 0xfac68803, 0xfac68803, 0xfac68803, 0xfac68803}, 1608 {0x00007830, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e},
1602 {0x0000783c, 0x0001fffe, 0x0001fffe, 0x0001fffe, 0x0001fffe, 0x0001fffe}, 1609 {0x00007838, 0xfac68803, 0xfac68803, 0xfac68803, 0xfac68803},
1603 {0x00007840, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20}, 1610 {0x0000783c, 0x0001fffe, 0x0001fffe, 0x0001fffe, 0x0001fffe},
1604 {0x0000786c, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe}, 1611 {0x00007840, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20},
1605 {0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00}, 1612 {0x0000786c, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe},
1606 {0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a216652, 0x0a216652, 0x0a22a652}, 1613 {0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00},
1607 {0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7}, 1614 {0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a216652, 0x0a216652},
1608 {0x0000a27c, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7}, 1615 {0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
1609 {0x0000a394, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7}, 1616 {0x0000a27c, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7},
1610 {0x0000a398, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7}, 1617 {0x0000a394, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
1611 {0x0000a3dc, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7}, 1618 {0x0000a398, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7},
1612 {0x0000a3e0, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7}, 1619 {0x0000a3dc, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
1620 {0x0000a3e0, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7},
1613}; 1621};
1614 1622
1615static const u32 ar9285Modes_original_tx_gain_9285_1_2[][6] = { 1623static const u32 ar9285Modes_original_tx_gain_9285_1_2[][5] = {
1616 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1624 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1617 {0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200, 0x00000000}, 1625 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1618 {0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208, 0x00000000}, 1626 {0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200},
1619 {0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608, 0x00000000}, 1627 {0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208},
1620 {0x0000a310, 0x00000000, 0x00000000, 0x00022618, 0x00022618, 0x00000000}, 1628 {0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608},
1621 {0x0000a314, 0x00000000, 0x00000000, 0x0002a6c9, 0x0002a6c9, 0x00000000}, 1629 {0x0000a310, 0x00000000, 0x00000000, 0x00022618, 0x00022618},
1622 {0x0000a318, 0x00000000, 0x00000000, 0x00031710, 0x00031710, 0x00000000}, 1630 {0x0000a314, 0x00000000, 0x00000000, 0x0002a6c9, 0x0002a6c9},
1623 {0x0000a31c, 0x00000000, 0x00000000, 0x00035718, 0x00035718, 0x00000000}, 1631 {0x0000a318, 0x00000000, 0x00000000, 0x00031710, 0x00031710},
1624 {0x0000a320, 0x00000000, 0x00000000, 0x00038758, 0x00038758, 0x00000000}, 1632 {0x0000a31c, 0x00000000, 0x00000000, 0x00035718, 0x00035718},
1625 {0x0000a324, 0x00000000, 0x00000000, 0x0003c75a, 0x0003c75a, 0x00000000}, 1633 {0x0000a320, 0x00000000, 0x00000000, 0x00038758, 0x00038758},
1626 {0x0000a328, 0x00000000, 0x00000000, 0x0004075c, 0x0004075c, 0x00000000}, 1634 {0x0000a324, 0x00000000, 0x00000000, 0x0003c75a, 0x0003c75a},
1627 {0x0000a32c, 0x00000000, 0x00000000, 0x0004475e, 0x0004475e, 0x00000000}, 1635 {0x0000a328, 0x00000000, 0x00000000, 0x0004075c, 0x0004075c},
1628 {0x0000a330, 0x00000000, 0x00000000, 0x0004679f, 0x0004679f, 0x00000000}, 1636 {0x0000a32c, 0x00000000, 0x00000000, 0x0004475e, 0x0004475e},
1629 {0x0000a334, 0x00000000, 0x00000000, 0x000487df, 0x000487df, 0x00000000}, 1637 {0x0000a330, 0x00000000, 0x00000000, 0x0004679f, 0x0004679f},
1630 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000}, 1638 {0x0000a334, 0x00000000, 0x00000000, 0x000487df, 0x000487df},
1631 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000}, 1639 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e},
1632 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1640 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e},
1633 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1641 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1634 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1642 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1635 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1643 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1636 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1644 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1637 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1645 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1638 {0x00007814, 0x924934a8, 0x924934a8, 0x924934a8, 0x924934a8, 0x924934a8}, 1646 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1639 {0x00007828, 0x26d2491b, 0x26d2491b, 0x26d2491b, 0x26d2491b, 0x26d2491b}, 1647 {0x00007814, 0x924934a8, 0x924934a8, 0x924934a8, 0x924934a8},
1640 {0x00007830, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e}, 1648 {0x00007828, 0x26d2491b, 0x26d2491b, 0x26d2491b, 0x26d2491b},
1641 {0x00007838, 0xfac68801, 0xfac68801, 0xfac68801, 0xfac68801, 0xfac68801}, 1649 {0x00007830, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e, 0xedb6d96e},
1642 {0x0000783c, 0x0001fffe, 0x0001fffe, 0x0001fffe, 0x0001fffe, 0x0001fffe}, 1650 {0x00007838, 0xfac68801, 0xfac68801, 0xfac68801, 0xfac68801},
1643 {0x00007840, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20}, 1651 {0x0000783c, 0x0001fffe, 0x0001fffe, 0x0001fffe, 0x0001fffe},
1644 {0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4}, 1652 {0x00007840, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20, 0xffeb1a20},
1645 {0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04}, 1653 {0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4},
1646 {0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a21a652, 0x0a21a652, 0x0a22a652}, 1654 {0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04},
1647 {0x0000a278, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c}, 1655 {0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a21a652, 0x0a21a652},
1648 {0x0000a27c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c}, 1656 {0x0000a278, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
1649 {0x0000a394, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c}, 1657 {0x0000a27c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c},
1650 {0x0000a398, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c}, 1658 {0x0000a394, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
1651 {0x0000a3dc, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c}, 1659 {0x0000a398, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c},
1652 {0x0000a3e0, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c}, 1660 {0x0000a3dc, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
1661 {0x0000a3e0, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c},
1653}; 1662};
1654 1663
1655static const u32 ar9285Modes_XE2_0_normal_power[][6] = { 1664static const u32 ar9285Modes_XE2_0_normal_power[][5] = {
1656 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1665 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1657 {0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200, 0x00000000}, 1666 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1658 {0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208, 0x00000000}, 1667 {0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200},
1659 {0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608, 0x00000000}, 1668 {0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208},
1660 {0x0000a310, 0x00000000, 0x00000000, 0x00022618, 0x00022618, 0x00000000}, 1669 {0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608},
1661 {0x0000a314, 0x00000000, 0x00000000, 0x0002a6c9, 0x0002a6c9, 0x00000000}, 1670 {0x0000a310, 0x00000000, 0x00000000, 0x00022618, 0x00022618},
1662 {0x0000a318, 0x00000000, 0x00000000, 0x00031710, 0x00031710, 0x00000000}, 1671 {0x0000a314, 0x00000000, 0x00000000, 0x0002a6c9, 0x0002a6c9},
1663 {0x0000a31c, 0x00000000, 0x00000000, 0x00035718, 0x00035718, 0x00000000}, 1672 {0x0000a318, 0x00000000, 0x00000000, 0x00031710, 0x00031710},
1664 {0x0000a320, 0x00000000, 0x00000000, 0x00038758, 0x00038758, 0x00000000}, 1673 {0x0000a31c, 0x00000000, 0x00000000, 0x00035718, 0x00035718},
1665 {0x0000a324, 0x00000000, 0x00000000, 0x0003c75a, 0x0003c75a, 0x00000000}, 1674 {0x0000a320, 0x00000000, 0x00000000, 0x00038758, 0x00038758},
1666 {0x0000a328, 0x00000000, 0x00000000, 0x0004075c, 0x0004075c, 0x00000000}, 1675 {0x0000a324, 0x00000000, 0x00000000, 0x0003c75a, 0x0003c75a},
1667 {0x0000a32c, 0x00000000, 0x00000000, 0x0004475e, 0x0004475e, 0x00000000}, 1676 {0x0000a328, 0x00000000, 0x00000000, 0x0004075c, 0x0004075c},
1668 {0x0000a330, 0x00000000, 0x00000000, 0x0004679f, 0x0004679f, 0x00000000}, 1677 {0x0000a32c, 0x00000000, 0x00000000, 0x0004475e, 0x0004475e},
1669 {0x0000a334, 0x00000000, 0x00000000, 0x000487df, 0x000487df, 0x00000000}, 1678 {0x0000a330, 0x00000000, 0x00000000, 0x0004679f, 0x0004679f},
1670 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000}, 1679 {0x0000a334, 0x00000000, 0x00000000, 0x000487df, 0x000487df},
1671 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000}, 1680 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e},
1672 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1681 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e},
1673 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1682 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1674 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1683 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1675 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1684 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1676 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1685 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1677 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1686 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1678 {0x00007814, 0x92497ca8, 0x92497ca8, 0x92497ca8, 0x92497ca8, 0x92497ca8}, 1687 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1679 {0x00007828, 0x4ad2491b, 0x4ad2491b, 0x2ad2491b, 0x4ad2491b, 0x4ad2491b}, 1688 {0x00007814, 0x92497ca8, 0x92497ca8, 0x92497ca8, 0x92497ca8},
1680 {0x00007830, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e, 0xedb6dbae}, 1689 {0x00007828, 0x4ad2491b, 0x4ad2491b, 0x2ad2491b, 0x4ad2491b},
1681 {0x00007838, 0xdac71441, 0xdac71441, 0xdac71441, 0xdac71441, 0xdac71441}, 1690 {0x00007830, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e},
1682 {0x0000783c, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe}, 1691 {0x00007838, 0xdac71441, 0xdac71441, 0xdac71441, 0xdac71441},
1683 {0x00007840, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c}, 1692 {0x0000783c, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe},
1684 {0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4}, 1693 {0x00007840, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c},
1685 {0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04}, 1694 {0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4},
1686 {0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a21a652, 0x0a21a652, 0x0a22a652}, 1695 {0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04},
1687 {0x0000a278, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c}, 1696 {0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a21a652, 0x0a21a652},
1688 {0x0000a27c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c}, 1697 {0x0000a278, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
1689 {0x0000a394, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c}, 1698 {0x0000a27c, 0x050e039c, 0x050e039c, 0x050e039c, 0x050e039c},
1690 {0x0000a398, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c}, 1699 {0x0000a394, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
1691 {0x0000a3dc, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c}, 1700 {0x0000a398, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c},
1692 {0x0000a3e0, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c}, 1701 {0x0000a3dc, 0x39ce739c, 0x39ce739c, 0x39ce739c, 0x39ce739c},
1702 {0x0000a3e0, 0x0000039c, 0x0000039c, 0x0000039c, 0x0000039c},
1693}; 1703};
1694 1704
1695static const u32 ar9285Modes_XE2_0_high_power[][6] = { 1705static const u32 ar9285Modes_XE2_0_high_power[][5] = {
1696 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1706 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1697 {0x0000a304, 0x00000000, 0x00000000, 0x00006200, 0x00006200, 0x00000000}, 1707 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1698 {0x0000a308, 0x00000000, 0x00000000, 0x00008201, 0x00008201, 0x00000000}, 1708 {0x0000a304, 0x00000000, 0x00000000, 0x00006200, 0x00006200},
1699 {0x0000a30c, 0x00000000, 0x00000000, 0x0000b240, 0x0000b240, 0x00000000}, 1709 {0x0000a308, 0x00000000, 0x00000000, 0x00008201, 0x00008201},
1700 {0x0000a310, 0x00000000, 0x00000000, 0x0000d241, 0x0000d241, 0x00000000}, 1710 {0x0000a30c, 0x00000000, 0x00000000, 0x0000b240, 0x0000b240},
1701 {0x0000a314, 0x00000000, 0x00000000, 0x0000f600, 0x0000f600, 0x00000000}, 1711 {0x0000a310, 0x00000000, 0x00000000, 0x0000d241, 0x0000d241},
1702 {0x0000a318, 0x00000000, 0x00000000, 0x00012800, 0x00012800, 0x00000000}, 1712 {0x0000a314, 0x00000000, 0x00000000, 0x0000f600, 0x0000f600},
1703 {0x0000a31c, 0x00000000, 0x00000000, 0x00016802, 0x00016802, 0x00000000}, 1713 {0x0000a318, 0x00000000, 0x00000000, 0x00012800, 0x00012800},
1704 {0x0000a320, 0x00000000, 0x00000000, 0x0001b805, 0x0001b805, 0x00000000}, 1714 {0x0000a31c, 0x00000000, 0x00000000, 0x00016802, 0x00016802},
1705 {0x0000a324, 0x00000000, 0x00000000, 0x00021a80, 0x00021a80, 0x00000000}, 1715 {0x0000a320, 0x00000000, 0x00000000, 0x0001b805, 0x0001b805},
1706 {0x0000a328, 0x00000000, 0x00000000, 0x00028b00, 0x00028b00, 0x00000000}, 1716 {0x0000a324, 0x00000000, 0x00000000, 0x00021a80, 0x00021a80},
1707 {0x0000a32c, 0x00000000, 0x00000000, 0x0002ab40, 0x0002ab40, 0x00000000}, 1717 {0x0000a328, 0x00000000, 0x00000000, 0x00028b00, 0x00028b00},
1708 {0x0000a330, 0x00000000, 0x00000000, 0x0002cd80, 0x0002cd80, 0x00000000}, 1718 {0x0000a32c, 0x00000000, 0x00000000, 0x0002ab40, 0x0002ab40},
1709 {0x0000a334, 0x00000000, 0x00000000, 0x00033d82, 0x00033d82, 0x00000000}, 1719 {0x0000a330, 0x00000000, 0x00000000, 0x0002cd80, 0x0002cd80},
1710 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000}, 1720 {0x0000a334, 0x00000000, 0x00000000, 0x00033d82, 0x00033d82},
1711 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000}, 1721 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e},
1712 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1722 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e},
1713 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1723 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1714 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1724 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1715 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1725 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1716 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1726 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1717 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 1727 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1718 {0x00007814, 0x92497ca8, 0x92497ca8, 0x92497ca8, 0x92497ca8, 0x92497ca8}, 1728 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
1719 {0x00007828, 0x4ad2491b, 0x4ad2491b, 0x2ad2491b, 0x4ad2491b, 0x4ad2491b}, 1729 {0x00007814, 0x92497ca8, 0x92497ca8, 0x92497ca8, 0x92497ca8},
1720 {0x00007830, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e}, 1730 {0x00007828, 0x4ad2491b, 0x4ad2491b, 0x2ad2491b, 0x4ad2491b},
1721 {0x00007838, 0xdac71443, 0xdac71443, 0xdac71443, 0xdac71443, 0xdac71443}, 1731 {0x00007830, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e, 0xedb6da6e},
1722 {0x0000783c, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe}, 1732 {0x00007838, 0xdac71443, 0xdac71443, 0xdac71443, 0xdac71443},
1723 {0x00007840, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c}, 1733 {0x0000783c, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe, 0x2481f6fe},
1724 {0x0000786c, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe}, 1734 {0x00007840, 0xba5f638c, 0xba5f638c, 0xba5f638c, 0xba5f638c},
1725 {0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00}, 1735 {0x0000786c, 0x08609ebe, 0x08609ebe, 0x08609ebe, 0x08609ebe},
1726 {0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a216652, 0x0a216652, 0x0a22a652}, 1736 {0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00},
1727 {0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7}, 1737 {0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a216652, 0x0a216652},
1728 {0x0000a27c, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7}, 1738 {0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
1729 {0x0000a394, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7}, 1739 {0x0000a27c, 0x050380e7, 0x050380e7, 0x050380e7, 0x050380e7},
1730 {0x0000a398, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7}, 1740 {0x0000a394, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
1731 {0x0000a3dc, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7}, 1741 {0x0000a398, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7},
1732 {0x0000a3e0, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7}, 1742 {0x0000a3dc, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
1743 {0x0000a3e0, 0x000000e7, 0x000000e7, 0x000000e7, 0x000000e7},
1733}; 1744};
1734 1745
1735static const u32 ar9285PciePhy_clkreq_always_on_L1_9285_1_2[][2] = { 1746static const u32 ar9285PciePhy_clkreq_always_on_L1_9285_1_2[][2] = {
@@ -1760,50 +1771,51 @@ static const u32 ar9285PciePhy_clkreq_off_L1_9285_1_2[][2] = {
1760 {0x00004044, 0x00000000}, 1771 {0x00004044, 0x00000000},
1761}; 1772};
1762 1773
1763static const u32 ar9287Modes_9287_1_1[][6] = { 1774static const u32 ar9287Modes_9287_1_1[][5] = {
1764 {0x00001030, 0x00000000, 0x00000000, 0x000002c0, 0x00000160, 0x000001e0}, 1775 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1765 {0x00001070, 0x00000000, 0x00000000, 0x00000318, 0x0000018c, 0x000001e0}, 1776 {0x00001030, 0x00000000, 0x00000000, 0x000002c0, 0x00000160},
1766 {0x000010b0, 0x00000000, 0x00000000, 0x00007c70, 0x00003e38, 0x00001180}, 1777 {0x00001070, 0x00000000, 0x00000000, 0x00000318, 0x0000018c},
1767 {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008}, 1778 {0x000010b0, 0x00000000, 0x00000000, 0x00007c70, 0x00003e38},
1768 {0x00008014, 0x00000000, 0x00000000, 0x10801600, 0x08400b00, 0x06e006e0}, 1779 {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1769 {0x0000801c, 0x00000000, 0x00000000, 0x12e00057, 0x12e0002b, 0x0988004f}, 1780 {0x00008014, 0x00000000, 0x00000000, 0x10801600, 0x08400b00},
1770 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810, 0x08f04810}, 1781 {0x0000801c, 0x00000000, 0x00000000, 0x12e00057, 0x12e0002b},
1771 {0x000081d0, 0x00003200, 0x00003200, 0x0000320a, 0x0000320a, 0x0000320a}, 1782 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
1772 {0x00008318, 0x00000000, 0x00000000, 0x00006880, 0x00003440, 0x00006880}, 1783 {0x000081d0, 0x00003200, 0x00003200, 0x0000320a, 0x0000320a},
1773 {0x00009804, 0x00000000, 0x00000000, 0x000003c4, 0x00000300, 0x00000303}, 1784 {0x00008318, 0x00000000, 0x00000000, 0x00006880, 0x00003440},
1774 {0x00009820, 0x00000000, 0x00000000, 0x02020200, 0x02020200, 0x02020200}, 1785 {0x00009804, 0x00000000, 0x00000000, 0x000003c4, 0x00000300},
1775 {0x00009824, 0x00000000, 0x00000000, 0x01000e0e, 0x01000e0e, 0x01000e0e}, 1786 {0x00009820, 0x00000000, 0x00000000, 0x02020200, 0x02020200},
1776 {0x00009828, 0x00000000, 0x00000000, 0x3a020001, 0x3a020001, 0x3a020001}, 1787 {0x00009824, 0x00000000, 0x00000000, 0x01000e0e, 0x01000e0e},
1777 {0x00009834, 0x00000000, 0x00000000, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 1788 {0x00009828, 0x00000000, 0x00000000, 0x3a020001, 0x3a020001},
1778 {0x00009838, 0x00000003, 0x00000003, 0x00000007, 0x00000007, 0x00000007}, 1789 {0x00009834, 0x00000000, 0x00000000, 0x00000e0e, 0x00000e0e},
1779 {0x00009840, 0x206a002e, 0x206a002e, 0x206a012e, 0x206a012e, 0x206a012e}, 1790 {0x00009838, 0x00000003, 0x00000003, 0x00000007, 0x00000007},
1780 {0x00009844, 0x03720000, 0x03720000, 0x037216a0, 0x037216a0, 0x037216a0}, 1791 {0x00009840, 0x206a002e, 0x206a002e, 0x206a012e, 0x206a012e},
1781 {0x00009850, 0x60000000, 0x60000000, 0x6d4000e2, 0x6c4000e2, 0x6c4000e2}, 1792 {0x00009844, 0x03720000, 0x03720000, 0x037216a0, 0x037216a0},
1782 {0x00009858, 0x7c000d00, 0x7c000d00, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e}, 1793 {0x00009850, 0x60000000, 0x60000000, 0x6d4000e2, 0x6c4000e2},
1783 {0x0000985c, 0x3100005e, 0x3100005e, 0x3139605e, 0x31395d5e, 0x31395d5e}, 1794 {0x00009858, 0x7c000d00, 0x7c000d00, 0x7ec84d2e, 0x7ec84d2e},
1784 {0x00009860, 0x00058d00, 0x00058d00, 0x00058d20, 0x00058d20, 0x00058d18}, 1795 {0x0000985c, 0x3100005e, 0x3100005e, 0x3139605e, 0x31395d5e},
1785 {0x00009864, 0x00000e00, 0x00000e00, 0x0001ce00, 0x0001ce00, 0x0001ce00}, 1796 {0x00009860, 0x00058d00, 0x00058d00, 0x00058d20, 0x00058d20},
1786 {0x00009868, 0x000040c0, 0x000040c0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, 1797 {0x00009864, 0x00000e00, 0x00000e00, 0x0001ce00, 0x0001ce00},
1787 {0x0000986c, 0x00000080, 0x00000080, 0x06903881, 0x06903881, 0x06903881}, 1798 {0x00009868, 0x000040c0, 0x000040c0, 0x5ac640d0, 0x5ac640d0},
1788 {0x00009914, 0x00000000, 0x00000000, 0x00001130, 0x00000898, 0x000007d0}, 1799 {0x0000986c, 0x00000080, 0x00000080, 0x06903881, 0x06903881},
1789 {0x00009918, 0x00000000, 0x00000000, 0x00000016, 0x0000000b, 0x00000016}, 1800 {0x00009914, 0x00000000, 0x00000000, 0x00001130, 0x00000898},
1790 {0x00009924, 0xd00a8a01, 0xd00a8a01, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d}, 1801 {0x00009918, 0x00000000, 0x00000000, 0x00000016, 0x0000000b},
1791 {0x00009944, 0xefbc0000, 0xefbc0000, 0xefbc1010, 0xefbc1010, 0xefbc1010}, 1802 {0x00009924, 0xd00a8a01, 0xd00a8a01, 0xd00a8a0d, 0xd00a8a0d},
1792 {0x00009960, 0x00000000, 0x00000000, 0x00000010, 0x00000010, 0x00000010}, 1803 {0x00009944, 0xefbc0000, 0xefbc0000, 0xefbc1010, 0xefbc1010},
1793 {0x0000a960, 0x00000000, 0x00000000, 0x00000010, 0x00000010, 0x00000010}, 1804 {0x00009960, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
1794 {0x00009964, 0x00000000, 0x00000000, 0x00000210, 0x00000210, 0x00000210}, 1805 {0x0000a960, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
1795 {0x0000c968, 0x00000200, 0x00000200, 0x000003ce, 0x000003ce, 0x000003ce}, 1806 {0x00009964, 0x00000000, 0x00000000, 0x00000210, 0x00000210},
1796 {0x000099b8, 0x00000000, 0x00000000, 0x0000001c, 0x0000001c, 0x0000001c}, 1807 {0x0000c968, 0x00000200, 0x00000200, 0x000003ce, 0x000003ce},
1797 {0x000099bc, 0x00000000, 0x00000000, 0x00000c00, 0x00000c00, 0x00000c00}, 1808 {0x000099b8, 0x00000000, 0x00000000, 0x0000001c, 0x0000001c},
1798 {0x000099c0, 0x00000000, 0x00000000, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, 1809 {0x000099bc, 0x00000000, 0x00000000, 0x00000c00, 0x00000c00},
1799 {0x0000a204, 0x00000440, 0x00000440, 0x00000444, 0x00000444, 0x00000444}, 1810 {0x000099c0, 0x00000000, 0x00000000, 0x05eea6d4, 0x05eea6d4},
1800 {0x0000a20c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1811 {0x0000a204, 0x00000440, 0x00000440, 0x00000444, 0x00000444},
1801 {0x0000b20c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1812 {0x0000a20c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1802 {0x0000a21c, 0x1803800a, 0x1803800a, 0x1883800a, 0x1883800a, 0x1883800a}, 1813 {0x0000b20c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1803 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000}, 1814 {0x0000a21c, 0x1803800a, 0x1803800a, 0x1883800a, 0x1883800a},
1804 {0x0000a250, 0x00000000, 0x00000000, 0x0004a000, 0x0004a000, 0x0004a000}, 1815 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
1805 {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e}, 1816 {0x0000a250, 0x00000000, 0x00000000, 0x0004a000, 0x0004a000},
1806 {0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 1817 {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e},
1818 {0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1807}; 1819};
1808 1820
1809static const u32 ar9287Common_9287_1_1[][2] = { 1821static const u32 ar9287Common_9287_1_1[][2] = {
@@ -2189,313 +2201,315 @@ static const u32 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1[][2] = {
2189 {0x0000a1fc, 0xca9228ee}, 2201 {0x0000a1fc, 0xca9228ee},
2190}; 2202};
2191 2203
2192static const u32 ar9287Modes_tx_gain_9287_1_1[][6] = { 2204static const u32 ar9287Modes_tx_gain_9287_1_1[][5] = {
2193 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 2205 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
2194 {0x0000a304, 0x00000000, 0x00000000, 0x00004002, 0x00004002, 0x00004002}, 2206 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
2195 {0x0000a308, 0x00000000, 0x00000000, 0x00008004, 0x00008004, 0x00008004}, 2207 {0x0000a304, 0x00000000, 0x00000000, 0x00004002, 0x00004002},
2196 {0x0000a30c, 0x00000000, 0x00000000, 0x0000c00a, 0x0000c00a, 0x0000c00a}, 2208 {0x0000a308, 0x00000000, 0x00000000, 0x00008004, 0x00008004},
2197 {0x0000a310, 0x00000000, 0x00000000, 0x0001000c, 0x0001000c, 0x0001000c}, 2209 {0x0000a30c, 0x00000000, 0x00000000, 0x0000c00a, 0x0000c00a},
2198 {0x0000a314, 0x00000000, 0x00000000, 0x0001420b, 0x0001420b, 0x0001420b}, 2210 {0x0000a310, 0x00000000, 0x00000000, 0x0001000c, 0x0001000c},
2199 {0x0000a318, 0x00000000, 0x00000000, 0x0001824a, 0x0001824a, 0x0001824a}, 2211 {0x0000a314, 0x00000000, 0x00000000, 0x0001420b, 0x0001420b},
2200 {0x0000a31c, 0x00000000, 0x00000000, 0x0001c44a, 0x0001c44a, 0x0001c44a}, 2212 {0x0000a318, 0x00000000, 0x00000000, 0x0001824a, 0x0001824a},
2201 {0x0000a320, 0x00000000, 0x00000000, 0x0002064a, 0x0002064a, 0x0002064a}, 2213 {0x0000a31c, 0x00000000, 0x00000000, 0x0001c44a, 0x0001c44a},
2202 {0x0000a324, 0x00000000, 0x00000000, 0x0002484a, 0x0002484a, 0x0002484a}, 2214 {0x0000a320, 0x00000000, 0x00000000, 0x0002064a, 0x0002064a},
2203 {0x0000a328, 0x00000000, 0x00000000, 0x00028a4a, 0x00028a4a, 0x00028a4a}, 2215 {0x0000a324, 0x00000000, 0x00000000, 0x0002484a, 0x0002484a},
2204 {0x0000a32c, 0x00000000, 0x00000000, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a}, 2216 {0x0000a328, 0x00000000, 0x00000000, 0x00028a4a, 0x00028a4a},
2205 {0x0000a330, 0x00000000, 0x00000000, 0x00030e4a, 0x00030e4a, 0x00030e4a}, 2217 {0x0000a32c, 0x00000000, 0x00000000, 0x0002cc4a, 0x0002cc4a},
2206 {0x0000a334, 0x00000000, 0x00000000, 0x00034e8a, 0x00034e8a, 0x00034e8a}, 2218 {0x0000a330, 0x00000000, 0x00000000, 0x00030e4a, 0x00030e4a},
2207 {0x0000a338, 0x00000000, 0x00000000, 0x00038e8c, 0x00038e8c, 0x00038e8c}, 2219 {0x0000a334, 0x00000000, 0x00000000, 0x00034e8a, 0x00034e8a},
2208 {0x0000a33c, 0x00000000, 0x00000000, 0x0003cecc, 0x0003cecc, 0x0003cecc}, 2220 {0x0000a338, 0x00000000, 0x00000000, 0x00038e8c, 0x00038e8c},
2209 {0x0000a340, 0x00000000, 0x00000000, 0x00040ed4, 0x00040ed4, 0x00040ed4}, 2221 {0x0000a33c, 0x00000000, 0x00000000, 0x0003cecc, 0x0003cecc},
2210 {0x0000a344, 0x00000000, 0x00000000, 0x00044edc, 0x00044edc, 0x00044edc}, 2222 {0x0000a340, 0x00000000, 0x00000000, 0x00040ed4, 0x00040ed4},
2211 {0x0000a348, 0x00000000, 0x00000000, 0x00048ede, 0x00048ede, 0x00048ede}, 2223 {0x0000a344, 0x00000000, 0x00000000, 0x00044edc, 0x00044edc},
2212 {0x0000a34c, 0x00000000, 0x00000000, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e}, 2224 {0x0000a348, 0x00000000, 0x00000000, 0x00048ede, 0x00048ede},
2213 {0x0000a350, 0x00000000, 0x00000000, 0x00050f5e, 0x00050f5e, 0x00050f5e}, 2225 {0x0000a34c, 0x00000000, 0x00000000, 0x0004cf1e, 0x0004cf1e},
2214 {0x0000a354, 0x00000000, 0x00000000, 0x00054f9e, 0x00054f9e, 0x00054f9e}, 2226 {0x0000a350, 0x00000000, 0x00000000, 0x00050f5e, 0x00050f5e},
2215 {0x0000a780, 0x00000000, 0x00000000, 0x00000062, 0x00000062, 0x00000062}, 2227 {0x0000a354, 0x00000000, 0x00000000, 0x00054f9e, 0x00054f9e},
2216 {0x0000a784, 0x00000000, 0x00000000, 0x00004064, 0x00004064, 0x00004064}, 2228 {0x0000a780, 0x00000000, 0x00000000, 0x00000062, 0x00000062},
2217 {0x0000a788, 0x00000000, 0x00000000, 0x000080a4, 0x000080a4, 0x000080a4}, 2229 {0x0000a784, 0x00000000, 0x00000000, 0x00004064, 0x00004064},
2218 {0x0000a78c, 0x00000000, 0x00000000, 0x0000c0aa, 0x0000c0aa, 0x0000c0aa}, 2230 {0x0000a788, 0x00000000, 0x00000000, 0x000080a4, 0x000080a4},
2219 {0x0000a790, 0x00000000, 0x00000000, 0x000100ac, 0x000100ac, 0x000100ac}, 2231 {0x0000a78c, 0x00000000, 0x00000000, 0x0000c0aa, 0x0000c0aa},
2220 {0x0000a794, 0x00000000, 0x00000000, 0x000140b4, 0x000140b4, 0x000140b4}, 2232 {0x0000a790, 0x00000000, 0x00000000, 0x000100ac, 0x000100ac},
2221 {0x0000a798, 0x00000000, 0x00000000, 0x000180f4, 0x000180f4, 0x000180f4}, 2233 {0x0000a794, 0x00000000, 0x00000000, 0x000140b4, 0x000140b4},
2222 {0x0000a79c, 0x00000000, 0x00000000, 0x0001c134, 0x0001c134, 0x0001c134}, 2234 {0x0000a798, 0x00000000, 0x00000000, 0x000180f4, 0x000180f4},
2223 {0x0000a7a0, 0x00000000, 0x00000000, 0x00020174, 0x00020174, 0x00020174}, 2235 {0x0000a79c, 0x00000000, 0x00000000, 0x0001c134, 0x0001c134},
2224 {0x0000a7a4, 0x00000000, 0x00000000, 0x0002417c, 0x0002417c, 0x0002417c}, 2236 {0x0000a7a0, 0x00000000, 0x00000000, 0x00020174, 0x00020174},
2225 {0x0000a7a8, 0x00000000, 0x00000000, 0x0002817e, 0x0002817e, 0x0002817e}, 2237 {0x0000a7a4, 0x00000000, 0x00000000, 0x0002417c, 0x0002417c},
2226 {0x0000a7ac, 0x00000000, 0x00000000, 0x0002c1be, 0x0002c1be, 0x0002c1be}, 2238 {0x0000a7a8, 0x00000000, 0x00000000, 0x0002817e, 0x0002817e},
2227 {0x0000a7b0, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2239 {0x0000a7ac, 0x00000000, 0x00000000, 0x0002c1be, 0x0002c1be},
2228 {0x0000a7b4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2240 {0x0000a7b0, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2229 {0x0000a7b8, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2241 {0x0000a7b4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2230 {0x0000a7bc, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2242 {0x0000a7b8, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2231 {0x0000a7c0, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2243 {0x0000a7bc, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2232 {0x0000a7c4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2244 {0x0000a7c0, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2233 {0x0000a7c8, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2245 {0x0000a7c4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2234 {0x0000a7cc, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2246 {0x0000a7c8, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2235 {0x0000a7d0, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2247 {0x0000a7cc, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2236 {0x0000a7d4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe, 0x000301fe}, 2248 {0x0000a7d0, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2237 {0x0000a274, 0x0a180000, 0x0a180000, 0x0a1aa000, 0x0a1aa000, 0x0a1aa000}, 2249 {0x0000a7d4, 0x00000000, 0x00000000, 0x000301fe, 0x000301fe},
2250 {0x0000a274, 0x0a180000, 0x0a180000, 0x0a1aa000, 0x0a1aa000},
2238}; 2251};
2239 2252
2240static const u32 ar9287Modes_rx_gain_9287_1_1[][6] = { 2253static const u32 ar9287Modes_rx_gain_9287_1_1[][5] = {
2241 {0x00009a00, 0x00000000, 0x00000000, 0x0000a120, 0x0000a120, 0x0000a120}, 2254 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
2242 {0x00009a04, 0x00000000, 0x00000000, 0x0000a124, 0x0000a124, 0x0000a124}, 2255 {0x00009a00, 0x00000000, 0x00000000, 0x0000a120, 0x0000a120},
2243 {0x00009a08, 0x00000000, 0x00000000, 0x0000a128, 0x0000a128, 0x0000a128}, 2256 {0x00009a04, 0x00000000, 0x00000000, 0x0000a124, 0x0000a124},
2244 {0x00009a0c, 0x00000000, 0x00000000, 0x0000a12c, 0x0000a12c, 0x0000a12c}, 2257 {0x00009a08, 0x00000000, 0x00000000, 0x0000a128, 0x0000a128},
2245 {0x00009a10, 0x00000000, 0x00000000, 0x0000a130, 0x0000a130, 0x0000a130}, 2258 {0x00009a0c, 0x00000000, 0x00000000, 0x0000a12c, 0x0000a12c},
2246 {0x00009a14, 0x00000000, 0x00000000, 0x0000a194, 0x0000a194, 0x0000a194}, 2259 {0x00009a10, 0x00000000, 0x00000000, 0x0000a130, 0x0000a130},
2247 {0x00009a18, 0x00000000, 0x00000000, 0x0000a198, 0x0000a198, 0x0000a198}, 2260 {0x00009a14, 0x00000000, 0x00000000, 0x0000a194, 0x0000a194},
2248 {0x00009a1c, 0x00000000, 0x00000000, 0x0000a20c, 0x0000a20c, 0x0000a20c}, 2261 {0x00009a18, 0x00000000, 0x00000000, 0x0000a198, 0x0000a198},
2249 {0x00009a20, 0x00000000, 0x00000000, 0x0000a210, 0x0000a210, 0x0000a210}, 2262 {0x00009a1c, 0x00000000, 0x00000000, 0x0000a20c, 0x0000a20c},
2250 {0x00009a24, 0x00000000, 0x00000000, 0x0000a284, 0x0000a284, 0x0000a284}, 2263 {0x00009a20, 0x00000000, 0x00000000, 0x0000a210, 0x0000a210},
2251 {0x00009a28, 0x00000000, 0x00000000, 0x0000a288, 0x0000a288, 0x0000a288}, 2264 {0x00009a24, 0x00000000, 0x00000000, 0x0000a284, 0x0000a284},
2252 {0x00009a2c, 0x00000000, 0x00000000, 0x0000a28c, 0x0000a28c, 0x0000a28c}, 2265 {0x00009a28, 0x00000000, 0x00000000, 0x0000a288, 0x0000a288},
2253 {0x00009a30, 0x00000000, 0x00000000, 0x0000a290, 0x0000a290, 0x0000a290}, 2266 {0x00009a2c, 0x00000000, 0x00000000, 0x0000a28c, 0x0000a28c},
2254 {0x00009a34, 0x00000000, 0x00000000, 0x0000a294, 0x0000a294, 0x0000a294}, 2267 {0x00009a30, 0x00000000, 0x00000000, 0x0000a290, 0x0000a290},
2255 {0x00009a38, 0x00000000, 0x00000000, 0x0000a2a0, 0x0000a2a0, 0x0000a2a0}, 2268 {0x00009a34, 0x00000000, 0x00000000, 0x0000a294, 0x0000a294},
2256 {0x00009a3c, 0x00000000, 0x00000000, 0x0000a2a4, 0x0000a2a4, 0x0000a2a4}, 2269 {0x00009a38, 0x00000000, 0x00000000, 0x0000a2a0, 0x0000a2a0},
2257 {0x00009a40, 0x00000000, 0x00000000, 0x0000a2a8, 0x0000a2a8, 0x0000a2a8}, 2270 {0x00009a3c, 0x00000000, 0x00000000, 0x0000a2a4, 0x0000a2a4},
2258 {0x00009a44, 0x00000000, 0x00000000, 0x0000a2ac, 0x0000a2ac, 0x0000a2ac}, 2271 {0x00009a40, 0x00000000, 0x00000000, 0x0000a2a8, 0x0000a2a8},
2259 {0x00009a48, 0x00000000, 0x00000000, 0x0000a2b0, 0x0000a2b0, 0x0000a2b0}, 2272 {0x00009a44, 0x00000000, 0x00000000, 0x0000a2ac, 0x0000a2ac},
2260 {0x00009a4c, 0x00000000, 0x00000000, 0x0000a2b4, 0x0000a2b4, 0x0000a2b4}, 2273 {0x00009a48, 0x00000000, 0x00000000, 0x0000a2b0, 0x0000a2b0},
2261 {0x00009a50, 0x00000000, 0x00000000, 0x0000a2b8, 0x0000a2b8, 0x0000a2b8}, 2274 {0x00009a4c, 0x00000000, 0x00000000, 0x0000a2b4, 0x0000a2b4},
2262 {0x00009a54, 0x00000000, 0x00000000, 0x0000a2c4, 0x0000a2c4, 0x0000a2c4}, 2275 {0x00009a50, 0x00000000, 0x00000000, 0x0000a2b8, 0x0000a2b8},
2263 {0x00009a58, 0x00000000, 0x00000000, 0x0000a708, 0x0000a708, 0x0000a708}, 2276 {0x00009a54, 0x00000000, 0x00000000, 0x0000a2c4, 0x0000a2c4},
2264 {0x00009a5c, 0x00000000, 0x00000000, 0x0000a70c, 0x0000a70c, 0x0000a70c}, 2277 {0x00009a58, 0x00000000, 0x00000000, 0x0000a708, 0x0000a708},
2265 {0x00009a60, 0x00000000, 0x00000000, 0x0000a710, 0x0000a710, 0x0000a710}, 2278 {0x00009a5c, 0x00000000, 0x00000000, 0x0000a70c, 0x0000a70c},
2266 {0x00009a64, 0x00000000, 0x00000000, 0x0000ab04, 0x0000ab04, 0x0000ab04}, 2279 {0x00009a60, 0x00000000, 0x00000000, 0x0000a710, 0x0000a710},
2267 {0x00009a68, 0x00000000, 0x00000000, 0x0000ab08, 0x0000ab08, 0x0000ab08}, 2280 {0x00009a64, 0x00000000, 0x00000000, 0x0000ab04, 0x0000ab04},
2268 {0x00009a6c, 0x00000000, 0x00000000, 0x0000ab0c, 0x0000ab0c, 0x0000ab0c}, 2281 {0x00009a68, 0x00000000, 0x00000000, 0x0000ab08, 0x0000ab08},
2269 {0x00009a70, 0x00000000, 0x00000000, 0x0000ab10, 0x0000ab10, 0x0000ab10}, 2282 {0x00009a6c, 0x00000000, 0x00000000, 0x0000ab0c, 0x0000ab0c},
2270 {0x00009a74, 0x00000000, 0x00000000, 0x0000ab14, 0x0000ab14, 0x0000ab14}, 2283 {0x00009a70, 0x00000000, 0x00000000, 0x0000ab10, 0x0000ab10},
2271 {0x00009a78, 0x00000000, 0x00000000, 0x0000ab18, 0x0000ab18, 0x0000ab18}, 2284 {0x00009a74, 0x00000000, 0x00000000, 0x0000ab14, 0x0000ab14},
2272 {0x00009a7c, 0x00000000, 0x00000000, 0x0000ab8c, 0x0000ab8c, 0x0000ab8c}, 2285 {0x00009a78, 0x00000000, 0x00000000, 0x0000ab18, 0x0000ab18},
2273 {0x00009a80, 0x00000000, 0x00000000, 0x0000ab90, 0x0000ab90, 0x0000ab90}, 2286 {0x00009a7c, 0x00000000, 0x00000000, 0x0000ab8c, 0x0000ab8c},
2274 {0x00009a84, 0x00000000, 0x00000000, 0x0000ab94, 0x0000ab94, 0x0000ab94}, 2287 {0x00009a80, 0x00000000, 0x00000000, 0x0000ab90, 0x0000ab90},
2275 {0x00009a88, 0x00000000, 0x00000000, 0x0000ab98, 0x0000ab98, 0x0000ab98}, 2288 {0x00009a84, 0x00000000, 0x00000000, 0x0000ab94, 0x0000ab94},
2276 {0x00009a8c, 0x00000000, 0x00000000, 0x0000aba4, 0x0000aba4, 0x0000aba4}, 2289 {0x00009a88, 0x00000000, 0x00000000, 0x0000ab98, 0x0000ab98},
2277 {0x00009a90, 0x00000000, 0x00000000, 0x0000aba8, 0x0000aba8, 0x0000aba8}, 2290 {0x00009a8c, 0x00000000, 0x00000000, 0x0000aba4, 0x0000aba4},
2278 {0x00009a94, 0x00000000, 0x00000000, 0x0000cb04, 0x0000cb04, 0x0000cb04}, 2291 {0x00009a90, 0x00000000, 0x00000000, 0x0000aba8, 0x0000aba8},
2279 {0x00009a98, 0x00000000, 0x00000000, 0x0000cb08, 0x0000cb08, 0x0000cb08}, 2292 {0x00009a94, 0x00000000, 0x00000000, 0x0000cb04, 0x0000cb04},
2280 {0x00009a9c, 0x00000000, 0x00000000, 0x0000cb0c, 0x0000cb0c, 0x0000cb0c}, 2293 {0x00009a98, 0x00000000, 0x00000000, 0x0000cb08, 0x0000cb08},
2281 {0x00009aa0, 0x00000000, 0x00000000, 0x0000cb10, 0x0000cb10, 0x0000cb10}, 2294 {0x00009a9c, 0x00000000, 0x00000000, 0x0000cb0c, 0x0000cb0c},
2282 {0x00009aa4, 0x00000000, 0x00000000, 0x0000cb14, 0x0000cb14, 0x0000cb14}, 2295 {0x00009aa0, 0x00000000, 0x00000000, 0x0000cb10, 0x0000cb10},
2283 {0x00009aa8, 0x00000000, 0x00000000, 0x0000cb18, 0x0000cb18, 0x0000cb18}, 2296 {0x00009aa4, 0x00000000, 0x00000000, 0x0000cb14, 0x0000cb14},
2284 {0x00009aac, 0x00000000, 0x00000000, 0x0000cb8c, 0x0000cb8c, 0x0000cb8c}, 2297 {0x00009aa8, 0x00000000, 0x00000000, 0x0000cb18, 0x0000cb18},
2285 {0x00009ab0, 0x00000000, 0x00000000, 0x0000cb90, 0x0000cb90, 0x0000cb90}, 2298 {0x00009aac, 0x00000000, 0x00000000, 0x0000cb8c, 0x0000cb8c},
2286 {0x00009ab4, 0x00000000, 0x00000000, 0x0000cf18, 0x0000cf18, 0x0000cf18}, 2299 {0x00009ab0, 0x00000000, 0x00000000, 0x0000cb90, 0x0000cb90},
2287 {0x00009ab8, 0x00000000, 0x00000000, 0x0000cf24, 0x0000cf24, 0x0000cf24}, 2300 {0x00009ab4, 0x00000000, 0x00000000, 0x0000cf18, 0x0000cf18},
2288 {0x00009abc, 0x00000000, 0x00000000, 0x0000cf28, 0x0000cf28, 0x0000cf28}, 2301 {0x00009ab8, 0x00000000, 0x00000000, 0x0000cf24, 0x0000cf24},
2289 {0x00009ac0, 0x00000000, 0x00000000, 0x0000d314, 0x0000d314, 0x0000d314}, 2302 {0x00009abc, 0x00000000, 0x00000000, 0x0000cf28, 0x0000cf28},
2290 {0x00009ac4, 0x00000000, 0x00000000, 0x0000d318, 0x0000d318, 0x0000d318}, 2303 {0x00009ac0, 0x00000000, 0x00000000, 0x0000d314, 0x0000d314},
2291 {0x00009ac8, 0x00000000, 0x00000000, 0x0000d38c, 0x0000d38c, 0x0000d38c}, 2304 {0x00009ac4, 0x00000000, 0x00000000, 0x0000d318, 0x0000d318},
2292 {0x00009acc, 0x00000000, 0x00000000, 0x0000d390, 0x0000d390, 0x0000d390}, 2305 {0x00009ac8, 0x00000000, 0x00000000, 0x0000d38c, 0x0000d38c},
2293 {0x00009ad0, 0x00000000, 0x00000000, 0x0000d394, 0x0000d394, 0x0000d394}, 2306 {0x00009acc, 0x00000000, 0x00000000, 0x0000d390, 0x0000d390},
2294 {0x00009ad4, 0x00000000, 0x00000000, 0x0000d398, 0x0000d398, 0x0000d398}, 2307 {0x00009ad0, 0x00000000, 0x00000000, 0x0000d394, 0x0000d394},
2295 {0x00009ad8, 0x00000000, 0x00000000, 0x0000d3a4, 0x0000d3a4, 0x0000d3a4}, 2308 {0x00009ad4, 0x00000000, 0x00000000, 0x0000d398, 0x0000d398},
2296 {0x00009adc, 0x00000000, 0x00000000, 0x0000d3a8, 0x0000d3a8, 0x0000d3a8}, 2309 {0x00009ad8, 0x00000000, 0x00000000, 0x0000d3a4, 0x0000d3a4},
2297 {0x00009ae0, 0x00000000, 0x00000000, 0x0000d3ac, 0x0000d3ac, 0x0000d3ac}, 2310 {0x00009adc, 0x00000000, 0x00000000, 0x0000d3a8, 0x0000d3a8},
2298 {0x00009ae4, 0x00000000, 0x00000000, 0x0000d3b0, 0x0000d3b0, 0x0000d3b0}, 2311 {0x00009ae0, 0x00000000, 0x00000000, 0x0000d3ac, 0x0000d3ac},
2299 {0x00009ae8, 0x00000000, 0x00000000, 0x0000f380, 0x0000f380, 0x0000f380}, 2312 {0x00009ae4, 0x00000000, 0x00000000, 0x0000d3b0, 0x0000d3b0},
2300 {0x00009aec, 0x00000000, 0x00000000, 0x0000f384, 0x0000f384, 0x0000f384}, 2313 {0x00009ae8, 0x00000000, 0x00000000, 0x0000f380, 0x0000f380},
2301 {0x00009af0, 0x00000000, 0x00000000, 0x0000f388, 0x0000f388, 0x0000f388}, 2314 {0x00009aec, 0x00000000, 0x00000000, 0x0000f384, 0x0000f384},
2302 {0x00009af4, 0x00000000, 0x00000000, 0x0000f710, 0x0000f710, 0x0000f710}, 2315 {0x00009af0, 0x00000000, 0x00000000, 0x0000f388, 0x0000f388},
2303 {0x00009af8, 0x00000000, 0x00000000, 0x0000f714, 0x0000f714, 0x0000f714}, 2316 {0x00009af4, 0x00000000, 0x00000000, 0x0000f710, 0x0000f710},
2304 {0x00009afc, 0x00000000, 0x00000000, 0x0000f718, 0x0000f718, 0x0000f718}, 2317 {0x00009af8, 0x00000000, 0x00000000, 0x0000f714, 0x0000f714},
2305 {0x00009b00, 0x00000000, 0x00000000, 0x0000fb10, 0x0000fb10, 0x0000fb10}, 2318 {0x00009afc, 0x00000000, 0x00000000, 0x0000f718, 0x0000f718},
2306 {0x00009b04, 0x00000000, 0x00000000, 0x0000fb14, 0x0000fb14, 0x0000fb14}, 2319 {0x00009b00, 0x00000000, 0x00000000, 0x0000fb10, 0x0000fb10},
2307 {0x00009b08, 0x00000000, 0x00000000, 0x0000fb18, 0x0000fb18, 0x0000fb18}, 2320 {0x00009b04, 0x00000000, 0x00000000, 0x0000fb14, 0x0000fb14},
2308 {0x00009b0c, 0x00000000, 0x00000000, 0x0000fb8c, 0x0000fb8c, 0x0000fb8c}, 2321 {0x00009b08, 0x00000000, 0x00000000, 0x0000fb18, 0x0000fb18},
2309 {0x00009b10, 0x00000000, 0x00000000, 0x0000fb90, 0x0000fb90, 0x0000fb90}, 2322 {0x00009b0c, 0x00000000, 0x00000000, 0x0000fb8c, 0x0000fb8c},
2310 {0x00009b14, 0x00000000, 0x00000000, 0x0000fb94, 0x0000fb94, 0x0000fb94}, 2323 {0x00009b10, 0x00000000, 0x00000000, 0x0000fb90, 0x0000fb90},
2311 {0x00009b18, 0x00000000, 0x00000000, 0x0000ff8c, 0x0000ff8c, 0x0000ff8c}, 2324 {0x00009b14, 0x00000000, 0x00000000, 0x0000fb94, 0x0000fb94},
2312 {0x00009b1c, 0x00000000, 0x00000000, 0x0000ff90, 0x0000ff90, 0x0000ff90}, 2325 {0x00009b18, 0x00000000, 0x00000000, 0x0000ff8c, 0x0000ff8c},
2313 {0x00009b20, 0x00000000, 0x00000000, 0x0000ff94, 0x0000ff94, 0x0000ff94}, 2326 {0x00009b1c, 0x00000000, 0x00000000, 0x0000ff90, 0x0000ff90},
2314 {0x00009b24, 0x00000000, 0x00000000, 0x0000ffa0, 0x0000ffa0, 0x0000ffa0}, 2327 {0x00009b20, 0x00000000, 0x00000000, 0x0000ff94, 0x0000ff94},
2315 {0x00009b28, 0x00000000, 0x00000000, 0x0000ffa4, 0x0000ffa4, 0x0000ffa4}, 2328 {0x00009b24, 0x00000000, 0x00000000, 0x0000ffa0, 0x0000ffa0},
2316 {0x00009b2c, 0x00000000, 0x00000000, 0x0000ffa8, 0x0000ffa8, 0x0000ffa8}, 2329 {0x00009b28, 0x00000000, 0x00000000, 0x0000ffa4, 0x0000ffa4},
2317 {0x00009b30, 0x00000000, 0x00000000, 0x0000ffac, 0x0000ffac, 0x0000ffac}, 2330 {0x00009b2c, 0x00000000, 0x00000000, 0x0000ffa8, 0x0000ffa8},
2318 {0x00009b34, 0x00000000, 0x00000000, 0x0000ffb0, 0x0000ffb0, 0x0000ffb0}, 2331 {0x00009b30, 0x00000000, 0x00000000, 0x0000ffac, 0x0000ffac},
2319 {0x00009b38, 0x00000000, 0x00000000, 0x0000ffb4, 0x0000ffb4, 0x0000ffb4}, 2332 {0x00009b34, 0x00000000, 0x00000000, 0x0000ffb0, 0x0000ffb0},
2320 {0x00009b3c, 0x00000000, 0x00000000, 0x0000ffa1, 0x0000ffa1, 0x0000ffa1}, 2333 {0x00009b38, 0x00000000, 0x00000000, 0x0000ffb4, 0x0000ffb4},
2321 {0x00009b40, 0x00000000, 0x00000000, 0x0000ffa5, 0x0000ffa5, 0x0000ffa5}, 2334 {0x00009b3c, 0x00000000, 0x00000000, 0x0000ffa1, 0x0000ffa1},
2322 {0x00009b44, 0x00000000, 0x00000000, 0x0000ffa9, 0x0000ffa9, 0x0000ffa9}, 2335 {0x00009b40, 0x00000000, 0x00000000, 0x0000ffa5, 0x0000ffa5},
2323 {0x00009b48, 0x00000000, 0x00000000, 0x0000ffad, 0x0000ffad, 0x0000ffad}, 2336 {0x00009b44, 0x00000000, 0x00000000, 0x0000ffa9, 0x0000ffa9},
2324 {0x00009b4c, 0x00000000, 0x00000000, 0x0000ffb1, 0x0000ffb1, 0x0000ffb1}, 2337 {0x00009b48, 0x00000000, 0x00000000, 0x0000ffad, 0x0000ffad},
2325 {0x00009b50, 0x00000000, 0x00000000, 0x0000ffb5, 0x0000ffb5, 0x0000ffb5}, 2338 {0x00009b4c, 0x00000000, 0x00000000, 0x0000ffb1, 0x0000ffb1},
2326 {0x00009b54, 0x00000000, 0x00000000, 0x0000ffb9, 0x0000ffb9, 0x0000ffb9}, 2339 {0x00009b50, 0x00000000, 0x00000000, 0x0000ffb5, 0x0000ffb5},
2327 {0x00009b58, 0x00000000, 0x00000000, 0x0000ffc5, 0x0000ffc5, 0x0000ffc5}, 2340 {0x00009b54, 0x00000000, 0x00000000, 0x0000ffb9, 0x0000ffb9},
2328 {0x00009b5c, 0x00000000, 0x00000000, 0x0000ffc9, 0x0000ffc9, 0x0000ffc9}, 2341 {0x00009b58, 0x00000000, 0x00000000, 0x0000ffc5, 0x0000ffc5},
2329 {0x00009b60, 0x00000000, 0x00000000, 0x0000ffcd, 0x0000ffcd, 0x0000ffcd}, 2342 {0x00009b5c, 0x00000000, 0x00000000, 0x0000ffc9, 0x0000ffc9},
2330 {0x00009b64, 0x00000000, 0x00000000, 0x0000ffd1, 0x0000ffd1, 0x0000ffd1}, 2343 {0x00009b60, 0x00000000, 0x00000000, 0x0000ffcd, 0x0000ffcd},
2331 {0x00009b68, 0x00000000, 0x00000000, 0x0000ffd5, 0x0000ffd5, 0x0000ffd5}, 2344 {0x00009b64, 0x00000000, 0x00000000, 0x0000ffd1, 0x0000ffd1},
2332 {0x00009b6c, 0x00000000, 0x00000000, 0x0000ffc2, 0x0000ffc2, 0x0000ffc2}, 2345 {0x00009b68, 0x00000000, 0x00000000, 0x0000ffd5, 0x0000ffd5},
2333 {0x00009b70, 0x00000000, 0x00000000, 0x0000ffc6, 0x0000ffc6, 0x0000ffc6}, 2346 {0x00009b6c, 0x00000000, 0x00000000, 0x0000ffc2, 0x0000ffc2},
2334 {0x00009b74, 0x00000000, 0x00000000, 0x0000ffca, 0x0000ffca, 0x0000ffca}, 2347 {0x00009b70, 0x00000000, 0x00000000, 0x0000ffc6, 0x0000ffc6},
2335 {0x00009b78, 0x00000000, 0x00000000, 0x0000ffce, 0x0000ffce, 0x0000ffce}, 2348 {0x00009b74, 0x00000000, 0x00000000, 0x0000ffca, 0x0000ffca},
2336 {0x00009b7c, 0x00000000, 0x00000000, 0x0000ffd2, 0x0000ffd2, 0x0000ffd2}, 2349 {0x00009b78, 0x00000000, 0x00000000, 0x0000ffce, 0x0000ffce},
2337 {0x00009b80, 0x00000000, 0x00000000, 0x0000ffd6, 0x0000ffd6, 0x0000ffd6}, 2350 {0x00009b7c, 0x00000000, 0x00000000, 0x0000ffd2, 0x0000ffd2},
2338 {0x00009b84, 0x00000000, 0x00000000, 0x0000ffda, 0x0000ffda, 0x0000ffda}, 2351 {0x00009b80, 0x00000000, 0x00000000, 0x0000ffd6, 0x0000ffd6},
2339 {0x00009b88, 0x00000000, 0x00000000, 0x0000ffc7, 0x0000ffc7, 0x0000ffc7}, 2352 {0x00009b84, 0x00000000, 0x00000000, 0x0000ffda, 0x0000ffda},
2340 {0x00009b8c, 0x00000000, 0x00000000, 0x0000ffcb, 0x0000ffcb, 0x0000ffcb}, 2353 {0x00009b88, 0x00000000, 0x00000000, 0x0000ffc7, 0x0000ffc7},
2341 {0x00009b90, 0x00000000, 0x00000000, 0x0000ffcf, 0x0000ffcf, 0x0000ffcf}, 2354 {0x00009b8c, 0x00000000, 0x00000000, 0x0000ffcb, 0x0000ffcb},
2342 {0x00009b94, 0x00000000, 0x00000000, 0x0000ffd3, 0x0000ffd3, 0x0000ffd3}, 2355 {0x00009b90, 0x00000000, 0x00000000, 0x0000ffcf, 0x0000ffcf},
2343 {0x00009b98, 0x00000000, 0x00000000, 0x0000ffd7, 0x0000ffd7, 0x0000ffd7}, 2356 {0x00009b94, 0x00000000, 0x00000000, 0x0000ffd3, 0x0000ffd3},
2344 {0x00009b9c, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2357 {0x00009b98, 0x00000000, 0x00000000, 0x0000ffd7, 0x0000ffd7},
2345 {0x00009ba0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2358 {0x00009b9c, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2346 {0x00009ba4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2359 {0x00009ba0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2347 {0x00009ba8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2360 {0x00009ba4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2348 {0x00009bac, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2361 {0x00009ba8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2349 {0x00009bb0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2362 {0x00009bac, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2350 {0x00009bb4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2363 {0x00009bb0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2351 {0x00009bb8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2364 {0x00009bb4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2352 {0x00009bbc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2365 {0x00009bb8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2353 {0x00009bc0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2366 {0x00009bbc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2354 {0x00009bc4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2367 {0x00009bc0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2355 {0x00009bc8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2368 {0x00009bc4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2356 {0x00009bcc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2369 {0x00009bc8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2357 {0x00009bd0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2370 {0x00009bcc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2358 {0x00009bd4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2371 {0x00009bd0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2359 {0x00009bd8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2372 {0x00009bd4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2360 {0x00009bdc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2373 {0x00009bd8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2361 {0x00009be0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2374 {0x00009bdc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2362 {0x00009be4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2375 {0x00009be0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2363 {0x00009be8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2376 {0x00009be4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2364 {0x00009bec, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2377 {0x00009be8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2365 {0x00009bf0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2378 {0x00009bec, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2366 {0x00009bf4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2379 {0x00009bf0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2367 {0x00009bf8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2380 {0x00009bf4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2368 {0x00009bfc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2381 {0x00009bf8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2369 {0x0000aa00, 0x00000000, 0x00000000, 0x0000a120, 0x0000a120, 0x0000a120}, 2382 {0x00009bfc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2370 {0x0000aa04, 0x00000000, 0x00000000, 0x0000a124, 0x0000a124, 0x0000a124}, 2383 {0x0000aa00, 0x00000000, 0x00000000, 0x0000a120, 0x0000a120},
2371 {0x0000aa08, 0x00000000, 0x00000000, 0x0000a128, 0x0000a128, 0x0000a128}, 2384 {0x0000aa04, 0x00000000, 0x00000000, 0x0000a124, 0x0000a124},
2372 {0x0000aa0c, 0x00000000, 0x00000000, 0x0000a12c, 0x0000a12c, 0x0000a12c}, 2385 {0x0000aa08, 0x00000000, 0x00000000, 0x0000a128, 0x0000a128},
2373 {0x0000aa10, 0x00000000, 0x00000000, 0x0000a130, 0x0000a130, 0x0000a130}, 2386 {0x0000aa0c, 0x00000000, 0x00000000, 0x0000a12c, 0x0000a12c},
2374 {0x0000aa14, 0x00000000, 0x00000000, 0x0000a194, 0x0000a194, 0x0000a194}, 2387 {0x0000aa10, 0x00000000, 0x00000000, 0x0000a130, 0x0000a130},
2375 {0x0000aa18, 0x00000000, 0x00000000, 0x0000a198, 0x0000a198, 0x0000a198}, 2388 {0x0000aa14, 0x00000000, 0x00000000, 0x0000a194, 0x0000a194},
2376 {0x0000aa1c, 0x00000000, 0x00000000, 0x0000a20c, 0x0000a20c, 0x0000a20c}, 2389 {0x0000aa18, 0x00000000, 0x00000000, 0x0000a198, 0x0000a198},
2377 {0x0000aa20, 0x00000000, 0x00000000, 0x0000a210, 0x0000a210, 0x0000a210}, 2390 {0x0000aa1c, 0x00000000, 0x00000000, 0x0000a20c, 0x0000a20c},
2378 {0x0000aa24, 0x00000000, 0x00000000, 0x0000a284, 0x0000a284, 0x0000a284}, 2391 {0x0000aa20, 0x00000000, 0x00000000, 0x0000a210, 0x0000a210},
2379 {0x0000aa28, 0x00000000, 0x00000000, 0x0000a288, 0x0000a288, 0x0000a288}, 2392 {0x0000aa24, 0x00000000, 0x00000000, 0x0000a284, 0x0000a284},
2380 {0x0000aa2c, 0x00000000, 0x00000000, 0x0000a28c, 0x0000a28c, 0x0000a28c}, 2393 {0x0000aa28, 0x00000000, 0x00000000, 0x0000a288, 0x0000a288},
2381 {0x0000aa30, 0x00000000, 0x00000000, 0x0000a290, 0x0000a290, 0x0000a290}, 2394 {0x0000aa2c, 0x00000000, 0x00000000, 0x0000a28c, 0x0000a28c},
2382 {0x0000aa34, 0x00000000, 0x00000000, 0x0000a294, 0x0000a294, 0x0000a294}, 2395 {0x0000aa30, 0x00000000, 0x00000000, 0x0000a290, 0x0000a290},
2383 {0x0000aa38, 0x00000000, 0x00000000, 0x0000a2a0, 0x0000a2a0, 0x0000a2a0}, 2396 {0x0000aa34, 0x00000000, 0x00000000, 0x0000a294, 0x0000a294},
2384 {0x0000aa3c, 0x00000000, 0x00000000, 0x0000a2a4, 0x0000a2a4, 0x0000a2a4}, 2397 {0x0000aa38, 0x00000000, 0x00000000, 0x0000a2a0, 0x0000a2a0},
2385 {0x0000aa40, 0x00000000, 0x00000000, 0x0000a2a8, 0x0000a2a8, 0x0000a2a8}, 2398 {0x0000aa3c, 0x00000000, 0x00000000, 0x0000a2a4, 0x0000a2a4},
2386 {0x0000aa44, 0x00000000, 0x00000000, 0x0000a2ac, 0x0000a2ac, 0x0000a2ac}, 2399 {0x0000aa40, 0x00000000, 0x00000000, 0x0000a2a8, 0x0000a2a8},
2387 {0x0000aa48, 0x00000000, 0x00000000, 0x0000a2b0, 0x0000a2b0, 0x0000a2b0}, 2400 {0x0000aa44, 0x00000000, 0x00000000, 0x0000a2ac, 0x0000a2ac},
2388 {0x0000aa4c, 0x00000000, 0x00000000, 0x0000a2b4, 0x0000a2b4, 0x0000a2b4}, 2401 {0x0000aa48, 0x00000000, 0x00000000, 0x0000a2b0, 0x0000a2b0},
2389 {0x0000aa50, 0x00000000, 0x00000000, 0x0000a2b8, 0x0000a2b8, 0x0000a2b8}, 2402 {0x0000aa4c, 0x00000000, 0x00000000, 0x0000a2b4, 0x0000a2b4},
2390 {0x0000aa54, 0x00000000, 0x00000000, 0x0000a2c4, 0x0000a2c4, 0x0000a2c4}, 2403 {0x0000aa50, 0x00000000, 0x00000000, 0x0000a2b8, 0x0000a2b8},
2391 {0x0000aa58, 0x00000000, 0x00000000, 0x0000a708, 0x0000a708, 0x0000a708}, 2404 {0x0000aa54, 0x00000000, 0x00000000, 0x0000a2c4, 0x0000a2c4},
2392 {0x0000aa5c, 0x00000000, 0x00000000, 0x0000a70c, 0x0000a70c, 0x0000a70c}, 2405 {0x0000aa58, 0x00000000, 0x00000000, 0x0000a708, 0x0000a708},
2393 {0x0000aa60, 0x00000000, 0x00000000, 0x0000a710, 0x0000a710, 0x0000a710}, 2406 {0x0000aa5c, 0x00000000, 0x00000000, 0x0000a70c, 0x0000a70c},
2394 {0x0000aa64, 0x00000000, 0x00000000, 0x0000ab04, 0x0000ab04, 0x0000ab04}, 2407 {0x0000aa60, 0x00000000, 0x00000000, 0x0000a710, 0x0000a710},
2395 {0x0000aa68, 0x00000000, 0x00000000, 0x0000ab08, 0x0000ab08, 0x0000ab08}, 2408 {0x0000aa64, 0x00000000, 0x00000000, 0x0000ab04, 0x0000ab04},
2396 {0x0000aa6c, 0x00000000, 0x00000000, 0x0000ab0c, 0x0000ab0c, 0x0000ab0c}, 2409 {0x0000aa68, 0x00000000, 0x00000000, 0x0000ab08, 0x0000ab08},
2397 {0x0000aa70, 0x00000000, 0x00000000, 0x0000ab10, 0x0000ab10, 0x0000ab10}, 2410 {0x0000aa6c, 0x00000000, 0x00000000, 0x0000ab0c, 0x0000ab0c},
2398 {0x0000aa74, 0x00000000, 0x00000000, 0x0000ab14, 0x0000ab14, 0x0000ab14}, 2411 {0x0000aa70, 0x00000000, 0x00000000, 0x0000ab10, 0x0000ab10},
2399 {0x0000aa78, 0x00000000, 0x00000000, 0x0000ab18, 0x0000ab18, 0x0000ab18}, 2412 {0x0000aa74, 0x00000000, 0x00000000, 0x0000ab14, 0x0000ab14},
2400 {0x0000aa7c, 0x00000000, 0x00000000, 0x0000ab8c, 0x0000ab8c, 0x0000ab8c}, 2413 {0x0000aa78, 0x00000000, 0x00000000, 0x0000ab18, 0x0000ab18},
2401 {0x0000aa80, 0x00000000, 0x00000000, 0x0000ab90, 0x0000ab90, 0x0000ab90}, 2414 {0x0000aa7c, 0x00000000, 0x00000000, 0x0000ab8c, 0x0000ab8c},
2402 {0x0000aa84, 0x00000000, 0x00000000, 0x0000ab94, 0x0000ab94, 0x0000ab94}, 2415 {0x0000aa80, 0x00000000, 0x00000000, 0x0000ab90, 0x0000ab90},
2403 {0x0000aa88, 0x00000000, 0x00000000, 0x0000ab98, 0x0000ab98, 0x0000ab98}, 2416 {0x0000aa84, 0x00000000, 0x00000000, 0x0000ab94, 0x0000ab94},
2404 {0x0000aa8c, 0x00000000, 0x00000000, 0x0000aba4, 0x0000aba4, 0x0000aba4}, 2417 {0x0000aa88, 0x00000000, 0x00000000, 0x0000ab98, 0x0000ab98},
2405 {0x0000aa90, 0x00000000, 0x00000000, 0x0000aba8, 0x0000aba8, 0x0000aba8}, 2418 {0x0000aa8c, 0x00000000, 0x00000000, 0x0000aba4, 0x0000aba4},
2406 {0x0000aa94, 0x00000000, 0x00000000, 0x0000cb04, 0x0000cb04, 0x0000cb04}, 2419 {0x0000aa90, 0x00000000, 0x00000000, 0x0000aba8, 0x0000aba8},
2407 {0x0000aa98, 0x00000000, 0x00000000, 0x0000cb08, 0x0000cb08, 0x0000cb08}, 2420 {0x0000aa94, 0x00000000, 0x00000000, 0x0000cb04, 0x0000cb04},
2408 {0x0000aa9c, 0x00000000, 0x00000000, 0x0000cb0c, 0x0000cb0c, 0x0000cb0c}, 2421 {0x0000aa98, 0x00000000, 0x00000000, 0x0000cb08, 0x0000cb08},
2409 {0x0000aaa0, 0x00000000, 0x00000000, 0x0000cb10, 0x0000cb10, 0x0000cb10}, 2422 {0x0000aa9c, 0x00000000, 0x00000000, 0x0000cb0c, 0x0000cb0c},
2410 {0x0000aaa4, 0x00000000, 0x00000000, 0x0000cb14, 0x0000cb14, 0x0000cb14}, 2423 {0x0000aaa0, 0x00000000, 0x00000000, 0x0000cb10, 0x0000cb10},
2411 {0x0000aaa8, 0x00000000, 0x00000000, 0x0000cb18, 0x0000cb18, 0x0000cb18}, 2424 {0x0000aaa4, 0x00000000, 0x00000000, 0x0000cb14, 0x0000cb14},
2412 {0x0000aaac, 0x00000000, 0x00000000, 0x0000cb8c, 0x0000cb8c, 0x0000cb8c}, 2425 {0x0000aaa8, 0x00000000, 0x00000000, 0x0000cb18, 0x0000cb18},
2413 {0x0000aab0, 0x00000000, 0x00000000, 0x0000cb90, 0x0000cb90, 0x0000cb90}, 2426 {0x0000aaac, 0x00000000, 0x00000000, 0x0000cb8c, 0x0000cb8c},
2414 {0x0000aab4, 0x00000000, 0x00000000, 0x0000cf18, 0x0000cf18, 0x0000cf18}, 2427 {0x0000aab0, 0x00000000, 0x00000000, 0x0000cb90, 0x0000cb90},
2415 {0x0000aab8, 0x00000000, 0x00000000, 0x0000cf24, 0x0000cf24, 0x0000cf24}, 2428 {0x0000aab4, 0x00000000, 0x00000000, 0x0000cf18, 0x0000cf18},
2416 {0x0000aabc, 0x00000000, 0x00000000, 0x0000cf28, 0x0000cf28, 0x0000cf28}, 2429 {0x0000aab8, 0x00000000, 0x00000000, 0x0000cf24, 0x0000cf24},
2417 {0x0000aac0, 0x00000000, 0x00000000, 0x0000d314, 0x0000d314, 0x0000d314}, 2430 {0x0000aabc, 0x00000000, 0x00000000, 0x0000cf28, 0x0000cf28},
2418 {0x0000aac4, 0x00000000, 0x00000000, 0x0000d318, 0x0000d318, 0x0000d318}, 2431 {0x0000aac0, 0x00000000, 0x00000000, 0x0000d314, 0x0000d314},
2419 {0x0000aac8, 0x00000000, 0x00000000, 0x0000d38c, 0x0000d38c, 0x0000d38c}, 2432 {0x0000aac4, 0x00000000, 0x00000000, 0x0000d318, 0x0000d318},
2420 {0x0000aacc, 0x00000000, 0x00000000, 0x0000d390, 0x0000d390, 0x0000d390}, 2433 {0x0000aac8, 0x00000000, 0x00000000, 0x0000d38c, 0x0000d38c},
2421 {0x0000aad0, 0x00000000, 0x00000000, 0x0000d394, 0x0000d394, 0x0000d394}, 2434 {0x0000aacc, 0x00000000, 0x00000000, 0x0000d390, 0x0000d390},
2422 {0x0000aad4, 0x00000000, 0x00000000, 0x0000d398, 0x0000d398, 0x0000d398}, 2435 {0x0000aad0, 0x00000000, 0x00000000, 0x0000d394, 0x0000d394},
2423 {0x0000aad8, 0x00000000, 0x00000000, 0x0000d3a4, 0x0000d3a4, 0x0000d3a4}, 2436 {0x0000aad4, 0x00000000, 0x00000000, 0x0000d398, 0x0000d398},
2424 {0x0000aadc, 0x00000000, 0x00000000, 0x0000d3a8, 0x0000d3a8, 0x0000d3a8}, 2437 {0x0000aad8, 0x00000000, 0x00000000, 0x0000d3a4, 0x0000d3a4},
2425 {0x0000aae0, 0x00000000, 0x00000000, 0x0000d3ac, 0x0000d3ac, 0x0000d3ac}, 2438 {0x0000aadc, 0x00000000, 0x00000000, 0x0000d3a8, 0x0000d3a8},
2426 {0x0000aae4, 0x00000000, 0x00000000, 0x0000d3b0, 0x0000d3b0, 0x0000d3b0}, 2439 {0x0000aae0, 0x00000000, 0x00000000, 0x0000d3ac, 0x0000d3ac},
2427 {0x0000aae8, 0x00000000, 0x00000000, 0x0000f380, 0x0000f380, 0x0000f380}, 2440 {0x0000aae4, 0x00000000, 0x00000000, 0x0000d3b0, 0x0000d3b0},
2428 {0x0000aaec, 0x00000000, 0x00000000, 0x0000f384, 0x0000f384, 0x0000f384}, 2441 {0x0000aae8, 0x00000000, 0x00000000, 0x0000f380, 0x0000f380},
2429 {0x0000aaf0, 0x00000000, 0x00000000, 0x0000f388, 0x0000f388, 0x0000f388}, 2442 {0x0000aaec, 0x00000000, 0x00000000, 0x0000f384, 0x0000f384},
2430 {0x0000aaf4, 0x00000000, 0x00000000, 0x0000f710, 0x0000f710, 0x0000f710}, 2443 {0x0000aaf0, 0x00000000, 0x00000000, 0x0000f388, 0x0000f388},
2431 {0x0000aaf8, 0x00000000, 0x00000000, 0x0000f714, 0x0000f714, 0x0000f714}, 2444 {0x0000aaf4, 0x00000000, 0x00000000, 0x0000f710, 0x0000f710},
2432 {0x0000aafc, 0x00000000, 0x00000000, 0x0000f718, 0x0000f718, 0x0000f718}, 2445 {0x0000aaf8, 0x00000000, 0x00000000, 0x0000f714, 0x0000f714},
2433 {0x0000ab00, 0x00000000, 0x00000000, 0x0000fb10, 0x0000fb10, 0x0000fb10}, 2446 {0x0000aafc, 0x00000000, 0x00000000, 0x0000f718, 0x0000f718},
2434 {0x0000ab04, 0x00000000, 0x00000000, 0x0000fb14, 0x0000fb14, 0x0000fb14}, 2447 {0x0000ab00, 0x00000000, 0x00000000, 0x0000fb10, 0x0000fb10},
2435 {0x0000ab08, 0x00000000, 0x00000000, 0x0000fb18, 0x0000fb18, 0x0000fb18}, 2448 {0x0000ab04, 0x00000000, 0x00000000, 0x0000fb14, 0x0000fb14},
2436 {0x0000ab0c, 0x00000000, 0x00000000, 0x0000fb8c, 0x0000fb8c, 0x0000fb8c}, 2449 {0x0000ab08, 0x00000000, 0x00000000, 0x0000fb18, 0x0000fb18},
2437 {0x0000ab10, 0x00000000, 0x00000000, 0x0000fb90, 0x0000fb90, 0x0000fb90}, 2450 {0x0000ab0c, 0x00000000, 0x00000000, 0x0000fb8c, 0x0000fb8c},
2438 {0x0000ab14, 0x00000000, 0x00000000, 0x0000fb94, 0x0000fb94, 0x0000fb94}, 2451 {0x0000ab10, 0x00000000, 0x00000000, 0x0000fb90, 0x0000fb90},
2439 {0x0000ab18, 0x00000000, 0x00000000, 0x0000ff8c, 0x0000ff8c, 0x0000ff8c}, 2452 {0x0000ab14, 0x00000000, 0x00000000, 0x0000fb94, 0x0000fb94},
2440 {0x0000ab1c, 0x00000000, 0x00000000, 0x0000ff90, 0x0000ff90, 0x0000ff90}, 2453 {0x0000ab18, 0x00000000, 0x00000000, 0x0000ff8c, 0x0000ff8c},
2441 {0x0000ab20, 0x00000000, 0x00000000, 0x0000ff94, 0x0000ff94, 0x0000ff94}, 2454 {0x0000ab1c, 0x00000000, 0x00000000, 0x0000ff90, 0x0000ff90},
2442 {0x0000ab24, 0x00000000, 0x00000000, 0x0000ffa0, 0x0000ffa0, 0x0000ffa0}, 2455 {0x0000ab20, 0x00000000, 0x00000000, 0x0000ff94, 0x0000ff94},
2443 {0x0000ab28, 0x00000000, 0x00000000, 0x0000ffa4, 0x0000ffa4, 0x0000ffa4}, 2456 {0x0000ab24, 0x00000000, 0x00000000, 0x0000ffa0, 0x0000ffa0},
2444 {0x0000ab2c, 0x00000000, 0x00000000, 0x0000ffa8, 0x0000ffa8, 0x0000ffa8}, 2457 {0x0000ab28, 0x00000000, 0x00000000, 0x0000ffa4, 0x0000ffa4},
2445 {0x0000ab30, 0x00000000, 0x00000000, 0x0000ffac, 0x0000ffac, 0x0000ffac}, 2458 {0x0000ab2c, 0x00000000, 0x00000000, 0x0000ffa8, 0x0000ffa8},
2446 {0x0000ab34, 0x00000000, 0x00000000, 0x0000ffb0, 0x0000ffb0, 0x0000ffb0}, 2459 {0x0000ab30, 0x00000000, 0x00000000, 0x0000ffac, 0x0000ffac},
2447 {0x0000ab38, 0x00000000, 0x00000000, 0x0000ffb4, 0x0000ffb4, 0x0000ffb4}, 2460 {0x0000ab34, 0x00000000, 0x00000000, 0x0000ffb0, 0x0000ffb0},
2448 {0x0000ab3c, 0x00000000, 0x00000000, 0x0000ffa1, 0x0000ffa1, 0x0000ffa1}, 2461 {0x0000ab38, 0x00000000, 0x00000000, 0x0000ffb4, 0x0000ffb4},
2449 {0x0000ab40, 0x00000000, 0x00000000, 0x0000ffa5, 0x0000ffa5, 0x0000ffa5}, 2462 {0x0000ab3c, 0x00000000, 0x00000000, 0x0000ffa1, 0x0000ffa1},
2450 {0x0000ab44, 0x00000000, 0x00000000, 0x0000ffa9, 0x0000ffa9, 0x0000ffa9}, 2463 {0x0000ab40, 0x00000000, 0x00000000, 0x0000ffa5, 0x0000ffa5},
2451 {0x0000ab48, 0x00000000, 0x00000000, 0x0000ffad, 0x0000ffad, 0x0000ffad}, 2464 {0x0000ab44, 0x00000000, 0x00000000, 0x0000ffa9, 0x0000ffa9},
2452 {0x0000ab4c, 0x00000000, 0x00000000, 0x0000ffb1, 0x0000ffb1, 0x0000ffb1}, 2465 {0x0000ab48, 0x00000000, 0x00000000, 0x0000ffad, 0x0000ffad},
2453 {0x0000ab50, 0x00000000, 0x00000000, 0x0000ffb5, 0x0000ffb5, 0x0000ffb5}, 2466 {0x0000ab4c, 0x00000000, 0x00000000, 0x0000ffb1, 0x0000ffb1},
2454 {0x0000ab54, 0x00000000, 0x00000000, 0x0000ffb9, 0x0000ffb9, 0x0000ffb9}, 2467 {0x0000ab50, 0x00000000, 0x00000000, 0x0000ffb5, 0x0000ffb5},
2455 {0x0000ab58, 0x00000000, 0x00000000, 0x0000ffc5, 0x0000ffc5, 0x0000ffc5}, 2468 {0x0000ab54, 0x00000000, 0x00000000, 0x0000ffb9, 0x0000ffb9},
2456 {0x0000ab5c, 0x00000000, 0x00000000, 0x0000ffc9, 0x0000ffc9, 0x0000ffc9}, 2469 {0x0000ab58, 0x00000000, 0x00000000, 0x0000ffc5, 0x0000ffc5},
2457 {0x0000ab60, 0x00000000, 0x00000000, 0x0000ffcd, 0x0000ffcd, 0x0000ffcd}, 2470 {0x0000ab5c, 0x00000000, 0x00000000, 0x0000ffc9, 0x0000ffc9},
2458 {0x0000ab64, 0x00000000, 0x00000000, 0x0000ffd1, 0x0000ffd1, 0x0000ffd1}, 2471 {0x0000ab60, 0x00000000, 0x00000000, 0x0000ffcd, 0x0000ffcd},
2459 {0x0000ab68, 0x00000000, 0x00000000, 0x0000ffd5, 0x0000ffd5, 0x0000ffd5}, 2472 {0x0000ab64, 0x00000000, 0x00000000, 0x0000ffd1, 0x0000ffd1},
2460 {0x0000ab6c, 0x00000000, 0x00000000, 0x0000ffc2, 0x0000ffc2, 0x0000ffc2}, 2473 {0x0000ab68, 0x00000000, 0x00000000, 0x0000ffd5, 0x0000ffd5},
2461 {0x0000ab70, 0x00000000, 0x00000000, 0x0000ffc6, 0x0000ffc6, 0x0000ffc6}, 2474 {0x0000ab6c, 0x00000000, 0x00000000, 0x0000ffc2, 0x0000ffc2},
2462 {0x0000ab74, 0x00000000, 0x00000000, 0x0000ffca, 0x0000ffca, 0x0000ffca}, 2475 {0x0000ab70, 0x00000000, 0x00000000, 0x0000ffc6, 0x0000ffc6},
2463 {0x0000ab78, 0x00000000, 0x00000000, 0x0000ffce, 0x0000ffce, 0x0000ffce}, 2476 {0x0000ab74, 0x00000000, 0x00000000, 0x0000ffca, 0x0000ffca},
2464 {0x0000ab7c, 0x00000000, 0x00000000, 0x0000ffd2, 0x0000ffd2, 0x0000ffd2}, 2477 {0x0000ab78, 0x00000000, 0x00000000, 0x0000ffce, 0x0000ffce},
2465 {0x0000ab80, 0x00000000, 0x00000000, 0x0000ffd6, 0x0000ffd6, 0x0000ffd6}, 2478 {0x0000ab7c, 0x00000000, 0x00000000, 0x0000ffd2, 0x0000ffd2},
2466 {0x0000ab84, 0x00000000, 0x00000000, 0x0000ffda, 0x0000ffda, 0x0000ffda}, 2479 {0x0000ab80, 0x00000000, 0x00000000, 0x0000ffd6, 0x0000ffd6},
2467 {0x0000ab88, 0x00000000, 0x00000000, 0x0000ffc7, 0x0000ffc7, 0x0000ffc7}, 2480 {0x0000ab84, 0x00000000, 0x00000000, 0x0000ffda, 0x0000ffda},
2468 {0x0000ab8c, 0x00000000, 0x00000000, 0x0000ffcb, 0x0000ffcb, 0x0000ffcb}, 2481 {0x0000ab88, 0x00000000, 0x00000000, 0x0000ffc7, 0x0000ffc7},
2469 {0x0000ab90, 0x00000000, 0x00000000, 0x0000ffcf, 0x0000ffcf, 0x0000ffcf}, 2482 {0x0000ab8c, 0x00000000, 0x00000000, 0x0000ffcb, 0x0000ffcb},
2470 {0x0000ab94, 0x00000000, 0x00000000, 0x0000ffd3, 0x0000ffd3, 0x0000ffd3}, 2483 {0x0000ab90, 0x00000000, 0x00000000, 0x0000ffcf, 0x0000ffcf},
2471 {0x0000ab98, 0x00000000, 0x00000000, 0x0000ffd7, 0x0000ffd7, 0x0000ffd7}, 2484 {0x0000ab94, 0x00000000, 0x00000000, 0x0000ffd3, 0x0000ffd3},
2472 {0x0000ab9c, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2485 {0x0000ab98, 0x00000000, 0x00000000, 0x0000ffd7, 0x0000ffd7},
2473 {0x0000aba0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2486 {0x0000ab9c, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2474 {0x0000aba4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2487 {0x0000aba0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2475 {0x0000aba8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2488 {0x0000aba4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2476 {0x0000abac, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2489 {0x0000aba8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2477 {0x0000abb0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2490 {0x0000abac, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2478 {0x0000abb4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2491 {0x0000abb0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2479 {0x0000abb8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2492 {0x0000abb4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2480 {0x0000abbc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2493 {0x0000abb8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2481 {0x0000abc0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2494 {0x0000abbc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2482 {0x0000abc4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2495 {0x0000abc0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2483 {0x0000abc8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2496 {0x0000abc4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2484 {0x0000abcc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2497 {0x0000abc8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2485 {0x0000abd0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2498 {0x0000abcc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2486 {0x0000abd4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2499 {0x0000abd0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2487 {0x0000abd8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2500 {0x0000abd4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2488 {0x0000abdc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2501 {0x0000abd8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2489 {0x0000abe0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2502 {0x0000abdc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2490 {0x0000abe4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2503 {0x0000abe0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2491 {0x0000abe8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2504 {0x0000abe4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2492 {0x0000abec, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2505 {0x0000abe8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2493 {0x0000abf0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2506 {0x0000abec, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2494 {0x0000abf4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2507 {0x0000abf0, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2495 {0x0000abf8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2508 {0x0000abf4, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2496 {0x0000abfc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb, 0x0000ffdb}, 2509 {0x0000abf8, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2497 {0x00009848, 0x00000000, 0x00000000, 0x00001067, 0x00001067, 0x00001067}, 2510 {0x0000abfc, 0x00000000, 0x00000000, 0x0000ffdb, 0x0000ffdb},
2498 {0x0000a848, 0x00000000, 0x00000000, 0x00001067, 0x00001067, 0x00001067}, 2511 {0x00009848, 0x00000000, 0x00000000, 0x00001067, 0x00001067},
2512 {0x0000a848, 0x00000000, 0x00000000, 0x00001067, 0x00001067},
2499}; 2513};
2500 2514
2501static const u32 ar9287PciePhy_clkreq_always_on_L1_9287_1_1[][2] = { 2515static const u32 ar9287PciePhy_clkreq_always_on_L1_9287_1_1[][2] = {
@@ -2526,310 +2540,311 @@ static const u32 ar9287PciePhy_clkreq_off_L1_9287_1_1[][2] = {
2526 {0x00004044, 0x00000000}, 2540 {0x00004044, 0x00000000},
2527}; 2541};
2528 2542
2529static const u32 ar9271Modes_9271[][6] = { 2543static const u32 ar9271Modes_9271[][5] = {
2530 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0}, 2544 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
2531 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0}, 2545 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
2532 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180}, 2546 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
2533 {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008}, 2547 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
2534 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0}, 2548 {0x000010f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
2535 {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b, 0x0988004f}, 2549 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
2536 {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880}, 2550 {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
2537 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303}, 2551 {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
2538 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200}, 2552 {0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300},
2539 {0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e}, 2553 {0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
2540 {0x00009828, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001}, 2554 {0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
2541 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e}, 2555 {0x00009828, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001},
2542 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007}, 2556 {0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
2543 {0x00009840, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e}, 2557 {0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007},
2544 {0x00009844, 0x0372161e, 0x0372161e, 0x03721620, 0x03721620, 0x037216a0}, 2558 {0x00009840, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e},
2545 {0x00009848, 0x00001066, 0x00001066, 0x00001053, 0x00001053, 0x00001059}, 2559 {0x00009844, 0x0372161e, 0x0372161e, 0x03721620, 0x03721620},
2546 {0x0000a848, 0x00001066, 0x00001066, 0x00001053, 0x00001053, 0x00001059}, 2560 {0x00009848, 0x00001066, 0x00001066, 0x00001053, 0x00001053},
2547 {0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2}, 2561 {0x0000a848, 0x00001066, 0x00001066, 0x00001053, 0x00001053},
2548 {0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e}, 2562 {0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2},
2549 {0x0000985c, 0x3139605e, 0x3139605e, 0x3137605e, 0x3137605e, 0x3139605e}, 2563 {0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e},
2550 {0x00009860, 0x00058d18, 0x00058d18, 0x00058d18, 0x00058d18, 0x00058d18}, 2564 {0x0000985c, 0x3139605e, 0x3139605e, 0x3137605e, 0x3137605e},
2551 {0x00009864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00, 0x0001ce00}, 2565 {0x00009860, 0x00058d18, 0x00058d18, 0x00058d18, 0x00058d18},
2552 {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, 2566 {0x00009864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00},
2553 {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881}, 2567 {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
2554 {0x00009910, 0x30002310, 0x30002310, 0x30002310, 0x30002310, 0x30002310}, 2568 {0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
2555 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0}, 2569 {0x00009910, 0x30002310, 0x30002310, 0x30002310, 0x30002310},
2556 {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016}, 2570 {0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
2557 {0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d, 0xd00a800d}, 2571 {0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
2558 {0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1020, 0xffbc1020, 0xffbc1010}, 2572 {0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d},
2559 {0x00009960, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 2573 {0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1020, 0xffbc1020},
2560 {0x00009964, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 2574 {0x00009960, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
2561 {0x000099b8, 0x0000421c, 0x0000421c, 0x0000421c, 0x0000421c, 0x0000421c}, 2575 {0x00009964, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
2562 {0x000099bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00, 0x00000c00}, 2576 {0x000099b8, 0x0000421c, 0x0000421c, 0x0000421c, 0x0000421c},
2563 {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, 2577 {0x000099bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00},
2564 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77}, 2578 {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
2565 {0x000099c8, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f}, 2579 {0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77},
2566 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8}, 2580 {0x000099c8, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f},
2567 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384}, 2581 {0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8},
2568 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 2582 {0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384},
2569 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 2583 {0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
2570 {0x00009a00, 0x00000000, 0x00000000, 0x00058084, 0x00058084, 0x00000000}, 2584 {0x000099d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
2571 {0x00009a04, 0x00000000, 0x00000000, 0x00058088, 0x00058088, 0x00000000}, 2585 {0x00009a00, 0x00000000, 0x00000000, 0x00058084, 0x00058084},
2572 {0x00009a08, 0x00000000, 0x00000000, 0x0005808c, 0x0005808c, 0x00000000}, 2586 {0x00009a04, 0x00000000, 0x00000000, 0x00058088, 0x00058088},
2573 {0x00009a0c, 0x00000000, 0x00000000, 0x00058100, 0x00058100, 0x00000000}, 2587 {0x00009a08, 0x00000000, 0x00000000, 0x0005808c, 0x0005808c},
2574 {0x00009a10, 0x00000000, 0x00000000, 0x00058104, 0x00058104, 0x00000000}, 2588 {0x00009a0c, 0x00000000, 0x00000000, 0x00058100, 0x00058100},
2575 {0x00009a14, 0x00000000, 0x00000000, 0x00058108, 0x00058108, 0x00000000}, 2589 {0x00009a10, 0x00000000, 0x00000000, 0x00058104, 0x00058104},
2576 {0x00009a18, 0x00000000, 0x00000000, 0x0005810c, 0x0005810c, 0x00000000}, 2590 {0x00009a14, 0x00000000, 0x00000000, 0x00058108, 0x00058108},
2577 {0x00009a1c, 0x00000000, 0x00000000, 0x00058110, 0x00058110, 0x00000000}, 2591 {0x00009a18, 0x00000000, 0x00000000, 0x0005810c, 0x0005810c},
2578 {0x00009a20, 0x00000000, 0x00000000, 0x00058114, 0x00058114, 0x00000000}, 2592 {0x00009a1c, 0x00000000, 0x00000000, 0x00058110, 0x00058110},
2579 {0x00009a24, 0x00000000, 0x00000000, 0x00058180, 0x00058180, 0x00000000}, 2593 {0x00009a20, 0x00000000, 0x00000000, 0x00058114, 0x00058114},
2580 {0x00009a28, 0x00000000, 0x00000000, 0x00058184, 0x00058184, 0x00000000}, 2594 {0x00009a24, 0x00000000, 0x00000000, 0x00058180, 0x00058180},
2581 {0x00009a2c, 0x00000000, 0x00000000, 0x00058188, 0x00058188, 0x00000000}, 2595 {0x00009a28, 0x00000000, 0x00000000, 0x00058184, 0x00058184},
2582 {0x00009a30, 0x00000000, 0x00000000, 0x0005818c, 0x0005818c, 0x00000000}, 2596 {0x00009a2c, 0x00000000, 0x00000000, 0x00058188, 0x00058188},
2583 {0x00009a34, 0x00000000, 0x00000000, 0x00058190, 0x00058190, 0x00000000}, 2597 {0x00009a30, 0x00000000, 0x00000000, 0x0005818c, 0x0005818c},
2584 {0x00009a38, 0x00000000, 0x00000000, 0x00058194, 0x00058194, 0x00000000}, 2598 {0x00009a34, 0x00000000, 0x00000000, 0x00058190, 0x00058190},
2585 {0x00009a3c, 0x00000000, 0x00000000, 0x000581a0, 0x000581a0, 0x00000000}, 2599 {0x00009a38, 0x00000000, 0x00000000, 0x00058194, 0x00058194},
2586 {0x00009a40, 0x00000000, 0x00000000, 0x0005820c, 0x0005820c, 0x00000000}, 2600 {0x00009a3c, 0x00000000, 0x00000000, 0x000581a0, 0x000581a0},
2587 {0x00009a44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8, 0x00000000}, 2601 {0x00009a40, 0x00000000, 0x00000000, 0x0005820c, 0x0005820c},
2588 {0x00009a48, 0x00000000, 0x00000000, 0x00058284, 0x00058284, 0x00000000}, 2602 {0x00009a44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8},
2589 {0x00009a4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288, 0x00000000}, 2603 {0x00009a48, 0x00000000, 0x00000000, 0x00058284, 0x00058284},
2590 {0x00009a50, 0x00000000, 0x00000000, 0x00058224, 0x00058224, 0x00000000}, 2604 {0x00009a4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288},
2591 {0x00009a54, 0x00000000, 0x00000000, 0x00058290, 0x00058290, 0x00000000}, 2605 {0x00009a50, 0x00000000, 0x00000000, 0x00058224, 0x00058224},
2592 {0x00009a58, 0x00000000, 0x00000000, 0x00058300, 0x00058300, 0x00000000}, 2606 {0x00009a54, 0x00000000, 0x00000000, 0x00058290, 0x00058290},
2593 {0x00009a5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304, 0x00000000}, 2607 {0x00009a58, 0x00000000, 0x00000000, 0x00058300, 0x00058300},
2594 {0x00009a60, 0x00000000, 0x00000000, 0x00058308, 0x00058308, 0x00000000}, 2608 {0x00009a5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304},
2595 {0x00009a64, 0x00000000, 0x00000000, 0x0005830c, 0x0005830c, 0x00000000}, 2609 {0x00009a60, 0x00000000, 0x00000000, 0x00058308, 0x00058308},
2596 {0x00009a68, 0x00000000, 0x00000000, 0x00058380, 0x00058380, 0x00000000}, 2610 {0x00009a64, 0x00000000, 0x00000000, 0x0005830c, 0x0005830c},
2597 {0x00009a6c, 0x00000000, 0x00000000, 0x00058384, 0x00058384, 0x00000000}, 2611 {0x00009a68, 0x00000000, 0x00000000, 0x00058380, 0x00058380},
2598 {0x00009a70, 0x00000000, 0x00000000, 0x00068700, 0x00068700, 0x00000000}, 2612 {0x00009a6c, 0x00000000, 0x00000000, 0x00058384, 0x00058384},
2599 {0x00009a74, 0x00000000, 0x00000000, 0x00068704, 0x00068704, 0x00000000}, 2613 {0x00009a70, 0x00000000, 0x00000000, 0x00068700, 0x00068700},
2600 {0x00009a78, 0x00000000, 0x00000000, 0x00068708, 0x00068708, 0x00000000}, 2614 {0x00009a74, 0x00000000, 0x00000000, 0x00068704, 0x00068704},
2601 {0x00009a7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c, 0x00000000}, 2615 {0x00009a78, 0x00000000, 0x00000000, 0x00068708, 0x00068708},
2602 {0x00009a80, 0x00000000, 0x00000000, 0x00068780, 0x00068780, 0x00000000}, 2616 {0x00009a7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c},
2603 {0x00009a84, 0x00000000, 0x00000000, 0x00068784, 0x00068784, 0x00000000}, 2617 {0x00009a80, 0x00000000, 0x00000000, 0x00068780, 0x00068780},
2604 {0x00009a88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00, 0x00000000}, 2618 {0x00009a84, 0x00000000, 0x00000000, 0x00068784, 0x00068784},
2605 {0x00009a8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04, 0x00000000}, 2619 {0x00009a88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00},
2606 {0x00009a90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08, 0x00000000}, 2620 {0x00009a8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04},
2607 {0x00009a94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c, 0x00000000}, 2621 {0x00009a90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08},
2608 {0x00009a98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80, 0x00000000}, 2622 {0x00009a94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c},
2609 {0x00009a9c, 0x00000000, 0x00000000, 0x00078b84, 0x00078b84, 0x00000000}, 2623 {0x00009a98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80},
2610 {0x00009aa0, 0x00000000, 0x00000000, 0x00078b88, 0x00078b88, 0x00000000}, 2624 {0x00009a9c, 0x00000000, 0x00000000, 0x00078b84, 0x00078b84},
2611 {0x00009aa4, 0x00000000, 0x00000000, 0x00078b8c, 0x00078b8c, 0x00000000}, 2625 {0x00009aa0, 0x00000000, 0x00000000, 0x00078b88, 0x00078b88},
2612 {0x00009aa8, 0x00000000, 0x00000000, 0x00078b90, 0x00078b90, 0x00000000}, 2626 {0x00009aa4, 0x00000000, 0x00000000, 0x00078b8c, 0x00078b8c},
2613 {0x00009aac, 0x00000000, 0x00000000, 0x000caf80, 0x000caf80, 0x00000000}, 2627 {0x00009aa8, 0x00000000, 0x00000000, 0x00078b90, 0x00078b90},
2614 {0x00009ab0, 0x00000000, 0x00000000, 0x000caf84, 0x000caf84, 0x00000000}, 2628 {0x00009aac, 0x00000000, 0x00000000, 0x000caf80, 0x000caf80},
2615 {0x00009ab4, 0x00000000, 0x00000000, 0x000caf88, 0x000caf88, 0x00000000}, 2629 {0x00009ab0, 0x00000000, 0x00000000, 0x000caf84, 0x000caf84},
2616 {0x00009ab8, 0x00000000, 0x00000000, 0x000caf8c, 0x000caf8c, 0x00000000}, 2630 {0x00009ab4, 0x00000000, 0x00000000, 0x000caf88, 0x000caf88},
2617 {0x00009abc, 0x00000000, 0x00000000, 0x000caf90, 0x000caf90, 0x00000000}, 2631 {0x00009ab8, 0x00000000, 0x00000000, 0x000caf8c, 0x000caf8c},
2618 {0x00009ac0, 0x00000000, 0x00000000, 0x000db30c, 0x000db30c, 0x00000000}, 2632 {0x00009abc, 0x00000000, 0x00000000, 0x000caf90, 0x000caf90},
2619 {0x00009ac4, 0x00000000, 0x00000000, 0x000db310, 0x000db310, 0x00000000}, 2633 {0x00009ac0, 0x00000000, 0x00000000, 0x000db30c, 0x000db30c},
2620 {0x00009ac8, 0x00000000, 0x00000000, 0x000db384, 0x000db384, 0x00000000}, 2634 {0x00009ac4, 0x00000000, 0x00000000, 0x000db310, 0x000db310},
2621 {0x00009acc, 0x00000000, 0x00000000, 0x000db388, 0x000db388, 0x00000000}, 2635 {0x00009ac8, 0x00000000, 0x00000000, 0x000db384, 0x000db384},
2622 {0x00009ad0, 0x00000000, 0x00000000, 0x000db324, 0x000db324, 0x00000000}, 2636 {0x00009acc, 0x00000000, 0x00000000, 0x000db388, 0x000db388},
2623 {0x00009ad4, 0x00000000, 0x00000000, 0x000eb704, 0x000eb704, 0x00000000}, 2637 {0x00009ad0, 0x00000000, 0x00000000, 0x000db324, 0x000db324},
2624 {0x00009ad8, 0x00000000, 0x00000000, 0x000eb6a4, 0x000eb6a4, 0x00000000}, 2638 {0x00009ad4, 0x00000000, 0x00000000, 0x000eb704, 0x000eb704},
2625 {0x00009adc, 0x00000000, 0x00000000, 0x000eb6a8, 0x000eb6a8, 0x00000000}, 2639 {0x00009ad8, 0x00000000, 0x00000000, 0x000eb6a4, 0x000eb6a4},
2626 {0x00009ae0, 0x00000000, 0x00000000, 0x000eb710, 0x000eb710, 0x00000000}, 2640 {0x00009adc, 0x00000000, 0x00000000, 0x000eb6a8, 0x000eb6a8},
2627 {0x00009ae4, 0x00000000, 0x00000000, 0x000eb714, 0x000eb714, 0x00000000}, 2641 {0x00009ae0, 0x00000000, 0x00000000, 0x000eb710, 0x000eb710},
2628 {0x00009ae8, 0x00000000, 0x00000000, 0x000eb720, 0x000eb720, 0x00000000}, 2642 {0x00009ae4, 0x00000000, 0x00000000, 0x000eb714, 0x000eb714},
2629 {0x00009aec, 0x00000000, 0x00000000, 0x000eb724, 0x000eb724, 0x00000000}, 2643 {0x00009ae8, 0x00000000, 0x00000000, 0x000eb720, 0x000eb720},
2630 {0x00009af0, 0x00000000, 0x00000000, 0x000eb728, 0x000eb728, 0x00000000}, 2644 {0x00009aec, 0x00000000, 0x00000000, 0x000eb724, 0x000eb724},
2631 {0x00009af4, 0x00000000, 0x00000000, 0x000eb72c, 0x000eb72c, 0x00000000}, 2645 {0x00009af0, 0x00000000, 0x00000000, 0x000eb728, 0x000eb728},
2632 {0x00009af8, 0x00000000, 0x00000000, 0x000eb7a0, 0x000eb7a0, 0x00000000}, 2646 {0x00009af4, 0x00000000, 0x00000000, 0x000eb72c, 0x000eb72c},
2633 {0x00009afc, 0x00000000, 0x00000000, 0x000eb7a4, 0x000eb7a4, 0x00000000}, 2647 {0x00009af8, 0x00000000, 0x00000000, 0x000eb7a0, 0x000eb7a0},
2634 {0x00009b00, 0x00000000, 0x00000000, 0x000eb7a8, 0x000eb7a8, 0x00000000}, 2648 {0x00009afc, 0x00000000, 0x00000000, 0x000eb7a4, 0x000eb7a4},
2635 {0x00009b04, 0x00000000, 0x00000000, 0x000eb7b0, 0x000eb7b0, 0x00000000}, 2649 {0x00009b00, 0x00000000, 0x00000000, 0x000eb7a8, 0x000eb7a8},
2636 {0x00009b08, 0x00000000, 0x00000000, 0x000eb7b4, 0x000eb7b4, 0x00000000}, 2650 {0x00009b04, 0x00000000, 0x00000000, 0x000eb7b0, 0x000eb7b0},
2637 {0x00009b0c, 0x00000000, 0x00000000, 0x000eb7b8, 0x000eb7b8, 0x00000000}, 2651 {0x00009b08, 0x00000000, 0x00000000, 0x000eb7b4, 0x000eb7b4},
2638 {0x00009b10, 0x00000000, 0x00000000, 0x000eb7a5, 0x000eb7a5, 0x00000000}, 2652 {0x00009b0c, 0x00000000, 0x00000000, 0x000eb7b8, 0x000eb7b8},
2639 {0x00009b14, 0x00000000, 0x00000000, 0x000eb7a9, 0x000eb7a9, 0x00000000}, 2653 {0x00009b10, 0x00000000, 0x00000000, 0x000eb7a5, 0x000eb7a5},
2640 {0x00009b18, 0x00000000, 0x00000000, 0x000eb7ad, 0x000eb7ad, 0x00000000}, 2654 {0x00009b14, 0x00000000, 0x00000000, 0x000eb7a9, 0x000eb7a9},
2641 {0x00009b1c, 0x00000000, 0x00000000, 0x000eb7b1, 0x000eb7b1, 0x00000000}, 2655 {0x00009b18, 0x00000000, 0x00000000, 0x000eb7ad, 0x000eb7ad},
2642 {0x00009b20, 0x00000000, 0x00000000, 0x000eb7b5, 0x000eb7b5, 0x00000000}, 2656 {0x00009b1c, 0x00000000, 0x00000000, 0x000eb7b1, 0x000eb7b1},
2643 {0x00009b24, 0x00000000, 0x00000000, 0x000eb7b9, 0x000eb7b9, 0x00000000}, 2657 {0x00009b20, 0x00000000, 0x00000000, 0x000eb7b5, 0x000eb7b5},
2644 {0x00009b28, 0x00000000, 0x00000000, 0x000eb7c5, 0x000eb7c5, 0x00000000}, 2658 {0x00009b24, 0x00000000, 0x00000000, 0x000eb7b9, 0x000eb7b9},
2645 {0x00009b2c, 0x00000000, 0x00000000, 0x000eb7c9, 0x000eb7c9, 0x00000000}, 2659 {0x00009b28, 0x00000000, 0x00000000, 0x000eb7c5, 0x000eb7c5},
2646 {0x00009b30, 0x00000000, 0x00000000, 0x000eb7d1, 0x000eb7d1, 0x00000000}, 2660 {0x00009b2c, 0x00000000, 0x00000000, 0x000eb7c9, 0x000eb7c9},
2647 {0x00009b34, 0x00000000, 0x00000000, 0x000eb7d5, 0x000eb7d5, 0x00000000}, 2661 {0x00009b30, 0x00000000, 0x00000000, 0x000eb7d1, 0x000eb7d1},
2648 {0x00009b38, 0x00000000, 0x00000000, 0x000eb7d9, 0x000eb7d9, 0x00000000}, 2662 {0x00009b34, 0x00000000, 0x00000000, 0x000eb7d5, 0x000eb7d5},
2649 {0x00009b3c, 0x00000000, 0x00000000, 0x000eb7c6, 0x000eb7c6, 0x00000000}, 2663 {0x00009b38, 0x00000000, 0x00000000, 0x000eb7d9, 0x000eb7d9},
2650 {0x00009b40, 0x00000000, 0x00000000, 0x000eb7ca, 0x000eb7ca, 0x00000000}, 2664 {0x00009b3c, 0x00000000, 0x00000000, 0x000eb7c6, 0x000eb7c6},
2651 {0x00009b44, 0x00000000, 0x00000000, 0x000eb7ce, 0x000eb7ce, 0x00000000}, 2665 {0x00009b40, 0x00000000, 0x00000000, 0x000eb7ca, 0x000eb7ca},
2652 {0x00009b48, 0x00000000, 0x00000000, 0x000eb7d2, 0x000eb7d2, 0x00000000}, 2666 {0x00009b44, 0x00000000, 0x00000000, 0x000eb7ce, 0x000eb7ce},
2653 {0x00009b4c, 0x00000000, 0x00000000, 0x000eb7d6, 0x000eb7d6, 0x00000000}, 2667 {0x00009b48, 0x00000000, 0x00000000, 0x000eb7d2, 0x000eb7d2},
2654 {0x00009b50, 0x00000000, 0x00000000, 0x000eb7c3, 0x000eb7c3, 0x00000000}, 2668 {0x00009b4c, 0x00000000, 0x00000000, 0x000eb7d6, 0x000eb7d6},
2655 {0x00009b54, 0x00000000, 0x00000000, 0x000eb7c7, 0x000eb7c7, 0x00000000}, 2669 {0x00009b50, 0x00000000, 0x00000000, 0x000eb7c3, 0x000eb7c3},
2656 {0x00009b58, 0x00000000, 0x00000000, 0x000eb7cb, 0x000eb7cb, 0x00000000}, 2670 {0x00009b54, 0x00000000, 0x00000000, 0x000eb7c7, 0x000eb7c7},
2657 {0x00009b5c, 0x00000000, 0x00000000, 0x000eb7cf, 0x000eb7cf, 0x00000000}, 2671 {0x00009b58, 0x00000000, 0x00000000, 0x000eb7cb, 0x000eb7cb},
2658 {0x00009b60, 0x00000000, 0x00000000, 0x000eb7d7, 0x000eb7d7, 0x00000000}, 2672 {0x00009b5c, 0x00000000, 0x00000000, 0x000eb7cf, 0x000eb7cf},
2659 {0x00009b64, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2673 {0x00009b60, 0x00000000, 0x00000000, 0x000eb7d7, 0x000eb7d7},
2660 {0x00009b68, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2674 {0x00009b64, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2661 {0x00009b6c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2675 {0x00009b68, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2662 {0x00009b70, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2676 {0x00009b6c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2663 {0x00009b74, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2677 {0x00009b70, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2664 {0x00009b78, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2678 {0x00009b74, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2665 {0x00009b7c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2679 {0x00009b78, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2666 {0x00009b80, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2680 {0x00009b7c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2667 {0x00009b84, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2681 {0x00009b80, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2668 {0x00009b88, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2682 {0x00009b84, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2669 {0x00009b8c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2683 {0x00009b88, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2670 {0x00009b90, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2684 {0x00009b8c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2671 {0x00009b94, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2685 {0x00009b90, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2672 {0x00009b98, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2686 {0x00009b94, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2673 {0x00009b9c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2687 {0x00009b98, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2674 {0x00009ba0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2688 {0x00009b9c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2675 {0x00009ba4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2689 {0x00009ba0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2676 {0x00009ba8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2690 {0x00009ba4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2677 {0x00009bac, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2691 {0x00009ba8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2678 {0x00009bb0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2692 {0x00009bac, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2679 {0x00009bb4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2693 {0x00009bb0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2680 {0x00009bb8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2694 {0x00009bb4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2681 {0x00009bbc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2695 {0x00009bb8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2682 {0x00009bc0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2696 {0x00009bbc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2683 {0x00009bc4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2697 {0x00009bc0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2684 {0x00009bc8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2698 {0x00009bc4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2685 {0x00009bcc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2699 {0x00009bc8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2686 {0x00009bd0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2700 {0x00009bcc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2687 {0x00009bd4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2701 {0x00009bd0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2688 {0x00009bd8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2702 {0x00009bd4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2689 {0x00009bdc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2703 {0x00009bd8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2690 {0x00009be0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2704 {0x00009bdc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2691 {0x00009be4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2705 {0x00009be0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2692 {0x00009be8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2706 {0x00009be4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2693 {0x00009bec, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2707 {0x00009be8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2694 {0x00009bf0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2708 {0x00009bec, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2695 {0x00009bf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2709 {0x00009bf0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2696 {0x00009bf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2710 {0x00009bf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2697 {0x00009bfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2711 {0x00009bf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2698 {0x0000aa00, 0x00000000, 0x00000000, 0x00058084, 0x00058084, 0x00000000}, 2712 {0x00009bfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2699 {0x0000aa04, 0x00000000, 0x00000000, 0x00058088, 0x00058088, 0x00000000}, 2713 {0x0000aa00, 0x00000000, 0x00000000, 0x00058084, 0x00058084},
2700 {0x0000aa08, 0x00000000, 0x00000000, 0x0005808c, 0x0005808c, 0x00000000}, 2714 {0x0000aa04, 0x00000000, 0x00000000, 0x00058088, 0x00058088},
2701 {0x0000aa0c, 0x00000000, 0x00000000, 0x00058100, 0x00058100, 0x00000000}, 2715 {0x0000aa08, 0x00000000, 0x00000000, 0x0005808c, 0x0005808c},
2702 {0x0000aa10, 0x00000000, 0x00000000, 0x00058104, 0x00058104, 0x00000000}, 2716 {0x0000aa0c, 0x00000000, 0x00000000, 0x00058100, 0x00058100},
2703 {0x0000aa14, 0x00000000, 0x00000000, 0x00058108, 0x00058108, 0x00000000}, 2717 {0x0000aa10, 0x00000000, 0x00000000, 0x00058104, 0x00058104},
2704 {0x0000aa18, 0x00000000, 0x00000000, 0x0005810c, 0x0005810c, 0x00000000}, 2718 {0x0000aa14, 0x00000000, 0x00000000, 0x00058108, 0x00058108},
2705 {0x0000aa1c, 0x00000000, 0x00000000, 0x00058110, 0x00058110, 0x00000000}, 2719 {0x0000aa18, 0x00000000, 0x00000000, 0x0005810c, 0x0005810c},
2706 {0x0000aa20, 0x00000000, 0x00000000, 0x00058114, 0x00058114, 0x00000000}, 2720 {0x0000aa1c, 0x00000000, 0x00000000, 0x00058110, 0x00058110},
2707 {0x0000aa24, 0x00000000, 0x00000000, 0x00058180, 0x00058180, 0x00000000}, 2721 {0x0000aa20, 0x00000000, 0x00000000, 0x00058114, 0x00058114},
2708 {0x0000aa28, 0x00000000, 0x00000000, 0x00058184, 0x00058184, 0x00000000}, 2722 {0x0000aa24, 0x00000000, 0x00000000, 0x00058180, 0x00058180},
2709 {0x0000aa2c, 0x00000000, 0x00000000, 0x00058188, 0x00058188, 0x00000000}, 2723 {0x0000aa28, 0x00000000, 0x00000000, 0x00058184, 0x00058184},
2710 {0x0000aa30, 0x00000000, 0x00000000, 0x0005818c, 0x0005818c, 0x00000000}, 2724 {0x0000aa2c, 0x00000000, 0x00000000, 0x00058188, 0x00058188},
2711 {0x0000aa34, 0x00000000, 0x00000000, 0x00058190, 0x00058190, 0x00000000}, 2725 {0x0000aa30, 0x00000000, 0x00000000, 0x0005818c, 0x0005818c},
2712 {0x0000aa38, 0x00000000, 0x00000000, 0x00058194, 0x00058194, 0x00000000}, 2726 {0x0000aa34, 0x00000000, 0x00000000, 0x00058190, 0x00058190},
2713 {0x0000aa3c, 0x00000000, 0x00000000, 0x000581a0, 0x000581a0, 0x00000000}, 2727 {0x0000aa38, 0x00000000, 0x00000000, 0x00058194, 0x00058194},
2714 {0x0000aa40, 0x00000000, 0x00000000, 0x0005820c, 0x0005820c, 0x00000000}, 2728 {0x0000aa3c, 0x00000000, 0x00000000, 0x000581a0, 0x000581a0},
2715 {0x0000aa44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8, 0x00000000}, 2729 {0x0000aa40, 0x00000000, 0x00000000, 0x0005820c, 0x0005820c},
2716 {0x0000aa48, 0x00000000, 0x00000000, 0x00058284, 0x00058284, 0x00000000}, 2730 {0x0000aa44, 0x00000000, 0x00000000, 0x000581a8, 0x000581a8},
2717 {0x0000aa4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288, 0x00000000}, 2731 {0x0000aa48, 0x00000000, 0x00000000, 0x00058284, 0x00058284},
2718 {0x0000aa50, 0x00000000, 0x00000000, 0x00058224, 0x00058224, 0x00000000}, 2732 {0x0000aa4c, 0x00000000, 0x00000000, 0x00058288, 0x00058288},
2719 {0x0000aa54, 0x00000000, 0x00000000, 0x00058290, 0x00058290, 0x00000000}, 2733 {0x0000aa50, 0x00000000, 0x00000000, 0x00058224, 0x00058224},
2720 {0x0000aa58, 0x00000000, 0x00000000, 0x00058300, 0x00058300, 0x00000000}, 2734 {0x0000aa54, 0x00000000, 0x00000000, 0x00058290, 0x00058290},
2721 {0x0000aa5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304, 0x00000000}, 2735 {0x0000aa58, 0x00000000, 0x00000000, 0x00058300, 0x00058300},
2722 {0x0000aa60, 0x00000000, 0x00000000, 0x00058308, 0x00058308, 0x00000000}, 2736 {0x0000aa5c, 0x00000000, 0x00000000, 0x00058304, 0x00058304},
2723 {0x0000aa64, 0x00000000, 0x00000000, 0x0005830c, 0x0005830c, 0x00000000}, 2737 {0x0000aa60, 0x00000000, 0x00000000, 0x00058308, 0x00058308},
2724 {0x0000aa68, 0x00000000, 0x00000000, 0x00058380, 0x00058380, 0x00000000}, 2738 {0x0000aa64, 0x00000000, 0x00000000, 0x0005830c, 0x0005830c},
2725 {0x0000aa6c, 0x00000000, 0x00000000, 0x00058384, 0x00058384, 0x00000000}, 2739 {0x0000aa68, 0x00000000, 0x00000000, 0x00058380, 0x00058380},
2726 {0x0000aa70, 0x00000000, 0x00000000, 0x00068700, 0x00068700, 0x00000000}, 2740 {0x0000aa6c, 0x00000000, 0x00000000, 0x00058384, 0x00058384},
2727 {0x0000aa74, 0x00000000, 0x00000000, 0x00068704, 0x00068704, 0x00000000}, 2741 {0x0000aa70, 0x00000000, 0x00000000, 0x00068700, 0x00068700},
2728 {0x0000aa78, 0x00000000, 0x00000000, 0x00068708, 0x00068708, 0x00000000}, 2742 {0x0000aa74, 0x00000000, 0x00000000, 0x00068704, 0x00068704},
2729 {0x0000aa7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c, 0x00000000}, 2743 {0x0000aa78, 0x00000000, 0x00000000, 0x00068708, 0x00068708},
2730 {0x0000aa80, 0x00000000, 0x00000000, 0x00068780, 0x00068780, 0x00000000}, 2744 {0x0000aa7c, 0x00000000, 0x00000000, 0x0006870c, 0x0006870c},
2731 {0x0000aa84, 0x00000000, 0x00000000, 0x00068784, 0x00068784, 0x00000000}, 2745 {0x0000aa80, 0x00000000, 0x00000000, 0x00068780, 0x00068780},
2732 {0x0000aa88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00, 0x00000000}, 2746 {0x0000aa84, 0x00000000, 0x00000000, 0x00068784, 0x00068784},
2733 {0x0000aa8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04, 0x00000000}, 2747 {0x0000aa88, 0x00000000, 0x00000000, 0x00078b00, 0x00078b00},
2734 {0x0000aa90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08, 0x00000000}, 2748 {0x0000aa8c, 0x00000000, 0x00000000, 0x00078b04, 0x00078b04},
2735 {0x0000aa94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c, 0x00000000}, 2749 {0x0000aa90, 0x00000000, 0x00000000, 0x00078b08, 0x00078b08},
2736 {0x0000aa98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80, 0x00000000}, 2750 {0x0000aa94, 0x00000000, 0x00000000, 0x00078b0c, 0x00078b0c},
2737 {0x0000aa9c, 0x00000000, 0x00000000, 0x00078b84, 0x00078b84, 0x00000000}, 2751 {0x0000aa98, 0x00000000, 0x00000000, 0x00078b80, 0x00078b80},
2738 {0x0000aaa0, 0x00000000, 0x00000000, 0x00078b88, 0x00078b88, 0x00000000}, 2752 {0x0000aa9c, 0x00000000, 0x00000000, 0x00078b84, 0x00078b84},
2739 {0x0000aaa4, 0x00000000, 0x00000000, 0x00078b8c, 0x00078b8c, 0x00000000}, 2753 {0x0000aaa0, 0x00000000, 0x00000000, 0x00078b88, 0x00078b88},
2740 {0x0000aaa8, 0x00000000, 0x00000000, 0x00078b90, 0x00078b90, 0x00000000}, 2754 {0x0000aaa4, 0x00000000, 0x00000000, 0x00078b8c, 0x00078b8c},
2741 {0x0000aaac, 0x00000000, 0x00000000, 0x000caf80, 0x000caf80, 0x00000000}, 2755 {0x0000aaa8, 0x00000000, 0x00000000, 0x00078b90, 0x00078b90},
2742 {0x0000aab0, 0x00000000, 0x00000000, 0x000caf84, 0x000caf84, 0x00000000}, 2756 {0x0000aaac, 0x00000000, 0x00000000, 0x000caf80, 0x000caf80},
2743 {0x0000aab4, 0x00000000, 0x00000000, 0x000caf88, 0x000caf88, 0x00000000}, 2757 {0x0000aab0, 0x00000000, 0x00000000, 0x000caf84, 0x000caf84},
2744 {0x0000aab8, 0x00000000, 0x00000000, 0x000caf8c, 0x000caf8c, 0x00000000}, 2758 {0x0000aab4, 0x00000000, 0x00000000, 0x000caf88, 0x000caf88},
2745 {0x0000aabc, 0x00000000, 0x00000000, 0x000caf90, 0x000caf90, 0x00000000}, 2759 {0x0000aab8, 0x00000000, 0x00000000, 0x000caf8c, 0x000caf8c},
2746 {0x0000aac0, 0x00000000, 0x00000000, 0x000db30c, 0x000db30c, 0x00000000}, 2760 {0x0000aabc, 0x00000000, 0x00000000, 0x000caf90, 0x000caf90},
2747 {0x0000aac4, 0x00000000, 0x00000000, 0x000db310, 0x000db310, 0x00000000}, 2761 {0x0000aac0, 0x00000000, 0x00000000, 0x000db30c, 0x000db30c},
2748 {0x0000aac8, 0x00000000, 0x00000000, 0x000db384, 0x000db384, 0x00000000}, 2762 {0x0000aac4, 0x00000000, 0x00000000, 0x000db310, 0x000db310},
2749 {0x0000aacc, 0x00000000, 0x00000000, 0x000db388, 0x000db388, 0x00000000}, 2763 {0x0000aac8, 0x00000000, 0x00000000, 0x000db384, 0x000db384},
2750 {0x0000aad0, 0x00000000, 0x00000000, 0x000db324, 0x000db324, 0x00000000}, 2764 {0x0000aacc, 0x00000000, 0x00000000, 0x000db388, 0x000db388},
2751 {0x0000aad4, 0x00000000, 0x00000000, 0x000eb704, 0x000eb704, 0x00000000}, 2765 {0x0000aad0, 0x00000000, 0x00000000, 0x000db324, 0x000db324},
2752 {0x0000aad8, 0x00000000, 0x00000000, 0x000eb6a4, 0x000eb6a4, 0x00000000}, 2766 {0x0000aad4, 0x00000000, 0x00000000, 0x000eb704, 0x000eb704},
2753 {0x0000aadc, 0x00000000, 0x00000000, 0x000eb6a8, 0x000eb6a8, 0x00000000}, 2767 {0x0000aad8, 0x00000000, 0x00000000, 0x000eb6a4, 0x000eb6a4},
2754 {0x0000aae0, 0x00000000, 0x00000000, 0x000eb710, 0x000eb710, 0x00000000}, 2768 {0x0000aadc, 0x00000000, 0x00000000, 0x000eb6a8, 0x000eb6a8},
2755 {0x0000aae4, 0x00000000, 0x00000000, 0x000eb714, 0x000eb714, 0x00000000}, 2769 {0x0000aae0, 0x00000000, 0x00000000, 0x000eb710, 0x000eb710},
2756 {0x0000aae8, 0x00000000, 0x00000000, 0x000eb720, 0x000eb720, 0x00000000}, 2770 {0x0000aae4, 0x00000000, 0x00000000, 0x000eb714, 0x000eb714},
2757 {0x0000aaec, 0x00000000, 0x00000000, 0x000eb724, 0x000eb724, 0x00000000}, 2771 {0x0000aae8, 0x00000000, 0x00000000, 0x000eb720, 0x000eb720},
2758 {0x0000aaf0, 0x00000000, 0x00000000, 0x000eb728, 0x000eb728, 0x00000000}, 2772 {0x0000aaec, 0x00000000, 0x00000000, 0x000eb724, 0x000eb724},
2759 {0x0000aaf4, 0x00000000, 0x00000000, 0x000eb72c, 0x000eb72c, 0x00000000}, 2773 {0x0000aaf0, 0x00000000, 0x00000000, 0x000eb728, 0x000eb728},
2760 {0x0000aaf8, 0x00000000, 0x00000000, 0x000eb7a0, 0x000eb7a0, 0x00000000}, 2774 {0x0000aaf4, 0x00000000, 0x00000000, 0x000eb72c, 0x000eb72c},
2761 {0x0000aafc, 0x00000000, 0x00000000, 0x000eb7a4, 0x000eb7a4, 0x00000000}, 2775 {0x0000aaf8, 0x00000000, 0x00000000, 0x000eb7a0, 0x000eb7a0},
2762 {0x0000ab00, 0x00000000, 0x00000000, 0x000eb7a8, 0x000eb7a8, 0x00000000}, 2776 {0x0000aafc, 0x00000000, 0x00000000, 0x000eb7a4, 0x000eb7a4},
2763 {0x0000ab04, 0x00000000, 0x00000000, 0x000eb7b0, 0x000eb7b0, 0x00000000}, 2777 {0x0000ab00, 0x00000000, 0x00000000, 0x000eb7a8, 0x000eb7a8},
2764 {0x0000ab08, 0x00000000, 0x00000000, 0x000eb7b4, 0x000eb7b4, 0x00000000}, 2778 {0x0000ab04, 0x00000000, 0x00000000, 0x000eb7b0, 0x000eb7b0},
2765 {0x0000ab0c, 0x00000000, 0x00000000, 0x000eb7b8, 0x000eb7b8, 0x00000000}, 2779 {0x0000ab08, 0x00000000, 0x00000000, 0x000eb7b4, 0x000eb7b4},
2766 {0x0000ab10, 0x00000000, 0x00000000, 0x000eb7a5, 0x000eb7a5, 0x00000000}, 2780 {0x0000ab0c, 0x00000000, 0x00000000, 0x000eb7b8, 0x000eb7b8},
2767 {0x0000ab14, 0x00000000, 0x00000000, 0x000eb7a9, 0x000eb7a9, 0x00000000}, 2781 {0x0000ab10, 0x00000000, 0x00000000, 0x000eb7a5, 0x000eb7a5},
2768 {0x0000ab18, 0x00000000, 0x00000000, 0x000eb7ad, 0x000eb7ad, 0x00000000}, 2782 {0x0000ab14, 0x00000000, 0x00000000, 0x000eb7a9, 0x000eb7a9},
2769 {0x0000ab1c, 0x00000000, 0x00000000, 0x000eb7b1, 0x000eb7b1, 0x00000000}, 2783 {0x0000ab18, 0x00000000, 0x00000000, 0x000eb7ad, 0x000eb7ad},
2770 {0x0000ab20, 0x00000000, 0x00000000, 0x000eb7b5, 0x000eb7b5, 0x00000000}, 2784 {0x0000ab1c, 0x00000000, 0x00000000, 0x000eb7b1, 0x000eb7b1},
2771 {0x0000ab24, 0x00000000, 0x00000000, 0x000eb7b9, 0x000eb7b9, 0x00000000}, 2785 {0x0000ab20, 0x00000000, 0x00000000, 0x000eb7b5, 0x000eb7b5},
2772 {0x0000ab28, 0x00000000, 0x00000000, 0x000eb7c5, 0x000eb7c5, 0x00000000}, 2786 {0x0000ab24, 0x00000000, 0x00000000, 0x000eb7b9, 0x000eb7b9},
2773 {0x0000ab2c, 0x00000000, 0x00000000, 0x000eb7c9, 0x000eb7c9, 0x00000000}, 2787 {0x0000ab28, 0x00000000, 0x00000000, 0x000eb7c5, 0x000eb7c5},
2774 {0x0000ab30, 0x00000000, 0x00000000, 0x000eb7d1, 0x000eb7d1, 0x00000000}, 2788 {0x0000ab2c, 0x00000000, 0x00000000, 0x000eb7c9, 0x000eb7c9},
2775 {0x0000ab34, 0x00000000, 0x00000000, 0x000eb7d5, 0x000eb7d5, 0x00000000}, 2789 {0x0000ab30, 0x00000000, 0x00000000, 0x000eb7d1, 0x000eb7d1},
2776 {0x0000ab38, 0x00000000, 0x00000000, 0x000eb7d9, 0x000eb7d9, 0x00000000}, 2790 {0x0000ab34, 0x00000000, 0x00000000, 0x000eb7d5, 0x000eb7d5},
2777 {0x0000ab3c, 0x00000000, 0x00000000, 0x000eb7c6, 0x000eb7c6, 0x00000000}, 2791 {0x0000ab38, 0x00000000, 0x00000000, 0x000eb7d9, 0x000eb7d9},
2778 {0x0000ab40, 0x00000000, 0x00000000, 0x000eb7ca, 0x000eb7ca, 0x00000000}, 2792 {0x0000ab3c, 0x00000000, 0x00000000, 0x000eb7c6, 0x000eb7c6},
2779 {0x0000ab44, 0x00000000, 0x00000000, 0x000eb7ce, 0x000eb7ce, 0x00000000}, 2793 {0x0000ab40, 0x00000000, 0x00000000, 0x000eb7ca, 0x000eb7ca},
2780 {0x0000ab48, 0x00000000, 0x00000000, 0x000eb7d2, 0x000eb7d2, 0x00000000}, 2794 {0x0000ab44, 0x00000000, 0x00000000, 0x000eb7ce, 0x000eb7ce},
2781 {0x0000ab4c, 0x00000000, 0x00000000, 0x000eb7d6, 0x000eb7d6, 0x00000000}, 2795 {0x0000ab48, 0x00000000, 0x00000000, 0x000eb7d2, 0x000eb7d2},
2782 {0x0000ab50, 0x00000000, 0x00000000, 0x000eb7c3, 0x000eb7c3, 0x00000000}, 2796 {0x0000ab4c, 0x00000000, 0x00000000, 0x000eb7d6, 0x000eb7d6},
2783 {0x0000ab54, 0x00000000, 0x00000000, 0x000eb7c7, 0x000eb7c7, 0x00000000}, 2797 {0x0000ab50, 0x00000000, 0x00000000, 0x000eb7c3, 0x000eb7c3},
2784 {0x0000ab58, 0x00000000, 0x00000000, 0x000eb7cb, 0x000eb7cb, 0x00000000}, 2798 {0x0000ab54, 0x00000000, 0x00000000, 0x000eb7c7, 0x000eb7c7},
2785 {0x0000ab5c, 0x00000000, 0x00000000, 0x000eb7cf, 0x000eb7cf, 0x00000000}, 2799 {0x0000ab58, 0x00000000, 0x00000000, 0x000eb7cb, 0x000eb7cb},
2786 {0x0000ab60, 0x00000000, 0x00000000, 0x000eb7d7, 0x000eb7d7, 0x00000000}, 2800 {0x0000ab5c, 0x00000000, 0x00000000, 0x000eb7cf, 0x000eb7cf},
2787 {0x0000ab64, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2801 {0x0000ab60, 0x00000000, 0x00000000, 0x000eb7d7, 0x000eb7d7},
2788 {0x0000ab68, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2802 {0x0000ab64, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2789 {0x0000ab6c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2803 {0x0000ab68, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2790 {0x0000ab70, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2804 {0x0000ab6c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2791 {0x0000ab74, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2805 {0x0000ab70, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2792 {0x0000ab78, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2806 {0x0000ab74, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2793 {0x0000ab7c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2807 {0x0000ab78, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2794 {0x0000ab80, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2808 {0x0000ab7c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2795 {0x0000ab84, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2809 {0x0000ab80, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2796 {0x0000ab88, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2810 {0x0000ab84, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2797 {0x0000ab8c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2811 {0x0000ab88, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2798 {0x0000ab90, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2812 {0x0000ab8c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2799 {0x0000ab94, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2813 {0x0000ab90, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2800 {0x0000ab98, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2814 {0x0000ab94, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2801 {0x0000ab9c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2815 {0x0000ab98, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2802 {0x0000aba0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2816 {0x0000ab9c, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2803 {0x0000aba4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2817 {0x0000aba0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2804 {0x0000aba8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2818 {0x0000aba4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2805 {0x0000abac, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2819 {0x0000aba8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2806 {0x0000abb0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2820 {0x0000abac, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2807 {0x0000abb4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2821 {0x0000abb0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2808 {0x0000abb8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2822 {0x0000abb4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2809 {0x0000abbc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2823 {0x0000abb8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2810 {0x0000abc0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2824 {0x0000abbc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2811 {0x0000abc4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2825 {0x0000abc0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2812 {0x0000abc8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2826 {0x0000abc4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2813 {0x0000abcc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2827 {0x0000abc8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2814 {0x0000abd0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2828 {0x0000abcc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2815 {0x0000abd4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2829 {0x0000abd0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2816 {0x0000abd8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2830 {0x0000abd4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2817 {0x0000abdc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2831 {0x0000abd8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2818 {0x0000abe0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2832 {0x0000abdc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2819 {0x0000abe4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2833 {0x0000abe0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2820 {0x0000abe8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2834 {0x0000abe4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2821 {0x0000abec, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2835 {0x0000abe8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2822 {0x0000abf0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2836 {0x0000abec, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2823 {0x0000abf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2837 {0x0000abf0, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2824 {0x0000abf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2838 {0x0000abf4, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2825 {0x0000abfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db, 0x00000000}, 2839 {0x0000abf8, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2826 {0x0000a204, 0x00000004, 0x00000004, 0x00000004, 0x00000004, 0x00000004}, 2840 {0x0000abfc, 0x00000000, 0x00000000, 0x000eb7db, 0x000eb7db},
2827 {0x0000a20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000, 0x0001f000}, 2841 {0x0000a204, 0x00000004, 0x00000004, 0x00000004, 0x00000004},
2828 {0x0000b20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000, 0x0001f000}, 2842 {0x0000a20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000},
2829 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a}, 2843 {0x0000b20c, 0x00000014, 0x00000014, 0x0001f000, 0x0001f000},
2830 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000}, 2844 {0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a},
2831 {0x0000a250, 0x0004f000, 0x0004f000, 0x0004a000, 0x0004a000, 0x0004a000}, 2845 {0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
2832 {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e}, 2846 {0x0000a250, 0x0004f000, 0x0004f000, 0x0004a000, 0x0004a000},
2847 {0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e},
2833}; 2848};
2834 2849
2835static const u32 ar9271Common_9271[][2] = { 2850static const u32 ar9271Common_9271[][2] = {
@@ -3175,91 +3190,95 @@ static const u32 ar9271Common_japan_2484_cck_fir_coeff_9271[][2] = {
3175 {0x0000a1fc, 0xca9228ee}, 3190 {0x0000a1fc, 0xca9228ee},
3176}; 3191};
3177 3192
3178static const u32 ar9271Modes_9271_1_0_only[][6] = { 3193static const u32 ar9271Modes_9271_1_0_only[][5] = {
3179 {0x00009910, 0x30002311, 0x30002311, 0x30002311, 0x30002311, 0x30002311}, 3194 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
3180 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001}, 3195 {0x00009910, 0x30002311, 0x30002311, 0x30002311, 0x30002311},
3196 {0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001},
3181}; 3197};
3182 3198
3183static const u32 ar9271Modes_9271_ANI_reg[][6] = { 3199static const u32 ar9271Modes_9271_ANI_reg[][5] = {
3184 {0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2}, 3200 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
3185 {0x0000985c, 0x3139605e, 0x3139605e, 0x3137605e, 0x3137605e, 0x3139605e}, 3201 {0x00009850, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2, 0x6d4000e2},
3186 {0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e}, 3202 {0x0000985c, 0x3139605e, 0x3139605e, 0x3137605e, 0x3137605e},
3187 {0x0000986c, 0x06903881, 0x06903881, 0x06903881, 0x06903881, 0x06903881}, 3203 {0x00009858, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e},
3188 {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0}, 3204 {0x0000986c, 0x06903881, 0x06903881, 0x06903881, 0x06903881},
3189 {0x0000a208, 0x803e68c8, 0x803e68c8, 0x803e68c8, 0x803e68c8, 0x803e68c8}, 3205 {0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
3190 {0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d, 0xd00a800d}, 3206 {0x0000a208, 0x803e68c8, 0x803e68c8, 0x803e68c8, 0x803e68c8},
3191 {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, 3207 {0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d},
3208 {0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
3192}; 3209};
3193 3210
3194static const u32 ar9271Modes_normal_power_tx_gain_9271[][6] = { 3211static const u32 ar9271Modes_normal_power_tx_gain_9271[][5] = {
3195 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, 3212 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
3196 {0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200, 0x00000000}, 3213 {0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
3197 {0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208, 0x00000000}, 3214 {0x0000a304, 0x00000000, 0x00000000, 0x00009200, 0x00009200},
3198 {0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608, 0x00000000}, 3215 {0x0000a308, 0x00000000, 0x00000000, 0x00010208, 0x00010208},
3199 {0x0000a310, 0x00000000, 0x00000000, 0x0001e610, 0x0001e610, 0x00000000}, 3216 {0x0000a30c, 0x00000000, 0x00000000, 0x00019608, 0x00019608},
3200 {0x0000a314, 0x00000000, 0x00000000, 0x0002d6d0, 0x0002d6d0, 0x00000000}, 3217 {0x0000a310, 0x00000000, 0x00000000, 0x0001e610, 0x0001e610},
3201 {0x0000a318, 0x00000000, 0x00000000, 0x00039758, 0x00039758, 0x00000000}, 3218 {0x0000a314, 0x00000000, 0x00000000, 0x00024650, 0x00024650},
3202 {0x0000a31c, 0x00000000, 0x00000000, 0x0003b759, 0x0003b759, 0x00000000}, 3219 {0x0000a318, 0x00000000, 0x00000000, 0x0002d6d0, 0x0002d6d0},
3203 {0x0000a320, 0x00000000, 0x00000000, 0x0003d75a, 0x0003d75a, 0x00000000}, 3220 {0x0000a31c, 0x00000000, 0x00000000, 0x000316d2, 0x000316d2},
3204 {0x0000a324, 0x00000000, 0x00000000, 0x0004175c, 0x0004175c, 0x00000000}, 3221 {0x0000a320, 0x00000000, 0x00000000, 0x00039758, 0x00039758},
3205 {0x0000a328, 0x00000000, 0x00000000, 0x0004575e, 0x0004575e, 0x00000000}, 3222 {0x0000a324, 0x00000000, 0x00000000, 0x0003b759, 0x0003b759},
3206 {0x0000a32c, 0x00000000, 0x00000000, 0x0004979f, 0x0004979f, 0x00000000}, 3223 {0x0000a328, 0x00000000, 0x00000000, 0x0003d75a, 0x0003d75a},
3207 {0x0000a330, 0x00000000, 0x00000000, 0x0004d7df, 0x0004d7df, 0x00000000}, 3224 {0x0000a32c, 0x00000000, 0x00000000, 0x0004175c, 0x0004175c},
3208 {0x0000a334, 0x000368de, 0x000368de, 0x000368de, 0x000368de, 0x00000000}, 3225 {0x0000a330, 0x00000000, 0x00000000, 0x0004575e, 0x0004575e},
3209 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000}, 3226 {0x0000a334, 0x000368de, 0x000368de, 0x0004979f, 0x0004979f},
3210 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000}, 3227 {0x0000a338, 0x0003891e, 0x0003891e, 0x0004d7df, 0x0004d7df},
3211 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3228 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e},
3212 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3229 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3213 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3230 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3214 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3231 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3215 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3232 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3216 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3233 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3217 {0x00007838, 0x00000029, 0x00000029, 0x00000029, 0x00000029, 0x00000029}, 3234 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3218 {0x00007824, 0x00d8abff, 0x00d8abff, 0x00d8abff, 0x00d8abff, 0x00d8abff}, 3235 {0x00007838, 0x00000029, 0x00000029, 0x00000029, 0x00000029},
3219 {0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4}, 3236 {0x00007824, 0x00d8abff, 0x00d8abff, 0x00d8abff, 0x00d8abff},
3220 {0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04}, 3237 {0x0000786c, 0x48609eb4, 0x48609eb4, 0x48609eb4, 0x48609eb4},
3221 {0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a218652, 0x0a218652, 0x0a22a652}, 3238 {0x00007820, 0x00000c04, 0x00000c04, 0x00000c04, 0x00000c04},
3222 {0x0000a278, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd}, 3239 {0x0000a274, 0x0a21c652, 0x0a21c652, 0x0a21c652, 0x0a21c652},
3223 {0x0000a27c, 0x050e83bd, 0x050e83bd, 0x050e83bd, 0x050e83bd, 0x050e83bd}, 3240 {0x0000a278, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd},
3224 {0x0000a394, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd}, 3241 {0x0000a27c, 0x050e83bd, 0x050e83bd, 0x050e83bd, 0x050e83bd},
3225 {0x0000a398, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd}, 3242 {0x0000a394, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd},
3226 {0x0000a3dc, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd}, 3243 {0x0000a398, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd},
3227 {0x0000a3e0, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd}, 3244 {0x0000a3dc, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd, 0x3bdef7bd},
3245 {0x0000a3e0, 0x000003bd, 0x000003bd, 0x000003bd, 0x000003bd},
3228}; 3246};
3229 3247
3230static const u32 ar9271Modes_high_power_tx_gain_9271[][6] = { 3248static const u32 ar9271Modes_high_power_tx_gain_9271[][5] = {
3231 {0x0000a300, 0x00000000, 0x00000000, 0x00010000, 0x00010000, 0x00000000}, 3249 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
3232 {0x0000a304, 0x00000000, 0x00000000, 0x00016200, 0x00016200, 0x00000000}, 3250 {0x0000a300, 0x00000000, 0x00000000, 0x00010000, 0x00010000},
3233 {0x0000a308, 0x00000000, 0x00000000, 0x00018201, 0x00018201, 0x00000000}, 3251 {0x0000a304, 0x00000000, 0x00000000, 0x00016200, 0x00016200},
3234 {0x0000a30c, 0x00000000, 0x00000000, 0x0001b240, 0x0001b240, 0x00000000}, 3252 {0x0000a308, 0x00000000, 0x00000000, 0x00018201, 0x00018201},
3235 {0x0000a310, 0x00000000, 0x00000000, 0x0001d241, 0x0001d241, 0x00000000}, 3253 {0x0000a30c, 0x00000000, 0x00000000, 0x0001b240, 0x0001b240},
3236 {0x0000a314, 0x00000000, 0x00000000, 0x0001f600, 0x0001f600, 0x00000000}, 3254 {0x0000a310, 0x00000000, 0x00000000, 0x0001d241, 0x0001d241},
3237 {0x0000a318, 0x00000000, 0x00000000, 0x00022800, 0x00022800, 0x00000000}, 3255 {0x0000a314, 0x00000000, 0x00000000, 0x0001f600, 0x0001f600},
3238 {0x0000a31c, 0x00000000, 0x00000000, 0x00026802, 0x00026802, 0x00000000}, 3256 {0x0000a318, 0x00000000, 0x00000000, 0x00022800, 0x00022800},
3239 {0x0000a320, 0x00000000, 0x00000000, 0x0002b805, 0x0002b805, 0x00000000}, 3257 {0x0000a31c, 0x00000000, 0x00000000, 0x00026802, 0x00026802},
3240 {0x0000a324, 0x00000000, 0x00000000, 0x0002ea41, 0x0002ea41, 0x00000000}, 3258 {0x0000a320, 0x00000000, 0x00000000, 0x0002b805, 0x0002b805},
3241 {0x0000a328, 0x00000000, 0x00000000, 0x00038b00, 0x00038b00, 0x00000000}, 3259 {0x0000a324, 0x00000000, 0x00000000, 0x0002ea41, 0x0002ea41},
3242 {0x0000a32c, 0x00000000, 0x00000000, 0x0003ab40, 0x0003ab40, 0x00000000}, 3260 {0x0000a328, 0x00000000, 0x00000000, 0x00038b00, 0x00038b00},
3243 {0x0000a330, 0x00000000, 0x00000000, 0x0003cd80, 0x0003cd80, 0x00000000}, 3261 {0x0000a32c, 0x00000000, 0x00000000, 0x0003ab40, 0x0003ab40},
3244 {0x0000a334, 0x000368de, 0x000368de, 0x000368de, 0x000368de, 0x00000000}, 3262 {0x0000a330, 0x00000000, 0x00000000, 0x0003cd80, 0x0003cd80},
3245 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e, 0x00000000}, 3263 {0x0000a334, 0x000368de, 0x000368de, 0x000368de, 0x000368de},
3246 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x00000000}, 3264 {0x0000a338, 0x0003891e, 0x0003891e, 0x0003891e, 0x0003891e},
3247 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3265 {0x0000a33c, 0x0003a95e, 0x0003a95e, 0x0003a95e, 0x0003a95e},
3248 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3266 {0x0000a340, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3249 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3267 {0x0000a344, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3250 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3268 {0x0000a348, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3251 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3269 {0x0000a34c, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3252 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x00000000}, 3270 {0x0000a350, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3253 {0x00007838, 0x0000002b, 0x0000002b, 0x0000002b, 0x0000002b, 0x0000002b}, 3271 {0x0000a354, 0x0003e9df, 0x0003e9df, 0x0003e9df, 0x0003e9df},
3254 {0x00007824, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff}, 3272 {0x00007838, 0x0000002b, 0x0000002b, 0x0000002b, 0x0000002b},
3255 {0x0000786c, 0x08609eb6, 0x08609eb6, 0x08609eba, 0x08609eba, 0x08609eb6}, 3273 {0x00007824, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff, 0x00d8a7ff},
3256 {0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00}, 3274 {0x0000786c, 0x08609eb6, 0x08609eb6, 0x08609eba, 0x08609eba},
3257 {0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a214652, 0x0a214652, 0x0a22a652}, 3275 {0x00007820, 0x00000c00, 0x00000c00, 0x00000c00, 0x00000c00},
3258 {0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7}, 3276 {0x0000a274, 0x0a22a652, 0x0a22a652, 0x0a214652, 0x0a214652},
3259 {0x0000a27c, 0x05018063, 0x05038063, 0x05018063, 0x05018063, 0x05018063}, 3277 {0x0000a278, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7, 0x0e739ce7},
3260 {0x0000a394, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63}, 3278 {0x0000a27c, 0x05018063, 0x05038063, 0x05018063, 0x05018063},
3261 {0x0000a398, 0x00000063, 0x00000063, 0x00000063, 0x00000063, 0x00000063}, 3279 {0x0000a394, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63},
3262 {0x0000a3dc, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63}, 3280 {0x0000a398, 0x00000063, 0x00000063, 0x00000063, 0x00000063},
3263 {0x0000a3e0, 0x00000063, 0x00000063, 0x00000063, 0x00000063, 0x00000063}, 3281 {0x0000a3dc, 0x06318c63, 0x06318c63, 0x06318c63, 0x06318c63},
3282 {0x0000a3e0, 0x00000063, 0x00000063, 0x00000063, 0x00000063},
3264}; 3283};
3265 3284
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_mac.c b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
index 33deb0d574b0..f7d8e516a2a9 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
@@ -170,33 +170,104 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
170 return true; 170 return true;
171} 171}
172 172
173static void ar9002_hw_fill_txdesc(struct ath_hw *ah, void *ds, u32 seglen, 173static void
174 bool is_firstseg, bool is_lastseg, 174ar9002_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
175 const void *ds0, dma_addr_t buf_addr,
176 unsigned int qcu)
177{ 175{
178 struct ar5416_desc *ads = AR5416DESC(ds); 176 struct ar5416_desc *ads = AR5416DESC(ds);
177 u32 ctl1, ctl6;
179 178
180 ads->ds_data = buf_addr;
181
182 if (is_firstseg) {
183 ads->ds_ctl1 |= seglen | (is_lastseg ? 0 : AR_TxMore);
184 } else if (is_lastseg) {
185 ads->ds_ctl0 = 0;
186 ads->ds_ctl1 = seglen;
187 ads->ds_ctl2 = AR5416DESC_CONST(ds0)->ds_ctl2;
188 ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3;
189 } else {
190 ads->ds_ctl0 = 0;
191 ads->ds_ctl1 = seglen | AR_TxMore;
192 ads->ds_ctl2 = 0;
193 ads->ds_ctl3 = 0;
194 }
195 ads->ds_txstatus0 = ads->ds_txstatus1 = 0; 179 ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
196 ads->ds_txstatus2 = ads->ds_txstatus3 = 0; 180 ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
197 ads->ds_txstatus4 = ads->ds_txstatus5 = 0; 181 ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
198 ads->ds_txstatus6 = ads->ds_txstatus7 = 0; 182 ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
199 ads->ds_txstatus8 = ads->ds_txstatus9 = 0; 183 ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
184
185 ACCESS_ONCE(ads->ds_link) = i->link;
186 ACCESS_ONCE(ads->ds_data) = i->buf_addr[0];
187
188 ctl1 = i->buf_len[0] | (i->is_last ? 0 : AR_TxMore);
189 ctl6 = SM(i->keytype, AR_EncrType);
190
191 if (AR_SREV_9285(ah)) {
192 ads->ds_ctl8 = 0;
193 ads->ds_ctl9 = 0;
194 ads->ds_ctl10 = 0;
195 ads->ds_ctl11 = 0;
196 }
197
198 if ((i->is_first || i->is_last) &&
199 i->aggr != AGGR_BUF_MIDDLE && i->aggr != AGGR_BUF_LAST) {
200 ACCESS_ONCE(ads->ds_ctl2) = set11nTries(i->rates, 0)
201 | set11nTries(i->rates, 1)
202 | set11nTries(i->rates, 2)
203 | set11nTries(i->rates, 3)
204 | (i->dur_update ? AR_DurUpdateEna : 0)
205 | SM(0, AR_BurstDur);
206
207 ACCESS_ONCE(ads->ds_ctl3) = set11nRate(i->rates, 0)
208 | set11nRate(i->rates, 1)
209 | set11nRate(i->rates, 2)
210 | set11nRate(i->rates, 3);
211 } else {
212 ACCESS_ONCE(ads->ds_ctl2) = 0;
213 ACCESS_ONCE(ads->ds_ctl3) = 0;
214 }
215
216 if (!i->is_first) {
217 ACCESS_ONCE(ads->ds_ctl0) = 0;
218 ACCESS_ONCE(ads->ds_ctl1) = ctl1;
219 ACCESS_ONCE(ads->ds_ctl6) = ctl6;
220 return;
221 }
222
223 ctl1 |= (i->keyix != ATH9K_TXKEYIX_INVALID ? SM(i->keyix, AR_DestIdx) : 0)
224 | SM(i->type, AR_FrameType)
225 | (i->flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
226 | (i->flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
227 | (i->flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
228
229 switch (i->aggr) {
230 case AGGR_BUF_FIRST:
231 ctl6 |= SM(i->aggr_len, AR_AggrLen);
232 /* fall through */
233 case AGGR_BUF_MIDDLE:
234 ctl1 |= AR_IsAggr | AR_MoreAggr;
235 ctl6 |= SM(i->ndelim, AR_PadDelim);
236 break;
237 case AGGR_BUF_LAST:
238 ctl1 |= AR_IsAggr;
239 break;
240 case AGGR_BUF_NONE:
241 break;
242 }
243
244 ACCESS_ONCE(ads->ds_ctl0) = (i->pkt_len & AR_FrameLen)
245 | (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
246 | SM(i->txpower, AR_XmitPower)
247 | (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
248 | (i->flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
249 | (i->keyix != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
250 | (i->flags & ATH9K_TXDESC_CLRDMASK ? AR_ClrDestMask : 0)
251 | (i->flags & ATH9K_TXDESC_RTSENA ? AR_RTSEnable :
252 (i->flags & ATH9K_TXDESC_CTSENA ? AR_CTSEnable : 0));
253
254 ACCESS_ONCE(ads->ds_ctl1) = ctl1;
255 ACCESS_ONCE(ads->ds_ctl6) = ctl6;
256
257 if (i->aggr == AGGR_BUF_MIDDLE || i->aggr == AGGR_BUF_LAST)
258 return;
259
260 ACCESS_ONCE(ads->ds_ctl4) = set11nPktDurRTSCTS(i->rates, 0)
261 | set11nPktDurRTSCTS(i->rates, 1);
262
263 ACCESS_ONCE(ads->ds_ctl5) = set11nPktDurRTSCTS(i->rates, 2)
264 | set11nPktDurRTSCTS(i->rates, 3);
265
266 ACCESS_ONCE(ads->ds_ctl7) = set11nRateFlags(i->rates, 0)
267 | set11nRateFlags(i->rates, 1)
268 | set11nRateFlags(i->rates, 2)
269 | set11nRateFlags(i->rates, 3)
270 | SM(i->rtscts_rate, AR_RTSCTSRate);
200} 271}
201 272
202static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds, 273static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,
@@ -271,145 +342,6 @@ static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,
271 return 0; 342 return 0;
272} 343}
273 344
274static void ar9002_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
275 u32 pktLen, enum ath9k_pkt_type type,
276 u32 txPower, u8 keyIx,
277 enum ath9k_key_type keyType, u32 flags)
278{
279 struct ar5416_desc *ads = AR5416DESC(ds);
280
281 if (txPower > 63)
282 txPower = 63;
283
284 ads->ds_ctl0 = (pktLen & AR_FrameLen)
285 | (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
286 | SM(txPower, AR_XmitPower)
287 | (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
288 | (flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
289 | (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0);
290
291 ads->ds_ctl1 =
292 (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
293 | SM(type, AR_FrameType)
294 | (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
295 | (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
296 | (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
297
298 ads->ds_ctl6 = SM(keyType, AR_EncrType);
299
300 if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
301 ads->ds_ctl8 = 0;
302 ads->ds_ctl9 = 0;
303 ads->ds_ctl10 = 0;
304 ads->ds_ctl11 = 0;
305 }
306}
307
308static void ar9002_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
309{
310 struct ar5416_desc *ads = AR5416DESC(ds);
311
312 if (val)
313 ads->ds_ctl0 |= AR_ClrDestMask;
314 else
315 ads->ds_ctl0 &= ~AR_ClrDestMask;
316}
317
318static void ar9002_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
319 void *lastds,
320 u32 durUpdateEn, u32 rtsctsRate,
321 u32 rtsctsDuration,
322 struct ath9k_11n_rate_series series[],
323 u32 nseries, u32 flags)
324{
325 struct ar5416_desc *ads = AR5416DESC(ds);
326 struct ar5416_desc *last_ads = AR5416DESC(lastds);
327 u32 ds_ctl0;
328
329 if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
330 ds_ctl0 = ads->ds_ctl0;
331
332 if (flags & ATH9K_TXDESC_RTSENA) {
333 ds_ctl0 &= ~AR_CTSEnable;
334 ds_ctl0 |= AR_RTSEnable;
335 } else {
336 ds_ctl0 &= ~AR_RTSEnable;
337 ds_ctl0 |= AR_CTSEnable;
338 }
339
340 ads->ds_ctl0 = ds_ctl0;
341 } else {
342 ads->ds_ctl0 =
343 (ads->ds_ctl0 & ~(AR_RTSEnable | AR_CTSEnable));
344 }
345
346 ads->ds_ctl2 = set11nTries(series, 0)
347 | set11nTries(series, 1)
348 | set11nTries(series, 2)
349 | set11nTries(series, 3)
350 | (durUpdateEn ? AR_DurUpdateEna : 0)
351 | SM(0, AR_BurstDur);
352
353 ads->ds_ctl3 = set11nRate(series, 0)
354 | set11nRate(series, 1)
355 | set11nRate(series, 2)
356 | set11nRate(series, 3);
357
358 ads->ds_ctl4 = set11nPktDurRTSCTS(series, 0)
359 | set11nPktDurRTSCTS(series, 1);
360
361 ads->ds_ctl5 = set11nPktDurRTSCTS(series, 2)
362 | set11nPktDurRTSCTS(series, 3);
363
364 ads->ds_ctl7 = set11nRateFlags(series, 0)
365 | set11nRateFlags(series, 1)
366 | set11nRateFlags(series, 2)
367 | set11nRateFlags(series, 3)
368 | SM(rtsctsRate, AR_RTSCTSRate);
369 last_ads->ds_ctl2 = ads->ds_ctl2;
370 last_ads->ds_ctl3 = ads->ds_ctl3;
371}
372
373static void ar9002_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
374 u32 aggrLen)
375{
376 struct ar5416_desc *ads = AR5416DESC(ds);
377
378 ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
379 ads->ds_ctl6 &= ~AR_AggrLen;
380 ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen);
381}
382
383static void ar9002_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
384 u32 numDelims)
385{
386 struct ar5416_desc *ads = AR5416DESC(ds);
387 unsigned int ctl6;
388
389 ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
390
391 ctl6 = ads->ds_ctl6;
392 ctl6 &= ~AR_PadDelim;
393 ctl6 |= SM(numDelims, AR_PadDelim);
394 ads->ds_ctl6 = ctl6;
395}
396
397static void ar9002_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
398{
399 struct ar5416_desc *ads = AR5416DESC(ds);
400
401 ads->ds_ctl1 |= AR_IsAggr;
402 ads->ds_ctl1 &= ~AR_MoreAggr;
403 ads->ds_ctl6 &= ~AR_PadDelim;
404}
405
406static void ar9002_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
407{
408 struct ar5416_desc *ads = AR5416DESC(ds);
409
410 ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
411}
412
413void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, 345void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
414 u32 size, u32 flags) 346 u32 size, u32 flags)
415{ 347{
@@ -433,13 +365,6 @@ void ar9002_hw_attach_mac_ops(struct ath_hw *ah)
433 ops->rx_enable = ar9002_hw_rx_enable; 365 ops->rx_enable = ar9002_hw_rx_enable;
434 ops->set_desc_link = ar9002_hw_set_desc_link; 366 ops->set_desc_link = ar9002_hw_set_desc_link;
435 ops->get_isr = ar9002_hw_get_isr; 367 ops->get_isr = ar9002_hw_get_isr;
436 ops->fill_txdesc = ar9002_hw_fill_txdesc; 368 ops->set_txdesc = ar9002_set_txdesc;
437 ops->proc_txdesc = ar9002_hw_proc_txdesc; 369 ops->proc_txdesc = ar9002_hw_proc_txdesc;
438 ops->set11n_txdesc = ar9002_hw_set11n_txdesc;
439 ops->set11n_ratescenario = ar9002_hw_set11n_ratescenario;
440 ops->set11n_aggr_first = ar9002_hw_set11n_aggr_first;
441 ops->set11n_aggr_middle = ar9002_hw_set11n_aggr_middle;
442 ops->set11n_aggr_last = ar9002_hw_set11n_aggr_last;
443 ops->clr11n_aggr = ar9002_hw_clr11n_aggr;
444 ops->set_clrdmask = ar9002_hw_set_clrdmask;
445} 370}
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index fa35a0235f44..e4b1a8300854 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -615,11 +615,10 @@ static void ar9003_hw_detect_outlier(int *mp_coeff, int nmeasurement,
615{ 615{
616 int mp_max = -64, max_idx = 0; 616 int mp_max = -64, max_idx = 0;
617 int mp_min = 63, min_idx = 0; 617 int mp_min = 63, min_idx = 0;
618 int mp_avg = 0, i, outlier_idx = 0; 618 int mp_avg = 0, i, outlier_idx = 0, mp_count = 0;
619 619
620 /* find min/max mismatch across all calibrated gains */ 620 /* find min/max mismatch across all calibrated gains */
621 for (i = 0; i < nmeasurement; i++) { 621 for (i = 0; i < nmeasurement; i++) {
622 mp_avg += mp_coeff[i];
623 if (mp_coeff[i] > mp_max) { 622 if (mp_coeff[i] > mp_max) {
624 mp_max = mp_coeff[i]; 623 mp_max = mp_coeff[i];
625 max_idx = i; 624 max_idx = i;
@@ -632,10 +631,20 @@ static void ar9003_hw_detect_outlier(int *mp_coeff, int nmeasurement,
632 /* find average (exclude max abs value) */ 631 /* find average (exclude max abs value) */
633 for (i = 0; i < nmeasurement; i++) { 632 for (i = 0; i < nmeasurement; i++) {
634 if ((abs(mp_coeff[i]) < abs(mp_max)) || 633 if ((abs(mp_coeff[i]) < abs(mp_max)) ||
635 (abs(mp_coeff[i]) < abs(mp_min))) 634 (abs(mp_coeff[i]) < abs(mp_min))) {
636 mp_avg += mp_coeff[i]; 635 mp_avg += mp_coeff[i];
636 mp_count++;
637 }
637 } 638 }
638 mp_avg /= (nmeasurement - 1); 639
640 /*
641 * finding mean magnitude/phase if possible, otherwise
642 * just use the last value as the mean
643 */
644 if (mp_count)
645 mp_avg /= mp_count;
646 else
647 mp_avg = mp_coeff[nmeasurement - 1];
639 648
640 /* detect outlier */ 649 /* detect outlier */
641 if (abs(mp_max - mp_min) > max_delta) { 650 if (abs(mp_max - mp_min) > max_delta) {
@@ -643,8 +652,9 @@ static void ar9003_hw_detect_outlier(int *mp_coeff, int nmeasurement,
643 outlier_idx = max_idx; 652 outlier_idx = max_idx;
644 else 653 else
645 outlier_idx = min_idx; 654 outlier_idx = min_idx;
655
656 mp_coeff[outlier_idx] = mp_avg;
646 } 657 }
647 mp_coeff[outlier_idx] = mp_avg;
648} 658}
649 659
650static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah, 660static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
@@ -875,6 +885,7 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
875 if (txiqcal_done) 885 if (txiqcal_done)
876 ar9003_hw_tx_iq_cal_post_proc(ah); 886 ar9003_hw_tx_iq_cal_post_proc(ah);
877 887
888 ath9k_hw_loadnf(ah, chan);
878 ath9k_hw_start_nfcal(ah, true); 889 ath9k_hw_start_nfcal(ah, true);
879 890
880 /* Initialize list pointers */ 891 /* Initialize list pointers */
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index cb4c32eaef61..51398f0063e2 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -22,25 +22,6 @@
22#define COMP_HDR_LEN 4 22#define COMP_HDR_LEN 4
23#define COMP_CKSUM_LEN 2 23#define COMP_CKSUM_LEN 2
24 24
25#define AR_CH0_TOP (0x00016288)
26#define AR_CH0_TOP_XPABIASLVL (0x300)
27#define AR_CH0_TOP_XPABIASLVL_S (8)
28
29#define AR_CH0_THERM (0x00016290)
30#define AR_CH0_THERM_XPABIASLVL_MSB 0x3
31#define AR_CH0_THERM_XPABIASLVL_MSB_S 0
32#define AR_CH0_THERM_XPASHORT2GND 0x4
33#define AR_CH0_THERM_XPASHORT2GND_S 2
34
35#define AR_SWITCH_TABLE_COM_ALL (0xffff)
36#define AR_SWITCH_TABLE_COM_ALL_S (0)
37
38#define AR_SWITCH_TABLE_COM2_ALL (0xffffff)
39#define AR_SWITCH_TABLE_COM2_ALL_S (0)
40
41#define AR_SWITCH_TABLE_ALL (0xfff)
42#define AR_SWITCH_TABLE_ALL_S (0)
43
44#define LE16(x) __constant_cpu_to_le16(x) 25#define LE16(x) __constant_cpu_to_le16(x)
45#define LE32(x) __constant_cpu_to_le32(x) 26#define LE32(x) __constant_cpu_to_le32(x)
46 27
@@ -69,7 +50,7 @@ static int ar9003_hw_power_interpolate(int32_t x,
69static const struct ar9300_eeprom ar9300_default = { 50static const struct ar9300_eeprom ar9300_default = {
70 .eepromVersion = 2, 51 .eepromVersion = 2,
71 .templateVersion = 2, 52 .templateVersion = 2,
72 .macAddr = {1, 2, 3, 4, 5, 6}, 53 .macAddr = {0, 2, 3, 4, 5, 6},
73 .custData = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 54 .custData = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
74 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, 55 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
75 .baseEepHeader = { 56 .baseEepHeader = {
@@ -158,7 +139,7 @@ static const struct ar9300_eeprom ar9300_default = {
158 .papdRateMaskHt20 = LE32(0x0cf0e0e0), 139 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
159 .papdRateMaskHt40 = LE32(0x6cf0e0e0), 140 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
160 .futureModal = { 141 .futureModal = {
161 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 142 0, 0, 0, 0, 0, 0, 0, 0,
162 }, 143 },
163 }, 144 },
164 .base_ext1 = { 145 .base_ext1 = {
@@ -307,7 +288,7 @@ static const struct ar9300_eeprom ar9300_default = {
307 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 288 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
308 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } }, 289 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
309 290
310 { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } }, 291 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0) } },
311 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 292 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
312 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 293 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
313 294
@@ -360,7 +341,7 @@ static const struct ar9300_eeprom ar9300_default = {
360 .papdRateMaskHt20 = LE32(0x0c80c080), 341 .papdRateMaskHt20 = LE32(0x0c80c080),
361 .papdRateMaskHt40 = LE32(0x0080c080), 342 .papdRateMaskHt40 = LE32(0x0080c080),
362 .futureModal = { 343 .futureModal = {
363 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 344 0, 0, 0, 0, 0, 0, 0, 0,
364 }, 345 },
365 }, 346 },
366 .base_ext2 = { 347 .base_ext2 = {
@@ -735,7 +716,7 @@ static const struct ar9300_eeprom ar9300_x113 = {
735 .papdRateMaskHt20 = LE32(0x0c80c080), 716 .papdRateMaskHt20 = LE32(0x0c80c080),
736 .papdRateMaskHt40 = LE32(0x0080c080), 717 .papdRateMaskHt40 = LE32(0x0080c080),
737 .futureModal = { 718 .futureModal = {
738 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 719 0, 0, 0, 0, 0, 0, 0, 0,
739 }, 720 },
740 }, 721 },
741 .base_ext1 = { 722 .base_ext1 = {
@@ -884,7 +865,7 @@ static const struct ar9300_eeprom ar9300_x113 = {
884 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 865 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
885 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } }, 866 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
886 867
887 { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } }, 868 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0) } },
888 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 869 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
889 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 870 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
890 871
@@ -937,7 +918,7 @@ static const struct ar9300_eeprom ar9300_x113 = {
937 .papdRateMaskHt20 = LE32(0x0cf0e0e0), 918 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
938 .papdRateMaskHt40 = LE32(0x6cf0e0e0), 919 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
939 .futureModal = { 920 .futureModal = {
940 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 921 0, 0, 0, 0, 0, 0, 0, 0,
941 }, 922 },
942 }, 923 },
943 .base_ext2 = { 924 .base_ext2 = {
@@ -1313,7 +1294,7 @@ static const struct ar9300_eeprom ar9300_h112 = {
1313 .papdRateMaskHt20 = LE32(0x80c080), 1294 .papdRateMaskHt20 = LE32(0x80c080),
1314 .papdRateMaskHt40 = LE32(0x80c080), 1295 .papdRateMaskHt40 = LE32(0x80c080),
1315 .futureModal = { 1296 .futureModal = {
1316 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1297 0, 0, 0, 0, 0, 0, 0, 0,
1317 }, 1298 },
1318 }, 1299 },
1319 .base_ext1 = { 1300 .base_ext1 = {
@@ -1515,7 +1496,7 @@ static const struct ar9300_eeprom ar9300_h112 = {
1515 .papdRateMaskHt20 = LE32(0x0cf0e0e0), 1496 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
1516 .papdRateMaskHt40 = LE32(0x6cf0e0e0), 1497 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
1517 .futureModal = { 1498 .futureModal = {
1518 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1499 0, 0, 0, 0, 0, 0, 0, 0,
1519 }, 1500 },
1520 }, 1501 },
1521 .base_ext2 = { 1502 .base_ext2 = {
@@ -1891,7 +1872,7 @@ static const struct ar9300_eeprom ar9300_x112 = {
1891 .papdRateMaskHt20 = LE32(0x0c80c080), 1872 .papdRateMaskHt20 = LE32(0x0c80c080),
1892 .papdRateMaskHt40 = LE32(0x0080c080), 1873 .papdRateMaskHt40 = LE32(0x0080c080),
1893 .futureModal = { 1874 .futureModal = {
1894 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1875 0, 0, 0, 0, 0, 0, 0, 0,
1895 }, 1876 },
1896 }, 1877 },
1897 .base_ext1 = { 1878 .base_ext1 = {
@@ -2040,7 +2021,7 @@ static const struct ar9300_eeprom ar9300_x112 = {
2040 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 2021 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
2041 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } }, 2022 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
2042 2023
2043 { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } }, 2024 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0) } },
2044 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 2025 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
2045 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } }, 2026 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
2046 2027
@@ -2093,7 +2074,7 @@ static const struct ar9300_eeprom ar9300_x112 = {
2093 .papdRateMaskHt20 = LE32(0x0cf0e0e0), 2074 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
2094 .papdRateMaskHt40 = LE32(0x6cf0e0e0), 2075 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
2095 .futureModal = { 2076 .futureModal = {
2096 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2077 0, 0, 0, 0, 0, 0, 0, 0,
2097 }, 2078 },
2098 }, 2079 },
2099 .base_ext2 = { 2080 .base_ext2 = {
@@ -2468,7 +2449,7 @@ static const struct ar9300_eeprom ar9300_h116 = {
2468 .papdRateMaskHt20 = LE32(0x0c80C080), 2449 .papdRateMaskHt20 = LE32(0x0c80C080),
2469 .papdRateMaskHt40 = LE32(0x0080C080), 2450 .papdRateMaskHt40 = LE32(0x0080C080),
2470 .futureModal = { 2451 .futureModal = {
2471 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2452 0, 0, 0, 0, 0, 0, 0, 0,
2472 }, 2453 },
2473 }, 2454 },
2474 .base_ext1 = { 2455 .base_ext1 = {
@@ -2670,7 +2651,7 @@ static const struct ar9300_eeprom ar9300_h116 = {
2670 .papdRateMaskHt20 = LE32(0x0cf0e0e0), 2651 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
2671 .papdRateMaskHt40 = LE32(0x6cf0e0e0), 2652 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
2672 .futureModal = { 2653 .futureModal = {
2673 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2654 0, 0, 0, 0, 0, 0, 0, 0,
2674 }, 2655 },
2675 }, 2656 },
2676 .base_ext2 = { 2657 .base_ext2 = {
@@ -3573,6 +3554,8 @@ static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
3573 3554
3574 if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah)) 3555 if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
3575 REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias); 3556 REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
3557 else if (AR_SREV_9480(ah))
3558 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
3576 else { 3559 else {
3577 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias); 3560 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
3578 REG_RMW_FIELD(ah, AR_CH0_THERM, 3561 REG_RMW_FIELD(ah, AR_CH0_THERM,
@@ -3583,6 +3566,19 @@ static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
3583 } 3566 }
3584} 3567}
3585 3568
3569static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
3570{
3571 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
3572 __le32 val;
3573
3574 if (is_2ghz)
3575 val = eep->modalHeader2G.switchcomspdt;
3576 else
3577 val = eep->modalHeader5G.switchcomspdt;
3578 return le32_to_cpu(val);
3579}
3580
3581
3586static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz) 3582static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
3587{ 3583{
3588 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; 3584 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
@@ -3637,7 +3633,36 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
3637 3633
3638 u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz); 3634 u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
3639 3635
3640 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM, AR_SWITCH_TABLE_COM_ALL, value); 3636 if (AR_SREV_9480(ah)) {
3637 if (AR_SREV_9480_10(ah)) {
3638 value &= ~AR_SWITCH_TABLE_COM_SPDT;
3639 value |= 0x00100000;
3640 }
3641 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
3642 AR_SWITCH_TABLE_COM_AR9480_ALL, value);
3643 } else
3644 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
3645 AR_SWITCH_TABLE_COM_ALL, value);
3646
3647
3648 /*
3649 * AR9480 defines new switch table for BT/WLAN,
3650 * here's new field name in XXX.ref for both 2G and 5G.
3651 * Register: [GLB_CONTROL] GLB_CONTROL (@0x20044)
3652 * 15:12 R/W SWITCH_TABLE_COM_SPDT_WLAN_RX
3653 * SWITCH_TABLE_COM_SPDT_WLAN_RX
3654 *
3655 * 11:8 R/W SWITCH_TABLE_COM_SPDT_WLAN_TX
3656 * SWITCH_TABLE_COM_SPDT_WLAN_TX
3657 *
3658 * 7:4 R/W SWITCH_TABLE_COM_SPDT_WLAN_IDLE
3659 * SWITCH_TABLE_COM_SPDT_WLAN_IDLE
3660 */
3661 if (AR_SREV_9480_20_OR_LATER(ah)) {
3662 value = ar9003_switch_com_spdt_get(ah, is2ghz);
3663 REG_RMW_FIELD(ah, AR_PHY_GLB_CONTROL,
3664 AR_SWITCH_TABLE_COM_SPDT_ALL, value);
3665 }
3641 3666
3642 value = ar9003_hw_ant_ctrl_common_2_get(ah, is2ghz); 3667 value = ar9003_hw_ant_ctrl_common_2_get(ah, is2ghz);
3643 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value); 3668 REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value);
@@ -3837,6 +3862,7 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
3837{ 3862{
3838 int internal_regulator = 3863 int internal_regulator =
3839 ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR); 3864 ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
3865 u32 reg_val;
3840 3866
3841 if (internal_regulator) { 3867 if (internal_regulator) {
3842 if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) { 3868 if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
@@ -3861,7 +3887,7 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
3861 } 3887 }
3862 } else { 3888 } else {
3863 reg_pmu_set = (5 << 1) | (7 << 4) | 3889 reg_pmu_set = (5 << 1) | (7 << 4) |
3864 (1 << 8) | (2 << 14) | 3890 (2 << 8) | (2 << 14) |
3865 (6 << 17) | (1 << 20) | 3891 (6 << 17) | (1 << 20) |
3866 (3 << 24) | (1 << 28); 3892 (3 << 24) | (1 << 28);
3867 } 3893 }
@@ -3881,13 +3907,16 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
3881 REG_WRITE(ah, AR_PHY_PMU2, reg_pmu_set); 3907 REG_WRITE(ah, AR_PHY_PMU2, reg_pmu_set);
3882 if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set)) 3908 if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
3883 return; 3909 return;
3910 } else if (AR_SREV_9480(ah)) {
3911 reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
3912 REG_WRITE(ah, AR_PHY_PMU1, reg_val);
3884 } else { 3913 } else {
3885 /* Internal regulator is ON. Write swreg register. */ 3914 /* Internal regulator is ON. Write swreg register. */
3886 int swreg = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG); 3915 reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
3887 REG_WRITE(ah, AR_RTC_REG_CONTROL1, 3916 REG_WRITE(ah, AR_RTC_REG_CONTROL1,
3888 REG_READ(ah, AR_RTC_REG_CONTROL1) & 3917 REG_READ(ah, AR_RTC_REG_CONTROL1) &
3889 (~AR_RTC_REG_CONTROL1_SWREG_PROGRAM)); 3918 (~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
3890 REG_WRITE(ah, AR_RTC_REG_CONTROL0, swreg); 3919 REG_WRITE(ah, AR_RTC_REG_CONTROL0, reg_val);
3891 /* Set REG_CONTROL1.SWREG_PROGRAM */ 3920 /* Set REG_CONTROL1.SWREG_PROGRAM */
3892 REG_WRITE(ah, AR_RTC_REG_CONTROL1, 3921 REG_WRITE(ah, AR_RTC_REG_CONTROL1,
3893 REG_READ(ah, 3922 REG_READ(ah,
@@ -3898,22 +3927,24 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
3898 if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) { 3927 if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
3899 REG_RMW_FIELD(ah, AR_PHY_PMU2, AR_PHY_PMU2_PGM, 0); 3928 REG_RMW_FIELD(ah, AR_PHY_PMU2, AR_PHY_PMU2_PGM, 0);
3900 while (REG_READ_FIELD(ah, AR_PHY_PMU2, 3929 while (REG_READ_FIELD(ah, AR_PHY_PMU2,
3901 AR_PHY_PMU2_PGM)) 3930 AR_PHY_PMU2_PGM))
3902 udelay(10); 3931 udelay(10);
3903 3932
3904 REG_RMW_FIELD(ah, AR_PHY_PMU1, AR_PHY_PMU1_PWD, 0x1); 3933 REG_RMW_FIELD(ah, AR_PHY_PMU1, AR_PHY_PMU1_PWD, 0x1);
3905 while (!REG_READ_FIELD(ah, AR_PHY_PMU1, 3934 while (!REG_READ_FIELD(ah, AR_PHY_PMU1,
3906 AR_PHY_PMU1_PWD)) 3935 AR_PHY_PMU1_PWD))
3907 udelay(10); 3936 udelay(10);
3908 REG_RMW_FIELD(ah, AR_PHY_PMU2, AR_PHY_PMU2_PGM, 0x1); 3937 REG_RMW_FIELD(ah, AR_PHY_PMU2, AR_PHY_PMU2_PGM, 0x1);
3909 while (!REG_READ_FIELD(ah, AR_PHY_PMU2, 3938 while (!REG_READ_FIELD(ah, AR_PHY_PMU2,
3910 AR_PHY_PMU2_PGM)) 3939 AR_PHY_PMU2_PGM))
3911 udelay(10); 3940 udelay(10);
3912 } else 3941 } else if (AR_SREV_9480(ah))
3913 REG_WRITE(ah, AR_RTC_SLEEP_CLK, 3942 REG_RMW_FIELD(ah, AR_PHY_PMU1, AR_PHY_PMU1_PWD, 0x1);
3914 (REG_READ(ah, 3943 else {
3915 AR_RTC_SLEEP_CLK) | 3944 reg_val = REG_READ(ah, AR_RTC_SLEEP_CLK) |
3916 AR_RTC_FORCE_SWREG_PRD)); 3945 AR_RTC_FORCE_SWREG_PRD;
3946 REG_WRITE(ah, AR_RTC_SLEEP_CLK, reg_val);
3947 }
3917 } 3948 }
3918 3949
3919} 3950}
@@ -4493,6 +4524,12 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah,
4493 tempSlope = eep->modalHeader5G.tempSlope; 4524 tempSlope = eep->modalHeader5G.tempSlope;
4494 4525
4495 REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope); 4526 REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
4527
4528 if (AR_SREV_9480_20(ah))
4529 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
4530 AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
4531
4532
4496 REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE, 4533 REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
4497 temperature[0]); 4534 temperature[0]);
4498 4535
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
index ab21a4915981..6335a867527e 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
@@ -233,7 +233,8 @@ struct ar9300_modal_eep_header {
233 u8 thresh62; 233 u8 thresh62;
234 __le32 papdRateMaskHt20; 234 __le32 papdRateMaskHt20;
235 __le32 papdRateMaskHt40; 235 __le32 papdRateMaskHt40;
236 u8 futureModal[10]; 236 __le16 switchcomspdt;
237 u8 futureModal[8];
237} __packed; 238} __packed;
238 239
239struct ar9300_cal_data_per_freq_op_loop { 240struct ar9300_cal_data_per_freq_op_loop {
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index b6839e695270..901f417bb036 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -22,6 +22,8 @@
22#include "ar9330_1p1_initvals.h" 22#include "ar9330_1p1_initvals.h"
23#include "ar9330_1p2_initvals.h" 23#include "ar9330_1p2_initvals.h"
24#include "ar9580_1p0_initvals.h" 24#include "ar9580_1p0_initvals.h"
25#include "ar9480_1p0_initvals.h"
26#include "ar9480_2p0_initvals.h"
25 27
26/* General hardware code for the AR9003 hadware family */ 28/* General hardware code for the AR9003 hadware family */
27 29
@@ -32,6 +34,14 @@
32 */ 34 */
33static void ar9003_hw_init_mode_regs(struct ath_hw *ah) 35static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
34{ 36{
37#define PCIE_PLL_ON_CREQ_DIS_L1_2P0 \
38 ar9480_pciephy_pll_on_clkreq_disable_L1_2p0
39
40#define AR9480_BB_CTX_COEFJ(x) \
41 ar9480_##x##_baseband_core_txfir_coeff_japan_2484
42
43#define AR9480_BBC_TXIFR_COEFFJ \
44 ar9480_2p0_baseband_core_txfir_coeff_japan_2484
35 if (AR_SREV_9330_11(ah)) { 45 if (AR_SREV_9330_11(ah)) {
36 /* mac */ 46 /* mac */
37 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); 47 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
@@ -254,6 +264,132 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
254 ar9485_1_1_pcie_phy_clkreq_disable_L1, 264 ar9485_1_1_pcie_phy_clkreq_disable_L1,
255 ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1), 265 ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1),
256 2); 266 2);
267 } else if (AR_SREV_9480_10(ah)) {
268 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
269 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9480_1p0_mac_core,
270 ARRAY_SIZE(ar9480_1p0_mac_core), 2);
271 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
272 ar9480_1p0_mac_postamble,
273 ARRAY_SIZE(ar9480_1p0_mac_postamble),
274 5);
275
276 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
277 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
278 ar9480_1p0_baseband_core,
279 ARRAY_SIZE(ar9480_1p0_baseband_core),
280 2);
281 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
282 ar9480_1p0_baseband_postamble,
283 ARRAY_SIZE(ar9480_1p0_baseband_postamble), 5);
284
285 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
286 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
287 ar9480_1p0_radio_core,
288 ARRAY_SIZE(ar9480_1p0_radio_core), 2);
289 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
290 ar9480_1p0_radio_postamble,
291 ARRAY_SIZE(ar9480_1p0_radio_postamble), 5);
292
293 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
294 ar9480_1p0_soc_preamble,
295 ARRAY_SIZE(ar9480_1p0_soc_preamble), 2);
296 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
297 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
298 ar9480_1p0_soc_postamble,
299 ARRAY_SIZE(ar9480_1p0_soc_postamble), 5);
300
301 INIT_INI_ARRAY(&ah->iniModesRxGain,
302 ar9480_common_rx_gain_table_1p0,
303 ARRAY_SIZE(ar9480_common_rx_gain_table_1p0), 2);
304
305 /* Awake -> Sleep Setting */
306 INIT_INI_ARRAY(&ah->iniPcieSerdes,
307 ar9480_pcie_phy_clkreq_disable_L1_1p0,
308 ARRAY_SIZE(ar9480_pcie_phy_clkreq_disable_L1_1p0),
309 2);
310
311 /* Sleep -> Awake Setting */
312 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
313 ar9480_pcie_phy_clkreq_disable_L1_1p0,
314 ARRAY_SIZE(ar9480_pcie_phy_clkreq_disable_L1_1p0),
315 2);
316
317 INIT_INI_ARRAY(&ah->iniModesAdditional,
318 ar9480_modes_fast_clock_1p0,
319 ARRAY_SIZE(ar9480_modes_fast_clock_1p0), 3);
320 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
321 AR9480_BB_CTX_COEFJ(1p0),
322 ARRAY_SIZE(AR9480_BB_CTX_COEFJ(1p0)), 2);
323
324 } else if (AR_SREV_9480_20(ah)) {
325
326 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
327 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9480_2p0_mac_core,
328 ARRAY_SIZE(ar9480_2p0_mac_core), 2);
329 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
330 ar9480_2p0_mac_postamble,
331 ARRAY_SIZE(ar9480_2p0_mac_postamble), 5);
332
333 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
334 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
335 ar9480_2p0_baseband_core,
336 ARRAY_SIZE(ar9480_2p0_baseband_core), 2);
337 INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
338 ar9480_2p0_baseband_postamble,
339 ARRAY_SIZE(ar9480_2p0_baseband_postamble), 5);
340
341 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
342 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
343 ar9480_2p0_radio_core,
344 ARRAY_SIZE(ar9480_2p0_radio_core), 2);
345 INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
346 ar9480_2p0_radio_postamble,
347 ARRAY_SIZE(ar9480_2p0_radio_postamble), 5);
348 INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant,
349 ar9480_2p0_radio_postamble_sys2ant,
350 ARRAY_SIZE(ar9480_2p0_radio_postamble_sys2ant),
351 5);
352
353 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
354 ar9480_2p0_soc_preamble,
355 ARRAY_SIZE(ar9480_2p0_soc_preamble), 2);
356 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
357 INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
358 ar9480_2p0_soc_postamble,
359 ARRAY_SIZE(ar9480_2p0_soc_postamble), 5);
360
361 INIT_INI_ARRAY(&ah->iniModesRxGain,
362 ar9480_common_rx_gain_table_2p0,
363 ARRAY_SIZE(ar9480_common_rx_gain_table_2p0), 2);
364
365 INIT_INI_ARRAY(&ah->ini_BTCOEX_MAX_TXPWR,
366 ar9480_2p0_BTCOEX_MAX_TXPWR_table,
367 ARRAY_SIZE(ar9480_2p0_BTCOEX_MAX_TXPWR_table),
368 2);
369
370 /* Awake -> Sleep Setting */
371 INIT_INI_ARRAY(&ah->iniPcieSerdes,
372 PCIE_PLL_ON_CREQ_DIS_L1_2P0,
373 ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
374 2);
375 /* Sleep -> Awake Setting */
376 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
377 PCIE_PLL_ON_CREQ_DIS_L1_2P0,
378 ARRAY_SIZE(PCIE_PLL_ON_CREQ_DIS_L1_2P0),
379 2);
380
381 /* Fast clock modal settings */
382 INIT_INI_ARRAY(&ah->iniModesAdditional,
383 ar9480_modes_fast_clock_2p0,
384 ARRAY_SIZE(ar9480_modes_fast_clock_2p0), 3);
385
386 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
387 AR9480_BB_CTX_COEFJ(2p0),
388 ARRAY_SIZE(AR9480_BB_CTX_COEFJ(2p0)), 2);
389
390 INIT_INI_ARRAY(&ah->ini_japan2484, AR9480_BBC_TXIFR_COEFFJ,
391 ARRAY_SIZE(AR9480_BBC_TXIFR_COEFFJ), 2);
392
257 } else if (AR_SREV_9580(ah)) { 393 } else if (AR_SREV_9580(ah)) {
258 /* mac */ 394 /* mac */
259 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); 395 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
@@ -374,208 +510,293 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
374 } 510 }
375} 511}
376 512
513static void ar9003_tx_gain_table_mode0(struct ath_hw *ah)
514{
515 if (AR_SREV_9330_12(ah))
516 INIT_INI_ARRAY(&ah->iniModesTxGain,
517 ar9331_modes_lowest_ob_db_tx_gain_1p2,
518 ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
519 5);
520 else if (AR_SREV_9330_11(ah))
521 INIT_INI_ARRAY(&ah->iniModesTxGain,
522 ar9331_modes_lowest_ob_db_tx_gain_1p1,
523 ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
524 5);
525 else if (AR_SREV_9340(ah))
526 INIT_INI_ARRAY(&ah->iniModesTxGain,
527 ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
528 ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
529 5);
530 else if (AR_SREV_9485_11(ah))
531 INIT_INI_ARRAY(&ah->iniModesTxGain,
532 ar9485_modes_lowest_ob_db_tx_gain_1_1,
533 ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
534 5);
535 else if (AR_SREV_9580(ah))
536 INIT_INI_ARRAY(&ah->iniModesTxGain,
537 ar9580_1p0_lowest_ob_db_tx_gain_table,
538 ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
539 5);
540 else if (AR_SREV_9480_10(ah))
541 INIT_INI_ARRAY(&ah->iniModesTxGain,
542 ar9480_modes_low_ob_db_tx_gain_table_1p0,
543 ARRAY_SIZE(ar9480_modes_low_ob_db_tx_gain_table_1p0),
544 5);
545 else if (AR_SREV_9480_20(ah))
546 INIT_INI_ARRAY(&ah->iniModesTxGain,
547 ar9480_modes_low_ob_db_tx_gain_table_2p0,
548 ARRAY_SIZE(ar9480_modes_low_ob_db_tx_gain_table_2p0),
549 5);
550 else
551 INIT_INI_ARRAY(&ah->iniModesTxGain,
552 ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
553 ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
554 5);
555}
556
557static void ar9003_tx_gain_table_mode1(struct ath_hw *ah)
558{
559 if (AR_SREV_9330_12(ah))
560 INIT_INI_ARRAY(&ah->iniModesTxGain,
561 ar9331_modes_high_ob_db_tx_gain_1p2,
562 ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p2),
563 5);
564 else if (AR_SREV_9330_11(ah))
565 INIT_INI_ARRAY(&ah->iniModesTxGain,
566 ar9331_modes_high_ob_db_tx_gain_1p1,
567 ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p1),
568 5);
569 else if (AR_SREV_9340(ah))
570 INIT_INI_ARRAY(&ah->iniModesTxGain,
571 ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
572 ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
573 5);
574 else if (AR_SREV_9485_11(ah))
575 INIT_INI_ARRAY(&ah->iniModesTxGain,
576 ar9485Modes_high_ob_db_tx_gain_1_1,
577 ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
578 5);
579 else if (AR_SREV_9580(ah))
580 INIT_INI_ARRAY(&ah->iniModesTxGain,
581 ar9580_1p0_high_ob_db_tx_gain_table,
582 ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
583 5);
584 else if (AR_SREV_9480_10(ah))
585 INIT_INI_ARRAY(&ah->iniModesTxGain,
586 ar9480_modes_high_ob_db_tx_gain_table_1p0,
587 ARRAY_SIZE(ar9480_modes_high_ob_db_tx_gain_table_1p0),
588 5);
589 else if (AR_SREV_9480_20(ah))
590 INIT_INI_ARRAY(&ah->iniModesTxGain,
591 ar9480_modes_high_ob_db_tx_gain_table_2p0,
592 ARRAY_SIZE(ar9480_modes_high_ob_db_tx_gain_table_2p0),
593 5);
594 else
595 INIT_INI_ARRAY(&ah->iniModesTxGain,
596 ar9300Modes_high_ob_db_tx_gain_table_2p2,
597 ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
598 5);
599}
600
601static void ar9003_tx_gain_table_mode2(struct ath_hw *ah)
602{
603 if (AR_SREV_9330_12(ah))
604 INIT_INI_ARRAY(&ah->iniModesTxGain,
605 ar9331_modes_low_ob_db_tx_gain_1p2,
606 ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p2),
607 5);
608 else if (AR_SREV_9330_11(ah))
609 INIT_INI_ARRAY(&ah->iniModesTxGain,
610 ar9331_modes_low_ob_db_tx_gain_1p1,
611 ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p1),
612 5);
613 else if (AR_SREV_9340(ah))
614 INIT_INI_ARRAY(&ah->iniModesTxGain,
615 ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
616 ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
617 5);
618 else if (AR_SREV_9485_11(ah))
619 INIT_INI_ARRAY(&ah->iniModesTxGain,
620 ar9485Modes_low_ob_db_tx_gain_1_1,
621 ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
622 5);
623 else if (AR_SREV_9580(ah))
624 INIT_INI_ARRAY(&ah->iniModesTxGain,
625 ar9580_1p0_low_ob_db_tx_gain_table,
626 ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
627 5);
628 else
629 INIT_INI_ARRAY(&ah->iniModesTxGain,
630 ar9300Modes_low_ob_db_tx_gain_table_2p2,
631 ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
632 5);
633}
634
635static void ar9003_tx_gain_table_mode3(struct ath_hw *ah)
636{
637 if (AR_SREV_9330_12(ah))
638 INIT_INI_ARRAY(&ah->iniModesTxGain,
639 ar9331_modes_high_power_tx_gain_1p2,
640 ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p2),
641 5);
642 else if (AR_SREV_9330_11(ah))
643 INIT_INI_ARRAY(&ah->iniModesTxGain,
644 ar9331_modes_high_power_tx_gain_1p1,
645 ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p1),
646 5);
647 else if (AR_SREV_9340(ah))
648 INIT_INI_ARRAY(&ah->iniModesTxGain,
649 ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
650 ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
651 5);
652 else if (AR_SREV_9485_11(ah))
653 INIT_INI_ARRAY(&ah->iniModesTxGain,
654 ar9485Modes_high_power_tx_gain_1_1,
655 ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
656 5);
657 else if (AR_SREV_9580(ah))
658 INIT_INI_ARRAY(&ah->iniModesTxGain,
659 ar9580_1p0_high_power_tx_gain_table,
660 ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table),
661 5);
662 else
663 INIT_INI_ARRAY(&ah->iniModesTxGain,
664 ar9300Modes_high_power_tx_gain_table_2p2,
665 ARRAY_SIZE(ar9300Modes_high_power_tx_gain_table_2p2),
666 5);
667}
668
377static void ar9003_tx_gain_table_apply(struct ath_hw *ah) 669static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
378{ 670{
379 switch (ar9003_hw_get_tx_gain_idx(ah)) { 671 switch (ar9003_hw_get_tx_gain_idx(ah)) {
380 case 0: 672 case 0:
381 default: 673 default:
382 if (AR_SREV_9330_12(ah)) 674 ar9003_tx_gain_table_mode0(ah);
383 INIT_INI_ARRAY(&ah->iniModesTxGain,
384 ar9331_modes_lowest_ob_db_tx_gain_1p2,
385 ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2),
386 5);
387 else if (AR_SREV_9330_11(ah))
388 INIT_INI_ARRAY(&ah->iniModesTxGain,
389 ar9331_modes_lowest_ob_db_tx_gain_1p1,
390 ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1),
391 5);
392 else if (AR_SREV_9340(ah))
393 INIT_INI_ARRAY(&ah->iniModesTxGain,
394 ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
395 ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
396 5);
397 else if (AR_SREV_9485_11(ah))
398 INIT_INI_ARRAY(&ah->iniModesTxGain,
399 ar9485_modes_lowest_ob_db_tx_gain_1_1,
400 ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
401 5);
402 else if (AR_SREV_9580(ah))
403 INIT_INI_ARRAY(&ah->iniModesTxGain,
404 ar9580_1p0_lowest_ob_db_tx_gain_table,
405 ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table),
406 5);
407 else
408 INIT_INI_ARRAY(&ah->iniModesTxGain,
409 ar9300Modes_lowest_ob_db_tx_gain_table_2p2,
410 ARRAY_SIZE(ar9300Modes_lowest_ob_db_tx_gain_table_2p2),
411 5);
412 break; 675 break;
413 case 1: 676 case 1:
414 if (AR_SREV_9330_12(ah)) 677 ar9003_tx_gain_table_mode1(ah);
415 INIT_INI_ARRAY(&ah->iniModesTxGain,
416 ar9331_modes_high_ob_db_tx_gain_1p2,
417 ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p2),
418 5);
419 else if (AR_SREV_9330_11(ah))
420 INIT_INI_ARRAY(&ah->iniModesTxGain,
421 ar9331_modes_high_ob_db_tx_gain_1p1,
422 ARRAY_SIZE(ar9331_modes_high_ob_db_tx_gain_1p1),
423 5);
424 else if (AR_SREV_9340(ah))
425 INIT_INI_ARRAY(&ah->iniModesTxGain,
426 ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
427 ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
428 5);
429 else if (AR_SREV_9485_11(ah))
430 INIT_INI_ARRAY(&ah->iniModesTxGain,
431 ar9485Modes_high_ob_db_tx_gain_1_1,
432 ARRAY_SIZE(ar9485Modes_high_ob_db_tx_gain_1_1),
433 5);
434 else if (AR_SREV_9580(ah))
435 INIT_INI_ARRAY(&ah->iniModesTxGain,
436 ar9580_1p0_high_ob_db_tx_gain_table,
437 ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
438 5);
439 else
440 INIT_INI_ARRAY(&ah->iniModesTxGain,
441 ar9300Modes_high_ob_db_tx_gain_table_2p2,
442 ARRAY_SIZE(ar9300Modes_high_ob_db_tx_gain_table_2p2),
443 5);
444 break; 678 break;
445 case 2: 679 case 2:
446 if (AR_SREV_9330_12(ah)) 680 ar9003_tx_gain_table_mode2(ah);
447 INIT_INI_ARRAY(&ah->iniModesTxGain,
448 ar9331_modes_low_ob_db_tx_gain_1p2,
449 ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p2),
450 5);
451 else if (AR_SREV_9330_11(ah))
452 INIT_INI_ARRAY(&ah->iniModesTxGain,
453 ar9331_modes_low_ob_db_tx_gain_1p1,
454 ARRAY_SIZE(ar9331_modes_low_ob_db_tx_gain_1p1),
455 5);
456 else if (AR_SREV_9340(ah))
457 INIT_INI_ARRAY(&ah->iniModesTxGain,
458 ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
459 ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
460 5);
461 else if (AR_SREV_9485_11(ah))
462 INIT_INI_ARRAY(&ah->iniModesTxGain,
463 ar9485Modes_low_ob_db_tx_gain_1_1,
464 ARRAY_SIZE(ar9485Modes_low_ob_db_tx_gain_1_1),
465 5);
466 else if (AR_SREV_9580(ah))
467 INIT_INI_ARRAY(&ah->iniModesTxGain,
468 ar9580_1p0_low_ob_db_tx_gain_table,
469 ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
470 5);
471 else
472 INIT_INI_ARRAY(&ah->iniModesTxGain,
473 ar9300Modes_low_ob_db_tx_gain_table_2p2,
474 ARRAY_SIZE(ar9300Modes_low_ob_db_tx_gain_table_2p2),
475 5);
476 break; 681 break;
477 case 3: 682 case 3:
478 if (AR_SREV_9330_12(ah)) 683 ar9003_tx_gain_table_mode3(ah);
479 INIT_INI_ARRAY(&ah->iniModesTxGain,
480 ar9331_modes_high_power_tx_gain_1p2,
481 ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p2),
482 5);
483 else if (AR_SREV_9330_11(ah))
484 INIT_INI_ARRAY(&ah->iniModesTxGain,
485 ar9331_modes_high_power_tx_gain_1p1,
486 ARRAY_SIZE(ar9331_modes_high_power_tx_gain_1p1),
487 5);
488 else if (AR_SREV_9340(ah))
489 INIT_INI_ARRAY(&ah->iniModesTxGain,
490 ar9340Modes_lowest_ob_db_tx_gain_table_1p0,
491 ARRAY_SIZE(ar9340Modes_lowest_ob_db_tx_gain_table_1p0),
492 5);
493 else if (AR_SREV_9485_11(ah))
494 INIT_INI_ARRAY(&ah->iniModesTxGain,
495 ar9485Modes_high_power_tx_gain_1_1,
496 ARRAY_SIZE(ar9485Modes_high_power_tx_gain_1_1),
497 5);
498 else if (AR_SREV_9580(ah))
499 INIT_INI_ARRAY(&ah->iniModesTxGain,
500 ar9580_1p0_high_power_tx_gain_table,
501 ARRAY_SIZE(ar9580_1p0_high_power_tx_gain_table),
502 5);
503 else
504 INIT_INI_ARRAY(&ah->iniModesTxGain,
505 ar9300Modes_high_power_tx_gain_table_2p2,
506 ARRAY_SIZE(ar9300Modes_high_power_tx_gain_table_2p2),
507 5);
508 break; 684 break;
509 } 685 }
510} 686}
511 687
688static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
689{
690 if (AR_SREV_9330_12(ah))
691 INIT_INI_ARRAY(&ah->iniModesRxGain,
692 ar9331_common_rx_gain_1p2,
693 ARRAY_SIZE(ar9331_common_rx_gain_1p2),
694 2);
695 else if (AR_SREV_9330_11(ah))
696 INIT_INI_ARRAY(&ah->iniModesRxGain,
697 ar9331_common_rx_gain_1p1,
698 ARRAY_SIZE(ar9331_common_rx_gain_1p1),
699 2);
700 else if (AR_SREV_9340(ah))
701 INIT_INI_ARRAY(&ah->iniModesRxGain,
702 ar9340Common_rx_gain_table_1p0,
703 ARRAY_SIZE(ar9340Common_rx_gain_table_1p0),
704 2);
705 else if (AR_SREV_9485_11(ah))
706 INIT_INI_ARRAY(&ah->iniModesRxGain,
707 ar9485Common_wo_xlna_rx_gain_1_1,
708 ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
709 2);
710 else if (AR_SREV_9580(ah))
711 INIT_INI_ARRAY(&ah->iniModesRxGain,
712 ar9580_1p0_rx_gain_table,
713 ARRAY_SIZE(ar9580_1p0_rx_gain_table),
714 2);
715 else if (AR_SREV_9480_10(ah))
716 INIT_INI_ARRAY(&ah->iniModesRxGain,
717 ar9480_common_rx_gain_table_1p0,
718 ARRAY_SIZE(ar9480_common_rx_gain_table_1p0),
719 2);
720 else if (AR_SREV_9480_20(ah))
721 INIT_INI_ARRAY(&ah->iniModesRxGain,
722 ar9480_common_rx_gain_table_2p0,
723 ARRAY_SIZE(ar9480_common_rx_gain_table_2p0),
724 2);
725 else
726 INIT_INI_ARRAY(&ah->iniModesRxGain,
727 ar9300Common_rx_gain_table_2p2,
728 ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
729 2);
730}
731
732static void ar9003_rx_gain_table_mode1(struct ath_hw *ah)
733{
734 if (AR_SREV_9330_12(ah))
735 INIT_INI_ARRAY(&ah->iniModesRxGain,
736 ar9331_common_wo_xlna_rx_gain_1p2,
737 ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p2),
738 2);
739 else if (AR_SREV_9330_11(ah))
740 INIT_INI_ARRAY(&ah->iniModesRxGain,
741 ar9331_common_wo_xlna_rx_gain_1p1,
742 ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p1),
743 2);
744 else if (AR_SREV_9340(ah))
745 INIT_INI_ARRAY(&ah->iniModesRxGain,
746 ar9340Common_wo_xlna_rx_gain_table_1p0,
747 ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
748 2);
749 else if (AR_SREV_9485_11(ah))
750 INIT_INI_ARRAY(&ah->iniModesRxGain,
751 ar9485Common_wo_xlna_rx_gain_1_1,
752 ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
753 2);
754 else if (AR_SREV_9480_10(ah))
755 INIT_INI_ARRAY(&ah->iniModesRxGain,
756 ar9480_common_wo_xlna_rx_gain_table_1p0,
757 ARRAY_SIZE(ar9480_common_wo_xlna_rx_gain_table_1p0),
758 2);
759 else if (AR_SREV_9480_20(ah))
760 INIT_INI_ARRAY(&ah->iniModesRxGain,
761 ar9480_common_wo_xlna_rx_gain_table_2p0,
762 ARRAY_SIZE(ar9480_common_wo_xlna_rx_gain_table_2p0),
763 2);
764 else if (AR_SREV_9580(ah))
765 INIT_INI_ARRAY(&ah->iniModesRxGain,
766 ar9580_1p0_wo_xlna_rx_gain_table,
767 ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table),
768 2);
769 else
770 INIT_INI_ARRAY(&ah->iniModesRxGain,
771 ar9300Common_wo_xlna_rx_gain_table_2p2,
772 ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
773 2);
774}
775
776static void ar9003_rx_gain_table_mode2(struct ath_hw *ah)
777{
778 if (AR_SREV_9480_10(ah))
779 INIT_INI_ARRAY(&ah->iniModesRxGain,
780 ar9480_common_mixed_rx_gain_table_1p0,
781 ARRAY_SIZE(ar9480_common_mixed_rx_gain_table_1p0), 2);
782 else if (AR_SREV_9480_20(ah))
783 INIT_INI_ARRAY(&ah->iniModesRxGain,
784 ar9480_common_mixed_rx_gain_table_2p0,
785 ARRAY_SIZE(ar9480_common_mixed_rx_gain_table_2p0), 2);
786}
787
512static void ar9003_rx_gain_table_apply(struct ath_hw *ah) 788static void ar9003_rx_gain_table_apply(struct ath_hw *ah)
513{ 789{
514 switch (ar9003_hw_get_rx_gain_idx(ah)) { 790 switch (ar9003_hw_get_rx_gain_idx(ah)) {
515 case 0: 791 case 0:
516 default: 792 default:
517 if (AR_SREV_9330_12(ah)) 793 ar9003_rx_gain_table_mode0(ah);
518 INIT_INI_ARRAY(&ah->iniModesRxGain,
519 ar9331_common_rx_gain_1p2,
520 ARRAY_SIZE(ar9331_common_rx_gain_1p2),
521 2);
522 else if (AR_SREV_9330_11(ah))
523 INIT_INI_ARRAY(&ah->iniModesRxGain,
524 ar9331_common_rx_gain_1p1,
525 ARRAY_SIZE(ar9331_common_rx_gain_1p1),
526 2);
527 else if (AR_SREV_9340(ah))
528 INIT_INI_ARRAY(&ah->iniModesRxGain,
529 ar9340Common_rx_gain_table_1p0,
530 ARRAY_SIZE(ar9340Common_rx_gain_table_1p0),
531 2);
532 else if (AR_SREV_9485_11(ah))
533 INIT_INI_ARRAY(&ah->iniModesRxGain,
534 ar9485Common_wo_xlna_rx_gain_1_1,
535 ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
536 2);
537 else if (AR_SREV_9580(ah))
538 INIT_INI_ARRAY(&ah->iniModesRxGain,
539 ar9580_1p0_rx_gain_table,
540 ARRAY_SIZE(ar9580_1p0_rx_gain_table),
541 2);
542 else
543 INIT_INI_ARRAY(&ah->iniModesRxGain,
544 ar9300Common_rx_gain_table_2p2,
545 ARRAY_SIZE(ar9300Common_rx_gain_table_2p2),
546 2);
547 break; 794 break;
548 case 1: 795 case 1:
549 if (AR_SREV_9330_12(ah)) 796 ar9003_rx_gain_table_mode1(ah);
550 INIT_INI_ARRAY(&ah->iniModesRxGain, 797 break;
551 ar9331_common_wo_xlna_rx_gain_1p2, 798 case 2:
552 ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p2), 799 ar9003_rx_gain_table_mode2(ah);
553 2);
554 else if (AR_SREV_9330_11(ah))
555 INIT_INI_ARRAY(&ah->iniModesRxGain,
556 ar9331_common_wo_xlna_rx_gain_1p1,
557 ARRAY_SIZE(ar9331_common_wo_xlna_rx_gain_1p1),
558 2);
559 else if (AR_SREV_9340(ah))
560 INIT_INI_ARRAY(&ah->iniModesRxGain,
561 ar9340Common_wo_xlna_rx_gain_table_1p0,
562 ARRAY_SIZE(ar9340Common_wo_xlna_rx_gain_table_1p0),
563 2);
564 else if (AR_SREV_9485_11(ah))
565 INIT_INI_ARRAY(&ah->iniModesRxGain,
566 ar9485Common_wo_xlna_rx_gain_1_1,
567 ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
568 2);
569 else if (AR_SREV_9580(ah))
570 INIT_INI_ARRAY(&ah->iniModesRxGain,
571 ar9580_1p0_wo_xlna_rx_gain_table,
572 ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table),
573 2);
574 else
575 INIT_INI_ARRAY(&ah->iniModesRxGain,
576 ar9300Common_wo_xlna_rx_gain_table_2p2,
577 ARRAY_SIZE(ar9300Common_wo_xlna_rx_gain_table_2p2),
578 2);
579 break; 800 break;
580 } 801 }
581} 802}
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
index d08ab930e430..6cabc85bf61b 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
@@ -21,6 +21,132 @@ static void ar9003_hw_rx_enable(struct ath_hw *hw)
21 REG_WRITE(hw, AR_CR, 0); 21 REG_WRITE(hw, AR_CR, 0);
22} 22}
23 23
24static void
25ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
26{
27 struct ar9003_txc *ads = ds;
28 int checksum = 0;
29 u32 val, ctl12, ctl17;
30
31 val = (ATHEROS_VENDOR_ID << AR_DescId_S) |
32 (1 << AR_TxRxDesc_S) |
33 (1 << AR_CtrlStat_S) |
34 (i->qcu << AR_TxQcuNum_S) | 0x17;
35
36 checksum += val;
37 ACCESS_ONCE(ads->info) = val;
38
39 checksum += i->link;
40 ACCESS_ONCE(ads->link) = i->link;
41
42 checksum += i->buf_addr[0];
43 ACCESS_ONCE(ads->data0) = i->buf_addr[0];
44 checksum += i->buf_addr[1];
45 ACCESS_ONCE(ads->data1) = i->buf_addr[1];
46 checksum += i->buf_addr[2];
47 ACCESS_ONCE(ads->data2) = i->buf_addr[2];
48 checksum += i->buf_addr[3];
49 ACCESS_ONCE(ads->data3) = i->buf_addr[3];
50
51 checksum += (val = (i->buf_len[0] << AR_BufLen_S) & AR_BufLen);
52 ACCESS_ONCE(ads->ctl3) = val;
53 checksum += (val = (i->buf_len[1] << AR_BufLen_S) & AR_BufLen);
54 ACCESS_ONCE(ads->ctl5) = val;
55 checksum += (val = (i->buf_len[2] << AR_BufLen_S) & AR_BufLen);
56 ACCESS_ONCE(ads->ctl7) = val;
57 checksum += (val = (i->buf_len[3] << AR_BufLen_S) & AR_BufLen);
58 ACCESS_ONCE(ads->ctl9) = val;
59
60 checksum = (u16) (((checksum & 0xffff) + (checksum >> 16)) & 0xffff);
61 ACCESS_ONCE(ads->ctl10) = checksum;
62
63 if (i->is_first || i->is_last) {
64 ACCESS_ONCE(ads->ctl13) = set11nTries(i->rates, 0)
65 | set11nTries(i->rates, 1)
66 | set11nTries(i->rates, 2)
67 | set11nTries(i->rates, 3)
68 | (i->dur_update ? AR_DurUpdateEna : 0)
69 | SM(0, AR_BurstDur);
70
71 ACCESS_ONCE(ads->ctl14) = set11nRate(i->rates, 0)
72 | set11nRate(i->rates, 1)
73 | set11nRate(i->rates, 2)
74 | set11nRate(i->rates, 3);
75 } else {
76 ACCESS_ONCE(ads->ctl13) = 0;
77 ACCESS_ONCE(ads->ctl14) = 0;
78 }
79
80 ads->ctl20 = 0;
81 ads->ctl21 = 0;
82 ads->ctl22 = 0;
83
84 ctl17 = SM(i->keytype, AR_EncrType);
85 if (!i->is_first) {
86 ACCESS_ONCE(ads->ctl11) = 0;
87 ACCESS_ONCE(ads->ctl12) = i->is_last ? 0 : AR_TxMore;
88 ACCESS_ONCE(ads->ctl15) = 0;
89 ACCESS_ONCE(ads->ctl16) = 0;
90 ACCESS_ONCE(ads->ctl17) = ctl17;
91 ACCESS_ONCE(ads->ctl18) = 0;
92 ACCESS_ONCE(ads->ctl19) = 0;
93 return;
94 }
95
96 ACCESS_ONCE(ads->ctl11) = (i->pkt_len & AR_FrameLen)
97 | (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
98 | SM(i->txpower, AR_XmitPower)
99 | (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
100 | (i->keyix != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
101 | (i->flags & ATH9K_TXDESC_LOWRXCHAIN ? AR_LowRxChain : 0)
102 | (i->flags & ATH9K_TXDESC_CLRDMASK ? AR_ClrDestMask : 0)
103 | (i->flags & ATH9K_TXDESC_RTSENA ? AR_RTSEnable :
104 (i->flags & ATH9K_TXDESC_CTSENA ? AR_CTSEnable : 0));
105
106 ctl12 = (i->keyix != ATH9K_TXKEYIX_INVALID ?
107 SM(i->keyix, AR_DestIdx) : 0)
108 | SM(i->type, AR_FrameType)
109 | (i->flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
110 | (i->flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
111 | (i->flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
112
113 ctl17 |= (i->flags & ATH9K_TXDESC_LDPC ? AR_LDPC : 0);
114 switch (i->aggr) {
115 case AGGR_BUF_FIRST:
116 ctl17 |= SM(i->aggr_len, AR_AggrLen);
117 /* fall through */
118 case AGGR_BUF_MIDDLE:
119 ctl12 |= AR_IsAggr | AR_MoreAggr;
120 ctl17 |= SM(i->ndelim, AR_PadDelim);
121 break;
122 case AGGR_BUF_LAST:
123 ctl12 |= AR_IsAggr;
124 break;
125 case AGGR_BUF_NONE:
126 break;
127 }
128
129 val = (i->flags & ATH9K_TXDESC_PAPRD) >> ATH9K_TXDESC_PAPRD_S;
130 ctl12 |= SM(val, AR_PAPRDChainMask);
131
132 ACCESS_ONCE(ads->ctl12) = ctl12;
133 ACCESS_ONCE(ads->ctl17) = ctl17;
134
135 ACCESS_ONCE(ads->ctl15) = set11nPktDurRTSCTS(i->rates, 0)
136 | set11nPktDurRTSCTS(i->rates, 1);
137
138 ACCESS_ONCE(ads->ctl16) = set11nPktDurRTSCTS(i->rates, 2)
139 | set11nPktDurRTSCTS(i->rates, 3);
140
141 ACCESS_ONCE(ads->ctl18) = set11nRateFlags(i->rates, 0)
142 | set11nRateFlags(i->rates, 1)
143 | set11nRateFlags(i->rates, 2)
144 | set11nRateFlags(i->rates, 3)
145 | SM(i->rtscts_rate, AR_RTSCTSRate);
146
147 ACCESS_ONCE(ads->ctl19) = AR_Not_Sounding;
148}
149
24static u16 ar9003_calc_ptr_chksum(struct ar9003_txc *ads) 150static u16 ar9003_calc_ptr_chksum(struct ar9003_txc *ads)
25{ 151{
26 int checksum; 152 int checksum;
@@ -185,47 +311,6 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
185 return true; 311 return true;
186} 312}
187 313
188static void ar9003_hw_fill_txdesc(struct ath_hw *ah, void *ds, u32 seglen,
189 bool is_firstseg, bool is_lastseg,
190 const void *ds0, dma_addr_t buf_addr,
191 unsigned int qcu)
192{
193 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
194 unsigned int descid = 0;
195
196 ads->info = (ATHEROS_VENDOR_ID << AR_DescId_S) |
197 (1 << AR_TxRxDesc_S) |
198 (1 << AR_CtrlStat_S) |
199 (qcu << AR_TxQcuNum_S) | 0x17;
200
201 ads->data0 = buf_addr;
202 ads->data1 = 0;
203 ads->data2 = 0;
204 ads->data3 = 0;
205
206 ads->ctl3 = (seglen << AR_BufLen_S);
207 ads->ctl3 &= AR_BufLen;
208
209 /* Fill in pointer checksum and descriptor id */
210 ads->ctl10 = ar9003_calc_ptr_chksum(ads);
211 ads->ctl10 |= (descid << AR_TxDescId_S);
212
213 if (is_firstseg) {
214 ads->ctl12 |= (is_lastseg ? 0 : AR_TxMore);
215 } else if (is_lastseg) {
216 ads->ctl11 = 0;
217 ads->ctl12 = 0;
218 ads->ctl13 = AR9003TXC_CONST(ds0)->ctl13;
219 ads->ctl14 = AR9003TXC_CONST(ds0)->ctl14;
220 } else {
221 /* XXX Intermediate descriptor in a multi-descriptor frame.*/
222 ads->ctl11 = 0;
223 ads->ctl12 = AR_TxMore;
224 ads->ctl13 = 0;
225 ads->ctl14 = 0;
226 }
227}
228
229static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds, 314static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
230 struct ath_tx_status *ts) 315 struct ath_tx_status *ts)
231{ 316{
@@ -310,161 +395,6 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
310 return 0; 395 return 0;
311} 396}
312 397
313static void ar9003_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
314 u32 pktlen, enum ath9k_pkt_type type, u32 txpower,
315 u8 keyIx, enum ath9k_key_type keyType, u32 flags)
316{
317 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
318
319 if (txpower > ah->txpower_limit)
320 txpower = ah->txpower_limit;
321
322 if (txpower > 63)
323 txpower = 63;
324
325 ads->ctl11 = (pktlen & AR_FrameLen)
326 | (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
327 | SM(txpower, AR_XmitPower)
328 | (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
329 | (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
330 | (flags & ATH9K_TXDESC_LOWRXCHAIN ? AR_LowRxChain : 0);
331
332 ads->ctl12 =
333 (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
334 | SM(type, AR_FrameType)
335 | (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
336 | (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
337 | (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
338
339 ads->ctl17 = SM(keyType, AR_EncrType) |
340 (flags & ATH9K_TXDESC_LDPC ? AR_LDPC : 0);
341 ads->ctl18 = 0;
342 ads->ctl19 = AR_Not_Sounding;
343
344 ads->ctl20 = 0;
345 ads->ctl21 = 0;
346 ads->ctl22 = 0;
347}
348
349static void ar9003_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
350{
351 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
352
353 if (val)
354 ads->ctl11 |= AR_ClrDestMask;
355 else
356 ads->ctl11 &= ~AR_ClrDestMask;
357}
358
359static void ar9003_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
360 void *lastds,
361 u32 durUpdateEn, u32 rtsctsRate,
362 u32 rtsctsDuration,
363 struct ath9k_11n_rate_series series[],
364 u32 nseries, u32 flags)
365{
366 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
367 struct ar9003_txc *last_ads = (struct ar9003_txc *) lastds;
368 u_int32_t ctl11;
369
370 if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
371 ctl11 = ads->ctl11;
372
373 if (flags & ATH9K_TXDESC_RTSENA) {
374 ctl11 &= ~AR_CTSEnable;
375 ctl11 |= AR_RTSEnable;
376 } else {
377 ctl11 &= ~AR_RTSEnable;
378 ctl11 |= AR_CTSEnable;
379 }
380
381 ads->ctl11 = ctl11;
382 } else {
383 ads->ctl11 = (ads->ctl11 & ~(AR_RTSEnable | AR_CTSEnable));
384 }
385
386 ads->ctl13 = set11nTries(series, 0)
387 | set11nTries(series, 1)
388 | set11nTries(series, 2)
389 | set11nTries(series, 3)
390 | (durUpdateEn ? AR_DurUpdateEna : 0)
391 | SM(0, AR_BurstDur);
392
393 ads->ctl14 = set11nRate(series, 0)
394 | set11nRate(series, 1)
395 | set11nRate(series, 2)
396 | set11nRate(series, 3);
397
398 ads->ctl15 = set11nPktDurRTSCTS(series, 0)
399 | set11nPktDurRTSCTS(series, 1);
400
401 ads->ctl16 = set11nPktDurRTSCTS(series, 2)
402 | set11nPktDurRTSCTS(series, 3);
403
404 ads->ctl18 = set11nRateFlags(series, 0)
405 | set11nRateFlags(series, 1)
406 | set11nRateFlags(series, 2)
407 | set11nRateFlags(series, 3)
408 | SM(rtsctsRate, AR_RTSCTSRate);
409 ads->ctl19 = AR_Not_Sounding;
410
411 last_ads->ctl13 = ads->ctl13;
412 last_ads->ctl14 = ads->ctl14;
413}
414
415static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
416 u32 aggrLen)
417{
418 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
419
420 ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
421
422 ads->ctl17 &= ~AR_AggrLen;
423 ads->ctl17 |= SM(aggrLen, AR_AggrLen);
424}
425
426static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
427 u32 numDelims)
428{
429 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
430 unsigned int ctl17;
431
432 ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
433
434 /*
435 * We use a stack variable to manipulate ctl6 to reduce uncached
436 * read modify, modfiy, write.
437 */
438 ctl17 = ads->ctl17;
439 ctl17 &= ~AR_PadDelim;
440 ctl17 |= SM(numDelims, AR_PadDelim);
441 ads->ctl17 = ctl17;
442}
443
444static void ar9003_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
445{
446 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
447
448 ads->ctl12 |= AR_IsAggr;
449 ads->ctl12 &= ~AR_MoreAggr;
450 ads->ctl17 &= ~AR_PadDelim;
451}
452
453static void ar9003_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
454{
455 struct ar9003_txc *ads = (struct ar9003_txc *) ds;
456
457 ads->ctl12 &= (~AR_IsAggr & ~AR_MoreAggr);
458}
459
460void ar9003_hw_set_paprd_txdesc(struct ath_hw *ah, void *ds, u8 chains)
461{
462 struct ar9003_txc *ads = ds;
463
464 ads->ctl12 |= SM(chains, AR_PAPRDChainMask);
465}
466EXPORT_SYMBOL(ar9003_hw_set_paprd_txdesc);
467
468void ar9003_hw_attach_mac_ops(struct ath_hw *hw) 398void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
469{ 399{
470 struct ath_hw_ops *ops = ath9k_hw_ops(hw); 400 struct ath_hw_ops *ops = ath9k_hw_ops(hw);
@@ -472,15 +402,8 @@ void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
472 ops->rx_enable = ar9003_hw_rx_enable; 402 ops->rx_enable = ar9003_hw_rx_enable;
473 ops->set_desc_link = ar9003_hw_set_desc_link; 403 ops->set_desc_link = ar9003_hw_set_desc_link;
474 ops->get_isr = ar9003_hw_get_isr; 404 ops->get_isr = ar9003_hw_get_isr;
475 ops->fill_txdesc = ar9003_hw_fill_txdesc; 405 ops->set_txdesc = ar9003_set_txdesc;
476 ops->proc_txdesc = ar9003_hw_proc_txdesc; 406 ops->proc_txdesc = ar9003_hw_proc_txdesc;
477 ops->set11n_txdesc = ar9003_hw_set11n_txdesc;
478 ops->set11n_ratescenario = ar9003_hw_set11n_ratescenario;
479 ops->set11n_aggr_first = ar9003_hw_set11n_aggr_first;
480 ops->set11n_aggr_middle = ar9003_hw_set11n_aggr_middle;
481 ops->set11n_aggr_last = ar9003_hw_set11n_aggr_last;
482 ops->clr11n_aggr = ar9003_hw_clr11n_aggr;
483 ops->set_clrdmask = ar9003_hw_set_clrdmask;
484} 407}
485 408
486void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size) 409void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
index f80d1d633980..609acb2b504f 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
@@ -113,7 +113,7 @@ static int ar9003_get_training_power_5g(struct ath_hw *ah)
113 if (delta > scale) 113 if (delta > scale)
114 return -1; 114 return -1;
115 115
116 switch (get_streams(common->tx_chainmask)) { 116 switch (get_streams(ah->txchainmask)) {
117 case 1: 117 case 1:
118 delta = 6; 118 delta = 6;
119 break; 119 break;
@@ -126,7 +126,7 @@ static int ar9003_get_training_power_5g(struct ath_hw *ah)
126 default: 126 default:
127 delta = 0; 127 delta = 0;
128 ath_dbg(common, ATH_DBG_CALIBRATE, 128 ath_dbg(common, ATH_DBG_CALIBRATE,
129 "Invalid tx-chainmask: %u\n", common->tx_chainmask); 129 "Invalid tx-chainmask: %u\n", ah->txchainmask);
130 } 130 }
131 131
132 power += delta; 132 power += delta;
@@ -147,7 +147,7 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
147 AR_PHY_PAPRD_CTRL1_B2 147 AR_PHY_PAPRD_CTRL1_B2
148 }; 148 };
149 int training_power; 149 int training_power;
150 int i; 150 int i, val;
151 151
152 if (IS_CHAN_2GHZ(ah->curchan)) 152 if (IS_CHAN_2GHZ(ah->curchan))
153 training_power = ar9003_get_training_power_2g(ah); 153 training_power = ar9003_get_training_power_2g(ah);
@@ -207,8 +207,9 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
207 AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING, 28); 207 AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING, 28);
208 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL1, 208 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL1,
209 AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE, 1); 209 AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE, 1);
210 val = AR_SREV_9480(ah) ? 0x91 : 147;
210 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL2, 211 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL2,
211 AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN, 147); 212 AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN, val);
212 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 213 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
213 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_FINE_CORR_LEN, 4); 214 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_FINE_CORR_LEN, 4);
214 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 215 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
@@ -217,7 +218,7 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
217 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7); 218 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7);
218 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 219 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
219 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1); 220 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1);
220 if (AR_SREV_9485(ah)) 221 if (AR_SREV_9485(ah) || AR_SREV_9480(ah))
221 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 222 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
222 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, 223 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
223 -3); 224 -3);
@@ -225,9 +226,10 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
225 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 226 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
226 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, 227 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
227 -6); 228 -6);
229 val = AR_SREV_9480(ah) ? -10 : -15;
228 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 230 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
229 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE, 231 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE,
230 -15); 232 val);
231 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, 233 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
232 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE, 1); 234 AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE, 1);
233 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL4, 235 REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL4,
@@ -757,6 +759,7 @@ void ar9003_paprd_populate_single_table(struct ath_hw *ah,
757 training_power); 759 training_power);
758 760
759 if (ah->caps.tx_chainmask & BIT(2)) 761 if (ah->caps.tx_chainmask & BIT(2))
762 /* val AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL correct? */
760 REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B2, 763 REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B2,
761 AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL, 764 AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL,
762 training_power); 765 training_power);
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 33edb5653ca6..7db6e8647a01 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -559,6 +559,9 @@ static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
559 559
560 if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7)) 560 if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
561 REG_WRITE(ah, AR_SELFGEN_MASK, 0x3); 561 REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
562 else if (AR_SREV_9480(ah))
563 /* xxx only when MCI support is enabled */
564 REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
562 else 565 else
563 REG_WRITE(ah, AR_SELFGEN_MASK, tx); 566 REG_WRITE(ah, AR_SELFGEN_MASK, tx);
564 567
@@ -592,6 +595,9 @@ static void ar9003_hw_override_ini(struct ath_hw *ah)
592 val = REG_READ(ah, AR_PCU_MISC_MODE2) & (~AR_ADHOC_MCAST_KEYID_ENABLE); 595 val = REG_READ(ah, AR_PCU_MISC_MODE2) & (~AR_ADHOC_MCAST_KEYID_ENABLE);
593 REG_WRITE(ah, AR_PCU_MISC_MODE2, 596 REG_WRITE(ah, AR_PCU_MISC_MODE2,
594 val | AR_AGG_WEP_ENABLE_FIX | AR_AGG_WEP_ENABLE); 597 val | AR_AGG_WEP_ENABLE_FIX | AR_AGG_WEP_ENABLE);
598
599 REG_SET_BIT(ah, AR_PHY_CCK_DETECT,
600 AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
595} 601}
596 602
597static void ar9003_hw_prog_ini(struct ath_hw *ah, 603static void ar9003_hw_prog_ini(struct ath_hw *ah,
@@ -658,6 +664,10 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
658 ar9003_hw_prog_ini(ah, &ah->iniMac[i], modesIndex); 664 ar9003_hw_prog_ini(ah, &ah->iniMac[i], modesIndex);
659 ar9003_hw_prog_ini(ah, &ah->iniBB[i], modesIndex); 665 ar9003_hw_prog_ini(ah, &ah->iniBB[i], modesIndex);
660 ar9003_hw_prog_ini(ah, &ah->iniRadio[i], modesIndex); 666 ar9003_hw_prog_ini(ah, &ah->iniRadio[i], modesIndex);
667 if (i == ATH_INI_POST && AR_SREV_9480_20(ah))
668 ar9003_hw_prog_ini(ah,
669 &ah->ini_radio_post_sys2ant,
670 modesIndex);
661 } 671 }
662 672
663 REG_WRITE_ARRAY(&ah->iniModesRxGain, 1, regWrites); 673 REG_WRITE_ARRAY(&ah->iniModesRxGain, 1, regWrites);
@@ -671,12 +681,15 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
671 REG_WRITE_ARRAY(&ah->iniModesAdditional, 681 REG_WRITE_ARRAY(&ah->iniModesAdditional,
672 modesIndex, regWrites); 682 modesIndex, regWrites);
673 683
674 if (AR_SREV_9300(ah)) 684 if (AR_SREV_9330(ah))
675 REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites); 685 REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
676 686
677 if (AR_SREV_9340(ah) && !ah->is_clk_25mhz) 687 if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
678 REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites); 688 REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
679 689
690 if (AR_SREV_9480(ah))
691 ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1);
692
680 ar9003_hw_override_ini(ah); 693 ar9003_hw_override_ini(ah);
681 ar9003_hw_set_channel_regs(ah, chan); 694 ar9003_hw_set_channel_regs(ah, chan);
682 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); 695 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
@@ -785,16 +798,6 @@ static void ar9003_hw_rfbus_done(struct ath_hw *ah)
785 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0); 798 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
786} 799}
787 800
788static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
789{
790 u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
791 if (value)
792 v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
793 else
794 v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
795 REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
796}
797
798static bool ar9003_hw_ani_control(struct ath_hw *ah, 801static bool ar9003_hw_ani_control(struct ath_hw *ah,
799 enum ath9k_ani_cmd cmd, int param) 802 enum ath9k_ani_cmd cmd, int param)
800{ 803{
@@ -1277,7 +1280,6 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
1277 priv_ops->set_delta_slope = ar9003_hw_set_delta_slope; 1280 priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
1278 priv_ops->rfbus_req = ar9003_hw_rfbus_req; 1281 priv_ops->rfbus_req = ar9003_hw_rfbus_req;
1279 priv_ops->rfbus_done = ar9003_hw_rfbus_done; 1282 priv_ops->rfbus_done = ar9003_hw_rfbus_done;
1280 priv_ops->set_diversity = ar9003_hw_set_diversity;
1281 priv_ops->ani_control = ar9003_hw_ani_control; 1283 priv_ops->ani_control = ar9003_hw_ani_control;
1282 priv_ops->do_getnf = ar9003_hw_do_getnf; 1284 priv_ops->do_getnf = ar9003_hw_do_getnf;
1283 priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs; 1285 priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 3aca9fa2d27b..6cea546a1507 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -581,6 +581,9 @@
581#define AR_PHY_TX_IQCAL_CORR_COEFF_B0(_i) (AR_SM_BASE + \ 581#define AR_PHY_TX_IQCAL_CORR_COEFF_B0(_i) (AR_SM_BASE + \
582 (AR_SREV_9485(ah) ? \ 582 (AR_SREV_9485(ah) ? \
583 0x3d0 : 0x450) + ((_i) << 2)) 583 0x3d0 : 0x450) + ((_i) << 2))
584#define AR_PHY_RTT_CTRL (AR_SM_BASE + 0x380)
585#define AR_PHY_RTT_TABLE_SW_INTF_B (AR_SM_BASE + 0x384)
586#define AR_PHY_RTT_TABLE_SW_INTF_1_B0 (AR_SM_BASE + 0x388)
584 587
585#define AR_PHY_WATCHDOG_STATUS (AR_SM_BASE + 0x5c0) 588#define AR_PHY_WATCHDOG_STATUS (AR_SM_BASE + 0x5c0)
586#define AR_PHY_WATCHDOG_CTL_1 (AR_SM_BASE + 0x5c4) 589#define AR_PHY_WATCHDOG_CTL_1 (AR_SM_BASE + 0x5c4)
@@ -600,6 +603,17 @@
600#define AR_PHY_BB_THERM_ADC_4_LATEST_VOLT_VALUE 0x0000ff00 603#define AR_PHY_BB_THERM_ADC_4_LATEST_VOLT_VALUE 0x0000ff00
601#define AR_PHY_BB_THERM_ADC_4_LATEST_VOLT_VALUE_S 8 604#define AR_PHY_BB_THERM_ADC_4_LATEST_VOLT_VALUE_S 8
602 605
606/* AIC Registers */
607#define AR_PHY_AIC_CTRL_0_B0 (AR_SM_BASE + 0x4b0)
608#define AR_PHY_AIC_CTRL_1_B0 (AR_SM_BASE + 0x4b4)
609#define AR_PHY_AIC_CTRL_2_B0 (AR_SM_BASE + 0x4b8)
610#define AR_PHY_AIC_CTRL_3_B0 (AR_SM_BASE + 0x4bc)
611#define AR_PHY_AIC_STAT_0_B0 (AR_SM_BASE + (AR_SREV_9480_10(ah) ? \
612 0x4c0 : 0x4c4))
613#define AR_PHY_AIC_STAT_1_B0 (AR_SM_BASE + (AR_SREV_9480_10(ah) ? \
614 0x4c4 : 0x4c8))
615#define AR_PHY_AIC_CTRL_4_B0 (AR_SM_BASE + 0x4c0)
616#define AR_PHY_AIC_STAT_2_B0 (AR_SM_BASE + 0x4cc)
603 617
604#define AR_PHY_65NM_CH0_SYNTH4 0x1608c 618#define AR_PHY_65NM_CH0_SYNTH4 0x1608c
605#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT 0x00000002 619#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT 0x00000002
@@ -609,7 +623,35 @@
609#define AR_PHY_65NM_CH0_BIAS2 0x160c4 623#define AR_PHY_65NM_CH0_BIAS2 0x160c4
610#define AR_PHY_65NM_CH0_BIAS4 0x160cc 624#define AR_PHY_65NM_CH0_BIAS4 0x160cc
611#define AR_PHY_65NM_CH0_RXTX4 0x1610c 625#define AR_PHY_65NM_CH0_RXTX4 0x1610c
612#define AR_PHY_65NM_CH0_THERM (AR_SREV_9300(ah) ? 0x16290 : 0x1628c) 626
627#define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
628 ((AR_SREV_9480(ah) ? 0x1628c : 0x16280)))
629#define AR_CH0_TOP_XPABIASLVL (0x300)
630#define AR_CH0_TOP_XPABIASLVL_S (8)
631
632#define AR_CH0_THERM (AR_SREV_9300(ah) ? 0x16290 : \
633 ((AR_SREV_9485(ah) ? 0x1628c : 0x16294)))
634#define AR_CH0_THERM_XPABIASLVL_MSB 0x3
635#define AR_CH0_THERM_XPABIASLVL_MSB_S 0
636#define AR_CH0_THERM_XPASHORT2GND 0x4
637#define AR_CH0_THERM_XPASHORT2GND_S 2
638
639#define AR_SWITCH_TABLE_COM_ALL (0xffff)
640#define AR_SWITCH_TABLE_COM_ALL_S (0)
641#define AR_SWITCH_TABLE_COM_AR9480_ALL (0xffffff)
642#define AR_SWITCH_TABLE_COM_AR9480_ALL_S (0)
643#define AR_SWITCH_TABLE_COM_SPDT (0x00f00000)
644#define AR_SWITCH_TABLE_COM_SPDT_ALL (0x0000fff0)
645#define AR_SWITCH_TABLE_COM_SPDT_ALL_S (4)
646
647#define AR_SWITCH_TABLE_COM2_ALL (0xffffff)
648#define AR_SWITCH_TABLE_COM2_ALL_S (0)
649
650#define AR_SWITCH_TABLE_ALL (0xfff)
651#define AR_SWITCH_TABLE_ALL_S (0)
652
653#define AR_PHY_65NM_CH0_THERM (AR_SREV_9300(ah) ? 0x16290 :\
654 (AR_SREV_9485(ah) ? 0x1628c : 0x16294))
613 655
614#define AR_PHY_65NM_CH0_THERM_LOCAL 0x80000000 656#define AR_PHY_65NM_CH0_THERM_LOCAL 0x80000000
615#define AR_PHY_65NM_CH0_THERM_LOCAL_S 31 657#define AR_PHY_65NM_CH0_THERM_LOCAL_S 31
@@ -625,21 +667,23 @@
625#define AR_PHY_65NM_CH2_RXTX1 0x16900 667#define AR_PHY_65NM_CH2_RXTX1 0x16900
626#define AR_PHY_65NM_CH2_RXTX2 0x16904 668#define AR_PHY_65NM_CH2_RXTX2 0x16904
627 669
628#define AR_CH0_TOP2 (AR_SREV_9300(ah) ? 0x1628c : 0x16284) 670#define AR_CH0_TOP2 (AR_SREV_9300(ah) ? 0x1628c : \
671 (AR_SREV_9485(ah) ? 0x16284 : 0x16290))
629#define AR_CH0_TOP2_XPABIASLVL 0xf000 672#define AR_CH0_TOP2_XPABIASLVL 0xf000
630#define AR_CH0_TOP2_XPABIASLVL_S 12 673#define AR_CH0_TOP2_XPABIASLVL_S 12
631 674
632#define AR_CH0_XTAL (AR_SREV_9300(ah) ? 0x16294 : 0x16290) 675#define AR_CH0_XTAL (AR_SREV_9300(ah) ? 0x16294 : \
676 (AR_SREV_9485(ah) ? 0x16290 : 0x16298))
633#define AR_CH0_XTAL_CAPINDAC 0x7f000000 677#define AR_CH0_XTAL_CAPINDAC 0x7f000000
634#define AR_CH0_XTAL_CAPINDAC_S 24 678#define AR_CH0_XTAL_CAPINDAC_S 24
635#define AR_CH0_XTAL_CAPOUTDAC 0x00fe0000 679#define AR_CH0_XTAL_CAPOUTDAC 0x00fe0000
636#define AR_CH0_XTAL_CAPOUTDAC_S 17 680#define AR_CH0_XTAL_CAPOUTDAC_S 17
637 681
638#define AR_PHY_PMU1 0x16c40 682#define AR_PHY_PMU1 (AR_SREV_9480(ah) ? 0x16340 : 0x16c40)
639#define AR_PHY_PMU1_PWD 0x1 683#define AR_PHY_PMU1_PWD 0x1
640#define AR_PHY_PMU1_PWD_S 0 684#define AR_PHY_PMU1_PWD_S 0
641 685
642#define AR_PHY_PMU2 0x16c44 686#define AR_PHY_PMU2 (AR_SREV_9480(ah) ? 0x16344 : 0x16c44)
643#define AR_PHY_PMU2_PGM 0x00200000 687#define AR_PHY_PMU2_PGM 0x00200000
644#define AR_PHY_PMU2_PGM_S 21 688#define AR_PHY_PMU2_PGM_S 21
645 689
@@ -839,18 +883,37 @@
839 */ 883 */
840#define AR_SM1_BASE 0xb200 884#define AR_SM1_BASE 0xb200
841 885
842#define AR_PHY_SWITCH_CHAIN_1 (AR_SM1_BASE + 0x84) 886#define AR_PHY_SWITCH_CHAIN_1 (AR_SM1_BASE + 0x84)
843#define AR_PHY_FCAL_2_1 (AR_SM1_BASE + 0xd0) 887#define AR_PHY_FCAL_2_1 (AR_SM1_BASE + 0xd0)
844#define AR_PHY_DFT_TONE_CTL_1 (AR_SM1_BASE + 0xd4) 888#define AR_PHY_DFT_TONE_CTL_1 (AR_SM1_BASE + 0xd4)
845#define AR_PHY_CL_TAB_1 (AR_SM1_BASE + 0x100) 889#define AR_PHY_CL_TAB_1 (AR_SM1_BASE + 0x100)
846#define AR_PHY_CHAN_INFO_GAIN_1 (AR_SM1_BASE + 0x180) 890#define AR_PHY_CHAN_INFO_GAIN_1 (AR_SM1_BASE + 0x180)
847#define AR_PHY_TPC_4_B1 (AR_SM1_BASE + 0x204) 891#define AR_PHY_TPC_4_B1 (AR_SM1_BASE + 0x204)
848#define AR_PHY_TPC_5_B1 (AR_SM1_BASE + 0x208) 892#define AR_PHY_TPC_5_B1 (AR_SM1_BASE + 0x208)
849#define AR_PHY_TPC_6_B1 (AR_SM1_BASE + 0x20c) 893#define AR_PHY_TPC_6_B1 (AR_SM1_BASE + 0x20c)
850#define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220) 894#define AR_PHY_TPC_11_B1 (AR_SM1_BASE + 0x220)
851#define AR_PHY_PDADC_TAB_1 (AR_SM1_BASE + 0x240) 895#define AR_PHY_PDADC_TAB_1 (AR_SM1_BASE + (AR_SREV_AR9300(ah) ? \
896 0x240 : 0x280))
897#define AR_PHY_TPC_19_B1 (AR_SM1_BASE + 0x240)
898#define AR_PHY_TPC_19_B1_ALPHA_THERM 0xff
899#define AR_PHY_TPC_19_B1_ALPHA_THERM_S 0
852#define AR_PHY_TX_IQCAL_STATUS_B1 (AR_SM1_BASE + 0x48c) 900#define AR_PHY_TX_IQCAL_STATUS_B1 (AR_SM1_BASE + 0x48c)
853#define AR_PHY_TX_IQCAL_CORR_COEFF_B1(_i) (AR_SM_BASE + 0x450 + ((_i) << 2)) 901#define AR_PHY_TX_IQCAL_CORR_COEFF_B1(_i) (AR_SM1_BASE + 0x450 + ((_i) << 2))
902
903/* SM 1 AIC Registers */
904
905#define AR_PHY_AIC_CTRL_0_B1 (AR_SM1_BASE + 0x4b0)
906#define AR_PHY_AIC_CTRL_1_B1 (AR_SM1_BASE + 0x4b4)
907#define AR_PHY_AIC_CTRL_2_B1 (AR_SM1_BASE + 0x4b8)
908#define AR_PHY_AIC_STAT_0_B1 (AR_SM1_BASE + (AR_SREV_9480_10(ah) ? \
909 0x4c0 : 0x4c4))
910#define AR_PHY_AIC_STAT_1_B1 (AR_SM1_BASE + (AR_SREV_9480_10(ah) ? \
911 0x4c4 : 0x4c8))
912#define AR_PHY_AIC_CTRL_4_B1 (AR_SM1_BASE + 0x4c0)
913#define AR_PHY_AIC_STAT_2_B1 (AR_SM1_BASE + 0x4cc)
914
915#define AR_PHY_AIC_SRAM_ADDR_B1 (AR_SM1_BASE + 0x5f0)
916#define AR_PHY_AIC_SRAM_DATA_B1 (AR_SM1_BASE + 0x5f4)
854 917
855/* 918/*
856 * Channel 2 Register Map 919 * Channel 2 Register Map
@@ -914,6 +977,13 @@
914 977
915#define AR_PHY_RSSI_3 (AR_AGC3_BASE + 0x180) 978#define AR_PHY_RSSI_3 (AR_AGC3_BASE + 0x180)
916 979
980/* GLB Registers */
981#define AR_GLB_BASE 0x20000
982#define AR_PHY_GLB_CONTROL (AR_GLB_BASE + 0x44)
983#define AR_GLB_SCRATCH(_ah) (AR_GLB_BASE + \
984 (AR_SREV_9480_20(_ah) ? 0x4c : 0x50))
985#define AR_GLB_STATUS (AR_GLB_BASE + 0x48)
986
917/* 987/*
918 * Misc helper defines 988 * Misc helper defines
919 */ 989 */
diff --git a/drivers/net/wireless/ath/ath9k/ar9480_1p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9480_1p0_initvals.h
new file mode 100644
index 000000000000..4071bd2bd03f
--- /dev/null
+++ b/drivers/net/wireless/ath/ath9k/ar9480_1p0_initvals.h
@@ -0,0 +1,1833 @@
1/*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef INITVALS_9480_1P0_H
18#define INITVALS_9480_1P0_H
19
20/* AR9480 1.0 */
21
22static const u32 ar9480_1p0_mac_core[][2] = {
23 /* Addr allmodes */
24 {0x00000008, 0x00000000},
25 {0x00000030, 0x00060085},
26 {0x00000034, 0x00000005},
27 {0x00000040, 0x00000000},
28 {0x00000044, 0x00000000},
29 {0x00000048, 0x00000008},
30 {0x0000004c, 0x00000010},
31 {0x00000050, 0x00000000},
32 {0x00001040, 0x002ffc0f},
33 {0x00001044, 0x002ffc0f},
34 {0x00001048, 0x002ffc0f},
35 {0x0000104c, 0x002ffc0f},
36 {0x00001050, 0x002ffc0f},
37 {0x00001054, 0x002ffc0f},
38 {0x00001058, 0x002ffc0f},
39 {0x0000105c, 0x002ffc0f},
40 {0x00001060, 0x002ffc0f},
41 {0x00001064, 0x002ffc0f},
42 {0x000010f0, 0x00000100},
43 {0x00001270, 0x00000000},
44 {0x000012b0, 0x00000000},
45 {0x000012f0, 0x00000000},
46 {0x0000143c, 0x00000000},
47 {0x0000147c, 0x00000000},
48 {0x00001810, 0x0f000003},
49 {0x00008000, 0x00000000},
50 {0x00008004, 0x00000000},
51 {0x00008008, 0x00000000},
52 {0x0000800c, 0x00000000},
53 {0x00008018, 0x00000000},
54 {0x00008020, 0x00000000},
55 {0x00008038, 0x00000000},
56 {0x0000803c, 0x00080000},
57 {0x00008040, 0x00000000},
58 {0x00008044, 0x00000000},
59 {0x00008048, 0x00000000},
60 {0x0000804c, 0xffffffff},
61 {0x00008050, 0xffffffff},
62 {0x00008054, 0x00000000},
63 {0x00008058, 0x00000000},
64 {0x0000805c, 0x000fc78f},
65 {0x00008060, 0x0000000f},
66 {0x00008064, 0x00000000},
67 {0x00008070, 0x00000310},
68 {0x00008074, 0x00000020},
69 {0x00008078, 0x00000000},
70 {0x0000809c, 0x0000000f},
71 {0x000080a0, 0x00000000},
72 {0x000080a4, 0x02ff0000},
73 {0x000080a8, 0x0e070605},
74 {0x000080ac, 0x0000000d},
75 {0x000080b0, 0x00000000},
76 {0x000080b4, 0x00000000},
77 {0x000080b8, 0x00000000},
78 {0x000080bc, 0x00000000},
79 {0x000080c0, 0x2a800000},
80 {0x000080c4, 0x06900168},
81 {0x000080c8, 0x13881c20},
82 {0x000080cc, 0x01f40000},
83 {0x000080d0, 0x00252500},
84 {0x000080d4, 0x00a00005},
85 {0x000080d8, 0x00400002},
86 {0x000080dc, 0x00000000},
87 {0x000080e0, 0xffffffff},
88 {0x000080e4, 0x0000ffff},
89 {0x000080e8, 0x3f3f3f3f},
90 {0x000080ec, 0x00000000},
91 {0x000080f0, 0x00000000},
92 {0x000080f4, 0x00000000},
93 {0x000080fc, 0x00020000},
94 {0x00008100, 0x00000000},
95 {0x00008108, 0x00000052},
96 {0x0000810c, 0x00000000},
97 {0x00008110, 0x00000000},
98 {0x00008114, 0x000007ff},
99 {0x00008118, 0x000000aa},
100 {0x0000811c, 0x00003210},
101 {0x00008124, 0x00000000},
102 {0x00008128, 0x00000000},
103 {0x0000812c, 0x00000000},
104 {0x00008130, 0x00000000},
105 {0x00008134, 0x00000000},
106 {0x00008138, 0x00000000},
107 {0x0000813c, 0x0000ffff},
108 {0x00008144, 0xffffffff},
109 {0x00008168, 0x00000000},
110 {0x0000816c, 0x00000000},
111 {0x00008170, 0x18486e00},
112 {0x00008174, 0x33332210},
113 {0x00008178, 0x00000000},
114 {0x0000817c, 0x00020000},
115 {0x000081c4, 0x33332210},
116 {0x000081c8, 0x00000000},
117 {0x000081cc, 0x00000000},
118 {0x000081d4, 0x00000000},
119 {0x000081ec, 0x00000000},
120 {0x000081f0, 0x00000000},
121 {0x000081f4, 0x00000000},
122 {0x000081f8, 0x00000000},
123 {0x000081fc, 0x00000000},
124 {0x00008240, 0x00100000},
125 {0x00008244, 0x0010f400},
126 {0x00008248, 0x00000800},
127 {0x0000824c, 0x0001e800},
128 {0x00008250, 0x00000000},
129 {0x00008254, 0x00000000},
130 {0x00008258, 0x00000000},
131 {0x0000825c, 0x40000000},
132 {0x00008260, 0x00080922},
133 {0x00008264, 0x99c00010},
134 {0x00008268, 0xffffffff},
135 {0x0000826c, 0x0000ffff},
136 {0x00008270, 0x00000000},
137 {0x00008274, 0x40000000},
138 {0x00008278, 0x003e4180},
139 {0x0000827c, 0x00000004},
140 {0x00008284, 0x0000002c},
141 {0x00008288, 0x0000002c},
142 {0x0000828c, 0x000000ff},
143 {0x00008294, 0x00000000},
144 {0x00008298, 0x00000000},
145 {0x0000829c, 0x00000000},
146 {0x00008300, 0x00000140},
147 {0x00008314, 0x00000000},
148 {0x0000831c, 0x0000010d},
149 {0x00008328, 0x00000000},
150 {0x0000832c, 0x0000001f},
151 {0x00008330, 0x00000302},
152 {0x00008334, 0x00000700},
153 {0x00008338, 0xffff0000},
154 {0x0000833c, 0x02400000},
155 {0x00008340, 0x000107ff},
156 {0x00008344, 0xaa48105b},
157 {0x00008348, 0x008f0000},
158 {0x0000835c, 0x00000000},
159 {0x00008360, 0xffffffff},
160 {0x00008364, 0xffffffff},
161 {0x00008368, 0x00000000},
162 {0x00008370, 0x00000000},
163 {0x00008374, 0x000000ff},
164 {0x00008378, 0x00000000},
165 {0x0000837c, 0x00000000},
166 {0x00008380, 0xffffffff},
167 {0x00008384, 0xffffffff},
168 {0x00008390, 0xffffffff},
169 {0x00008394, 0xffffffff},
170 {0x00008398, 0x00000000},
171 {0x0000839c, 0x00000000},
172 {0x000083a4, 0x0000fa14},
173 {0x000083a8, 0x000f0c00},
174 {0x000083ac, 0x33332210},
175 {0x000083b0, 0x33332210},
176 {0x000083b4, 0x33332210},
177 {0x000083b8, 0x33332210},
178 {0x000083bc, 0x00000000},
179 {0x000083c0, 0x00000000},
180 {0x000083c4, 0x00000000},
181 {0x000083c8, 0x00000000},
182 {0x000083cc, 0x00000200},
183 {0x000083d0, 0x000301ff},
184};
185
186static const u32 ar9480_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
187 /* Addr allmodes */
188 {0x0000a398, 0x00000000},
189 {0x0000a39c, 0x6f7f0301},
190 {0x0000a3a0, 0xca9228ee},
191};
192
193static const u32 ar9480_1p0_sys3ant[][2] = {
194 /* Addr allmodes */
195 {0x00063280, 0x00040807},
196 {0x00063284, 0x104ccccc},
197};
198
199static const u32 ar9480_pcie_phy_clkreq_enable_L1_1p0[][2] = {
200 /* Addr allmodes */
201 {0x00018c00, 0x10053e5e},
202 {0x00018c04, 0x000801d8},
203 {0x00018c08, 0x0000580c},
204};
205
206static const u32 ar9480_1p0_mac_core_emulation[][2] = {
207 /* Addr allmodes */
208 {0x00000030, 0x00060085},
209 {0x00000044, 0x00000008},
210 {0x0000805c, 0xffffc7ff},
211 {0x00008344, 0xaa4a105b},
212};
213
214static const u32 ar9480_common_rx_gain_table_ar9280_2p0_1p0[][2] = {
215 /* Addr allmodes */
216 {0x0000a000, 0x02000101},
217 {0x0000a004, 0x02000102},
218 {0x0000a008, 0x02000103},
219 {0x0000a00c, 0x02000104},
220 {0x0000a010, 0x02000200},
221 {0x0000a014, 0x02000201},
222 {0x0000a018, 0x02000202},
223 {0x0000a01c, 0x02000203},
224 {0x0000a020, 0x02000204},
225 {0x0000a024, 0x02000205},
226 {0x0000a028, 0x02000208},
227 {0x0000a02c, 0x02000302},
228 {0x0000a030, 0x02000303},
229 {0x0000a034, 0x02000304},
230 {0x0000a038, 0x02000400},
231 {0x0000a03c, 0x02010300},
232 {0x0000a040, 0x02010301},
233 {0x0000a044, 0x02010302},
234 {0x0000a048, 0x02000500},
235 {0x0000a04c, 0x02010400},
236 {0x0000a050, 0x02020300},
237 {0x0000a054, 0x02020301},
238 {0x0000a058, 0x02020302},
239 {0x0000a05c, 0x02020303},
240 {0x0000a060, 0x02020400},
241 {0x0000a064, 0x02030300},
242 {0x0000a068, 0x02030301},
243 {0x0000a06c, 0x02030302},
244 {0x0000a070, 0x02030303},
245 {0x0000a074, 0x02030400},
246 {0x0000a078, 0x02040300},
247 {0x0000a07c, 0x02040301},
248 {0x0000a080, 0x02040302},
249 {0x0000a084, 0x02040303},
250 {0x0000a088, 0x02030500},
251 {0x0000a08c, 0x02040400},
252 {0x0000a090, 0x02050203},
253 {0x0000a094, 0x02050204},
254 {0x0000a098, 0x02050205},
255 {0x0000a09c, 0x02040500},
256 {0x0000a0a0, 0x02050301},
257 {0x0000a0a4, 0x02050302},
258 {0x0000a0a8, 0x02050303},
259 {0x0000a0ac, 0x02050400},
260 {0x0000a0b0, 0x02050401},
261 {0x0000a0b4, 0x02050402},
262 {0x0000a0b8, 0x02050403},
263 {0x0000a0bc, 0x02050500},
264 {0x0000a0c0, 0x02050501},
265 {0x0000a0c4, 0x02050502},
266 {0x0000a0c8, 0x02050503},
267 {0x0000a0cc, 0x02050504},
268 {0x0000a0d0, 0x02050600},
269 {0x0000a0d4, 0x02050601},
270 {0x0000a0d8, 0x02050602},
271 {0x0000a0dc, 0x02050603},
272 {0x0000a0e0, 0x02050604},
273 {0x0000a0e4, 0x02050700},
274 {0x0000a0e8, 0x02050701},
275 {0x0000a0ec, 0x02050702},
276 {0x0000a0f0, 0x02050703},
277 {0x0000a0f4, 0x02050704},
278 {0x0000a0f8, 0x02050705},
279 {0x0000a0fc, 0x02050708},
280 {0x0000a100, 0x02050709},
281 {0x0000a104, 0x0205070a},
282 {0x0000a108, 0x0205070b},
283 {0x0000a10c, 0x0205070c},
284 {0x0000a110, 0x0205070d},
285 {0x0000a114, 0x02050710},
286 {0x0000a118, 0x02050711},
287 {0x0000a11c, 0x02050712},
288 {0x0000a120, 0x02050713},
289 {0x0000a124, 0x02050714},
290 {0x0000a128, 0x02050715},
291 {0x0000a12c, 0x02050730},
292 {0x0000a130, 0x02050731},
293 {0x0000a134, 0x02050732},
294 {0x0000a138, 0x02050733},
295 {0x0000a13c, 0x02050734},
296 {0x0000a140, 0x02050735},
297 {0x0000a144, 0x02050750},
298 {0x0000a148, 0x02050751},
299 {0x0000a14c, 0x02050752},
300 {0x0000a150, 0x02050753},
301 {0x0000a154, 0x02050754},
302 {0x0000a158, 0x02050755},
303 {0x0000a15c, 0x02050770},
304 {0x0000a160, 0x02050771},
305 {0x0000a164, 0x02050772},
306 {0x0000a168, 0x02050773},
307 {0x0000a16c, 0x02050774},
308 {0x0000a170, 0x02050775},
309 {0x0000a174, 0x00000776},
310 {0x0000a178, 0x00000776},
311 {0x0000a17c, 0x00000776},
312 {0x0000a180, 0x00000776},
313 {0x0000a184, 0x00000776},
314 {0x0000a188, 0x00000776},
315 {0x0000a18c, 0x00000776},
316 {0x0000a190, 0x00000776},
317 {0x0000a194, 0x00000776},
318 {0x0000a198, 0x00000776},
319 {0x0000a19c, 0x00000776},
320 {0x0000a1a0, 0x00000776},
321 {0x0000a1a4, 0x00000776},
322 {0x0000a1a8, 0x00000776},
323 {0x0000a1ac, 0x00000776},
324 {0x0000a1b0, 0x00000776},
325 {0x0000a1b4, 0x00000776},
326 {0x0000a1b8, 0x00000776},
327 {0x0000a1bc, 0x00000776},
328 {0x0000a1c0, 0x00000776},
329 {0x0000a1c4, 0x00000776},
330 {0x0000a1c8, 0x00000776},
331 {0x0000a1cc, 0x00000776},
332 {0x0000a1d0, 0x00000776},
333 {0x0000a1d4, 0x00000776},
334 {0x0000a1d8, 0x00000776},
335 {0x0000a1dc, 0x00000776},
336 {0x0000a1e0, 0x00000776},
337 {0x0000a1e4, 0x00000776},
338 {0x0000a1e8, 0x00000776},
339 {0x0000a1ec, 0x00000776},
340 {0x0000a1f0, 0x00000776},
341 {0x0000a1f4, 0x00000776},
342 {0x0000a1f8, 0x00000776},
343 {0x0000a1fc, 0x00000776},
344 {0x0000b000, 0x02000101},
345 {0x0000b004, 0x02000102},
346 {0x0000b008, 0x02000103},
347 {0x0000b00c, 0x02000104},
348 {0x0000b010, 0x02000200},
349 {0x0000b014, 0x02000201},
350 {0x0000b018, 0x02000202},
351 {0x0000b01c, 0x02000203},
352 {0x0000b020, 0x02000204},
353 {0x0000b024, 0x02000205},
354 {0x0000b028, 0x02000208},
355 {0x0000b02c, 0x02000302},
356 {0x0000b030, 0x02000303},
357 {0x0000b034, 0x02000304},
358 {0x0000b038, 0x02000400},
359 {0x0000b03c, 0x02010300},
360 {0x0000b040, 0x02010301},
361 {0x0000b044, 0x02010302},
362 {0x0000b048, 0x02000500},
363 {0x0000b04c, 0x02010400},
364 {0x0000b050, 0x02020300},
365 {0x0000b054, 0x02020301},
366 {0x0000b058, 0x02020302},
367 {0x0000b05c, 0x02020303},
368 {0x0000b060, 0x02020400},
369 {0x0000b064, 0x02030300},
370 {0x0000b068, 0x02030301},
371 {0x0000b06c, 0x02030302},
372 {0x0000b070, 0x02030303},
373 {0x0000b074, 0x02030400},
374 {0x0000b078, 0x02040300},
375 {0x0000b07c, 0x02040301},
376 {0x0000b080, 0x02040302},
377 {0x0000b084, 0x02040303},
378 {0x0000b088, 0x02030500},
379 {0x0000b08c, 0x02040400},
380 {0x0000b090, 0x02050203},
381 {0x0000b094, 0x02050204},
382 {0x0000b098, 0x02050205},
383 {0x0000b09c, 0x02040500},
384 {0x0000b0a0, 0x02050301},
385 {0x0000b0a4, 0x02050302},
386 {0x0000b0a8, 0x02050303},
387 {0x0000b0ac, 0x02050400},
388 {0x0000b0b0, 0x02050401},
389 {0x0000b0b4, 0x02050402},
390 {0x0000b0b8, 0x02050403},
391 {0x0000b0bc, 0x02050500},
392 {0x0000b0c0, 0x02050501},
393 {0x0000b0c4, 0x02050502},
394 {0x0000b0c8, 0x02050503},
395 {0x0000b0cc, 0x02050504},
396 {0x0000b0d0, 0x02050600},
397 {0x0000b0d4, 0x02050601},
398 {0x0000b0d8, 0x02050602},
399 {0x0000b0dc, 0x02050603},
400 {0x0000b0e0, 0x02050604},
401 {0x0000b0e4, 0x02050700},
402 {0x0000b0e8, 0x02050701},
403 {0x0000b0ec, 0x02050702},
404 {0x0000b0f0, 0x02050703},
405 {0x0000b0f4, 0x02050704},
406 {0x0000b0f8, 0x02050705},
407 {0x0000b0fc, 0x02050708},
408 {0x0000b100, 0x02050709},
409 {0x0000b104, 0x0205070a},
410 {0x0000b108, 0x0205070b},
411 {0x0000b10c, 0x0205070c},
412 {0x0000b110, 0x0205070d},
413 {0x0000b114, 0x02050710},
414 {0x0000b118, 0x02050711},
415 {0x0000b11c, 0x02050712},
416 {0x0000b120, 0x02050713},
417 {0x0000b124, 0x02050714},
418 {0x0000b128, 0x02050715},
419 {0x0000b12c, 0x02050730},
420 {0x0000b130, 0x02050731},
421 {0x0000b134, 0x02050732},
422 {0x0000b138, 0x02050733},
423 {0x0000b13c, 0x02050734},
424 {0x0000b140, 0x02050735},
425 {0x0000b144, 0x02050750},
426 {0x0000b148, 0x02050751},
427 {0x0000b14c, 0x02050752},
428 {0x0000b150, 0x02050753},
429 {0x0000b154, 0x02050754},
430 {0x0000b158, 0x02050755},
431 {0x0000b15c, 0x02050770},
432 {0x0000b160, 0x02050771},
433 {0x0000b164, 0x02050772},
434 {0x0000b168, 0x02050773},
435 {0x0000b16c, 0x02050774},
436 {0x0000b170, 0x02050775},
437 {0x0000b174, 0x00000776},
438 {0x0000b178, 0x00000776},
439 {0x0000b17c, 0x00000776},
440 {0x0000b180, 0x00000776},
441 {0x0000b184, 0x00000776},
442 {0x0000b188, 0x00000776},
443 {0x0000b18c, 0x00000776},
444 {0x0000b190, 0x00000776},
445 {0x0000b194, 0x00000776},
446 {0x0000b198, 0x00000776},
447 {0x0000b19c, 0x00000776},
448 {0x0000b1a0, 0x00000776},
449 {0x0000b1a4, 0x00000776},
450 {0x0000b1a8, 0x00000776},
451 {0x0000b1ac, 0x00000776},
452 {0x0000b1b0, 0x00000776},
453 {0x0000b1b4, 0x00000776},
454 {0x0000b1b8, 0x00000776},
455 {0x0000b1bc, 0x00000776},
456 {0x0000b1c0, 0x00000776},
457 {0x0000b1c4, 0x00000776},
458 {0x0000b1c8, 0x00000776},
459 {0x0000b1cc, 0x00000776},
460 {0x0000b1d0, 0x00000776},
461 {0x0000b1d4, 0x00000776},
462 {0x0000b1d8, 0x00000776},
463 {0x0000b1dc, 0x00000776},
464 {0x0000b1e0, 0x00000776},
465 {0x0000b1e4, 0x00000776},
466 {0x0000b1e8, 0x00000776},
467 {0x0000b1ec, 0x00000776},
468 {0x0000b1f0, 0x00000776},
469 {0x0000b1f4, 0x00000776},
470 {0x0000b1f8, 0x00000776},
471 {0x0000b1fc, 0x00000776},
472};
473
474static const u32 ar9200_ar9280_2p0_radio_core_1p0[][2] = {
475 /* Addr allmodes */
476 {0x00007800, 0x00040000},
477 {0x00007804, 0xdb005012},
478 {0x00007808, 0x04924914},
479 {0x0000780c, 0x21084210},
480 {0x00007810, 0x6d801300},
481 {0x00007814, 0x0019beff},
482 {0x00007818, 0x07e41000},
483 {0x0000781c, 0x00392000},
484 {0x00007820, 0x92592480},
485 {0x00007824, 0x00040000},
486 {0x00007828, 0xdb005012},
487 {0x0000782c, 0x04924914},
488 {0x00007830, 0x21084210},
489 {0x00007834, 0x6d801300},
490 {0x00007838, 0x0019beff},
491 {0x0000783c, 0x07e40000},
492 {0x00007840, 0x00392000},
493 {0x00007844, 0x92592480},
494 {0x00007848, 0x00100000},
495 {0x0000784c, 0x773f0567},
496 {0x00007850, 0x54214514},
497 {0x00007854, 0x12035828},
498 {0x00007858, 0x92592692},
499 {0x0000785c, 0x00000000},
500 {0x00007860, 0x56400000},
501 {0x00007864, 0x0a8e370e},
502 {0x00007868, 0xc0102850},
503 {0x0000786c, 0x812d4000},
504 {0x00007870, 0x807ec400},
505 {0x00007874, 0x001b6db0},
506 {0x00007878, 0x00376b63},
507 {0x0000787c, 0x06db6db6},
508 {0x00007880, 0x006d8000},
509 {0x00007884, 0xffeffffe},
510 {0x00007888, 0xffeffffe},
511 {0x0000788c, 0x00010000},
512 {0x00007890, 0x02060aeb},
513 {0x00007894, 0x5a108000},
514};
515
516static const u32 ar9480_1p0_baseband_postamble_emulation[][5] = {
517 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
518 {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
519 {0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
520 {0x00009e44, 0x005c0000, 0x005c0000, 0x005c0000, 0x005c0000},
521 {0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
522 {0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
523 {0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
524 {0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
525 {0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
526 {0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
527 {0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
528 {0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
529 {0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
530 {0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
531 {0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
532 {0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
533 {0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
534 {0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
535 {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
536};
537
538static const u32 ar9480_pcie_phy_pll_on_clkreq_disable_L1_1p0[][2] = {
539 /* Addr allmodes */
540 {0x00018c00, 0x10012e5e},
541 {0x00018c04, 0x000801d8},
542 {0x00018c08, 0x0000580c},
543};
544
545static const u32 ar9480_common_rx_gain_table_1p0[][2] = {
546 /* Addr allmodes */
547 {0x0000a000, 0x00010000},
548 {0x0000a004, 0x00030002},
549 {0x0000a008, 0x00050004},
550 {0x0000a00c, 0x00810080},
551 {0x0000a010, 0x00830082},
552 {0x0000a014, 0x01810180},
553 {0x0000a018, 0x01830182},
554 {0x0000a01c, 0x01850184},
555 {0x0000a020, 0x01890188},
556 {0x0000a024, 0x018b018a},
557 {0x0000a028, 0x018d018c},
558 {0x0000a02c, 0x01910190},
559 {0x0000a030, 0x01930192},
560 {0x0000a034, 0x01950194},
561 {0x0000a038, 0x038a0196},
562 {0x0000a03c, 0x038c038b},
563 {0x0000a040, 0x0390038d},
564 {0x0000a044, 0x03920391},
565 {0x0000a048, 0x03940393},
566 {0x0000a04c, 0x03960395},
567 {0x0000a050, 0x00000000},
568 {0x0000a054, 0x00000000},
569 {0x0000a058, 0x00000000},
570 {0x0000a05c, 0x00000000},
571 {0x0000a060, 0x00000000},
572 {0x0000a064, 0x00000000},
573 {0x0000a068, 0x00000000},
574 {0x0000a06c, 0x00000000},
575 {0x0000a070, 0x00000000},
576 {0x0000a074, 0x00000000},
577 {0x0000a078, 0x00000000},
578 {0x0000a07c, 0x00000000},
579 {0x0000a080, 0x22222229},
580 {0x0000a084, 0x1d1d1d1d},
581 {0x0000a088, 0x1d1d1d1d},
582 {0x0000a08c, 0x1d1d1d1d},
583 {0x0000a090, 0x171d1d1d},
584 {0x0000a094, 0x11111717},
585 {0x0000a098, 0x00030311},
586 {0x0000a09c, 0x00000000},
587 {0x0000a0a0, 0x00000000},
588 {0x0000a0a4, 0x00000000},
589 {0x0000a0a8, 0x00000000},
590 {0x0000a0ac, 0x00000000},
591 {0x0000a0b0, 0x00000000},
592 {0x0000a0b4, 0x00000000},
593 {0x0000a0b8, 0x00000000},
594 {0x0000a0bc, 0x00000000},
595 {0x0000a0c0, 0x001f0000},
596 {0x0000a0c4, 0x01000101},
597 {0x0000a0c8, 0x011e011f},
598 {0x0000a0cc, 0x011c011d},
599 {0x0000a0d0, 0x02030204},
600 {0x0000a0d4, 0x02010202},
601 {0x0000a0d8, 0x021f0200},
602 {0x0000a0dc, 0x0302021e},
603 {0x0000a0e0, 0x03000301},
604 {0x0000a0e4, 0x031e031f},
605 {0x0000a0e8, 0x0402031d},
606 {0x0000a0ec, 0x04000401},
607 {0x0000a0f0, 0x041e041f},
608 {0x0000a0f4, 0x0502041d},
609 {0x0000a0f8, 0x05000501},
610 {0x0000a0fc, 0x051e051f},
611 {0x0000a100, 0x06010602},
612 {0x0000a104, 0x061f0600},
613 {0x0000a108, 0x061d061e},
614 {0x0000a10c, 0x07020703},
615 {0x0000a110, 0x07000701},
616 {0x0000a114, 0x00000000},
617 {0x0000a118, 0x00000000},
618 {0x0000a11c, 0x00000000},
619 {0x0000a120, 0x00000000},
620 {0x0000a124, 0x00000000},
621 {0x0000a128, 0x00000000},
622 {0x0000a12c, 0x00000000},
623 {0x0000a130, 0x00000000},
624 {0x0000a134, 0x00000000},
625 {0x0000a138, 0x00000000},
626 {0x0000a13c, 0x00000000},
627 {0x0000a140, 0x001f0000},
628 {0x0000a144, 0x01000101},
629 {0x0000a148, 0x011e011f},
630 {0x0000a14c, 0x011c011d},
631 {0x0000a150, 0x02030204},
632 {0x0000a154, 0x02010202},
633 {0x0000a158, 0x021f0200},
634 {0x0000a15c, 0x0302021e},
635 {0x0000a160, 0x03000301},
636 {0x0000a164, 0x031e031f},
637 {0x0000a168, 0x0402031d},
638 {0x0000a16c, 0x04000401},
639 {0x0000a170, 0x041e041f},
640 {0x0000a174, 0x0502041d},
641 {0x0000a178, 0x05000501},
642 {0x0000a17c, 0x051e051f},
643 {0x0000a180, 0x06010602},
644 {0x0000a184, 0x061f0600},
645 {0x0000a188, 0x061d061e},
646 {0x0000a18c, 0x07020703},
647 {0x0000a190, 0x07000701},
648 {0x0000a194, 0x00000000},
649 {0x0000a198, 0x00000000},
650 {0x0000a19c, 0x00000000},
651 {0x0000a1a0, 0x00000000},
652 {0x0000a1a4, 0x00000000},
653 {0x0000a1a8, 0x00000000},
654 {0x0000a1ac, 0x00000000},
655 {0x0000a1b0, 0x00000000},
656 {0x0000a1b4, 0x00000000},
657 {0x0000a1b8, 0x00000000},
658 {0x0000a1bc, 0x00000000},
659 {0x0000a1c0, 0x00000000},
660 {0x0000a1c4, 0x00000000},
661 {0x0000a1c8, 0x00000000},
662 {0x0000a1cc, 0x00000000},
663 {0x0000a1d0, 0x00000000},
664 {0x0000a1d4, 0x00000000},
665 {0x0000a1d8, 0x00000000},
666 {0x0000a1dc, 0x00000000},
667 {0x0000a1e0, 0x00000000},
668 {0x0000a1e4, 0x00000000},
669 {0x0000a1e8, 0x00000000},
670 {0x0000a1ec, 0x00000000},
671 {0x0000a1f0, 0x00000396},
672 {0x0000a1f4, 0x00000396},
673 {0x0000a1f8, 0x00000396},
674 {0x0000a1fc, 0x00000196},
675 {0x0000b000, 0x00010000},
676 {0x0000b004, 0x00030002},
677 {0x0000b008, 0x00050004},
678 {0x0000b00c, 0x00810080},
679 {0x0000b010, 0x00830082},
680 {0x0000b014, 0x01810180},
681 {0x0000b018, 0x01830182},
682 {0x0000b01c, 0x01850184},
683 {0x0000b020, 0x02810280},
684 {0x0000b024, 0x02830282},
685 {0x0000b028, 0x02850284},
686 {0x0000b02c, 0x02890288},
687 {0x0000b030, 0x028b028a},
688 {0x0000b034, 0x0388028c},
689 {0x0000b038, 0x038a0389},
690 {0x0000b03c, 0x038c038b},
691 {0x0000b040, 0x0390038d},
692 {0x0000b044, 0x03920391},
693 {0x0000b048, 0x03940393},
694 {0x0000b04c, 0x03960395},
695 {0x0000b050, 0x00000000},
696 {0x0000b054, 0x00000000},
697 {0x0000b058, 0x00000000},
698 {0x0000b05c, 0x00000000},
699 {0x0000b060, 0x00000000},
700 {0x0000b064, 0x00000000},
701 {0x0000b068, 0x00000000},
702 {0x0000b06c, 0x00000000},
703 {0x0000b070, 0x00000000},
704 {0x0000b074, 0x00000000},
705 {0x0000b078, 0x00000000},
706 {0x0000b07c, 0x00000000},
707 {0x0000b080, 0x2a2d2f32},
708 {0x0000b084, 0x21232328},
709 {0x0000b088, 0x19191c1e},
710 {0x0000b08c, 0x12141417},
711 {0x0000b090, 0x07070e0e},
712 {0x0000b094, 0x03030305},
713 {0x0000b098, 0x00000003},
714 {0x0000b09c, 0x00000000},
715 {0x0000b0a0, 0x00000000},
716 {0x0000b0a4, 0x00000000},
717 {0x0000b0a8, 0x00000000},
718 {0x0000b0ac, 0x00000000},
719 {0x0000b0b0, 0x00000000},
720 {0x0000b0b4, 0x00000000},
721 {0x0000b0b8, 0x00000000},
722 {0x0000b0bc, 0x00000000},
723 {0x0000b0c0, 0x003f0020},
724 {0x0000b0c4, 0x00400041},
725 {0x0000b0c8, 0x0140005f},
726 {0x0000b0cc, 0x0160015f},
727 {0x0000b0d0, 0x017e017f},
728 {0x0000b0d4, 0x02410242},
729 {0x0000b0d8, 0x025f0240},
730 {0x0000b0dc, 0x027f0260},
731 {0x0000b0e0, 0x0341027e},
732 {0x0000b0e4, 0x035f0340},
733 {0x0000b0e8, 0x037f0360},
734 {0x0000b0ec, 0x04400441},
735 {0x0000b0f0, 0x0460045f},
736 {0x0000b0f4, 0x0541047f},
737 {0x0000b0f8, 0x055f0540},
738 {0x0000b0fc, 0x057f0560},
739 {0x0000b100, 0x06400641},
740 {0x0000b104, 0x0660065f},
741 {0x0000b108, 0x067e067f},
742 {0x0000b10c, 0x07410742},
743 {0x0000b110, 0x075f0740},
744 {0x0000b114, 0x077f0760},
745 {0x0000b118, 0x07800781},
746 {0x0000b11c, 0x07a0079f},
747 {0x0000b120, 0x07c107bf},
748 {0x0000b124, 0x000007c0},
749 {0x0000b128, 0x00000000},
750 {0x0000b12c, 0x00000000},
751 {0x0000b130, 0x00000000},
752 {0x0000b134, 0x00000000},
753 {0x0000b138, 0x00000000},
754 {0x0000b13c, 0x00000000},
755 {0x0000b140, 0x003f0020},
756 {0x0000b144, 0x00400041},
757 {0x0000b148, 0x0140005f},
758 {0x0000b14c, 0x0160015f},
759 {0x0000b150, 0x017e017f},
760 {0x0000b154, 0x02410242},
761 {0x0000b158, 0x025f0240},
762 {0x0000b15c, 0x027f0260},
763 {0x0000b160, 0x0341027e},
764 {0x0000b164, 0x035f0340},
765 {0x0000b168, 0x037f0360},
766 {0x0000b16c, 0x04400441},
767 {0x0000b170, 0x0460045f},
768 {0x0000b174, 0x0541047f},
769 {0x0000b178, 0x055f0540},
770 {0x0000b17c, 0x057f0560},
771 {0x0000b180, 0x06400641},
772 {0x0000b184, 0x0660065f},
773 {0x0000b188, 0x067e067f},
774 {0x0000b18c, 0x07410742},
775 {0x0000b190, 0x075f0740},
776 {0x0000b194, 0x077f0760},
777 {0x0000b198, 0x07800781},
778 {0x0000b19c, 0x07a0079f},
779 {0x0000b1a0, 0x07c107bf},
780 {0x0000b1a4, 0x000007c0},
781 {0x0000b1a8, 0x00000000},
782 {0x0000b1ac, 0x00000000},
783 {0x0000b1b0, 0x00000000},
784 {0x0000b1b4, 0x00000000},
785 {0x0000b1b8, 0x00000000},
786 {0x0000b1bc, 0x00000000},
787 {0x0000b1c0, 0x00000000},
788 {0x0000b1c4, 0x00000000},
789 {0x0000b1c8, 0x00000000},
790 {0x0000b1cc, 0x00000000},
791 {0x0000b1d0, 0x00000000},
792 {0x0000b1d4, 0x00000000},
793 {0x0000b1d8, 0x00000000},
794 {0x0000b1dc, 0x00000000},
795 {0x0000b1e0, 0x00000000},
796 {0x0000b1e4, 0x00000000},
797 {0x0000b1e8, 0x00000000},
798 {0x0000b1ec, 0x00000000},
799 {0x0000b1f0, 0x00000396},
800 {0x0000b1f4, 0x00000396},
801 {0x0000b1f8, 0x00000396},
802 {0x0000b1fc, 0x00000196},
803};
804
805static const u32 ar9480_modes_high_ob_db_tx_gain_table_1p0[][5] = {
806 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
807 {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
808 {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
809 {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
810 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
811 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
812 {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
813 {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
814 {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
815 {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
816 {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
817 {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
818 {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
819 {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
820 {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
821 {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
822 {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
823 {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
824 {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
825 {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
826 {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
827 {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
828 {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
829 {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
830 {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
831 {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
832 {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
833 {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
834 {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
835 {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
836 {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
837 {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
838 {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
839 {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
840 {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
841 {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
842 {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
843 {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
844 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
845 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
846 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
847 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
848 {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
849 {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
850 {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
851 {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
852 {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
853 {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
854 {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
855 {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
856 {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
857 {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
858 {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
859 {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
860 {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
861 {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
862 {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
863 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
864 {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
865 {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
866 {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
867 {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
868};
869
870static const u32 ar9480_common_wo_xlna_rx_gain_table_1p0[][2] = {
871 /* Addr allmodes */
872 {0x0000a000, 0x00010000},
873 {0x0000a004, 0x00030002},
874 {0x0000a008, 0x00050004},
875 {0x0000a00c, 0x00810080},
876 {0x0000a010, 0x00830082},
877 {0x0000a014, 0x01810180},
878 {0x0000a018, 0x01830182},
879 {0x0000a01c, 0x01850184},
880 {0x0000a020, 0x01890188},
881 {0x0000a024, 0x018b018a},
882 {0x0000a028, 0x018d018c},
883 {0x0000a02c, 0x03820190},
884 {0x0000a030, 0x03840383},
885 {0x0000a034, 0x03880385},
886 {0x0000a038, 0x038a0389},
887 {0x0000a03c, 0x038c038b},
888 {0x0000a040, 0x0390038d},
889 {0x0000a044, 0x03920391},
890 {0x0000a048, 0x03940393},
891 {0x0000a04c, 0x03960395},
892 {0x0000a050, 0x00000000},
893 {0x0000a054, 0x00000000},
894 {0x0000a058, 0x00000000},
895 {0x0000a05c, 0x00000000},
896 {0x0000a060, 0x00000000},
897 {0x0000a064, 0x00000000},
898 {0x0000a068, 0x00000000},
899 {0x0000a06c, 0x00000000},
900 {0x0000a070, 0x00000000},
901 {0x0000a074, 0x00000000},
902 {0x0000a078, 0x00000000},
903 {0x0000a07c, 0x00000000},
904 {0x0000a080, 0x29292929},
905 {0x0000a084, 0x29292929},
906 {0x0000a088, 0x29292929},
907 {0x0000a08c, 0x29292929},
908 {0x0000a090, 0x22292929},
909 {0x0000a094, 0x1d1d2222},
910 {0x0000a098, 0x0c111117},
911 {0x0000a09c, 0x00030303},
912 {0x0000a0a0, 0x00000000},
913 {0x0000a0a4, 0x00000000},
914 {0x0000a0a8, 0x00000000},
915 {0x0000a0ac, 0x00000000},
916 {0x0000a0b0, 0x00000000},
917 {0x0000a0b4, 0x00000000},
918 {0x0000a0b8, 0x00000000},
919 {0x0000a0bc, 0x00000000},
920 {0x0000a0c0, 0x001f0000},
921 {0x0000a0c4, 0x01000101},
922 {0x0000a0c8, 0x011e011f},
923 {0x0000a0cc, 0x011c011d},
924 {0x0000a0d0, 0x02030204},
925 {0x0000a0d4, 0x02010202},
926 {0x0000a0d8, 0x021f0200},
927 {0x0000a0dc, 0x0302021e},
928 {0x0000a0e0, 0x03000301},
929 {0x0000a0e4, 0x031e031f},
930 {0x0000a0e8, 0x0402031d},
931 {0x0000a0ec, 0x04000401},
932 {0x0000a0f0, 0x041e041f},
933 {0x0000a0f4, 0x0502041d},
934 {0x0000a0f8, 0x05000501},
935 {0x0000a0fc, 0x051e051f},
936 {0x0000a100, 0x06010602},
937 {0x0000a104, 0x061f0600},
938 {0x0000a108, 0x061d061e},
939 {0x0000a10c, 0x07020703},
940 {0x0000a110, 0x07000701},
941 {0x0000a114, 0x00000000},
942 {0x0000a118, 0x00000000},
943 {0x0000a11c, 0x00000000},
944 {0x0000a120, 0x00000000},
945 {0x0000a124, 0x00000000},
946 {0x0000a128, 0x00000000},
947 {0x0000a12c, 0x00000000},
948 {0x0000a130, 0x00000000},
949 {0x0000a134, 0x00000000},
950 {0x0000a138, 0x00000000},
951 {0x0000a13c, 0x00000000},
952 {0x0000a140, 0x001f0000},
953 {0x0000a144, 0x01000101},
954 {0x0000a148, 0x011e011f},
955 {0x0000a14c, 0x011c011d},
956 {0x0000a150, 0x02030204},
957 {0x0000a154, 0x02010202},
958 {0x0000a158, 0x021f0200},
959 {0x0000a15c, 0x0302021e},
960 {0x0000a160, 0x03000301},
961 {0x0000a164, 0x031e031f},
962 {0x0000a168, 0x0402031d},
963 {0x0000a16c, 0x04000401},
964 {0x0000a170, 0x041e041f},
965 {0x0000a174, 0x0502041d},
966 {0x0000a178, 0x05000501},
967 {0x0000a17c, 0x051e051f},
968 {0x0000a180, 0x06010602},
969 {0x0000a184, 0x061f0600},
970 {0x0000a188, 0x061d061e},
971 {0x0000a18c, 0x07020703},
972 {0x0000a190, 0x07000701},
973 {0x0000a194, 0x00000000},
974 {0x0000a198, 0x00000000},
975 {0x0000a19c, 0x00000000},
976 {0x0000a1a0, 0x00000000},
977 {0x0000a1a4, 0x00000000},
978 {0x0000a1a8, 0x00000000},
979 {0x0000a1ac, 0x00000000},
980 {0x0000a1b0, 0x00000000},
981 {0x0000a1b4, 0x00000000},
982 {0x0000a1b8, 0x00000000},
983 {0x0000a1bc, 0x00000000},
984 {0x0000a1c0, 0x00000000},
985 {0x0000a1c4, 0x00000000},
986 {0x0000a1c8, 0x00000000},
987 {0x0000a1cc, 0x00000000},
988 {0x0000a1d0, 0x00000000},
989 {0x0000a1d4, 0x00000000},
990 {0x0000a1d8, 0x00000000},
991 {0x0000a1dc, 0x00000000},
992 {0x0000a1e0, 0x00000000},
993 {0x0000a1e4, 0x00000000},
994 {0x0000a1e8, 0x00000000},
995 {0x0000a1ec, 0x00000000},
996 {0x0000a1f0, 0x00000396},
997 {0x0000a1f4, 0x00000396},
998 {0x0000a1f8, 0x00000396},
999 {0x0000a1fc, 0x00000196},
1000 {0x0000b000, 0x00010000},
1001 {0x0000b004, 0x00030002},
1002 {0x0000b008, 0x00050004},
1003 {0x0000b00c, 0x00810080},
1004 {0x0000b010, 0x00830082},
1005 {0x0000b014, 0x01810180},
1006 {0x0000b018, 0x01830182},
1007 {0x0000b01c, 0x01850184},
1008 {0x0000b020, 0x02810280},
1009 {0x0000b024, 0x02830282},
1010 {0x0000b028, 0x02850284},
1011 {0x0000b02c, 0x02890288},
1012 {0x0000b030, 0x028b028a},
1013 {0x0000b034, 0x0388028c},
1014 {0x0000b038, 0x038a0389},
1015 {0x0000b03c, 0x038c038b},
1016 {0x0000b040, 0x0390038d},
1017 {0x0000b044, 0x03920391},
1018 {0x0000b048, 0x03940393},
1019 {0x0000b04c, 0x03960395},
1020 {0x0000b050, 0x00000000},
1021 {0x0000b054, 0x00000000},
1022 {0x0000b058, 0x00000000},
1023 {0x0000b05c, 0x00000000},
1024 {0x0000b060, 0x00000000},
1025 {0x0000b064, 0x00000000},
1026 {0x0000b068, 0x00000000},
1027 {0x0000b06c, 0x00000000},
1028 {0x0000b070, 0x00000000},
1029 {0x0000b074, 0x00000000},
1030 {0x0000b078, 0x00000000},
1031 {0x0000b07c, 0x00000000},
1032 {0x0000b080, 0x32323232},
1033 {0x0000b084, 0x2f2f3232},
1034 {0x0000b088, 0x23282a2d},
1035 {0x0000b08c, 0x1c1e2123},
1036 {0x0000b090, 0x14171919},
1037 {0x0000b094, 0x0e0e1214},
1038 {0x0000b098, 0x03050707},
1039 {0x0000b09c, 0x00030303},
1040 {0x0000b0a0, 0x00000000},
1041 {0x0000b0a4, 0x00000000},
1042 {0x0000b0a8, 0x00000000},
1043 {0x0000b0ac, 0x00000000},
1044 {0x0000b0b0, 0x00000000},
1045 {0x0000b0b4, 0x00000000},
1046 {0x0000b0b8, 0x00000000},
1047 {0x0000b0bc, 0x00000000},
1048 {0x0000b0c0, 0x003f0020},
1049 {0x0000b0c4, 0x00400041},
1050 {0x0000b0c8, 0x0140005f},
1051 {0x0000b0cc, 0x0160015f},
1052 {0x0000b0d0, 0x017e017f},
1053 {0x0000b0d4, 0x02410242},
1054 {0x0000b0d8, 0x025f0240},
1055 {0x0000b0dc, 0x027f0260},
1056 {0x0000b0e0, 0x0341027e},
1057 {0x0000b0e4, 0x035f0340},
1058 {0x0000b0e8, 0x037f0360},
1059 {0x0000b0ec, 0x04400441},
1060 {0x0000b0f0, 0x0460045f},
1061 {0x0000b0f4, 0x0541047f},
1062 {0x0000b0f8, 0x055f0540},
1063 {0x0000b0fc, 0x057f0560},
1064 {0x0000b100, 0x06400641},
1065 {0x0000b104, 0x0660065f},
1066 {0x0000b108, 0x067e067f},
1067 {0x0000b10c, 0x07410742},
1068 {0x0000b110, 0x075f0740},
1069 {0x0000b114, 0x077f0760},
1070 {0x0000b118, 0x07800781},
1071 {0x0000b11c, 0x07a0079f},
1072 {0x0000b120, 0x07c107bf},
1073 {0x0000b124, 0x000007c0},
1074 {0x0000b128, 0x00000000},
1075 {0x0000b12c, 0x00000000},
1076 {0x0000b130, 0x00000000},
1077 {0x0000b134, 0x00000000},
1078 {0x0000b138, 0x00000000},
1079 {0x0000b13c, 0x00000000},
1080 {0x0000b140, 0x003f0020},
1081 {0x0000b144, 0x00400041},
1082 {0x0000b148, 0x0140005f},
1083 {0x0000b14c, 0x0160015f},
1084 {0x0000b150, 0x017e017f},
1085 {0x0000b154, 0x02410242},
1086 {0x0000b158, 0x025f0240},
1087 {0x0000b15c, 0x027f0260},
1088 {0x0000b160, 0x0341027e},
1089 {0x0000b164, 0x035f0340},
1090 {0x0000b168, 0x037f0360},
1091 {0x0000b16c, 0x04400441},
1092 {0x0000b170, 0x0460045f},
1093 {0x0000b174, 0x0541047f},
1094 {0x0000b178, 0x055f0540},
1095 {0x0000b17c, 0x057f0560},
1096 {0x0000b180, 0x06400641},
1097 {0x0000b184, 0x0660065f},
1098 {0x0000b188, 0x067e067f},
1099 {0x0000b18c, 0x07410742},
1100 {0x0000b190, 0x075f0740},
1101 {0x0000b194, 0x077f0760},
1102 {0x0000b198, 0x07800781},
1103 {0x0000b19c, 0x07a0079f},
1104 {0x0000b1a0, 0x07c107bf},
1105 {0x0000b1a4, 0x000007c0},
1106 {0x0000b1a8, 0x00000000},
1107 {0x0000b1ac, 0x00000000},
1108 {0x0000b1b0, 0x00000000},
1109 {0x0000b1b4, 0x00000000},
1110 {0x0000b1b8, 0x00000000},
1111 {0x0000b1bc, 0x00000000},
1112 {0x0000b1c0, 0x00000000},
1113 {0x0000b1c4, 0x00000000},
1114 {0x0000b1c8, 0x00000000},
1115 {0x0000b1cc, 0x00000000},
1116 {0x0000b1d0, 0x00000000},
1117 {0x0000b1d4, 0x00000000},
1118 {0x0000b1d8, 0x00000000},
1119 {0x0000b1dc, 0x00000000},
1120 {0x0000b1e0, 0x00000000},
1121 {0x0000b1e4, 0x00000000},
1122 {0x0000b1e8, 0x00000000},
1123 {0x0000b1ec, 0x00000000},
1124 {0x0000b1f0, 0x00000396},
1125 {0x0000b1f4, 0x00000396},
1126 {0x0000b1f8, 0x00000396},
1127 {0x0000b1fc, 0x00000196},
1128};
1129
1130static const u32 ar9480_1p0_mac_postamble[][5] = {
1131 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1132 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
1133 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
1134 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
1135 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
1136 {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
1137 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
1138 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
1139 {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
1140};
1141
1142static const u32 ar9480_1p0_mac_postamble_emulation[][5] = {
1143 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1144 {0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
1145 {0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
1146};
1147
1148static const u32 ar9480_1p0_tx_gain_table_baseband_postamble_emulation[][5] = {
1149 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1150 {0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
1151 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1152 {0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
1153 {0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
1154 {0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
1155 {0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
1156 {0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
1157 {0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
1158 {0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
1159 {0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
1160 {0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
1161 {0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
1162 {0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
1163 {0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
1164};
1165
1166static const u32 ar9480_1p0_radio_postamble[][5] = {
1167 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1168 {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
1169 {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24646c08, 0x24646c08},
1170 {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
1171 {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
1172 {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
1173 {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
1174 {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
1175};
1176
1177static const u32 ar9480_1p0_soc_postamble_emulation[][5] = {
1178 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1179 {0x00007010, 0x00001133, 0x00001133, 0x00001133, 0x00001133},
1180};
1181
1182static const u32 ar9480_1p0_baseband_core[][2] = {
1183 /* Addr allmodes */
1184 {0x00009800, 0xafe68e30},
1185 {0x00009804, 0xfd14e000},
1186 {0x00009808, 0x9c0a9f6b},
1187 {0x0000980c, 0x04900000},
1188 {0x00009814, 0x9280c00a},
1189 {0x00009818, 0x00000000},
1190 {0x0000981c, 0x00020028},
1191 {0x00009834, 0x6400a290},
1192 {0x00009838, 0x0108ecff},
1193 {0x0000983c, 0x0d000600},
1194 {0x00009880, 0x201fff00},
1195 {0x00009884, 0x00001042},
1196 {0x000098a4, 0x00200400},
1197 {0x000098b0, 0x32840bbe},
1198 {0x000098d0, 0x004b6a8e},
1199 {0x000098d4, 0x00000820},
1200 {0x000098dc, 0x00000000},
1201 {0x000098e4, 0x01ffffff},
1202 {0x000098e8, 0x01ffffff},
1203 {0x000098ec, 0x01ffffff},
1204 {0x000098f0, 0x00000000},
1205 {0x000098f4, 0x00000000},
1206 {0x00009c04, 0xff55ff55},
1207 {0x00009c08, 0x0320ff55},
1208 {0x00009c0c, 0x00000000},
1209 {0x00009c10, 0x00000000},
1210 {0x00009c14, 0x00046384},
1211 {0x00009c18, 0x05b6b440},
1212 {0x00009c1c, 0x00b6b440},
1213 {0x00009d00, 0xc080a333},
1214 {0x00009d04, 0x40206c10},
1215 {0x00009d08, 0x009c4060},
1216 {0x00009d0c, 0x9883800a},
1217 {0x00009d10, 0x01834061},
1218 {0x00009d14, 0x00c0040b},
1219 {0x00009d18, 0x00000000},
1220 {0x00009e08, 0x0038230c},
1221 {0x00009e24, 0x990bb514},
1222 {0x00009e28, 0x0c6f0000},
1223 {0x00009e30, 0x06336f77},
1224 {0x00009e34, 0x6af6532f},
1225 {0x00009e38, 0x0cc80c00},
1226 {0x00009e40, 0x0d261820},
1227 {0x00009e4c, 0x00001004},
1228 {0x00009e50, 0x00ff03f1},
1229 {0x00009e54, 0x64c355c7},
1230 {0x00009e58, 0xfd897735},
1231 {0x00009e5c, 0xe9198724},
1232 {0x00009fc0, 0x803e4788},
1233 {0x00009fc4, 0x0001efb5},
1234 {0x00009fcc, 0x40000014},
1235 {0x00009fd0, 0x01193b93},
1236 {0x0000a20c, 0x00000000},
1237 {0x0000a220, 0x00000000},
1238 {0x0000a224, 0x00000000},
1239 {0x0000a228, 0x10002310},
1240 {0x0000a23c, 0x00000000},
1241 {0x0000a244, 0x0c000000},
1242 {0x0000a2a0, 0x00000001},
1243 {0x0000a2c0, 0x00000001},
1244 {0x0000a2c8, 0x00000000},
1245 {0x0000a2cc, 0x18c43433},
1246 {0x0000a2d4, 0x00000000},
1247 {0x0000a2ec, 0x00000000},
1248 {0x0000a2f0, 0x00000000},
1249 {0x0000a2f4, 0x00000000},
1250 {0x0000a2f8, 0x00000000},
1251 {0x0000a344, 0x00000000},
1252 {0x0000a34c, 0x00000000},
1253 {0x0000a350, 0x0000a000},
1254 {0x0000a364, 0x00000000},
1255 {0x0000a370, 0x00000000},
1256 {0x0000a390, 0x00000001},
1257 {0x0000a394, 0x00000444},
1258 {0x0000a398, 0x001f0e0f},
1259 {0x0000a39c, 0x0075393f},
1260 {0x0000a3a0, 0xb79f6427},
1261 {0x0000a3a4, 0x00000000},
1262 {0x0000a3a8, 0xaaaaaaaa},
1263 {0x0000a3ac, 0x3c466478},
1264 {0x0000a3c0, 0x20202020},
1265 {0x0000a3c4, 0x22222220},
1266 {0x0000a3c8, 0x20200020},
1267 {0x0000a3cc, 0x20202020},
1268 {0x0000a3d0, 0x20202020},
1269 {0x0000a3d4, 0x20202020},
1270 {0x0000a3d8, 0x20202020},
1271 {0x0000a3dc, 0x20202020},
1272 {0x0000a3e0, 0x20202020},
1273 {0x0000a3e4, 0x20202020},
1274 {0x0000a3e8, 0x20202020},
1275 {0x0000a3ec, 0x20202020},
1276 {0x0000a3f0, 0x00000000},
1277 {0x0000a3f4, 0x00000006},
1278 {0x0000a3f8, 0x0c9bd380},
1279 {0x0000a3fc, 0x000f0f01},
1280 {0x0000a400, 0x8fa91f01},
1281 {0x0000a404, 0x00000000},
1282 {0x0000a408, 0x0e79e5c6},
1283 {0x0000a40c, 0x00820820},
1284 {0x0000a414, 0x1ce739ce},
1285 {0x0000a418, 0x2d001dce},
1286 {0x0000a41c, 0x1ce739ce},
1287 {0x0000a420, 0x000001ce},
1288 {0x0000a424, 0x1ce739ce},
1289 {0x0000a428, 0x000001ce},
1290 {0x0000a42c, 0x1ce739ce},
1291 {0x0000a430, 0x1ce739ce},
1292 {0x0000a434, 0x00000000},
1293 {0x0000a438, 0x00001801},
1294 {0x0000a43c, 0x00100000},
1295 {0x0000a440, 0x00000000},
1296 {0x0000a444, 0x00000000},
1297 {0x0000a448, 0x05000080},
1298 {0x0000a44c, 0x00000001},
1299 {0x0000a450, 0x00010000},
1300 {0x0000a458, 0x00000000},
1301 {0x0000a644, 0xbfad9d74},
1302 {0x0000a648, 0x0048060a},
1303 {0x0000a64c, 0x00003c37},
1304 {0x0000a670, 0x03020100},
1305 {0x0000a674, 0x09080504},
1306 {0x0000a678, 0x0d0c0b0a},
1307 {0x0000a67c, 0x13121110},
1308 {0x0000a680, 0x31301514},
1309 {0x0000a684, 0x35343332},
1310 {0x0000a688, 0x00000036},
1311 {0x0000a690, 0x00000838},
1312 {0x0000a6b0, 0x0000000a},
1313 {0x0000a6b4, 0x28f12c01},
1314 {0x0000a7c0, 0x00000000},
1315 {0x0000a7c4, 0xfffffffc},
1316 {0x0000a7c8, 0x00000000},
1317 {0x0000a7cc, 0x00000000},
1318 {0x0000a7d0, 0x00000000},
1319 {0x0000a7d4, 0x00000004},
1320 {0x0000a7dc, 0x00000001},
1321 {0x0000a8d0, 0x004b6a8e},
1322 {0x0000a8d4, 0x00000820},
1323 {0x0000a8dc, 0x00000000},
1324 {0x0000a8f0, 0x00000000},
1325 {0x0000a8f4, 0x00000000},
1326 {0x0000b2d0, 0x00000080},
1327 {0x0000b2d4, 0x00000000},
1328 {0x0000b2ec, 0x00000000},
1329 {0x0000b2f0, 0x00000000},
1330 {0x0000b2f4, 0x00000000},
1331 {0x0000b2f8, 0x00000000},
1332 {0x0000b408, 0x0e79e5c0},
1333 {0x0000b40c, 0x00820820},
1334 {0x0000b420, 0x00000000},
1335 {0x0000b6b0, 0x0000000a},
1336 {0x0000b6b4, 0x00c00001},
1337};
1338
1339static const u32 ar9480_1p0_baseband_postamble[][5] = {
1340 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1341 {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
1342 {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
1343 {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
1344 {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
1345 {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
1346 {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
1347 {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
1348 {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
1349 {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
1350 {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
1351 {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
1352 {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3379605e, 0x33795d5e},
1353 {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1354 {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
1355 {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
1356 {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
1357 {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
1358 {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},
1359 {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
1360 {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
1361 {0x0000a204, 0x0131b7c0, 0x0131b7c4, 0x0131b7c4, 0x0131b7c0},
1362 {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
1363 {0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
1364 {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
1365 {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
1366 {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
1367 {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
1368 {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
1369 {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
1370 {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
1371 {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
1372 {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
1373 {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
1374 {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
1375 {0x0000a288, 0x00000110, 0x00000110, 0x00100110, 0x00100110},
1376 {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
1377 {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
1378 {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
1379 {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
1380 {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1381 {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
1382 {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
1383 {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1384 {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
1385 {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
1386 {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
1387};
1388
1389static const u32 ar9480_modes_fast_clock_1p0[][3] = {
1390 /* Addr 5G_HT20 5G_HT40 */
1391 {0x00001030, 0x00000268, 0x000004d0},
1392 {0x00001070, 0x0000018c, 0x00000318},
1393 {0x000010b0, 0x00000fd0, 0x00001fa0},
1394 {0x00008014, 0x044c044c, 0x08980898},
1395 {0x0000801c, 0x148ec02b, 0x148ec057},
1396 {0x00008318, 0x000044c0, 0x00008980},
1397 {0x00009e00, 0x0372131c, 0x0372131c},
1398 {0x0000a230, 0x0000400b, 0x00004016},
1399 {0x0000a254, 0x00000898, 0x00001130},
1400};
1401
1402static const u32 ar9480_modes_low_ob_db_tx_gain_table_1p0[][5] = {
1403 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1404 {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
1405 {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
1406 {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
1407 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1408 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1409 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1410 {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1411 {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1412 {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1413 {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
1414 {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
1415 {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
1416 {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
1417 {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
1418 {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
1419 {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
1420 {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
1421 {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
1422 {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
1423 {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
1424 {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
1425 {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
1426 {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
1427 {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
1428 {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
1429 {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
1430 {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
1431 {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
1432 {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
1433 {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
1434 {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1435 {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1436 {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1437 {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1438 {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1439 {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1440 {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1441 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1442 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1443 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1444 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1445 {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1446 {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
1447 {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
1448 {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
1449 {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
1450 {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
1451 {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
1452 {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
1453 {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
1454 {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
1455 {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
1456 {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
1457 {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
1458 {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
1459 {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
1460 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1461 {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
1462 {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
1463 {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
1464 {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
1465};
1466
1467static const u32 ar9480_1p0_soc_postamble[][5] = {
1468 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1469 {0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
1470};
1471
1472static const u32 ar9480_common_mixed_rx_gain_table_1p0[][2] = {
1473 /* Addr allmodes */
1474 {0x0000a000, 0x00010000},
1475 {0x0000a004, 0x00030002},
1476 {0x0000a008, 0x00050004},
1477 {0x0000a00c, 0x00810080},
1478 {0x0000a010, 0x00830082},
1479 {0x0000a014, 0x01810180},
1480 {0x0000a018, 0x01830182},
1481 {0x0000a01c, 0x01850184},
1482 {0x0000a020, 0x01890188},
1483 {0x0000a024, 0x018b018a},
1484 {0x0000a028, 0x018d018c},
1485 {0x0000a02c, 0x03820190},
1486 {0x0000a030, 0x03840383},
1487 {0x0000a034, 0x03880385},
1488 {0x0000a038, 0x038a0389},
1489 {0x0000a03c, 0x038c038b},
1490 {0x0000a040, 0x0390038d},
1491 {0x0000a044, 0x03920391},
1492 {0x0000a048, 0x03940393},
1493 {0x0000a04c, 0x03960395},
1494 {0x0000a050, 0x00000000},
1495 {0x0000a054, 0x00000000},
1496 {0x0000a058, 0x00000000},
1497 {0x0000a05c, 0x00000000},
1498 {0x0000a060, 0x00000000},
1499 {0x0000a064, 0x00000000},
1500 {0x0000a068, 0x00000000},
1501 {0x0000a06c, 0x00000000},
1502 {0x0000a070, 0x00000000},
1503 {0x0000a074, 0x00000000},
1504 {0x0000a078, 0x00000000},
1505 {0x0000a07c, 0x00000000},
1506 {0x0000a080, 0x29292929},
1507 {0x0000a084, 0x29292929},
1508 {0x0000a088, 0x29292929},
1509 {0x0000a08c, 0x29292929},
1510 {0x0000a090, 0x22292929},
1511 {0x0000a094, 0x1d1d2222},
1512 {0x0000a098, 0x0c111117},
1513 {0x0000a09c, 0x00030303},
1514 {0x0000a0a0, 0x00000000},
1515 {0x0000a0a4, 0x00000000},
1516 {0x0000a0a8, 0x00000000},
1517 {0x0000a0ac, 0x00000000},
1518 {0x0000a0b0, 0x00000000},
1519 {0x0000a0b4, 0x00000000},
1520 {0x0000a0b8, 0x00000000},
1521 {0x0000a0bc, 0x00000000},
1522 {0x0000a0c0, 0x001f0000},
1523 {0x0000a0c4, 0x01000101},
1524 {0x0000a0c8, 0x011e011f},
1525 {0x0000a0cc, 0x011c011d},
1526 {0x0000a0d0, 0x02030204},
1527 {0x0000a0d4, 0x02010202},
1528 {0x0000a0d8, 0x021f0200},
1529 {0x0000a0dc, 0x0302021e},
1530 {0x0000a0e0, 0x03000301},
1531 {0x0000a0e4, 0x031e031f},
1532 {0x0000a0e8, 0x0402031d},
1533 {0x0000a0ec, 0x04000401},
1534 {0x0000a0f0, 0x041e041f},
1535 {0x0000a0f4, 0x0502041d},
1536 {0x0000a0f8, 0x05000501},
1537 {0x0000a0fc, 0x051e051f},
1538 {0x0000a100, 0x06010602},
1539 {0x0000a104, 0x061f0600},
1540 {0x0000a108, 0x061d061e},
1541 {0x0000a10c, 0x07020703},
1542 {0x0000a110, 0x07000701},
1543 {0x0000a114, 0x00000000},
1544 {0x0000a118, 0x00000000},
1545 {0x0000a11c, 0x00000000},
1546 {0x0000a120, 0x00000000},
1547 {0x0000a124, 0x00000000},
1548 {0x0000a128, 0x00000000},
1549 {0x0000a12c, 0x00000000},
1550 {0x0000a130, 0x00000000},
1551 {0x0000a134, 0x00000000},
1552 {0x0000a138, 0x00000000},
1553 {0x0000a13c, 0x00000000},
1554 {0x0000a140, 0x001f0000},
1555 {0x0000a144, 0x01000101},
1556 {0x0000a148, 0x011e011f},
1557 {0x0000a14c, 0x011c011d},
1558 {0x0000a150, 0x02030204},
1559 {0x0000a154, 0x02010202},
1560 {0x0000a158, 0x021f0200},
1561 {0x0000a15c, 0x0302021e},
1562 {0x0000a160, 0x03000301},
1563 {0x0000a164, 0x031e031f},
1564 {0x0000a168, 0x0402031d},
1565 {0x0000a16c, 0x04000401},
1566 {0x0000a170, 0x041e041f},
1567 {0x0000a174, 0x0502041d},
1568 {0x0000a178, 0x05000501},
1569 {0x0000a17c, 0x051e051f},
1570 {0x0000a180, 0x06010602},
1571 {0x0000a184, 0x061f0600},
1572 {0x0000a188, 0x061d061e},
1573 {0x0000a18c, 0x07020703},
1574 {0x0000a190, 0x07000701},
1575 {0x0000a194, 0x00000000},
1576 {0x0000a198, 0x00000000},
1577 {0x0000a19c, 0x00000000},
1578 {0x0000a1a0, 0x00000000},
1579 {0x0000a1a4, 0x00000000},
1580 {0x0000a1a8, 0x00000000},
1581 {0x0000a1ac, 0x00000000},
1582 {0x0000a1b0, 0x00000000},
1583 {0x0000a1b4, 0x00000000},
1584 {0x0000a1b8, 0x00000000},
1585 {0x0000a1bc, 0x00000000},
1586 {0x0000a1c0, 0x00000000},
1587 {0x0000a1c4, 0x00000000},
1588 {0x0000a1c8, 0x00000000},
1589 {0x0000a1cc, 0x00000000},
1590 {0x0000a1d0, 0x00000000},
1591 {0x0000a1d4, 0x00000000},
1592 {0x0000a1d8, 0x00000000},
1593 {0x0000a1dc, 0x00000000},
1594 {0x0000a1e0, 0x00000000},
1595 {0x0000a1e4, 0x00000000},
1596 {0x0000a1e8, 0x00000000},
1597 {0x0000a1ec, 0x00000000},
1598 {0x0000a1f0, 0x00000396},
1599 {0x0000a1f4, 0x00000396},
1600 {0x0000a1f8, 0x00000396},
1601 {0x0000a1fc, 0x00000196},
1602 {0x0000b000, 0x00010000},
1603 {0x0000b004, 0x00030002},
1604 {0x0000b008, 0x00050004},
1605 {0x0000b00c, 0x00810080},
1606 {0x0000b010, 0x00830082},
1607 {0x0000b014, 0x01810180},
1608 {0x0000b018, 0x01830182},
1609 {0x0000b01c, 0x01850184},
1610 {0x0000b020, 0x02810280},
1611 {0x0000b024, 0x02830282},
1612 {0x0000b028, 0x02850284},
1613 {0x0000b02c, 0x02890288},
1614 {0x0000b030, 0x028b028a},
1615 {0x0000b034, 0x0388028c},
1616 {0x0000b038, 0x038a0389},
1617 {0x0000b03c, 0x038c038b},
1618 {0x0000b040, 0x0390038d},
1619 {0x0000b044, 0x03920391},
1620 {0x0000b048, 0x03940393},
1621 {0x0000b04c, 0x03960395},
1622 {0x0000b050, 0x00000000},
1623 {0x0000b054, 0x00000000},
1624 {0x0000b058, 0x00000000},
1625 {0x0000b05c, 0x00000000},
1626 {0x0000b060, 0x00000000},
1627 {0x0000b064, 0x00000000},
1628 {0x0000b068, 0x00000000},
1629 {0x0000b06c, 0x00000000},
1630 {0x0000b070, 0x00000000},
1631 {0x0000b074, 0x00000000},
1632 {0x0000b078, 0x00000000},
1633 {0x0000b07c, 0x00000000},
1634 {0x0000b080, 0x2a2d2f32},
1635 {0x0000b084, 0x21232328},
1636 {0x0000b088, 0x19191c1e},
1637 {0x0000b08c, 0x12141417},
1638 {0x0000b090, 0x07070e0e},
1639 {0x0000b094, 0x03030305},
1640 {0x0000b098, 0x00000003},
1641 {0x0000b09c, 0x00000000},
1642 {0x0000b0a0, 0x00000000},
1643 {0x0000b0a4, 0x00000000},
1644 {0x0000b0a8, 0x00000000},
1645 {0x0000b0ac, 0x00000000},
1646 {0x0000b0b0, 0x00000000},
1647 {0x0000b0b4, 0x00000000},
1648 {0x0000b0b8, 0x00000000},
1649 {0x0000b0bc, 0x00000000},
1650 {0x0000b0c0, 0x003f0020},
1651 {0x0000b0c4, 0x00400041},
1652 {0x0000b0c8, 0x0140005f},
1653 {0x0000b0cc, 0x0160015f},
1654 {0x0000b0d0, 0x017e017f},
1655 {0x0000b0d4, 0x02410242},
1656 {0x0000b0d8, 0x025f0240},
1657 {0x0000b0dc, 0x027f0260},
1658 {0x0000b0e0, 0x0341027e},
1659 {0x0000b0e4, 0x035f0340},
1660 {0x0000b0e8, 0x037f0360},
1661 {0x0000b0ec, 0x04400441},
1662 {0x0000b0f0, 0x0460045f},
1663 {0x0000b0f4, 0x0541047f},
1664 {0x0000b0f8, 0x055f0540},
1665 {0x0000b0fc, 0x057f0560},
1666 {0x0000b100, 0x06400641},
1667 {0x0000b104, 0x0660065f},
1668 {0x0000b108, 0x067e067f},
1669 {0x0000b10c, 0x07410742},
1670 {0x0000b110, 0x075f0740},
1671 {0x0000b114, 0x077f0760},
1672 {0x0000b118, 0x07800781},
1673 {0x0000b11c, 0x07a0079f},
1674 {0x0000b120, 0x07c107bf},
1675 {0x0000b124, 0x000007c0},
1676 {0x0000b128, 0x00000000},
1677 {0x0000b12c, 0x00000000},
1678 {0x0000b130, 0x00000000},
1679 {0x0000b134, 0x00000000},
1680 {0x0000b138, 0x00000000},
1681 {0x0000b13c, 0x00000000},
1682 {0x0000b140, 0x003f0020},
1683 {0x0000b144, 0x00400041},
1684 {0x0000b148, 0x0140005f},
1685 {0x0000b14c, 0x0160015f},
1686 {0x0000b150, 0x017e017f},
1687 {0x0000b154, 0x02410242},
1688 {0x0000b158, 0x025f0240},
1689 {0x0000b15c, 0x027f0260},
1690 {0x0000b160, 0x0341027e},
1691 {0x0000b164, 0x035f0340},
1692 {0x0000b168, 0x037f0360},
1693 {0x0000b16c, 0x04400441},
1694 {0x0000b170, 0x0460045f},
1695 {0x0000b174, 0x0541047f},
1696 {0x0000b178, 0x055f0540},
1697 {0x0000b17c, 0x057f0560},
1698 {0x0000b180, 0x06400641},
1699 {0x0000b184, 0x0660065f},
1700 {0x0000b188, 0x067e067f},
1701 {0x0000b18c, 0x07410742},
1702 {0x0000b190, 0x075f0740},
1703 {0x0000b194, 0x077f0760},
1704 {0x0000b198, 0x07800781},
1705 {0x0000b19c, 0x07a0079f},
1706 {0x0000b1a0, 0x07c107bf},
1707 {0x0000b1a4, 0x000007c0},
1708 {0x0000b1a8, 0x00000000},
1709 {0x0000b1ac, 0x00000000},
1710 {0x0000b1b0, 0x00000000},
1711 {0x0000b1b4, 0x00000000},
1712 {0x0000b1b8, 0x00000000},
1713 {0x0000b1bc, 0x00000000},
1714 {0x0000b1c0, 0x00000000},
1715 {0x0000b1c4, 0x00000000},
1716 {0x0000b1c8, 0x00000000},
1717 {0x0000b1cc, 0x00000000},
1718 {0x0000b1d0, 0x00000000},
1719 {0x0000b1d4, 0x00000000},
1720 {0x0000b1d8, 0x00000000},
1721 {0x0000b1dc, 0x00000000},
1722 {0x0000b1e0, 0x00000000},
1723 {0x0000b1e4, 0x00000000},
1724 {0x0000b1e8, 0x00000000},
1725 {0x0000b1ec, 0x00000000},
1726 {0x0000b1f0, 0x00000396},
1727 {0x0000b1f4, 0x00000396},
1728 {0x0000b1f8, 0x00000396},
1729 {0x0000b1fc, 0x00000196},
1730};
1731
1732static const u32 ar9480_pcie_phy_clkreq_disable_L1_1p0[][2] = {
1733 /* Addr allmodes */
1734 {0x00018c00, 0x10013e5e},
1735 {0x00018c04, 0x000801d8},
1736 {0x00018c08, 0x0000580c},
1737};
1738
1739static const u32 ar9480_1p0_baseband_core_emulation[][2] = {
1740 /* Addr allmodes */
1741 {0x00009800, 0xafa68e30},
1742 {0x00009884, 0x00002842},
1743 {0x00009c04, 0xff55ff55},
1744 {0x00009c08, 0x0320ff55},
1745 {0x00009e50, 0x00000000},
1746 {0x00009fcc, 0x00000014},
1747 {0x0000a344, 0x00000010},
1748 {0x0000a398, 0x00000000},
1749 {0x0000a39c, 0x71733d01},
1750 {0x0000a3a0, 0xd0ad5c12},
1751 {0x0000a3c0, 0x22222220},
1752 {0x0000a3c4, 0x22222222},
1753 {0x0000a404, 0x00418a11},
1754 {0x0000a418, 0x050001ce},
1755 {0x0000a438, 0x00001800},
1756 {0x0000a458, 0x01444452},
1757 {0x0000a644, 0x3fad9d74},
1758 {0x0000a690, 0x00000038},
1759};
1760
1761static const u32 ar9480_1p0_radio_core[][2] = {
1762 /* Addr allmodes */
1763 {0x00016000, 0x36db6db6},
1764 {0x00016004, 0x6db6db40},
1765 {0x00016008, 0x73f00000},
1766 {0x0001600c, 0x00000000},
1767 {0x00016010, 0x6d820001},
1768 {0x00016040, 0x7f80fff8},
1769 {0x0001604c, 0x2699e04f},
1770 {0x00016050, 0x6db6db6c},
1771 {0x00016054, 0x6db60000},
1772 {0x00016058, 0x6c200000},
1773 {0x00016080, 0x00040000},
1774 {0x00016084, 0x9a68048c},
1775 {0x00016088, 0x54214514},
1776 {0x0001608c, 0x12030409},
1777 {0x00016090, 0x24926490},
1778 {0x00016098, 0xd2888888},
1779 {0x000160a0, 0x0a108ffe},
1780 {0x000160a4, 0x812fc490},
1781 {0x000160a8, 0x423c8000},
1782 {0x000160b4, 0x92000000},
1783 {0x000160b8, 0x0285dddc},
1784 {0x000160bc, 0x02908888},
1785 {0x000160c0, 0x00adb6d0},
1786 {0x000160c4, 0x6db6db60},
1787 {0x000160c8, 0x6db6db6c},
1788 {0x000160cc, 0x0de6c1b0},
1789 {0x00016100, 0x3fffbe04},
1790 {0x00016104, 0xfff80000},
1791 {0x00016108, 0x00200400},
1792 {0x00016110, 0x00000000},
1793 {0x00016144, 0x02084080},
1794 {0x00016148, 0x000080c0},
1795 {0x00016280, 0x050a0001},
1796 {0x00016284, 0x3d841400},
1797 {0x00016288, 0x00000000},
1798 {0x0001628c, 0xe3000000},
1799 {0x00016290, 0xa1005080},
1800 {0x00016294, 0x00000020},
1801 {0x00016298, 0x50a02900},
1802 {0x00016340, 0x121e4276},
1803 {0x00016344, 0x00300000},
1804 {0x00016400, 0x36db6db6},
1805 {0x00016404, 0x6db6db40},
1806 {0x00016408, 0x73f00000},
1807 {0x0001640c, 0x00000000},
1808 {0x00016410, 0x6c800001},
1809 {0x00016440, 0x7f80fff8},
1810 {0x0001644c, 0x4699e04f},
1811 {0x00016450, 0x6db6db6c},
1812 {0x00016454, 0x6db60000},
1813 {0x00016500, 0x3fffbe04},
1814 {0x00016504, 0xfff80000},
1815 {0x00016508, 0x00200400},
1816 {0x00016510, 0x00000000},
1817 {0x00016544, 0x02084080},
1818 {0x00016548, 0x000080c0},
1819};
1820
1821static const u32 ar9480_1p0_soc_preamble[][2] = {
1822 /* Addr allmodes */
1823 {0x00007020, 0x00000000},
1824 {0x00007034, 0x00000002},
1825 {0x00007038, 0x000004c2},
1826};
1827
1828static const u32 ar9480_1p0_sys2ant[][2] = {
1829 /* Addr allmodes */
1830 {0x00063120, 0x00801980},
1831};
1832
1833#endif /* INITVALS_9480_1P0_H */
diff --git a/drivers/net/wireless/ath/ath9k/ar9480_2p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9480_2p0_initvals.h
new file mode 100644
index 000000000000..d54163d8d69f
--- /dev/null
+++ b/drivers/net/wireless/ath/ath9k/ar9480_2p0_initvals.h
@@ -0,0 +1,1928 @@
1/*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef INITVALS_9480_2P0_H
18#define INITVALS_9480_2P0_H
19
20/* AR9480 2.0 */
21
22static const u32 ar9480_modes_fast_clock_2p0[][3] = {
23 /* Addr 5G_HT20 5G_HT40 */
24 {0x00001030, 0x00000268, 0x000004d0},
25 {0x00001070, 0x0000018c, 0x00000318},
26 {0x000010b0, 0x00000fd0, 0x00001fa0},
27 {0x00008014, 0x044c044c, 0x08980898},
28 {0x0000801c, 0x148ec02b, 0x148ec057},
29 {0x00008318, 0x000044c0, 0x00008980},
30 {0x00009e00, 0x0372131c, 0x0372131c},
31 {0x0000a230, 0x0000400b, 0x00004016},
32 {0x0000a254, 0x00000898, 0x00001130},
33};
34
35static const u32 ar9480_pciephy_clkreq_enable_L1_2p0[][2] = {
36 /* Addr allmodes */
37 {0x00018c00, 0x18253ede},
38 {0x00018c04, 0x000801d8},
39 {0x00018c08, 0x0003580c},
40};
41
42static const u32 ar9480_2p0_baseband_postamble[][5] = {
43 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
44 {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
45 {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
46 {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
47 {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
48 {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
49 {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
50 {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
51 {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0},
52 {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020},
53 {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
54 {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e},
55 {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3039605e, 0x33795d5e},
56 {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
57 {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
58 {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
59 {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
60 {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c782},
61 {0x00009e44, 0xfe321e27, 0xfe321e27, 0xfe291e27, 0xfe291e27},
62 {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},
63 {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
64 {0x0000a204, 0x013187c0, 0x013187c4, 0x013187c4, 0x013187c0},
65 {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
66 {0x0000a22c, 0x01026a2f, 0x01026a27, 0x01026a2f, 0x01026a2f},
67 {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
68 {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
69 {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
70 {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
71 {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
72 {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
73 {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
74 {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
75 {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
76 {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
77 {0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},
78 {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
79 {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
80 {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
81 {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
82 {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
83 {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
84 {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
85 {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
86 {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
87 {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
88 {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
89 {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
90};
91
92static const u32 ar9480_2p0_mac_core_emulation[][2] = {
93 /* Addr allmodes */
94 {0x00000030, 0x000e0085},
95 {0x00000044, 0x00000008},
96 {0x0000805c, 0xffffc7ff},
97 {0x00008344, 0xaa4a105b},
98};
99
100static const u32 ar9480_common_rx_gain_table_2p0[][2] = {
101 /* Addr allmodes */
102 {0x0000a000, 0x00010000},
103 {0x0000a004, 0x00030002},
104 {0x0000a008, 0x00050004},
105 {0x0000a00c, 0x00810080},
106 {0x0000a010, 0x00830082},
107 {0x0000a014, 0x01810180},
108 {0x0000a018, 0x01830182},
109 {0x0000a01c, 0x01850184},
110 {0x0000a020, 0x01890188},
111 {0x0000a024, 0x018b018a},
112 {0x0000a028, 0x018d018c},
113 {0x0000a02c, 0x01910190},
114 {0x0000a030, 0x01930192},
115 {0x0000a034, 0x01950194},
116 {0x0000a038, 0x038a0196},
117 {0x0000a03c, 0x038c038b},
118 {0x0000a040, 0x0390038d},
119 {0x0000a044, 0x03920391},
120 {0x0000a048, 0x03940393},
121 {0x0000a04c, 0x03960395},
122 {0x0000a050, 0x00000000},
123 {0x0000a054, 0x00000000},
124 {0x0000a058, 0x00000000},
125 {0x0000a05c, 0x00000000},
126 {0x0000a060, 0x00000000},
127 {0x0000a064, 0x00000000},
128 {0x0000a068, 0x00000000},
129 {0x0000a06c, 0x00000000},
130 {0x0000a070, 0x00000000},
131 {0x0000a074, 0x00000000},
132 {0x0000a078, 0x00000000},
133 {0x0000a07c, 0x00000000},
134 {0x0000a080, 0x22222229},
135 {0x0000a084, 0x1d1d1d1d},
136 {0x0000a088, 0x1d1d1d1d},
137 {0x0000a08c, 0x1d1d1d1d},
138 {0x0000a090, 0x171d1d1d},
139 {0x0000a094, 0x11111717},
140 {0x0000a098, 0x00030311},
141 {0x0000a09c, 0x00000000},
142 {0x0000a0a0, 0x00000000},
143 {0x0000a0a4, 0x00000000},
144 {0x0000a0a8, 0x00000000},
145 {0x0000a0ac, 0x00000000},
146 {0x0000a0b0, 0x00000000},
147 {0x0000a0b4, 0x00000000},
148 {0x0000a0b8, 0x00000000},
149 {0x0000a0bc, 0x00000000},
150 {0x0000a0c0, 0x001f0000},
151 {0x0000a0c4, 0x01000101},
152 {0x0000a0c8, 0x011e011f},
153 {0x0000a0cc, 0x011c011d},
154 {0x0000a0d0, 0x02030204},
155 {0x0000a0d4, 0x02010202},
156 {0x0000a0d8, 0x021f0200},
157 {0x0000a0dc, 0x0302021e},
158 {0x0000a0e0, 0x03000301},
159 {0x0000a0e4, 0x031e031f},
160 {0x0000a0e8, 0x0402031d},
161 {0x0000a0ec, 0x04000401},
162 {0x0000a0f0, 0x041e041f},
163 {0x0000a0f4, 0x0502041d},
164 {0x0000a0f8, 0x05000501},
165 {0x0000a0fc, 0x051e051f},
166 {0x0000a100, 0x06010602},
167 {0x0000a104, 0x061f0600},
168 {0x0000a108, 0x061d061e},
169 {0x0000a10c, 0x07020703},
170 {0x0000a110, 0x07000701},
171 {0x0000a114, 0x00000000},
172 {0x0000a118, 0x00000000},
173 {0x0000a11c, 0x00000000},
174 {0x0000a120, 0x00000000},
175 {0x0000a124, 0x00000000},
176 {0x0000a128, 0x00000000},
177 {0x0000a12c, 0x00000000},
178 {0x0000a130, 0x00000000},
179 {0x0000a134, 0x00000000},
180 {0x0000a138, 0x00000000},
181 {0x0000a13c, 0x00000000},
182 {0x0000a140, 0x001f0000},
183 {0x0000a144, 0x01000101},
184 {0x0000a148, 0x011e011f},
185 {0x0000a14c, 0x011c011d},
186 {0x0000a150, 0x02030204},
187 {0x0000a154, 0x02010202},
188 {0x0000a158, 0x021f0200},
189 {0x0000a15c, 0x0302021e},
190 {0x0000a160, 0x03000301},
191 {0x0000a164, 0x031e031f},
192 {0x0000a168, 0x0402031d},
193 {0x0000a16c, 0x04000401},
194 {0x0000a170, 0x041e041f},
195 {0x0000a174, 0x0502041d},
196 {0x0000a178, 0x05000501},
197 {0x0000a17c, 0x051e051f},
198 {0x0000a180, 0x06010602},
199 {0x0000a184, 0x061f0600},
200 {0x0000a188, 0x061d061e},
201 {0x0000a18c, 0x07020703},
202 {0x0000a190, 0x07000701},
203 {0x0000a194, 0x00000000},
204 {0x0000a198, 0x00000000},
205 {0x0000a19c, 0x00000000},
206 {0x0000a1a0, 0x00000000},
207 {0x0000a1a4, 0x00000000},
208 {0x0000a1a8, 0x00000000},
209 {0x0000a1ac, 0x00000000},
210 {0x0000a1b0, 0x00000000},
211 {0x0000a1b4, 0x00000000},
212 {0x0000a1b8, 0x00000000},
213 {0x0000a1bc, 0x00000000},
214 {0x0000a1c0, 0x00000000},
215 {0x0000a1c4, 0x00000000},
216 {0x0000a1c8, 0x00000000},
217 {0x0000a1cc, 0x00000000},
218 {0x0000a1d0, 0x00000000},
219 {0x0000a1d4, 0x00000000},
220 {0x0000a1d8, 0x00000000},
221 {0x0000a1dc, 0x00000000},
222 {0x0000a1e0, 0x00000000},
223 {0x0000a1e4, 0x00000000},
224 {0x0000a1e8, 0x00000000},
225 {0x0000a1ec, 0x00000000},
226 {0x0000a1f0, 0x00000396},
227 {0x0000a1f4, 0x00000396},
228 {0x0000a1f8, 0x00000396},
229 {0x0000a1fc, 0x00000196},
230 {0x0000b000, 0x00010000},
231 {0x0000b004, 0x00030002},
232 {0x0000b008, 0x00050004},
233 {0x0000b00c, 0x00810080},
234 {0x0000b010, 0x00830082},
235 {0x0000b014, 0x01810180},
236 {0x0000b018, 0x01830182},
237 {0x0000b01c, 0x01850184},
238 {0x0000b020, 0x02810280},
239 {0x0000b024, 0x02830282},
240 {0x0000b028, 0x02850284},
241 {0x0000b02c, 0x02890288},
242 {0x0000b030, 0x028b028a},
243 {0x0000b034, 0x0388028c},
244 {0x0000b038, 0x038a0389},
245 {0x0000b03c, 0x038c038b},
246 {0x0000b040, 0x0390038d},
247 {0x0000b044, 0x03920391},
248 {0x0000b048, 0x03940393},
249 {0x0000b04c, 0x03960395},
250 {0x0000b050, 0x00000000},
251 {0x0000b054, 0x00000000},
252 {0x0000b058, 0x00000000},
253 {0x0000b05c, 0x00000000},
254 {0x0000b060, 0x00000000},
255 {0x0000b064, 0x00000000},
256 {0x0000b068, 0x00000000},
257 {0x0000b06c, 0x00000000},
258 {0x0000b070, 0x00000000},
259 {0x0000b074, 0x00000000},
260 {0x0000b078, 0x00000000},
261 {0x0000b07c, 0x00000000},
262 {0x0000b080, 0x2a2d2f32},
263 {0x0000b084, 0x21232328},
264 {0x0000b088, 0x19191c1e},
265 {0x0000b08c, 0x12141417},
266 {0x0000b090, 0x07070e0e},
267 {0x0000b094, 0x03030305},
268 {0x0000b098, 0x00000003},
269 {0x0000b09c, 0x00000000},
270 {0x0000b0a0, 0x00000000},
271 {0x0000b0a4, 0x00000000},
272 {0x0000b0a8, 0x00000000},
273 {0x0000b0ac, 0x00000000},
274 {0x0000b0b0, 0x00000000},
275 {0x0000b0b4, 0x00000000},
276 {0x0000b0b8, 0x00000000},
277 {0x0000b0bc, 0x00000000},
278 {0x0000b0c0, 0x003f0020},
279 {0x0000b0c4, 0x00400041},
280 {0x0000b0c8, 0x0140005f},
281 {0x0000b0cc, 0x0160015f},
282 {0x0000b0d0, 0x017e017f},
283 {0x0000b0d4, 0x02410242},
284 {0x0000b0d8, 0x025f0240},
285 {0x0000b0dc, 0x027f0260},
286 {0x0000b0e0, 0x0341027e},
287 {0x0000b0e4, 0x035f0340},
288 {0x0000b0e8, 0x037f0360},
289 {0x0000b0ec, 0x04400441},
290 {0x0000b0f0, 0x0460045f},
291 {0x0000b0f4, 0x0541047f},
292 {0x0000b0f8, 0x055f0540},
293 {0x0000b0fc, 0x057f0560},
294 {0x0000b100, 0x06400641},
295 {0x0000b104, 0x0660065f},
296 {0x0000b108, 0x067e067f},
297 {0x0000b10c, 0x07410742},
298 {0x0000b110, 0x075f0740},
299 {0x0000b114, 0x077f0760},
300 {0x0000b118, 0x07800781},
301 {0x0000b11c, 0x07a0079f},
302 {0x0000b120, 0x07c107bf},
303 {0x0000b124, 0x000007c0},
304 {0x0000b128, 0x00000000},
305 {0x0000b12c, 0x00000000},
306 {0x0000b130, 0x00000000},
307 {0x0000b134, 0x00000000},
308 {0x0000b138, 0x00000000},
309 {0x0000b13c, 0x00000000},
310 {0x0000b140, 0x003f0020},
311 {0x0000b144, 0x00400041},
312 {0x0000b148, 0x0140005f},
313 {0x0000b14c, 0x0160015f},
314 {0x0000b150, 0x017e017f},
315 {0x0000b154, 0x02410242},
316 {0x0000b158, 0x025f0240},
317 {0x0000b15c, 0x027f0260},
318 {0x0000b160, 0x0341027e},
319 {0x0000b164, 0x035f0340},
320 {0x0000b168, 0x037f0360},
321 {0x0000b16c, 0x04400441},
322 {0x0000b170, 0x0460045f},
323 {0x0000b174, 0x0541047f},
324 {0x0000b178, 0x055f0540},
325 {0x0000b17c, 0x057f0560},
326 {0x0000b180, 0x06400641},
327 {0x0000b184, 0x0660065f},
328 {0x0000b188, 0x067e067f},
329 {0x0000b18c, 0x07410742},
330 {0x0000b190, 0x075f0740},
331 {0x0000b194, 0x077f0760},
332 {0x0000b198, 0x07800781},
333 {0x0000b19c, 0x07a0079f},
334 {0x0000b1a0, 0x07c107bf},
335 {0x0000b1a4, 0x000007c0},
336 {0x0000b1a8, 0x00000000},
337 {0x0000b1ac, 0x00000000},
338 {0x0000b1b0, 0x00000000},
339 {0x0000b1b4, 0x00000000},
340 {0x0000b1b8, 0x00000000},
341 {0x0000b1bc, 0x00000000},
342 {0x0000b1c0, 0x00000000},
343 {0x0000b1c4, 0x00000000},
344 {0x0000b1c8, 0x00000000},
345 {0x0000b1cc, 0x00000000},
346 {0x0000b1d0, 0x00000000},
347 {0x0000b1d4, 0x00000000},
348 {0x0000b1d8, 0x00000000},
349 {0x0000b1dc, 0x00000000},
350 {0x0000b1e0, 0x00000000},
351 {0x0000b1e4, 0x00000000},
352 {0x0000b1e8, 0x00000000},
353 {0x0000b1ec, 0x00000000},
354 {0x0000b1f0, 0x00000396},
355 {0x0000b1f4, 0x00000396},
356 {0x0000b1f8, 0x00000396},
357 {0x0000b1fc, 0x00000196},
358};
359
360static const u32 ar9480_pciephy_clkreq_disable_L1_2p0[][2] = {
361 /* Addr allmodes */
362 {0x00018c00, 0x18213ede},
363 {0x00018c04, 0x000801d8},
364 {0x00018c08, 0x0003580c},
365};
366
367static const u32 ar9480_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
368 /* Addr allmodes */
369 {0x00018c00, 0x18212ede},
370 {0x00018c04, 0x000801d8},
371 {0x00018c08, 0x0003580c},
372};
373
374static const u32 ar9480_2p0_sys3ant[][2] = {
375 /* Addr allmodes */
376 {0x00063280, 0x00040807},
377 {0x00063284, 0x104ccccc},
378};
379
380static const u32 ar9480_common_rx_gain_table_ar9280_2p0[][2] = {
381 /* Addr allmodes */
382 {0x0000a000, 0x02000101},
383 {0x0000a004, 0x02000102},
384 {0x0000a008, 0x02000103},
385 {0x0000a00c, 0x02000104},
386 {0x0000a010, 0x02000200},
387 {0x0000a014, 0x02000201},
388 {0x0000a018, 0x02000202},
389 {0x0000a01c, 0x02000203},
390 {0x0000a020, 0x02000204},
391 {0x0000a024, 0x02000205},
392 {0x0000a028, 0x02000208},
393 {0x0000a02c, 0x02000302},
394 {0x0000a030, 0x02000303},
395 {0x0000a034, 0x02000304},
396 {0x0000a038, 0x02000400},
397 {0x0000a03c, 0x02010300},
398 {0x0000a040, 0x02010301},
399 {0x0000a044, 0x02010302},
400 {0x0000a048, 0x02000500},
401 {0x0000a04c, 0x02010400},
402 {0x0000a050, 0x02020300},
403 {0x0000a054, 0x02020301},
404 {0x0000a058, 0x02020302},
405 {0x0000a05c, 0x02020303},
406 {0x0000a060, 0x02020400},
407 {0x0000a064, 0x02030300},
408 {0x0000a068, 0x02030301},
409 {0x0000a06c, 0x02030302},
410 {0x0000a070, 0x02030303},
411 {0x0000a074, 0x02030400},
412 {0x0000a078, 0x02040300},
413 {0x0000a07c, 0x02040301},
414 {0x0000a080, 0x02040302},
415 {0x0000a084, 0x02040303},
416 {0x0000a088, 0x02030500},
417 {0x0000a08c, 0x02040400},
418 {0x0000a090, 0x02050203},
419 {0x0000a094, 0x02050204},
420 {0x0000a098, 0x02050205},
421 {0x0000a09c, 0x02040500},
422 {0x0000a0a0, 0x02050301},
423 {0x0000a0a4, 0x02050302},
424 {0x0000a0a8, 0x02050303},
425 {0x0000a0ac, 0x02050400},
426 {0x0000a0b0, 0x02050401},
427 {0x0000a0b4, 0x02050402},
428 {0x0000a0b8, 0x02050403},
429 {0x0000a0bc, 0x02050500},
430 {0x0000a0c0, 0x02050501},
431 {0x0000a0c4, 0x02050502},
432 {0x0000a0c8, 0x02050503},
433 {0x0000a0cc, 0x02050504},
434 {0x0000a0d0, 0x02050600},
435 {0x0000a0d4, 0x02050601},
436 {0x0000a0d8, 0x02050602},
437 {0x0000a0dc, 0x02050603},
438 {0x0000a0e0, 0x02050604},
439 {0x0000a0e4, 0x02050700},
440 {0x0000a0e8, 0x02050701},
441 {0x0000a0ec, 0x02050702},
442 {0x0000a0f0, 0x02050703},
443 {0x0000a0f4, 0x02050704},
444 {0x0000a0f8, 0x02050705},
445 {0x0000a0fc, 0x02050708},
446 {0x0000a100, 0x02050709},
447 {0x0000a104, 0x0205070a},
448 {0x0000a108, 0x0205070b},
449 {0x0000a10c, 0x0205070c},
450 {0x0000a110, 0x0205070d},
451 {0x0000a114, 0x02050710},
452 {0x0000a118, 0x02050711},
453 {0x0000a11c, 0x02050712},
454 {0x0000a120, 0x02050713},
455 {0x0000a124, 0x02050714},
456 {0x0000a128, 0x02050715},
457 {0x0000a12c, 0x02050730},
458 {0x0000a130, 0x02050731},
459 {0x0000a134, 0x02050732},
460 {0x0000a138, 0x02050733},
461 {0x0000a13c, 0x02050734},
462 {0x0000a140, 0x02050735},
463 {0x0000a144, 0x02050750},
464 {0x0000a148, 0x02050751},
465 {0x0000a14c, 0x02050752},
466 {0x0000a150, 0x02050753},
467 {0x0000a154, 0x02050754},
468 {0x0000a158, 0x02050755},
469 {0x0000a15c, 0x02050770},
470 {0x0000a160, 0x02050771},
471 {0x0000a164, 0x02050772},
472 {0x0000a168, 0x02050773},
473 {0x0000a16c, 0x02050774},
474 {0x0000a170, 0x02050775},
475 {0x0000a174, 0x00000776},
476 {0x0000a178, 0x00000776},
477 {0x0000a17c, 0x00000776},
478 {0x0000a180, 0x00000776},
479 {0x0000a184, 0x00000776},
480 {0x0000a188, 0x00000776},
481 {0x0000a18c, 0x00000776},
482 {0x0000a190, 0x00000776},
483 {0x0000a194, 0x00000776},
484 {0x0000a198, 0x00000776},
485 {0x0000a19c, 0x00000776},
486 {0x0000a1a0, 0x00000776},
487 {0x0000a1a4, 0x00000776},
488 {0x0000a1a8, 0x00000776},
489 {0x0000a1ac, 0x00000776},
490 {0x0000a1b0, 0x00000776},
491 {0x0000a1b4, 0x00000776},
492 {0x0000a1b8, 0x00000776},
493 {0x0000a1bc, 0x00000776},
494 {0x0000a1c0, 0x00000776},
495 {0x0000a1c4, 0x00000776},
496 {0x0000a1c8, 0x00000776},
497 {0x0000a1cc, 0x00000776},
498 {0x0000a1d0, 0x00000776},
499 {0x0000a1d4, 0x00000776},
500 {0x0000a1d8, 0x00000776},
501 {0x0000a1dc, 0x00000776},
502 {0x0000a1e0, 0x00000776},
503 {0x0000a1e4, 0x00000776},
504 {0x0000a1e8, 0x00000776},
505 {0x0000a1ec, 0x00000776},
506 {0x0000a1f0, 0x00000776},
507 {0x0000a1f4, 0x00000776},
508 {0x0000a1f8, 0x00000776},
509 {0x0000a1fc, 0x00000776},
510 {0x0000b000, 0x02000101},
511 {0x0000b004, 0x02000102},
512 {0x0000b008, 0x02000103},
513 {0x0000b00c, 0x02000104},
514 {0x0000b010, 0x02000200},
515 {0x0000b014, 0x02000201},
516 {0x0000b018, 0x02000202},
517 {0x0000b01c, 0x02000203},
518 {0x0000b020, 0x02000204},
519 {0x0000b024, 0x02000205},
520 {0x0000b028, 0x02000208},
521 {0x0000b02c, 0x02000302},
522 {0x0000b030, 0x02000303},
523 {0x0000b034, 0x02000304},
524 {0x0000b038, 0x02000400},
525 {0x0000b03c, 0x02010300},
526 {0x0000b040, 0x02010301},
527 {0x0000b044, 0x02010302},
528 {0x0000b048, 0x02000500},
529 {0x0000b04c, 0x02010400},
530 {0x0000b050, 0x02020300},
531 {0x0000b054, 0x02020301},
532 {0x0000b058, 0x02020302},
533 {0x0000b05c, 0x02020303},
534 {0x0000b060, 0x02020400},
535 {0x0000b064, 0x02030300},
536 {0x0000b068, 0x02030301},
537 {0x0000b06c, 0x02030302},
538 {0x0000b070, 0x02030303},
539 {0x0000b074, 0x02030400},
540 {0x0000b078, 0x02040300},
541 {0x0000b07c, 0x02040301},
542 {0x0000b080, 0x02040302},
543 {0x0000b084, 0x02040303},
544 {0x0000b088, 0x02030500},
545 {0x0000b08c, 0x02040400},
546 {0x0000b090, 0x02050203},
547 {0x0000b094, 0x02050204},
548 {0x0000b098, 0x02050205},
549 {0x0000b09c, 0x02040500},
550 {0x0000b0a0, 0x02050301},
551 {0x0000b0a4, 0x02050302},
552 {0x0000b0a8, 0x02050303},
553 {0x0000b0ac, 0x02050400},
554 {0x0000b0b0, 0x02050401},
555 {0x0000b0b4, 0x02050402},
556 {0x0000b0b8, 0x02050403},
557 {0x0000b0bc, 0x02050500},
558 {0x0000b0c0, 0x02050501},
559 {0x0000b0c4, 0x02050502},
560 {0x0000b0c8, 0x02050503},
561 {0x0000b0cc, 0x02050504},
562 {0x0000b0d0, 0x02050600},
563 {0x0000b0d4, 0x02050601},
564 {0x0000b0d8, 0x02050602},
565 {0x0000b0dc, 0x02050603},
566 {0x0000b0e0, 0x02050604},
567 {0x0000b0e4, 0x02050700},
568 {0x0000b0e8, 0x02050701},
569 {0x0000b0ec, 0x02050702},
570 {0x0000b0f0, 0x02050703},
571 {0x0000b0f4, 0x02050704},
572 {0x0000b0f8, 0x02050705},
573 {0x0000b0fc, 0x02050708},
574 {0x0000b100, 0x02050709},
575 {0x0000b104, 0x0205070a},
576 {0x0000b108, 0x0205070b},
577 {0x0000b10c, 0x0205070c},
578 {0x0000b110, 0x0205070d},
579 {0x0000b114, 0x02050710},
580 {0x0000b118, 0x02050711},
581 {0x0000b11c, 0x02050712},
582 {0x0000b120, 0x02050713},
583 {0x0000b124, 0x02050714},
584 {0x0000b128, 0x02050715},
585 {0x0000b12c, 0x02050730},
586 {0x0000b130, 0x02050731},
587 {0x0000b134, 0x02050732},
588 {0x0000b138, 0x02050733},
589 {0x0000b13c, 0x02050734},
590 {0x0000b140, 0x02050735},
591 {0x0000b144, 0x02050750},
592 {0x0000b148, 0x02050751},
593 {0x0000b14c, 0x02050752},
594 {0x0000b150, 0x02050753},
595 {0x0000b154, 0x02050754},
596 {0x0000b158, 0x02050755},
597 {0x0000b15c, 0x02050770},
598 {0x0000b160, 0x02050771},
599 {0x0000b164, 0x02050772},
600 {0x0000b168, 0x02050773},
601 {0x0000b16c, 0x02050774},
602 {0x0000b170, 0x02050775},
603 {0x0000b174, 0x00000776},
604 {0x0000b178, 0x00000776},
605 {0x0000b17c, 0x00000776},
606 {0x0000b180, 0x00000776},
607 {0x0000b184, 0x00000776},
608 {0x0000b188, 0x00000776},
609 {0x0000b18c, 0x00000776},
610 {0x0000b190, 0x00000776},
611 {0x0000b194, 0x00000776},
612 {0x0000b198, 0x00000776},
613 {0x0000b19c, 0x00000776},
614 {0x0000b1a0, 0x00000776},
615 {0x0000b1a4, 0x00000776},
616 {0x0000b1a8, 0x00000776},
617 {0x0000b1ac, 0x00000776},
618 {0x0000b1b0, 0x00000776},
619 {0x0000b1b4, 0x00000776},
620 {0x0000b1b8, 0x00000776},
621 {0x0000b1bc, 0x00000776},
622 {0x0000b1c0, 0x00000776},
623 {0x0000b1c4, 0x00000776},
624 {0x0000b1c8, 0x00000776},
625 {0x0000b1cc, 0x00000776},
626 {0x0000b1d0, 0x00000776},
627 {0x0000b1d4, 0x00000776},
628 {0x0000b1d8, 0x00000776},
629 {0x0000b1dc, 0x00000776},
630 {0x0000b1e0, 0x00000776},
631 {0x0000b1e4, 0x00000776},
632 {0x0000b1e8, 0x00000776},
633 {0x0000b1ec, 0x00000776},
634 {0x0000b1f0, 0x00000776},
635 {0x0000b1f4, 0x00000776},
636 {0x0000b1f8, 0x00000776},
637 {0x0000b1fc, 0x00000776},
638};
639
640static const u32 ar9200_ar9280_2p0_radio_core[][2] = {
641 /* Addr allmodes */
642 {0x00007800, 0x00040000},
643 {0x00007804, 0xdb005012},
644 {0x00007808, 0x04924914},
645 {0x0000780c, 0x21084210},
646 {0x00007810, 0x6d801300},
647 {0x00007814, 0x0019beff},
648 {0x00007818, 0x07e41000},
649 {0x0000781c, 0x00392000},
650 {0x00007820, 0x92592480},
651 {0x00007824, 0x00040000},
652 {0x00007828, 0xdb005012},
653 {0x0000782c, 0x04924914},
654 {0x00007830, 0x21084210},
655 {0x00007834, 0x6d801300},
656 {0x00007838, 0x0019beff},
657 {0x0000783c, 0x07e40000},
658 {0x00007840, 0x00392000},
659 {0x00007844, 0x92592480},
660 {0x00007848, 0x00100000},
661 {0x0000784c, 0x773f0567},
662 {0x00007850, 0x54214514},
663 {0x00007854, 0x12035828},
664 {0x00007858, 0x92592692},
665 {0x0000785c, 0x00000000},
666 {0x00007860, 0x56400000},
667 {0x00007864, 0x0a8e370e},
668 {0x00007868, 0xc0102850},
669 {0x0000786c, 0x812d4000},
670 {0x00007870, 0x807ec400},
671 {0x00007874, 0x001b6db0},
672 {0x00007878, 0x00376b63},
673 {0x0000787c, 0x06db6db6},
674 {0x00007880, 0x006d8000},
675 {0x00007884, 0xffeffffe},
676 {0x00007888, 0xffeffffe},
677 {0x0000788c, 0x00010000},
678 {0x00007890, 0x02060aeb},
679 {0x00007894, 0x5a108000},
680};
681
682static const u32 ar9480_2p0_mac_postamble_emulation[][5] = {
683 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
684 {0x00008014, 0x10f810f8, 0x10f810f8, 0x10f810f8, 0x10f810f8},
685 {0x0000801c, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017, 0x0e8d8017},
686};
687
688static const u32 ar9480_2p0_radio_postamble_sys3ant[][5] = {
689 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
690 {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
691 {0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
692 {0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
693};
694
695static const u32 ar9480_2p0_baseband_postamble_emulation[][5] = {
696 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
697 {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
698 {0x00009e3c, 0xcf946221, 0xcf946221, 0xcf946221, 0xcf946221},
699 {0x00009e44, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000, 0xfc5c0000},
700 {0x0000a258, 0x02020200, 0x02020200, 0x02020200, 0x02020200},
701 {0x0000a25c, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
702 {0x0000a28c, 0x00011111, 0x00011111, 0x00011111, 0x00011111},
703 {0x0000a2c4, 0x00148d18, 0x00148d18, 0x00148d20, 0x00148d20},
704 {0x0000a2d8, 0xf999a800, 0xf999a800, 0xf999a80c, 0xf999a80c},
705 {0x0000a50c, 0x0000c00a, 0x0000c00a, 0x0000c00a, 0x0000c00a},
706 {0x0000a538, 0x00038e8c, 0x00038e8c, 0x00038e8c, 0x00038e8c},
707 {0x0000a53c, 0x0003cecc, 0x0003cecc, 0x0003cecc, 0x0003cecc},
708 {0x0000a540, 0x00040ed4, 0x00040ed4, 0x00040ed4, 0x00040ed4},
709 {0x0000a544, 0x00044edc, 0x00044edc, 0x00044edc, 0x00044edc},
710 {0x0000a548, 0x00048ede, 0x00048ede, 0x00048ede, 0x00048ede},
711 {0x0000a54c, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e, 0x0004cf1e},
712 {0x0000a550, 0x00050f5e, 0x00050f5e, 0x00050f5e, 0x00050f5e},
713 {0x0000a554, 0x00054f9e, 0x00054f9e, 0x00054f9e, 0x00054f9e},
714 {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
715};
716
717static const u32 ar9480_2p0_radio_postamble_sys2ant[][5] = {
718 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
719 {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
720 {0x00016140, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
721 {0x00016540, 0x10804008, 0x10804008, 0x90804008, 0x90804008},
722};
723
724static const u32 ar9480_common_wo_xlna_rx_gain_table_2p0[][2] = {
725 /* Addr allmodes */
726 {0x0000a000, 0x00010000},
727 {0x0000a004, 0x00030002},
728 {0x0000a008, 0x00050004},
729 {0x0000a00c, 0x00810080},
730 {0x0000a010, 0x00830082},
731 {0x0000a014, 0x01810180},
732 {0x0000a018, 0x01830182},
733 {0x0000a01c, 0x01850184},
734 {0x0000a020, 0x01890188},
735 {0x0000a024, 0x018b018a},
736 {0x0000a028, 0x018d018c},
737 {0x0000a02c, 0x03820190},
738 {0x0000a030, 0x03840383},
739 {0x0000a034, 0x03880385},
740 {0x0000a038, 0x038a0389},
741 {0x0000a03c, 0x038c038b},
742 {0x0000a040, 0x0390038d},
743 {0x0000a044, 0x03920391},
744 {0x0000a048, 0x03940393},
745 {0x0000a04c, 0x03960395},
746 {0x0000a050, 0x00000000},
747 {0x0000a054, 0x00000000},
748 {0x0000a058, 0x00000000},
749 {0x0000a05c, 0x00000000},
750 {0x0000a060, 0x00000000},
751 {0x0000a064, 0x00000000},
752 {0x0000a068, 0x00000000},
753 {0x0000a06c, 0x00000000},
754 {0x0000a070, 0x00000000},
755 {0x0000a074, 0x00000000},
756 {0x0000a078, 0x00000000},
757 {0x0000a07c, 0x00000000},
758 {0x0000a080, 0x29292929},
759 {0x0000a084, 0x29292929},
760 {0x0000a088, 0x29292929},
761 {0x0000a08c, 0x29292929},
762 {0x0000a090, 0x22292929},
763 {0x0000a094, 0x1d1d2222},
764 {0x0000a098, 0x0c111117},
765 {0x0000a09c, 0x00030303},
766 {0x0000a0a0, 0x00000000},
767 {0x0000a0a4, 0x00000000},
768 {0x0000a0a8, 0x00000000},
769 {0x0000a0ac, 0x00000000},
770 {0x0000a0b0, 0x00000000},
771 {0x0000a0b4, 0x00000000},
772 {0x0000a0b8, 0x00000000},
773 {0x0000a0bc, 0x00000000},
774 {0x0000a0c0, 0x001f0000},
775 {0x0000a0c4, 0x01000101},
776 {0x0000a0c8, 0x011e011f},
777 {0x0000a0cc, 0x011c011d},
778 {0x0000a0d0, 0x02030204},
779 {0x0000a0d4, 0x02010202},
780 {0x0000a0d8, 0x021f0200},
781 {0x0000a0dc, 0x0302021e},
782 {0x0000a0e0, 0x03000301},
783 {0x0000a0e4, 0x031e031f},
784 {0x0000a0e8, 0x0402031d},
785 {0x0000a0ec, 0x04000401},
786 {0x0000a0f0, 0x041e041f},
787 {0x0000a0f4, 0x0502041d},
788 {0x0000a0f8, 0x05000501},
789 {0x0000a0fc, 0x051e051f},
790 {0x0000a100, 0x06010602},
791 {0x0000a104, 0x061f0600},
792 {0x0000a108, 0x061d061e},
793 {0x0000a10c, 0x07020703},
794 {0x0000a110, 0x07000701},
795 {0x0000a114, 0x00000000},
796 {0x0000a118, 0x00000000},
797 {0x0000a11c, 0x00000000},
798 {0x0000a120, 0x00000000},
799 {0x0000a124, 0x00000000},
800 {0x0000a128, 0x00000000},
801 {0x0000a12c, 0x00000000},
802 {0x0000a130, 0x00000000},
803 {0x0000a134, 0x00000000},
804 {0x0000a138, 0x00000000},
805 {0x0000a13c, 0x00000000},
806 {0x0000a140, 0x001f0000},
807 {0x0000a144, 0x01000101},
808 {0x0000a148, 0x011e011f},
809 {0x0000a14c, 0x011c011d},
810 {0x0000a150, 0x02030204},
811 {0x0000a154, 0x02010202},
812 {0x0000a158, 0x021f0200},
813 {0x0000a15c, 0x0302021e},
814 {0x0000a160, 0x03000301},
815 {0x0000a164, 0x031e031f},
816 {0x0000a168, 0x0402031d},
817 {0x0000a16c, 0x04000401},
818 {0x0000a170, 0x041e041f},
819 {0x0000a174, 0x0502041d},
820 {0x0000a178, 0x05000501},
821 {0x0000a17c, 0x051e051f},
822 {0x0000a180, 0x06010602},
823 {0x0000a184, 0x061f0600},
824 {0x0000a188, 0x061d061e},
825 {0x0000a18c, 0x07020703},
826 {0x0000a190, 0x07000701},
827 {0x0000a194, 0x00000000},
828 {0x0000a198, 0x00000000},
829 {0x0000a19c, 0x00000000},
830 {0x0000a1a0, 0x00000000},
831 {0x0000a1a4, 0x00000000},
832 {0x0000a1a8, 0x00000000},
833 {0x0000a1ac, 0x00000000},
834 {0x0000a1b0, 0x00000000},
835 {0x0000a1b4, 0x00000000},
836 {0x0000a1b8, 0x00000000},
837 {0x0000a1bc, 0x00000000},
838 {0x0000a1c0, 0x00000000},
839 {0x0000a1c4, 0x00000000},
840 {0x0000a1c8, 0x00000000},
841 {0x0000a1cc, 0x00000000},
842 {0x0000a1d0, 0x00000000},
843 {0x0000a1d4, 0x00000000},
844 {0x0000a1d8, 0x00000000},
845 {0x0000a1dc, 0x00000000},
846 {0x0000a1e0, 0x00000000},
847 {0x0000a1e4, 0x00000000},
848 {0x0000a1e8, 0x00000000},
849 {0x0000a1ec, 0x00000000},
850 {0x0000a1f0, 0x00000396},
851 {0x0000a1f4, 0x00000396},
852 {0x0000a1f8, 0x00000396},
853 {0x0000a1fc, 0x00000196},
854 {0x0000b000, 0x00010000},
855 {0x0000b004, 0x00030002},
856 {0x0000b008, 0x00050004},
857 {0x0000b00c, 0x00810080},
858 {0x0000b010, 0x00830082},
859 {0x0000b014, 0x01810180},
860 {0x0000b018, 0x01830182},
861 {0x0000b01c, 0x01850184},
862 {0x0000b020, 0x02810280},
863 {0x0000b024, 0x02830282},
864 {0x0000b028, 0x02850284},
865 {0x0000b02c, 0x02890288},
866 {0x0000b030, 0x028b028a},
867 {0x0000b034, 0x0388028c},
868 {0x0000b038, 0x038a0389},
869 {0x0000b03c, 0x038c038b},
870 {0x0000b040, 0x0390038d},
871 {0x0000b044, 0x03920391},
872 {0x0000b048, 0x03940393},
873 {0x0000b04c, 0x03960395},
874 {0x0000b050, 0x00000000},
875 {0x0000b054, 0x00000000},
876 {0x0000b058, 0x00000000},
877 {0x0000b05c, 0x00000000},
878 {0x0000b060, 0x00000000},
879 {0x0000b064, 0x00000000},
880 {0x0000b068, 0x00000000},
881 {0x0000b06c, 0x00000000},
882 {0x0000b070, 0x00000000},
883 {0x0000b074, 0x00000000},
884 {0x0000b078, 0x00000000},
885 {0x0000b07c, 0x00000000},
886 {0x0000b080, 0x32323232},
887 {0x0000b084, 0x2f2f3232},
888 {0x0000b088, 0x23282a2d},
889 {0x0000b08c, 0x1c1e2123},
890 {0x0000b090, 0x14171919},
891 {0x0000b094, 0x0e0e1214},
892 {0x0000b098, 0x03050707},
893 {0x0000b09c, 0x00030303},
894 {0x0000b0a0, 0x00000000},
895 {0x0000b0a4, 0x00000000},
896 {0x0000b0a8, 0x00000000},
897 {0x0000b0ac, 0x00000000},
898 {0x0000b0b0, 0x00000000},
899 {0x0000b0b4, 0x00000000},
900 {0x0000b0b8, 0x00000000},
901 {0x0000b0bc, 0x00000000},
902 {0x0000b0c0, 0x003f0020},
903 {0x0000b0c4, 0x00400041},
904 {0x0000b0c8, 0x0140005f},
905 {0x0000b0cc, 0x0160015f},
906 {0x0000b0d0, 0x017e017f},
907 {0x0000b0d4, 0x02410242},
908 {0x0000b0d8, 0x025f0240},
909 {0x0000b0dc, 0x027f0260},
910 {0x0000b0e0, 0x0341027e},
911 {0x0000b0e4, 0x035f0340},
912 {0x0000b0e8, 0x037f0360},
913 {0x0000b0ec, 0x04400441},
914 {0x0000b0f0, 0x0460045f},
915 {0x0000b0f4, 0x0541047f},
916 {0x0000b0f8, 0x055f0540},
917 {0x0000b0fc, 0x057f0560},
918 {0x0000b100, 0x06400641},
919 {0x0000b104, 0x0660065f},
920 {0x0000b108, 0x067e067f},
921 {0x0000b10c, 0x07410742},
922 {0x0000b110, 0x075f0740},
923 {0x0000b114, 0x077f0760},
924 {0x0000b118, 0x07800781},
925 {0x0000b11c, 0x07a0079f},
926 {0x0000b120, 0x07c107bf},
927 {0x0000b124, 0x000007c0},
928 {0x0000b128, 0x00000000},
929 {0x0000b12c, 0x00000000},
930 {0x0000b130, 0x00000000},
931 {0x0000b134, 0x00000000},
932 {0x0000b138, 0x00000000},
933 {0x0000b13c, 0x00000000},
934 {0x0000b140, 0x003f0020},
935 {0x0000b144, 0x00400041},
936 {0x0000b148, 0x0140005f},
937 {0x0000b14c, 0x0160015f},
938 {0x0000b150, 0x017e017f},
939 {0x0000b154, 0x02410242},
940 {0x0000b158, 0x025f0240},
941 {0x0000b15c, 0x027f0260},
942 {0x0000b160, 0x0341027e},
943 {0x0000b164, 0x035f0340},
944 {0x0000b168, 0x037f0360},
945 {0x0000b16c, 0x04400441},
946 {0x0000b170, 0x0460045f},
947 {0x0000b174, 0x0541047f},
948 {0x0000b178, 0x055f0540},
949 {0x0000b17c, 0x057f0560},
950 {0x0000b180, 0x06400641},
951 {0x0000b184, 0x0660065f},
952 {0x0000b188, 0x067e067f},
953 {0x0000b18c, 0x07410742},
954 {0x0000b190, 0x075f0740},
955 {0x0000b194, 0x077f0760},
956 {0x0000b198, 0x07800781},
957 {0x0000b19c, 0x07a0079f},
958 {0x0000b1a0, 0x07c107bf},
959 {0x0000b1a4, 0x000007c0},
960 {0x0000b1a8, 0x00000000},
961 {0x0000b1ac, 0x00000000},
962 {0x0000b1b0, 0x00000000},
963 {0x0000b1b4, 0x00000000},
964 {0x0000b1b8, 0x00000000},
965 {0x0000b1bc, 0x00000000},
966 {0x0000b1c0, 0x00000000},
967 {0x0000b1c4, 0x00000000},
968 {0x0000b1c8, 0x00000000},
969 {0x0000b1cc, 0x00000000},
970 {0x0000b1d0, 0x00000000},
971 {0x0000b1d4, 0x00000000},
972 {0x0000b1d8, 0x00000000},
973 {0x0000b1dc, 0x00000000},
974 {0x0000b1e0, 0x00000000},
975 {0x0000b1e4, 0x00000000},
976 {0x0000b1e8, 0x00000000},
977 {0x0000b1ec, 0x00000000},
978 {0x0000b1f0, 0x00000396},
979 {0x0000b1f4, 0x00000396},
980 {0x0000b1f8, 0x00000396},
981 {0x0000b1fc, 0x00000196},
982};
983
984static const u32 ar9480_2p0_baseband_core_txfir_coeff_japan_2484[][2] = {
985 /* Addr allmodes */
986 {0x0000a398, 0x00000000},
987 {0x0000a39c, 0x6f7f0301},
988 {0x0000a3a0, 0xca9228ee},
989};
990
991static const u32 ar9480_modes_low_ob_db_tx_gain_table_2p0[][5] = {
992 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
993 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
994 {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
995 {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
996 {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
997 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
998 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
999 {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1000 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1001 {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1002 {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1003 {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1004 {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
1005 {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
1006 {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
1007 {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
1008 {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
1009 {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
1010 {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
1011 {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
1012 {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
1013 {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
1014 {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
1015 {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
1016 {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
1017 {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
1018 {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
1019 {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
1020 {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
1021 {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
1022 {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
1023 {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
1024 {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
1025 {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1026 {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1027 {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1028 {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1029 {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1030 {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1031 {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
1032 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1033 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1034 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1035 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1036 {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1037 {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
1038 {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
1039 {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
1040 {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
1041 {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
1042 {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
1043 {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
1044 {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
1045 {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
1046 {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
1047 {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
1048 {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
1049 {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
1050 {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
1051 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1052 {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
1053 {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
1054 {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
1055 {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
1056 {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
1057 {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
1058};
1059
1060static const u32 ar9480_2p0_soc_postamble[][5] = {
1061 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1062 {0x00007010, 0x00002233, 0x00002233, 0x00002233, 0x00002233},
1063};
1064
1065static const u32 ar9480_2p0_baseband_core[][2] = {
1066 /* Addr allmodes */
1067 {0x00009800, 0xafe68e30},
1068 {0x00009804, 0xfd14e000},
1069 {0x00009808, 0x9c0a9f6b},
1070 {0x0000980c, 0x04900000},
1071 {0x00009814, 0x9280c00a},
1072 {0x00009818, 0x00000000},
1073 {0x0000981c, 0x00020028},
1074 {0x00009834, 0x6400a290},
1075 {0x00009838, 0x0108ecff},
1076 {0x0000983c, 0x0d000600},
1077 {0x00009880, 0x201fff00},
1078 {0x00009884, 0x00001042},
1079 {0x000098a4, 0x00200400},
1080 {0x000098b0, 0x32440bbe},
1081 {0x000098d0, 0x004b6a8e},
1082 {0x000098d4, 0x00000820},
1083 {0x000098dc, 0x00000000},
1084 {0x000098e4, 0x01ffffff},
1085 {0x000098e8, 0x01ffffff},
1086 {0x000098ec, 0x01ffffff},
1087 {0x000098f0, 0x00000000},
1088 {0x000098f4, 0x00000000},
1089 {0x00009bf0, 0x80000000},
1090 {0x00009c04, 0xff55ff55},
1091 {0x00009c08, 0x0320ff55},
1092 {0x00009c0c, 0x00000000},
1093 {0x00009c10, 0x00000000},
1094 {0x00009c14, 0x00046384},
1095 {0x00009c18, 0x05b6b440},
1096 {0x00009c1c, 0x00b6b440},
1097 {0x00009d00, 0xc080a333},
1098 {0x00009d04, 0x40206c10},
1099 {0x00009d08, 0x009c4060},
1100 {0x00009d0c, 0x9883800a},
1101 {0x00009d10, 0x01834061},
1102 {0x00009d14, 0x00c0040b},
1103 {0x00009d18, 0x00000000},
1104 {0x00009e08, 0x0038230c},
1105 {0x00009e24, 0x990bb515},
1106 {0x00009e28, 0x0c6f0000},
1107 {0x00009e30, 0x06336f77},
1108 {0x00009e34, 0x6af6532f},
1109 {0x00009e38, 0x0cc80c00},
1110 {0x00009e40, 0x0d261820},
1111 {0x00009e4c, 0x00001004},
1112 {0x00009e50, 0x00ff03f1},
1113 {0x00009e54, 0xe4c355c7},
1114 {0x00009e58, 0xfd897735},
1115 {0x00009e5c, 0xe9198724},
1116 {0x00009fc0, 0x803e4788},
1117 {0x00009fc4, 0x0001efb5},
1118 {0x00009fcc, 0x40000014},
1119 {0x00009fd0, 0x01193b93},
1120 {0x0000a20c, 0x00000000},
1121 {0x0000a220, 0x00000000},
1122 {0x0000a224, 0x00000000},
1123 {0x0000a228, 0x10002310},
1124 {0x0000a23c, 0x00000000},
1125 {0x0000a244, 0x0c000000},
1126 {0x0000a2a0, 0x00000001},
1127 {0x0000a2c0, 0x00000001},
1128 {0x0000a2c8, 0x00000000},
1129 {0x0000a2cc, 0x18c43433},
1130 {0x0000a2d4, 0x00000000},
1131 {0x0000a2ec, 0x00000000},
1132 {0x0000a2f0, 0x00000000},
1133 {0x0000a2f4, 0x00000000},
1134 {0x0000a2f8, 0x00000000},
1135 {0x0000a344, 0x00000000},
1136 {0x0000a34c, 0x00000000},
1137 {0x0000a350, 0x0000a000},
1138 {0x0000a364, 0x00000000},
1139 {0x0000a370, 0x00000000},
1140 {0x0000a390, 0x00000001},
1141 {0x0000a394, 0x00000444},
1142 {0x0000a398, 0x001f0e0f},
1143 {0x0000a39c, 0x0075393f},
1144 {0x0000a3a0, 0xb79f6427},
1145 {0x0000a3a4, 0x00000000},
1146 {0x0000a3a8, 0xaaaaaaaa},
1147 {0x0000a3ac, 0x3c466478},
1148 {0x0000a3c0, 0x20202020},
1149 {0x0000a3c4, 0x22222220},
1150 {0x0000a3c8, 0x20200020},
1151 {0x0000a3cc, 0x20202020},
1152 {0x0000a3d0, 0x20202020},
1153 {0x0000a3d4, 0x20202020},
1154 {0x0000a3d8, 0x20202020},
1155 {0x0000a3dc, 0x20202020},
1156 {0x0000a3e0, 0x20202020},
1157 {0x0000a3e4, 0x20202020},
1158 {0x0000a3e8, 0x20202020},
1159 {0x0000a3ec, 0x20202020},
1160 {0x0000a3f0, 0x00000000},
1161 {0x0000a3f4, 0x00000006},
1162 {0x0000a3f8, 0x0c9bd380},
1163 {0x0000a3fc, 0x000f0f01},
1164 {0x0000a400, 0x8fa91f01},
1165 {0x0000a404, 0x00000000},
1166 {0x0000a408, 0x0e79e5c6},
1167 {0x0000a40c, 0x00820820},
1168 {0x0000a414, 0x1ce739ce},
1169 {0x0000a418, 0x2d001dce},
1170 {0x0000a41c, 0x1ce739ce},
1171 {0x0000a420, 0x000001ce},
1172 {0x0000a424, 0x1ce739ce},
1173 {0x0000a428, 0x000001ce},
1174 {0x0000a42c, 0x1ce739ce},
1175 {0x0000a430, 0x1ce739ce},
1176 {0x0000a434, 0x00000000},
1177 {0x0000a438, 0x00001801},
1178 {0x0000a43c, 0x00100000},
1179 {0x0000a444, 0x00000000},
1180 {0x0000a448, 0x05000080},
1181 {0x0000a44c, 0x00000001},
1182 {0x0000a450, 0x00010000},
1183 {0x0000a454, 0x07000000},
1184 {0x0000a644, 0xbfad9d74},
1185 {0x0000a648, 0x0048060a},
1186 {0x0000a64c, 0x00002037},
1187 {0x0000a670, 0x03020100},
1188 {0x0000a674, 0x09080504},
1189 {0x0000a678, 0x0d0c0b0a},
1190 {0x0000a67c, 0x13121110},
1191 {0x0000a680, 0x31301514},
1192 {0x0000a684, 0x35343332},
1193 {0x0000a688, 0x00000036},
1194 {0x0000a690, 0x00000838},
1195 {0x0000a6b0, 0x0000000a},
1196 {0x0000a6b4, 0x00512c01},
1197 {0x0000a7c0, 0x00000000},
1198 {0x0000a7c4, 0xfffffffc},
1199 {0x0000a7c8, 0x00000000},
1200 {0x0000a7cc, 0x00000000},
1201 {0x0000a7d0, 0x00000000},
1202 {0x0000a7d4, 0x00000004},
1203 {0x0000a7dc, 0x00000001},
1204 {0x0000a7f0, 0x80000000},
1205 {0x0000a8d0, 0x004b6a8e},
1206 {0x0000a8d4, 0x00000820},
1207 {0x0000a8dc, 0x00000000},
1208 {0x0000a8f0, 0x00000000},
1209 {0x0000a8f4, 0x00000000},
1210 {0x0000abf0, 0x80000000},
1211 {0x0000b2d0, 0x00000080},
1212 {0x0000b2d4, 0x00000000},
1213 {0x0000b2ec, 0x00000000},
1214 {0x0000b2f0, 0x00000000},
1215 {0x0000b2f4, 0x00000000},
1216 {0x0000b2f8, 0x00000000},
1217 {0x0000b408, 0x0e79e5c0},
1218 {0x0000b40c, 0x00820820},
1219 {0x0000b420, 0x00000000},
1220 {0x0000b6b0, 0x0000000a},
1221 {0x0000b6b4, 0x00000001},
1222};
1223
1224static const u32 ar9480_2p0_radio_postamble[][5] = {
1225 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1226 {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
1227 {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
1228 {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
1229 {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
1230};
1231
1232static const u32 ar9480_modes_high_ob_db_tx_gain_table_2p0[][5] = {
1233 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1234 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
1235 {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
1236 {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
1237 {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
1238 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1239 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1240 {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1241 {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
1242 {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
1243 {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
1244 {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
1245 {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
1246 {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
1247 {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
1248 {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
1249 {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
1250 {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
1251 {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
1252 {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
1253 {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
1254 {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
1255 {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
1256 {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
1257 {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
1258 {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
1259 {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
1260 {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
1261 {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
1262 {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
1263 {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
1264 {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
1265 {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
1266 {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1267 {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1268 {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1269 {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1270 {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1271 {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1272 {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1273 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1274 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1275 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1276 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1277 {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
1278 {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
1279 {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
1280 {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
1281 {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
1282 {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
1283 {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
1284 {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1285 {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1286 {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1287 {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1288 {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1289 {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
1290 {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
1291 {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
1292 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1293 {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
1294 {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
1295 {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
1296 {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
1297 {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
1298 {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
1299};
1300
1301static const u32 ar9480_2p0_radio_core[][2] = {
1302 /* Addr allmodes */
1303 {0x00016000, 0x36db6db6},
1304 {0x00016004, 0x6db6db40},
1305 {0x00016008, 0x73f00000},
1306 {0x0001600c, 0x00000000},
1307 {0x00016010, 0x6d820001},
1308 {0x00016040, 0x7f80fff8},
1309 {0x0001604c, 0x2699e04f},
1310 {0x00016050, 0x6db6db6c},
1311 {0x00016058, 0x6c200000},
1312 {0x00016080, 0x00040000},
1313 {0x00016084, 0x9a68048c},
1314 {0x00016088, 0x54214514},
1315 {0x0001608c, 0x1203040b},
1316 {0x00016090, 0x24926490},
1317 {0x00016098, 0xd2888888},
1318 {0x000160a0, 0x0a108ffe},
1319 {0x000160a4, 0x812fc491},
1320 {0x000160a8, 0x423c8000},
1321 {0x000160b4, 0x92000000},
1322 {0x000160b8, 0x0285dddc},
1323 {0x000160bc, 0x02908888},
1324 {0x000160c0, 0x00adb6d0},
1325 {0x000160c4, 0x6db6db60},
1326 {0x000160c8, 0x6db6db6c},
1327 {0x000160cc, 0x0de6c1b0},
1328 {0x00016100, 0x3fffbe04},
1329 {0x00016104, 0xfff80000},
1330 {0x00016108, 0x00200400},
1331 {0x00016110, 0x00000000},
1332 {0x00016144, 0x02084080},
1333 {0x00016148, 0x000080c0},
1334 {0x00016280, 0x050a0001},
1335 {0x00016284, 0x3d841400},
1336 {0x00016288, 0x00000000},
1337 {0x0001628c, 0xe3000000},
1338 {0x00016290, 0xa1005080},
1339 {0x00016294, 0x00000020},
1340 {0x00016298, 0x54a82900},
1341 {0x00016340, 0x121e4276},
1342 {0x00016344, 0x00300000},
1343 {0x00016400, 0x36db6db6},
1344 {0x00016404, 0x6db6db40},
1345 {0x00016408, 0x73f00000},
1346 {0x0001640c, 0x00000000},
1347 {0x00016410, 0x6c800001},
1348 {0x00016440, 0x7f80fff8},
1349 {0x0001644c, 0x4699e04f},
1350 {0x00016450, 0x6db6db6c},
1351 {0x00016500, 0x3fffbe04},
1352 {0x00016504, 0xfff80000},
1353 {0x00016508, 0x00200400},
1354 {0x00016510, 0x00000000},
1355 {0x00016544, 0x02084080},
1356 {0x00016548, 0x000080c0},
1357};
1358
1359static const u32 ar9480_2p0_tx_gain_table_baseband_postamble_emulation[][5] = {
1360 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1361 {0x0000a410, 0x000000d5, 0x000000d5, 0x000000d5, 0x000000d5},
1362 {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1363 {0x0000a504, 0x00004002, 0x00004002, 0x00004002, 0x00004002},
1364 {0x0000a508, 0x00008004, 0x00008004, 0x00008004, 0x00008004},
1365 {0x0000a510, 0x0001000c, 0x0001000c, 0x0001000c, 0x0001000c},
1366 {0x0000a514, 0x0001420b, 0x0001420b, 0x0001420b, 0x0001420b},
1367 {0x0000a518, 0x0001824a, 0x0001824a, 0x0001824a, 0x0001824a},
1368 {0x0000a51c, 0x0001c44a, 0x0001c44a, 0x0001c44a, 0x0001c44a},
1369 {0x0000a520, 0x0002064a, 0x0002064a, 0x0002064a, 0x0002064a},
1370 {0x0000a524, 0x0002484a, 0x0002484a, 0x0002484a, 0x0002484a},
1371 {0x0000a528, 0x00028a4a, 0x00028a4a, 0x00028a4a, 0x00028a4a},
1372 {0x0000a52c, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a, 0x0002cc4a},
1373 {0x0000a530, 0x00030e4a, 0x00030e4a, 0x00030e4a, 0x00030e4a},
1374 {0x0000a534, 0x00034e8a, 0x00034e8a, 0x00034e8a, 0x00034e8a},
1375};
1376
1377static const u32 ar9480_2p0_soc_preamble[][2] = {
1378 /* Addr allmodes */
1379 {0x00007020, 0x00000000},
1380 {0x00007034, 0x00000002},
1381 {0x00007038, 0x000004c2},
1382};
1383
1384static const u32 ar9480_2p0_sys2ant[][2] = {
1385 /* Addr allmodes */
1386 {0x00063120, 0x00801980},
1387};
1388
1389static const u32 ar9480_2p0_mac_core[][2] = {
1390 /* Addr allmodes */
1391 {0x00000008, 0x00000000},
1392 {0x00000030, 0x000e0085},
1393 {0x00000034, 0x00000005},
1394 {0x00000040, 0x00000000},
1395 {0x00000044, 0x00000000},
1396 {0x00000048, 0x00000008},
1397 {0x0000004c, 0x00000010},
1398 {0x00000050, 0x00000000},
1399 {0x00001040, 0x002ffc0f},
1400 {0x00001044, 0x002ffc0f},
1401 {0x00001048, 0x002ffc0f},
1402 {0x0000104c, 0x002ffc0f},
1403 {0x00001050, 0x002ffc0f},
1404 {0x00001054, 0x002ffc0f},
1405 {0x00001058, 0x002ffc0f},
1406 {0x0000105c, 0x002ffc0f},
1407 {0x00001060, 0x002ffc0f},
1408 {0x00001064, 0x002ffc0f},
1409 {0x000010f0, 0x00000100},
1410 {0x00001270, 0x00000000},
1411 {0x000012b0, 0x00000000},
1412 {0x000012f0, 0x00000000},
1413 {0x0000143c, 0x00000000},
1414 {0x0000147c, 0x00000000},
1415 {0x00001810, 0x0f000003},
1416 {0x00008000, 0x00000000},
1417 {0x00008004, 0x00000000},
1418 {0x00008008, 0x00000000},
1419 {0x0000800c, 0x00000000},
1420 {0x00008018, 0x00000000},
1421 {0x00008020, 0x00000000},
1422 {0x00008038, 0x00000000},
1423 {0x0000803c, 0x00080000},
1424 {0x00008040, 0x00000000},
1425 {0x00008044, 0x00000000},
1426 {0x00008048, 0x00000000},
1427 {0x0000804c, 0xffffffff},
1428 {0x00008050, 0xffffffff},
1429 {0x00008054, 0x00000000},
1430 {0x00008058, 0x00000000},
1431 {0x0000805c, 0x000fc78f},
1432 {0x00008060, 0x0000000f},
1433 {0x00008064, 0x00000000},
1434 {0x00008070, 0x00000310},
1435 {0x00008074, 0x00000020},
1436 {0x00008078, 0x00000000},
1437 {0x0000809c, 0x0000000f},
1438 {0x000080a0, 0x00000000},
1439 {0x000080a4, 0x02ff0000},
1440 {0x000080a8, 0x0e070605},
1441 {0x000080ac, 0x0000000d},
1442 {0x000080b0, 0x00000000},
1443 {0x000080b4, 0x00000000},
1444 {0x000080b8, 0x00000000},
1445 {0x000080bc, 0x00000000},
1446 {0x000080c0, 0x2a800000},
1447 {0x000080c4, 0x06900168},
1448 {0x000080c8, 0x13881c20},
1449 {0x000080cc, 0x01f40000},
1450 {0x000080d0, 0x00252500},
1451 {0x000080d4, 0x00b00005},
1452 {0x000080d8, 0x00400002},
1453 {0x000080dc, 0x00000000},
1454 {0x000080e0, 0xffffffff},
1455 {0x000080e4, 0x0000ffff},
1456 {0x000080e8, 0x3f3f3f3f},
1457 {0x000080ec, 0x00000000},
1458 {0x000080f0, 0x00000000},
1459 {0x000080f4, 0x00000000},
1460 {0x000080fc, 0x00020000},
1461 {0x00008100, 0x00000000},
1462 {0x00008108, 0x00000052},
1463 {0x0000810c, 0x00000000},
1464 {0x00008110, 0x00000000},
1465 {0x00008114, 0x000007ff},
1466 {0x00008118, 0x000000aa},
1467 {0x0000811c, 0x00003210},
1468 {0x00008124, 0x00000000},
1469 {0x00008128, 0x00000000},
1470 {0x0000812c, 0x00000000},
1471 {0x00008130, 0x00000000},
1472 {0x00008134, 0x00000000},
1473 {0x00008138, 0x00000000},
1474 {0x0000813c, 0x0000ffff},
1475 {0x00008144, 0xffffffff},
1476 {0x00008168, 0x00000000},
1477 {0x0000816c, 0x00000000},
1478 {0x00008170, 0x18486e00},
1479 {0x00008174, 0x33332210},
1480 {0x00008178, 0x00000000},
1481 {0x0000817c, 0x00020000},
1482 {0x000081c4, 0x33332210},
1483 {0x000081c8, 0x00000000},
1484 {0x000081cc, 0x00000000},
1485 {0x000081d4, 0x00000000},
1486 {0x000081ec, 0x00000000},
1487 {0x000081f0, 0x00000000},
1488 {0x000081f4, 0x00000000},
1489 {0x000081f8, 0x00000000},
1490 {0x000081fc, 0x00000000},
1491 {0x00008240, 0x00100000},
1492 {0x00008244, 0x0010f400},
1493 {0x00008248, 0x00000800},
1494 {0x0000824c, 0x0001e800},
1495 {0x00008250, 0x00000000},
1496 {0x00008254, 0x00000000},
1497 {0x00008258, 0x00000000},
1498 {0x0000825c, 0x40000000},
1499 {0x00008260, 0x00080922},
1500 {0x00008264, 0x99c00010},
1501 {0x00008268, 0xffffffff},
1502 {0x0000826c, 0x0000ffff},
1503 {0x00008270, 0x00000000},
1504 {0x00008274, 0x40000000},
1505 {0x00008278, 0x003e4180},
1506 {0x0000827c, 0x00000004},
1507 {0x00008284, 0x0000002c},
1508 {0x00008288, 0x0000002c},
1509 {0x0000828c, 0x000000ff},
1510 {0x00008294, 0x00000000},
1511 {0x00008298, 0x00000000},
1512 {0x0000829c, 0x00000000},
1513 {0x00008300, 0x00000140},
1514 {0x00008314, 0x00000000},
1515 {0x0000831c, 0x0000010d},
1516 {0x00008328, 0x00000000},
1517 {0x0000832c, 0x0000001f},
1518 {0x00008330, 0x00000302},
1519 {0x00008334, 0x00000700},
1520 {0x00008338, 0xffff0000},
1521 {0x0000833c, 0x02400000},
1522 {0x00008340, 0x000107ff},
1523 {0x00008344, 0xaa48105b},
1524 {0x00008348, 0x008f0000},
1525 {0x0000835c, 0x00000000},
1526 {0x00008360, 0xffffffff},
1527 {0x00008364, 0xffffffff},
1528 {0x00008368, 0x00000000},
1529 {0x00008370, 0x00000000},
1530 {0x00008374, 0x000000ff},
1531 {0x00008378, 0x00000000},
1532 {0x0000837c, 0x00000000},
1533 {0x00008380, 0xffffffff},
1534 {0x00008384, 0xffffffff},
1535 {0x00008390, 0xffffffff},
1536 {0x00008394, 0xffffffff},
1537 {0x00008398, 0x00000000},
1538 {0x0000839c, 0x00000000},
1539 {0x000083a4, 0x0000fa14},
1540 {0x000083a8, 0x000f0c00},
1541 {0x000083ac, 0x33332210},
1542 {0x000083b0, 0x33332210},
1543 {0x000083b4, 0x33332210},
1544 {0x000083b8, 0x33332210},
1545 {0x000083bc, 0x00000000},
1546 {0x000083c0, 0x00000000},
1547 {0x000083c4, 0x00000000},
1548 {0x000083c8, 0x00000000},
1549 {0x000083cc, 0x00000200},
1550 {0x000083d0, 0x000301ff},
1551};
1552
1553static const u32 ar9480_2p0_mac_postamble[][5] = {
1554 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1555 {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
1556 {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
1557 {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
1558 {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
1559 {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
1560 {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
1561 {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
1562 {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
1563};
1564
1565static const u32 ar9480_common_mixed_rx_gain_table_2p0[][2] = {
1566 /* Addr allmodes */
1567 {0x0000a000, 0x00010000},
1568 {0x0000a004, 0x00030002},
1569 {0x0000a008, 0x00050004},
1570 {0x0000a00c, 0x00810080},
1571 {0x0000a010, 0x00830082},
1572 {0x0000a014, 0x01810180},
1573 {0x0000a018, 0x01830182},
1574 {0x0000a01c, 0x01850184},
1575 {0x0000a020, 0x01890188},
1576 {0x0000a024, 0x018b018a},
1577 {0x0000a028, 0x018d018c},
1578 {0x0000a02c, 0x03820190},
1579 {0x0000a030, 0x03840383},
1580 {0x0000a034, 0x03880385},
1581 {0x0000a038, 0x038a0389},
1582 {0x0000a03c, 0x038c038b},
1583 {0x0000a040, 0x0390038d},
1584 {0x0000a044, 0x03920391},
1585 {0x0000a048, 0x03940393},
1586 {0x0000a04c, 0x03960395},
1587 {0x0000a050, 0x00000000},
1588 {0x0000a054, 0x00000000},
1589 {0x0000a058, 0x00000000},
1590 {0x0000a05c, 0x00000000},
1591 {0x0000a060, 0x00000000},
1592 {0x0000a064, 0x00000000},
1593 {0x0000a068, 0x00000000},
1594 {0x0000a06c, 0x00000000},
1595 {0x0000a070, 0x00000000},
1596 {0x0000a074, 0x00000000},
1597 {0x0000a078, 0x00000000},
1598 {0x0000a07c, 0x00000000},
1599 {0x0000a080, 0x29292929},
1600 {0x0000a084, 0x29292929},
1601 {0x0000a088, 0x29292929},
1602 {0x0000a08c, 0x29292929},
1603 {0x0000a090, 0x22292929},
1604 {0x0000a094, 0x1d1d2222},
1605 {0x0000a098, 0x0c111117},
1606 {0x0000a09c, 0x00030303},
1607 {0x0000a0a0, 0x00000000},
1608 {0x0000a0a4, 0x00000000},
1609 {0x0000a0a8, 0x00000000},
1610 {0x0000a0ac, 0x00000000},
1611 {0x0000a0b0, 0x00000000},
1612 {0x0000a0b4, 0x00000000},
1613 {0x0000a0b8, 0x00000000},
1614 {0x0000a0bc, 0x00000000},
1615 {0x0000a0c0, 0x001f0000},
1616 {0x0000a0c4, 0x01000101},
1617 {0x0000a0c8, 0x011e011f},
1618 {0x0000a0cc, 0x011c011d},
1619 {0x0000a0d0, 0x02030204},
1620 {0x0000a0d4, 0x02010202},
1621 {0x0000a0d8, 0x021f0200},
1622 {0x0000a0dc, 0x0302021e},
1623 {0x0000a0e0, 0x03000301},
1624 {0x0000a0e4, 0x031e031f},
1625 {0x0000a0e8, 0x0402031d},
1626 {0x0000a0ec, 0x04000401},
1627 {0x0000a0f0, 0x041e041f},
1628 {0x0000a0f4, 0x0502041d},
1629 {0x0000a0f8, 0x05000501},
1630 {0x0000a0fc, 0x051e051f},
1631 {0x0000a100, 0x06010602},
1632 {0x0000a104, 0x061f0600},
1633 {0x0000a108, 0x061d061e},
1634 {0x0000a10c, 0x07020703},
1635 {0x0000a110, 0x07000701},
1636 {0x0000a114, 0x00000000},
1637 {0x0000a118, 0x00000000},
1638 {0x0000a11c, 0x00000000},
1639 {0x0000a120, 0x00000000},
1640 {0x0000a124, 0x00000000},
1641 {0x0000a128, 0x00000000},
1642 {0x0000a12c, 0x00000000},
1643 {0x0000a130, 0x00000000},
1644 {0x0000a134, 0x00000000},
1645 {0x0000a138, 0x00000000},
1646 {0x0000a13c, 0x00000000},
1647 {0x0000a140, 0x001f0000},
1648 {0x0000a144, 0x01000101},
1649 {0x0000a148, 0x011e011f},
1650 {0x0000a14c, 0x011c011d},
1651 {0x0000a150, 0x02030204},
1652 {0x0000a154, 0x02010202},
1653 {0x0000a158, 0x021f0200},
1654 {0x0000a15c, 0x0302021e},
1655 {0x0000a160, 0x03000301},
1656 {0x0000a164, 0x031e031f},
1657 {0x0000a168, 0x0402031d},
1658 {0x0000a16c, 0x04000401},
1659 {0x0000a170, 0x041e041f},
1660 {0x0000a174, 0x0502041d},
1661 {0x0000a178, 0x05000501},
1662 {0x0000a17c, 0x051e051f},
1663 {0x0000a180, 0x06010602},
1664 {0x0000a184, 0x061f0600},
1665 {0x0000a188, 0x061d061e},
1666 {0x0000a18c, 0x07020703},
1667 {0x0000a190, 0x07000701},
1668 {0x0000a194, 0x00000000},
1669 {0x0000a198, 0x00000000},
1670 {0x0000a19c, 0x00000000},
1671 {0x0000a1a0, 0x00000000},
1672 {0x0000a1a4, 0x00000000},
1673 {0x0000a1a8, 0x00000000},
1674 {0x0000a1ac, 0x00000000},
1675 {0x0000a1b0, 0x00000000},
1676 {0x0000a1b4, 0x00000000},
1677 {0x0000a1b8, 0x00000000},
1678 {0x0000a1bc, 0x00000000},
1679 {0x0000a1c0, 0x00000000},
1680 {0x0000a1c4, 0x00000000},
1681 {0x0000a1c8, 0x00000000},
1682 {0x0000a1cc, 0x00000000},
1683 {0x0000a1d0, 0x00000000},
1684 {0x0000a1d4, 0x00000000},
1685 {0x0000a1d8, 0x00000000},
1686 {0x0000a1dc, 0x00000000},
1687 {0x0000a1e0, 0x00000000},
1688 {0x0000a1e4, 0x00000000},
1689 {0x0000a1e8, 0x00000000},
1690 {0x0000a1ec, 0x00000000},
1691 {0x0000a1f0, 0x00000396},
1692 {0x0000a1f4, 0x00000396},
1693 {0x0000a1f8, 0x00000396},
1694 {0x0000a1fc, 0x00000196},
1695 {0x0000b000, 0x00010000},
1696 {0x0000b004, 0x00030002},
1697 {0x0000b008, 0x00050004},
1698 {0x0000b00c, 0x00810080},
1699 {0x0000b010, 0x00830082},
1700 {0x0000b014, 0x01810180},
1701 {0x0000b018, 0x01830182},
1702 {0x0000b01c, 0x01850184},
1703 {0x0000b020, 0x02810280},
1704 {0x0000b024, 0x02830282},
1705 {0x0000b028, 0x02850284},
1706 {0x0000b02c, 0x02890288},
1707 {0x0000b030, 0x028b028a},
1708 {0x0000b034, 0x0388028c},
1709 {0x0000b038, 0x038a0389},
1710 {0x0000b03c, 0x038c038b},
1711 {0x0000b040, 0x0390038d},
1712 {0x0000b044, 0x03920391},
1713 {0x0000b048, 0x03940393},
1714 {0x0000b04c, 0x03960395},
1715 {0x0000b050, 0x00000000},
1716 {0x0000b054, 0x00000000},
1717 {0x0000b058, 0x00000000},
1718 {0x0000b05c, 0x00000000},
1719 {0x0000b060, 0x00000000},
1720 {0x0000b064, 0x00000000},
1721 {0x0000b068, 0x00000000},
1722 {0x0000b06c, 0x00000000},
1723 {0x0000b070, 0x00000000},
1724 {0x0000b074, 0x00000000},
1725 {0x0000b078, 0x00000000},
1726 {0x0000b07c, 0x00000000},
1727 {0x0000b080, 0x2a2d2f32},
1728 {0x0000b084, 0x21232328},
1729 {0x0000b088, 0x19191c1e},
1730 {0x0000b08c, 0x12141417},
1731 {0x0000b090, 0x07070e0e},
1732 {0x0000b094, 0x03030305},
1733 {0x0000b098, 0x00000003},
1734 {0x0000b09c, 0x00000000},
1735 {0x0000b0a0, 0x00000000},
1736 {0x0000b0a4, 0x00000000},
1737 {0x0000b0a8, 0x00000000},
1738 {0x0000b0ac, 0x00000000},
1739 {0x0000b0b0, 0x00000000},
1740 {0x0000b0b4, 0x00000000},
1741 {0x0000b0b8, 0x00000000},
1742 {0x0000b0bc, 0x00000000},
1743 {0x0000b0c0, 0x003f0020},
1744 {0x0000b0c4, 0x00400041},
1745 {0x0000b0c8, 0x0140005f},
1746 {0x0000b0cc, 0x0160015f},
1747 {0x0000b0d0, 0x017e017f},
1748 {0x0000b0d4, 0x02410242},
1749 {0x0000b0d8, 0x025f0240},
1750 {0x0000b0dc, 0x027f0260},
1751 {0x0000b0e0, 0x0341027e},
1752 {0x0000b0e4, 0x035f0340},
1753 {0x0000b0e8, 0x037f0360},
1754 {0x0000b0ec, 0x04400441},
1755 {0x0000b0f0, 0x0460045f},
1756 {0x0000b0f4, 0x0541047f},
1757 {0x0000b0f8, 0x055f0540},
1758 {0x0000b0fc, 0x057f0560},
1759 {0x0000b100, 0x06400641},
1760 {0x0000b104, 0x0660065f},
1761 {0x0000b108, 0x067e067f},
1762 {0x0000b10c, 0x07410742},
1763 {0x0000b110, 0x075f0740},
1764 {0x0000b114, 0x077f0760},
1765 {0x0000b118, 0x07800781},
1766 {0x0000b11c, 0x07a0079f},
1767 {0x0000b120, 0x07c107bf},
1768 {0x0000b124, 0x000007c0},
1769 {0x0000b128, 0x00000000},
1770 {0x0000b12c, 0x00000000},
1771 {0x0000b130, 0x00000000},
1772 {0x0000b134, 0x00000000},
1773 {0x0000b138, 0x00000000},
1774 {0x0000b13c, 0x00000000},
1775 {0x0000b140, 0x003f0020},
1776 {0x0000b144, 0x00400041},
1777 {0x0000b148, 0x0140005f},
1778 {0x0000b14c, 0x0160015f},
1779 {0x0000b150, 0x017e017f},
1780 {0x0000b154, 0x02410242},
1781 {0x0000b158, 0x025f0240},
1782 {0x0000b15c, 0x027f0260},
1783 {0x0000b160, 0x0341027e},
1784 {0x0000b164, 0x035f0340},
1785 {0x0000b168, 0x037f0360},
1786 {0x0000b16c, 0x04400441},
1787 {0x0000b170, 0x0460045f},
1788 {0x0000b174, 0x0541047f},
1789 {0x0000b178, 0x055f0540},
1790 {0x0000b17c, 0x057f0560},
1791 {0x0000b180, 0x06400641},
1792 {0x0000b184, 0x0660065f},
1793 {0x0000b188, 0x067e067f},
1794 {0x0000b18c, 0x07410742},
1795 {0x0000b190, 0x075f0740},
1796 {0x0000b194, 0x077f0760},
1797 {0x0000b198, 0x07800781},
1798 {0x0000b19c, 0x07a0079f},
1799 {0x0000b1a0, 0x07c107bf},
1800 {0x0000b1a4, 0x000007c0},
1801 {0x0000b1a8, 0x00000000},
1802 {0x0000b1ac, 0x00000000},
1803 {0x0000b1b0, 0x00000000},
1804 {0x0000b1b4, 0x00000000},
1805 {0x0000b1b8, 0x00000000},
1806 {0x0000b1bc, 0x00000000},
1807 {0x0000b1c0, 0x00000000},
1808 {0x0000b1c4, 0x00000000},
1809 {0x0000b1c8, 0x00000000},
1810 {0x0000b1cc, 0x00000000},
1811 {0x0000b1d0, 0x00000000},
1812 {0x0000b1d4, 0x00000000},
1813 {0x0000b1d8, 0x00000000},
1814 {0x0000b1dc, 0x00000000},
1815 {0x0000b1e0, 0x00000000},
1816 {0x0000b1e4, 0x00000000},
1817 {0x0000b1e8, 0x00000000},
1818 {0x0000b1ec, 0x00000000},
1819 {0x0000b1f0, 0x00000396},
1820 {0x0000b1f4, 0x00000396},
1821 {0x0000b1f8, 0x00000396},
1822 {0x0000b1fc, 0x00000196},
1823};
1824
1825static const u32 ar9480_modes_green_ob_db_tx_gain_table_2p0[][5] = {
1826 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1827 {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
1828 {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
1829 {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
1830 {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
1831 {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1832 {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1833 {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
1834 {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
1835 {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
1836 {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
1837 {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
1838 {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
1839 {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
1840 {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
1841 {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
1842 {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
1843 {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
1844 {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
1845 {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
1846 {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
1847 {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
1848 {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
1849 {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
1850 {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
1851 {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
1852 {0x0000a548, 0x53025eb2, 0x53025eb2, 0x3e001a81, 0x3e001a81},
1853 {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
1854 {0x0000a550, 0x5f025ef6, 0x5f025ef6, 0x44001c84, 0x44001c84},
1855 {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
1856 {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
1857 {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
1858 {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
1859 {0x0000a564, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1860 {0x0000a568, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1861 {0x0000a56c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1862 {0x0000a570, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1863 {0x0000a574, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1864 {0x0000a578, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1865 {0x0000a57c, 0x7504ff56, 0x7504ff56, 0x56001eec, 0x56001eec},
1866 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1867 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1868 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1869 {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1870 {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
1871 {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
1872 {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
1873 {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
1874 {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
1875 {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
1876 {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
1877 {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1878 {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1879 {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1880 {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1881 {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
1882 {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
1883 {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
1884 {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
1885 {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1886 {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
1887 {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
1888 {0x00016054, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
1889 {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
1890 {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
1891 {0x00016454, 0x6db60180, 0x6db60180, 0x6db60180, 0x6db60180},
1892};
1893
1894static const u32 ar9480_2p0_BTCOEX_MAX_TXPWR_table[][2] = {
1895 /* Addr allmodes */
1896 {0x000018c0, 0x10101010},
1897 {0x000018c4, 0x10101010},
1898 {0x000018c8, 0x10101010},
1899 {0x000018cc, 0x10101010},
1900 {0x000018d0, 0x10101010},
1901 {0x000018d4, 0x10101010},
1902 {0x000018d8, 0x10101010},
1903 {0x000018dc, 0x10101010},
1904};
1905
1906static const u32 ar9480_2p0_baseband_core_emulation[][2] = {
1907 /* Addr allmodes */
1908 {0x00009800, 0xafa68e30},
1909 {0x00009884, 0x00002842},
1910 {0x00009c04, 0xff55ff55},
1911 {0x00009c08, 0x0320ff55},
1912 {0x00009e50, 0x00000000},
1913 {0x00009fcc, 0x00000014},
1914 {0x0000a344, 0x00000010},
1915 {0x0000a398, 0x00000000},
1916 {0x0000a39c, 0x71733d01},
1917 {0x0000a3a0, 0xd0ad5c12},
1918 {0x0000a3c0, 0x22222220},
1919 {0x0000a3c4, 0x22222222},
1920 {0x0000a404, 0x00418a11},
1921 {0x0000a418, 0x050001ce},
1922 {0x0000a438, 0x00001800},
1923 {0x0000a458, 0x01444452},
1924 {0x0000a644, 0x3fad9d74},
1925 {0x0000a690, 0x00000038},
1926};
1927
1928#endif /* INITVALS_9480_2P0_H */
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 5d9a9aabe476..94d887b65e69 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -87,17 +87,14 @@ struct ath_config {
87 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) 87 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
88 * @BUF_AGGR: Indicates whether the buffer can be aggregated 88 * @BUF_AGGR: Indicates whether the buffer can be aggregated
89 * (used in aggregation scheduling) 89 * (used in aggregation scheduling)
90 * @BUF_XRETRY: To denote excessive retries of the buffer
91 */ 90 */
92enum buffer_type { 91enum buffer_type {
93 BUF_AMPDU = BIT(0), 92 BUF_AMPDU = BIT(0),
94 BUF_AGGR = BIT(1), 93 BUF_AGGR = BIT(1),
95 BUF_XRETRY = BIT(2),
96}; 94};
97 95
98#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) 96#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
99#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) 97#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
100#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
101 98
102#define ATH_TXSTATUS_RING_SIZE 64 99#define ATH_TXSTATUS_RING_SIZE 64
103 100
@@ -216,6 +213,7 @@ struct ath_frame_info {
216struct ath_buf_state { 213struct ath_buf_state {
217 u8 bf_type; 214 u8 bf_type;
218 u8 bfs_paprd; 215 u8 bfs_paprd;
216 u8 ndelim;
219 u16 seqno; 217 u16 seqno;
220 unsigned long bfs_paprd_timestamp; 218 unsigned long bfs_paprd_timestamp;
221}; 219};
@@ -230,7 +228,6 @@ struct ath_buf {
230 dma_addr_t bf_daddr; /* physical addr of desc */ 228 dma_addr_t bf_daddr; /* physical addr of desc */
231 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ 229 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
232 bool bf_stale; 230 bool bf_stale;
233 u16 bf_flags;
234 struct ath_buf_state bf_state; 231 struct ath_buf_state bf_state;
235}; 232};
236 233
@@ -277,8 +274,7 @@ struct ath_tx_control {
277}; 274};
278 275
279#define ATH_TX_ERROR 0x01 276#define ATH_TX_ERROR 0x01
280#define ATH_TX_XRETRY 0x02 277#define ATH_TX_BAR 0x02
281#define ATH_TX_BAR 0x04
282 278
283/** 279/**
284 * @txq_map: Index is mac80211 queue number. This is 280 * @txq_map: Index is mac80211 queue number. This is
@@ -425,6 +421,7 @@ void ath9k_set_beaconing_status(struct ath_softc *sc, bool status);
425 421
426#define ATH_PAPRD_TIMEOUT 100 /* msecs */ 422#define ATH_PAPRD_TIMEOUT 100 /* msecs */
427 423
424void ath_reset_work(struct work_struct *work);
428void ath_hw_check(struct work_struct *work); 425void ath_hw_check(struct work_struct *work);
429void ath_hw_pll_work(struct work_struct *work); 426void ath_hw_pll_work(struct work_struct *work);
430void ath_paprd_calibrate(struct work_struct *work); 427void ath_paprd_calibrate(struct work_struct *work);
@@ -460,6 +457,7 @@ void ath9k_btcoex_timer_pause(struct ath_softc *sc);
460#define ATH_LED_PIN_9287 8 457#define ATH_LED_PIN_9287 8
461#define ATH_LED_PIN_9300 10 458#define ATH_LED_PIN_9300 10
462#define ATH_LED_PIN_9485 6 459#define ATH_LED_PIN_9485 6
460#define ATH_LED_PIN_9480 0
463 461
464#ifdef CONFIG_MAC80211_LEDS 462#ifdef CONFIG_MAC80211_LEDS
465void ath_init_leds(struct ath_softc *sc); 463void ath_init_leds(struct ath_softc *sc);
@@ -604,6 +602,7 @@ struct ath_softc {
604 struct mutex mutex; 602 struct mutex mutex;
605 struct work_struct paprd_work; 603 struct work_struct paprd_work;
606 struct work_struct hw_check_work; 604 struct work_struct hw_check_work;
605 struct work_struct hw_reset_work;
607 struct completion paprd_complete; 606 struct completion paprd_complete;
608 607
609 unsigned int hw_busy_count; 608 unsigned int hw_busy_count;
@@ -647,10 +646,10 @@ struct ath_softc {
647 struct ath_descdma txsdma; 646 struct ath_descdma txsdma;
648 647
649 struct ath_ant_comb ant_comb; 648 struct ath_ant_comb ant_comb;
649 u8 ant_tx, ant_rx;
650}; 650};
651 651
652void ath9k_tasklet(unsigned long data); 652void ath9k_tasklet(unsigned long data);
653int ath_reset(struct ath_softc *sc, bool retry_tx);
654int ath_cabq_update(struct ath_softc *); 653int ath_cabq_update(struct ath_softc *);
655 654
656static inline void ath_read_cachesize(struct ath_common *common, int *csz) 655static inline void ath_read_cachesize(struct ath_common *common, int *csz)
@@ -668,6 +667,7 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
668 const struct ath_bus_ops *bus_ops); 667 const struct ath_bus_ops *bus_ops);
669void ath9k_deinit_device(struct ath_softc *sc); 668void ath9k_deinit_device(struct ath_softc *sc);
670void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); 669void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
670void ath9k_reload_chainmask_settings(struct ath_softc *sc);
671 671
672void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw); 672void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
673bool ath9k_uses_beacons(int type); 673bool ath9k_uses_beacons(int type);
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c
index 086c9c816bf7..9cdeaebc844f 100644
--- a/drivers/net/wireless/ath/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
@@ -73,44 +73,39 @@ static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
73 struct sk_buff *skb = bf->bf_mpdu; 73 struct sk_buff *skb = bf->bf_mpdu;
74 struct ath_hw *ah = sc->sc_ah; 74 struct ath_hw *ah = sc->sc_ah;
75 struct ath_common *common = ath9k_hw_common(ah); 75 struct ath_common *common = ath9k_hw_common(ah);
76 struct ath_desc *ds; 76 struct ath_tx_info info;
77 struct ath9k_11n_rate_series series[4];
78 int flags, ctsrate = 0, ctsduration = 0;
79 struct ieee80211_supported_band *sband; 77 struct ieee80211_supported_band *sband;
78 u8 chainmask = ah->txchainmask;
80 u8 rate = 0; 79 u8 rate = 0;
81 80
82 ath9k_reset_beacon_status(sc); 81 ath9k_reset_beacon_status(sc);
83 82
84 ds = bf->bf_desc;
85 flags = ATH9K_TXDESC_NOACK;
86
87 ds->ds_link = 0;
88
89 sband = &sc->sbands[common->hw->conf.channel->band]; 83 sband = &sc->sbands[common->hw->conf.channel->band];
90 rate = sband->bitrates[rateidx].hw_value; 84 rate = sband->bitrates[rateidx].hw_value;
91 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT) 85 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
92 rate |= sband->bitrates[rateidx].hw_value_short; 86 rate |= sband->bitrates[rateidx].hw_value_short;
93 87
94 ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN, 88 memset(&info, 0, sizeof(info));
95 ATH9K_PKT_TYPE_BEACON, 89 info.pkt_len = skb->len + FCS_LEN;
96 MAX_RATE_POWER, 90 info.type = ATH9K_PKT_TYPE_BEACON;
97 ATH9K_TXKEYIX_INVALID, 91 info.txpower = MAX_RATE_POWER;
98 ATH9K_KEY_TYPE_CLEAR, 92 info.keyix = ATH9K_TXKEYIX_INVALID;
99 flags); 93 info.keytype = ATH9K_KEY_TYPE_CLEAR;
100 94 info.flags = ATH9K_TXDESC_NOACK;
101 /* NB: beacon's BufLen must be a multiple of 4 bytes */ 95
102 ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4), 96 info.buf_addr[0] = bf->bf_buf_addr;
103 true, true, ds, bf->bf_buf_addr, 97 info.buf_len[0] = roundup(skb->len, 4);
104 sc->beacon.beaconq); 98
105 99 info.is_first = true;
106 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); 100 info.is_last = true;
107 series[0].Tries = 1; 101
108 series[0].Rate = rate; 102 info.qcu = sc->beacon.beaconq;
109 series[0].ChSel = ath_txchainmask_reduction(sc, 103
110 common->tx_chainmask, series[0].Rate); 104 info.rates[0].Tries = 1;
111 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0; 105 info.rates[0].Rate = rate;
112 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration, 106 info.rates[0].ChSel = ath_txchainmask_reduction(sc, chainmask, rate);
113 series, 4, 0); 107
108 ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
114} 109}
115 110
116static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb) 111static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
@@ -386,9 +381,7 @@ void ath_beacon_tasklet(unsigned long data)
386 ath_dbg(common, ATH_DBG_BSTUCK, 381 ath_dbg(common, ATH_DBG_BSTUCK,
387 "beacon is officially stuck\n"); 382 "beacon is officially stuck\n");
388 sc->sc_flags |= SC_OP_TSF_RESET; 383 sc->sc_flags |= SC_OP_TSF_RESET;
389 spin_lock(&sc->sc_pcu_lock); 384 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
390 ath_reset(sc, true);
391 spin_unlock(&sc->sc_pcu_lock);
392 } 385 }
393 386
394 return; 387 return;
@@ -519,6 +512,7 @@ static void ath_beacon_config_ap(struct ath_softc *sc,
519 /* Set the computed AP beacon timers */ 512 /* Set the computed AP beacon timers */
520 513
521 ath9k_hw_disable_interrupts(ah); 514 ath9k_hw_disable_interrupts(ah);
515 sc->sc_flags |= SC_OP_TSF_RESET;
522 ath9k_beacon_init(sc, nexttbtt, intval); 516 ath9k_beacon_init(sc, nexttbtt, intval);
523 sc->beacon.bmisscnt = 0; 517 sc->beacon.bmisscnt = 0;
524 ath9k_hw_set_interrupts(ah, ah->imask); 518 ath9k_hw_set_interrupts(ah, ah->imask);
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
index 727e8de22fda..179da2099270 100644
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -95,11 +95,11 @@ static ssize_t read_file_tx_chainmask(struct file *file, char __user *user_buf,
95 size_t count, loff_t *ppos) 95 size_t count, loff_t *ppos)
96{ 96{
97 struct ath_softc *sc = file->private_data; 97 struct ath_softc *sc = file->private_data;
98 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 98 struct ath_hw *ah = sc->sc_ah;
99 char buf[32]; 99 char buf[32];
100 unsigned int len; 100 unsigned int len;
101 101
102 len = sprintf(buf, "0x%08x\n", common->tx_chainmask); 102 len = sprintf(buf, "0x%08x\n", ah->txchainmask);
103 return simple_read_from_buffer(user_buf, count, ppos, buf, len); 103 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
104} 104}
105 105
@@ -107,7 +107,7 @@ static ssize_t write_file_tx_chainmask(struct file *file, const char __user *use
107 size_t count, loff_t *ppos) 107 size_t count, loff_t *ppos)
108{ 108{
109 struct ath_softc *sc = file->private_data; 109 struct ath_softc *sc = file->private_data;
110 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 110 struct ath_hw *ah = sc->sc_ah;
111 unsigned long mask; 111 unsigned long mask;
112 char buf[32]; 112 char buf[32];
113 ssize_t len; 113 ssize_t len;
@@ -120,8 +120,8 @@ static ssize_t write_file_tx_chainmask(struct file *file, const char __user *use
120 if (strict_strtoul(buf, 0, &mask)) 120 if (strict_strtoul(buf, 0, &mask))
121 return -EINVAL; 121 return -EINVAL;
122 122
123 common->tx_chainmask = mask; 123 ah->txchainmask = mask;
124 sc->sc_ah->caps.tx_chainmask = mask; 124 ah->caps.tx_chainmask = mask;
125 return count; 125 return count;
126} 126}
127 127
@@ -138,11 +138,11 @@ static ssize_t read_file_rx_chainmask(struct file *file, char __user *user_buf,
138 size_t count, loff_t *ppos) 138 size_t count, loff_t *ppos)
139{ 139{
140 struct ath_softc *sc = file->private_data; 140 struct ath_softc *sc = file->private_data;
141 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 141 struct ath_hw *ah = sc->sc_ah;
142 char buf[32]; 142 char buf[32];
143 unsigned int len; 143 unsigned int len;
144 144
145 len = sprintf(buf, "0x%08x\n", common->rx_chainmask); 145 len = sprintf(buf, "0x%08x\n", ah->rxchainmask);
146 return simple_read_from_buffer(user_buf, count, ppos, buf, len); 146 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
147} 147}
148 148
@@ -150,7 +150,7 @@ static ssize_t write_file_rx_chainmask(struct file *file, const char __user *use
150 size_t count, loff_t *ppos) 150 size_t count, loff_t *ppos)
151{ 151{
152 struct ath_softc *sc = file->private_data; 152 struct ath_softc *sc = file->private_data;
153 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 153 struct ath_hw *ah = sc->sc_ah;
154 unsigned long mask; 154 unsigned long mask;
155 char buf[32]; 155 char buf[32];
156 ssize_t len; 156 ssize_t len;
@@ -163,8 +163,8 @@ static ssize_t write_file_rx_chainmask(struct file *file, const char __user *use
163 if (strict_strtoul(buf, 0, &mask)) 163 if (strict_strtoul(buf, 0, &mask))
164 return -EINVAL; 164 return -EINVAL;
165 165
166 common->rx_chainmask = mask; 166 ah->rxchainmask = mask;
167 sc->sc_ah->caps.rx_chainmask = mask; 167 ah->caps.rx_chainmask = mask;
168 return count; 168 return count;
169} 169}
170 170
@@ -826,7 +826,8 @@ static ssize_t read_file_misc(struct file *file, char __user *user_buf,
826} 826}
827 827
828void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf, 828void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
829 struct ath_tx_status *ts, struct ath_txq *txq) 829 struct ath_tx_status *ts, struct ath_txq *txq,
830 unsigned int flags)
830{ 831{
831#define TX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].ts\ 832#define TX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].ts\
832 [sc->debug.tsidx].c) 833 [sc->debug.tsidx].c)
@@ -836,12 +837,12 @@ void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
836 sc->debug.stats.txstats[qnum].tx_bytes_all += bf->bf_mpdu->len; 837 sc->debug.stats.txstats[qnum].tx_bytes_all += bf->bf_mpdu->len;
837 838
838 if (bf_isampdu(bf)) { 839 if (bf_isampdu(bf)) {
839 if (bf_isxretried(bf)) 840 if (flags & ATH_TX_BAR)
840 TX_STAT_INC(qnum, a_xretries); 841 TX_STAT_INC(qnum, a_xretries);
841 else 842 else
842 TX_STAT_INC(qnum, a_completed); 843 TX_STAT_INC(qnum, a_completed);
843 } else { 844 } else {
844 if (bf_isxretried(bf)) 845 if (ts->ts_status & ATH9K_TXERR_XRETRY)
845 TX_STAT_INC(qnum, xretries); 846 TX_STAT_INC(qnum, xretries);
846 else 847 else
847 TX_STAT_INC(qnum, completed); 848 TX_STAT_INC(qnum, completed);
@@ -1323,16 +1324,17 @@ void ath9k_debug_samp_bb_mac(struct ath_softc *sc)
1323 1324
1324 ath9k_ps_wakeup(sc); 1325 ath9k_ps_wakeup(sc);
1325 1326
1327 spin_lock_bh(&sc->debug.samp_lock);
1328
1326 spin_lock_irqsave(&common->cc_lock, flags); 1329 spin_lock_irqsave(&common->cc_lock, flags);
1327 ath_hw_cycle_counters_update(common); 1330 ath_hw_cycle_counters_update(common);
1328 spin_unlock_irqrestore(&common->cc_lock, flags);
1329
1330 spin_lock_bh(&sc->debug.samp_lock);
1331 1331
1332 ATH_SAMP_DBG(cc.cycles) = common->cc_ani.cycles; 1332 ATH_SAMP_DBG(cc.cycles) = common->cc_ani.cycles;
1333 ATH_SAMP_DBG(cc.rx_busy) = common->cc_ani.rx_busy; 1333 ATH_SAMP_DBG(cc.rx_busy) = common->cc_ani.rx_busy;
1334 ATH_SAMP_DBG(cc.rx_frame) = common->cc_ani.rx_frame; 1334 ATH_SAMP_DBG(cc.rx_frame) = common->cc_ani.rx_frame;
1335 ATH_SAMP_DBG(cc.tx_frame) = common->cc_ani.tx_frame; 1335 ATH_SAMP_DBG(cc.tx_frame) = common->cc_ani.tx_frame;
1336 spin_unlock_irqrestore(&common->cc_lock, flags);
1337
1336 ATH_SAMP_DBG(noise) = ah->noise; 1338 ATH_SAMP_DBG(noise) = ah->noise;
1337 1339
1338 REG_WRITE_D(ah, AR_MACMISC, 1340 REG_WRITE_D(ah, AR_MACMISC,
@@ -1373,6 +1375,9 @@ static int open_file_bb_mac_samps(struct inode *inode, struct file *file)
1373 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask; 1375 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
1374 u8 nread; 1376 u8 nread;
1375 1377
1378 if (sc->sc_flags & SC_OP_INVALID)
1379 return -EAGAIN;
1380
1376 buf = vmalloc(size); 1381 buf = vmalloc(size);
1377 if (!buf) 1382 if (!buf)
1378 return -ENOMEM; 1383 return -ENOMEM;
@@ -1381,10 +1386,14 @@ static int open_file_bb_mac_samps(struct inode *inode, struct file *file)
1381 vfree(buf); 1386 vfree(buf);
1382 return -ENOMEM; 1387 return -ENOMEM;
1383 } 1388 }
1389 /* Account the current state too */
1390 ath9k_debug_samp_bb_mac(sc);
1384 1391
1385 spin_lock_bh(&sc->debug.samp_lock); 1392 spin_lock_bh(&sc->debug.samp_lock);
1386 memcpy(bb_mac_samp, sc->debug.bb_mac_samp, 1393 memcpy(bb_mac_samp, sc->debug.bb_mac_samp,
1387 sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES); 1394 sizeof(*bb_mac_samp) * ATH_DBG_MAX_SAMPLES);
1395 len += snprintf(buf + len, size - len,
1396 "Current Sample Index: %d\n", sc->debug.sampidx);
1388 spin_unlock_bh(&sc->debug.samp_lock); 1397 spin_unlock_bh(&sc->debug.samp_lock);
1389 1398
1390 len += snprintf(buf + len, size - len, 1399 len += snprintf(buf + len, size - len,
diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h
index 95f85bdc8db7..39f89bc9abcd 100644
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
@@ -230,7 +230,8 @@ int ath9k_init_debug(struct ath_hw *ah);
230void ath9k_debug_samp_bb_mac(struct ath_softc *sc); 230void ath9k_debug_samp_bb_mac(struct ath_softc *sc);
231void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status); 231void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
232void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf, 232void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
233 struct ath_tx_status *ts, struct ath_txq *txq); 233 struct ath_tx_status *ts, struct ath_txq *txq,
234 unsigned int flags);
234void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs); 235void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
235 236
236#else 237#else
@@ -252,7 +253,8 @@ static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
252static inline void ath_debug_stat_tx(struct ath_softc *sc, 253static inline void ath_debug_stat_tx(struct ath_softc *sc,
253 struct ath_buf *bf, 254 struct ath_buf *bf,
254 struct ath_tx_status *ts, 255 struct ath_tx_status *ts,
255 struct ath_txq *txq) 256 struct ath_txq *txq,
257 unsigned int flags)
256{ 258{
257} 259}
258 260
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c
index e61404dda8c5..e46f751ab508 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
@@ -456,12 +456,7 @@ void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah,
456 pPdGainBoundaries[i] = 456 pPdGainBoundaries[i] =
457 min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]); 457 min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
458 458
459 if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) { 459 minDelta = 0;
460 minDelta = pPdGainBoundaries[0] - 23;
461 pPdGainBoundaries[0] = 23;
462 } else {
463 minDelta = 0;
464 }
465 460
466 if (i == 0) { 461 if (i == 0) {
467 if (AR_SREV_9280_20_OR_LATER(ah)) 462 if (AR_SREV_9280_20_OR_LATER(ah))
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
index ea658e794cbd..303560e49ac8 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
@@ -405,12 +405,7 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
405 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0); 405 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0);
406 406
407 for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) { 407 for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
408 if (AR_SREV_5416_20_OR_LATER(ah) && 408 regChainOffset = i * 0x1000;
409 (ah->rxchainmask == 5 || ah->txchainmask == 5) &&
410 (i != 0)) {
411 regChainOffset = (i == 1) ? 0x2000 : 0x1000;
412 } else
413 regChainOffset = i * 0x1000;
414 409
415 if (pEepData->baseEepHeader.txMask & (1 << i)) { 410 if (pEepData->baseEepHeader.txMask & (1 << i)) {
416 pRawDataset = pEepData->calPierData2G[i]; 411 pRawDataset = pEepData->calPierData2G[i];
@@ -423,19 +418,17 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
423 418
424 ENABLE_REGWRITE_BUFFER(ah); 419 ENABLE_REGWRITE_BUFFER(ah);
425 420
426 if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) { 421 REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,
427 REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset, 422 SM(pdGainOverlap_t2,
428 SM(pdGainOverlap_t2, 423 AR_PHY_TPCRG5_PD_GAIN_OVERLAP)
429 AR_PHY_TPCRG5_PD_GAIN_OVERLAP) 424 | SM(gainBoundaries[0],
430 | SM(gainBoundaries[0], 425 AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1)
431 AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) 426 | SM(gainBoundaries[1],
432 | SM(gainBoundaries[1], 427 AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2)
433 AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) 428 | SM(gainBoundaries[2],
434 | SM(gainBoundaries[2], 429 AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3)
435 AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) 430 | SM(gainBoundaries[3],
436 | SM(gainBoundaries[3], 431 AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
437 AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
438 }
439 432
440 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset; 433 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
441 for (j = 0; j < 32; j++) { 434 for (j = 0; j < 32; j++) {
@@ -715,10 +708,8 @@ static void ath9k_hw_4k_set_txpower(struct ath_hw *ah,
715 if (test) 708 if (test)
716 return; 709 return;
717 710
718 if (AR_SREV_9280_20_OR_LATER(ah)) { 711 for (i = 0; i < Ar5416RateSize; i++)
719 for (i = 0; i < Ar5416RateSize; i++) 712 ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
720 ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
721 }
722 713
723 ENABLE_REGWRITE_BUFFER(ah); 714 ENABLE_REGWRITE_BUFFER(ah);
724 715
@@ -788,28 +779,6 @@ static void ath9k_hw_4k_set_txpower(struct ath_hw *ah,
788 REGWRITE_BUFFER_FLUSH(ah); 779 REGWRITE_BUFFER_FLUSH(ah);
789} 780}
790 781
791static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
792 struct ath9k_channel *chan)
793{
794 struct modal_eep_4k_header *pModal;
795 struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
796 u8 biaslevel;
797
798 if (ah->hw_version.macVersion != AR_SREV_VERSION_9160)
799 return;
800
801 if (ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_MINOR_VER_7)
802 return;
803
804 pModal = &eep->modalHeader;
805
806 if (pModal->xpaBiasLvl != 0xff) {
807 biaslevel = pModal->xpaBiasLvl;
808 INI_RA(&ah->iniAddac, 7, 1) =
809 (INI_RA(&ah->iniAddac, 7, 1) & (~0x18)) | biaslevel << 3;
810 }
811}
812
813static void ath9k_hw_4k_set_gain(struct ath_hw *ah, 782static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
814 struct modal_eep_4k_header *pModal, 783 struct modal_eep_4k_header *pModal,
815 struct ar5416_eeprom_4k *eep, 784 struct ar5416_eeprom_4k *eep,
@@ -877,6 +846,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
877 u8 txRxAttenLocal; 846 u8 txRxAttenLocal;
878 u8 ob[5], db1[5], db2[5]; 847 u8 ob[5], db1[5], db2[5];
879 u8 ant_div_control1, ant_div_control2; 848 u8 ant_div_control1, ant_div_control2;
849 u8 bb_desired_scale;
880 u32 regVal; 850 u32 regVal;
881 851
882 pModal = &eep->modalHeader; 852 pModal = &eep->modalHeader;
@@ -1096,30 +1066,29 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
1096 AR_PHY_SETTLING_SWITCH, 1066 AR_PHY_SETTLING_SWITCH,
1097 pModal->swSettleHt40); 1067 pModal->swSettleHt40);
1098 } 1068 }
1099 if (AR_SREV_9271(ah) || AR_SREV_9285(ah)) { 1069
1100 u8 bb_desired_scale = (pModal->bb_scale_smrt_antenna & 1070 bb_desired_scale = (pModal->bb_scale_smrt_antenna &
1101 EEP_4K_BB_DESIRED_SCALE_MASK); 1071 EEP_4K_BB_DESIRED_SCALE_MASK);
1102 if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) { 1072 if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) {
1103 u32 pwrctrl, mask, clr; 1073 u32 pwrctrl, mask, clr;
1104 1074
1105 mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25); 1075 mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25);
1106 pwrctrl = mask * bb_desired_scale; 1076 pwrctrl = mask * bb_desired_scale;
1107 clr = mask * 0x1f; 1077 clr = mask * 0x1f;
1108 REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr); 1078 REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr);
1109 REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr); 1079 REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr);
1110 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr); 1080 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr);
1111 1081
1112 mask = BIT(0)|BIT(5)|BIT(15); 1082 mask = BIT(0)|BIT(5)|BIT(15);
1113 pwrctrl = mask * bb_desired_scale; 1083 pwrctrl = mask * bb_desired_scale;
1114 clr = mask * 0x1f; 1084 clr = mask * 0x1f;
1115 REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr); 1085 REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr);
1116 1086
1117 mask = BIT(0)|BIT(5); 1087 mask = BIT(0)|BIT(5);
1118 pwrctrl = mask * bb_desired_scale; 1088 pwrctrl = mask * bb_desired_scale;
1119 clr = mask * 0x1f; 1089 clr = mask * 0x1f;
1120 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr); 1090 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr);
1121 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr); 1091 REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr);
1122 }
1123 } 1092 }
1124} 1093}
1125 1094
@@ -1161,7 +1130,6 @@ const struct eeprom_ops eep_4k_ops = {
1161 .get_eeprom_ver = ath9k_hw_4k_get_eeprom_ver, 1130 .get_eeprom_ver = ath9k_hw_4k_get_eeprom_ver,
1162 .get_eeprom_rev = ath9k_hw_4k_get_eeprom_rev, 1131 .get_eeprom_rev = ath9k_hw_4k_get_eeprom_rev,
1163 .set_board_values = ath9k_hw_4k_set_board_values, 1132 .set_board_values = ath9k_hw_4k_set_board_values,
1164 .set_addac = ath9k_hw_4k_set_addac,
1165 .set_txpower = ath9k_hw_4k_set_txpower, 1133 .set_txpower = ath9k_hw_4k_set_txpower,
1166 .get_spur_channel = ath9k_hw_4k_get_spur_channel 1134 .get_spur_channel = ath9k_hw_4k_get_spur_channel
1167}; 1135};
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
index 21f180db2381..6698b722b604 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
@@ -851,10 +851,8 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,
851 if (test) 851 if (test)
852 return; 852 return;
853 853
854 if (AR_SREV_9280_20_OR_LATER(ah)) { 854 for (i = 0; i < Ar5416RateSize; i++)
855 for (i = 0; i < Ar5416RateSize; i++) 855 ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
856 ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
857 }
858 856
859 ENABLE_REGWRITE_BUFFER(ah); 857 ENABLE_REGWRITE_BUFFER(ah);
860 858
@@ -944,11 +942,6 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah,
944 REGWRITE_BUFFER_FLUSH(ah); 942 REGWRITE_BUFFER_FLUSH(ah);
945} 943}
946 944
947static void ath9k_hw_ar9287_set_addac(struct ath_hw *ah,
948 struct ath9k_channel *chan)
949{
950}
951
952static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah, 945static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
953 struct ath9k_channel *chan) 946 struct ath9k_channel *chan)
954{ 947{
@@ -1100,7 +1093,6 @@ const struct eeprom_ops eep_ar9287_ops = {
1100 .get_eeprom_ver = ath9k_hw_ar9287_get_eeprom_ver, 1093 .get_eeprom_ver = ath9k_hw_ar9287_get_eeprom_ver,
1101 .get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev, 1094 .get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev,
1102 .set_board_values = ath9k_hw_ar9287_set_board_values, 1095 .set_board_values = ath9k_hw_ar9287_set_board_values,
1103 .set_addac = ath9k_hw_ar9287_set_addac,
1104 .set_txpower = ath9k_hw_ar9287_set_txpower, 1096 .set_txpower = ath9k_hw_ar9287_set_txpower,
1105 .get_spur_channel = ath9k_hw_ar9287_get_spur_channel 1097 .get_spur_channel = ath9k_hw_ar9287_get_spur_channel
1106}; 1098};
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index e7e84be8beed..eda681fc7ba6 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -547,8 +547,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
547 break; 547 break;
548 } 548 }
549 549
550 if (AR_SREV_5416_20_OR_LATER(ah) && 550 if ((ah->rxchainmask == 5 || ah->txchainmask == 5) && (i != 0))
551 (ah->rxchainmask == 5 || ah->txchainmask == 5) && (i != 0))
552 regChainOffset = (i == 1) ? 0x2000 : 0x1000; 551 regChainOffset = (i == 1) ? 0x2000 : 0x1000;
553 else 552 else
554 regChainOffset = i * 0x1000; 553 regChainOffset = i * 0x1000;
@@ -565,9 +564,8 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
565 SM(pModal->iqCalQCh[i], 564 SM(pModal->iqCalQCh[i],
566 AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF)); 565 AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
567 566
568 if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) 567 ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal,
569 ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal, 568 regChainOffset, i);
570 regChainOffset, i);
571 } 569 }
572 570
573 if (AR_SREV_9280_20_OR_LATER(ah)) { 571 if (AR_SREV_9280_20_OR_LATER(ah)) {
@@ -893,8 +891,7 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
893 xpdGainValues[2]); 891 xpdGainValues[2]);
894 892
895 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 893 for (i = 0; i < AR5416_MAX_CHAINS; i++) {
896 if (AR_SREV_5416_20_OR_LATER(ah) && 894 if ((ah->rxchainmask == 5 || ah->txchainmask == 5) &&
897 (ah->rxchainmask == 5 || ah->txchainmask == 5) &&
898 (i != 0)) { 895 (i != 0)) {
899 regChainOffset = (i == 1) ? 0x2000 : 0x1000; 896 regChainOffset = (i == 1) ? 0x2000 : 0x1000;
900 } else 897 } else
@@ -935,27 +932,24 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
935 932
936 ENABLE_REGWRITE_BUFFER(ah); 933 ENABLE_REGWRITE_BUFFER(ah);
937 934
938 if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) { 935 if (OLC_FOR_AR9280_20_LATER) {
939 if (OLC_FOR_AR9280_20_LATER) { 936 REG_WRITE(ah,
940 REG_WRITE(ah, 937 AR_PHY_TPCRG5 + regChainOffset,
941 AR_PHY_TPCRG5 + regChainOffset, 938 SM(0x6,
942 SM(0x6, 939 AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
943 AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 940 SM_PD_GAIN(1) | SM_PD_GAIN(2) |
944 SM_PD_GAIN(1) | SM_PD_GAIN(2) | 941 SM_PD_GAIN(3) | SM_PD_GAIN(4));
945 SM_PD_GAIN(3) | SM_PD_GAIN(4)); 942 } else {
946 } else { 943 REG_WRITE(ah,
947 REG_WRITE(ah, 944 AR_PHY_TPCRG5 + regChainOffset,
948 AR_PHY_TPCRG5 + regChainOffset, 945 SM(pdGainOverlap_t2,
949 SM(pdGainOverlap_t2, 946 AR_PHY_TPCRG5_PD_GAIN_OVERLAP)|
950 AR_PHY_TPCRG5_PD_GAIN_OVERLAP)| 947 SM_PDGAIN_B(0, 1) |
951 SM_PDGAIN_B(0, 1) | 948 SM_PDGAIN_B(1, 2) |
952 SM_PDGAIN_B(1, 2) | 949 SM_PDGAIN_B(2, 3) |
953 SM_PDGAIN_B(2, 3) | 950 SM_PDGAIN_B(3, 4));
954 SM_PDGAIN_B(3, 4));
955 }
956 } 951 }
957 952
958
959 ath9k_adjust_pdadc_values(ah, pwr_table_offset, 953 ath9k_adjust_pdadc_values(ah, pwr_table_offset,
960 diff, pdadcValues); 954 diff, pdadcValues);
961 955
diff --git a/drivers/net/wireless/ath/ath9k/gpio.c b/drivers/net/wireless/ath/ath9k/gpio.c
index 5113dd80c99f..afbf5400a52a 100644
--- a/drivers/net/wireless/ath/ath9k/gpio.c
+++ b/drivers/net/wireless/ath/ath9k/gpio.c
@@ -48,6 +48,8 @@ void ath_init_leds(struct ath_softc *sc)
48 sc->sc_ah->led_pin = ATH_LED_PIN_9485; 48 sc->sc_ah->led_pin = ATH_LED_PIN_9485;
49 else if (AR_SREV_9300(sc->sc_ah)) 49 else if (AR_SREV_9300(sc->sc_ah))
50 sc->sc_ah->led_pin = ATH_LED_PIN_9300; 50 sc->sc_ah->led_pin = ATH_LED_PIN_9300;
51 else if (AR_SREV_9480(sc->sc_ah))
52 sc->sc_ah->led_pin = ATH_LED_PIN_9480;
51 else 53 else
52 sc->sc_ah->led_pin = ATH_LED_PIN_DEF; 54 sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
53 } 55 }
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
index 9cf42f6973aa..966661c9e586 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
@@ -509,8 +509,8 @@ static void setup_ht_cap(struct ath9k_htc_priv *priv,
509 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 509 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
510 510
511 /* ath9k_htc supports only 1 or 2 stream devices */ 511 /* ath9k_htc supports only 1 or 2 stream devices */
512 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2); 512 tx_streams = ath9k_cmn_count_streams(priv->ah->txchainmask, 2);
513 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2); 513 rx_streams = ath9k_cmn_count_streams(priv->ah->rxchainmask, 2);
514 514
515 ath_dbg(common, ATH_DBG_CONFIG, 515 ath_dbg(common, ATH_DBG_CONFIG,
516 "TX streams %d, RX streams: %d\n", 516 "TX streams %d, RX streams: %d\n",
@@ -601,9 +601,6 @@ static void ath9k_init_misc(struct ath9k_htc_priv *priv)
601{ 601{
602 struct ath_common *common = ath9k_hw_common(priv->ah); 602 struct ath_common *common = ath9k_hw_common(priv->ah);
603 603
604 common->tx_chainmask = priv->ah->caps.tx_chainmask;
605 common->rx_chainmask = priv->ah->caps.rx_chainmask;
606
607 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 604 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
608 605
609 priv->ah->opmode = NL80211_IFTYPE_STATION; 606 priv->ah->opmode = NL80211_IFTYPE_STATION;
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
index b9de1511add9..495fdf680a6c 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -826,8 +826,7 @@ void ath9k_htc_ani_work(struct work_struct *work)
826 if (longcal || shortcal) 826 if (longcal || shortcal)
827 common->ani.caldone = 827 common->ani.caldone =
828 ath9k_hw_calibrate(ah, ah->curchan, 828 ath9k_hw_calibrate(ah, ah->curchan,
829 common->rx_chainmask, 829 ah->rxchainmask, longcal);
830 longcal);
831 830
832 ath9k_htc_ps_restore(priv); 831 ath9k_htc_ps_restore(priv);
833 } 832 }
diff --git a/drivers/net/wireless/ath/ath9k/hw-ops.h b/drivers/net/wireless/ath/ath9k/hw-ops.h
index dd9003ee123b..e9782d164962 100644
--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
@@ -54,13 +54,10 @@ static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
54 return ath9k_hw_ops(ah)->get_isr(ah, masked); 54 return ath9k_hw_ops(ah)->get_isr(ah, masked);
55} 55}
56 56
57static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen, 57static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
58 bool is_firstseg, bool is_lastseg, 58 struct ath_tx_info *i)
59 const void *ds0, dma_addr_t buf_addr,
60 unsigned int qcu)
61{ 59{
62 ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg, 60 return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
63 ds0, buf_addr, qcu);
64} 61}
65 62
66static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds, 63static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
@@ -69,55 +66,6 @@ static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
69 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts); 66 return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
70} 67}
71 68
72static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
73 u32 pktLen, enum ath9k_pkt_type type,
74 u32 txPower, u32 keyIx,
75 enum ath9k_key_type keyType,
76 u32 flags)
77{
78 ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx,
79 keyType, flags);
80}
81
82static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
83 void *lastds,
84 u32 durUpdateEn, u32 rtsctsRate,
85 u32 rtsctsDuration,
86 struct ath9k_11n_rate_series series[],
87 u32 nseries, u32 flags)
88{
89 ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn,
90 rtsctsRate, rtsctsDuration, series,
91 nseries, flags);
92}
93
94static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
95 u32 aggrLen)
96{
97 ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen);
98}
99
100static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
101 u32 numDelims)
102{
103 ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims);
104}
105
106static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
107{
108 ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds);
109}
110
111static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
112{
113 ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
114}
115
116static inline void ath9k_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
117{
118 ath9k_hw_ops(ah)->set_clrdmask(ah, ds, val);
119}
120
121static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah, 69static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
122 struct ath_hw_antcomb_conf *antconf) 70 struct ath_hw_antcomb_conf *antconf)
123{ 71{
@@ -233,11 +181,6 @@ static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
233 return ath9k_hw_private_ops(ah)->restore_chainmask(ah); 181 return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
234} 182}
235 183
236static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value)
237{
238 return ath9k_hw_private_ops(ah)->set_diversity(ah, value);
239}
240
241static inline bool ath9k_hw_ani_control(struct ath_hw *ah, 184static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
242 enum ath9k_ani_cmd cmd, int param) 185 enum ath9k_ani_cmd cmd, int param)
243{ 186{
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 3a16ba256ef9..f2de7ee047ce 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -580,6 +580,7 @@ static int __ath9k_hw_init(struct ath_hw *ah)
580 case AR_SREV_VERSION_9330: 580 case AR_SREV_VERSION_9330:
581 case AR_SREV_VERSION_9485: 581 case AR_SREV_VERSION_9485:
582 case AR_SREV_VERSION_9340: 582 case AR_SREV_VERSION_9340:
583 case AR_SREV_VERSION_9480:
583 break; 584 break;
584 default: 585 default:
585 ath_err(common, 586 ath_err(common,
@@ -664,6 +665,7 @@ int ath9k_hw_init(struct ath_hw *ah)
664 case AR9300_DEVID_AR9330: 665 case AR9300_DEVID_AR9330:
665 case AR9300_DEVID_AR9340: 666 case AR9300_DEVID_AR9340:
666 case AR9300_DEVID_AR9580: 667 case AR9300_DEVID_AR9580:
668 case AR9300_DEVID_AR9480:
667 break; 669 break;
668 default: 670 default:
669 if (common->bus_ops->ath_bus_type == ATH_USB) 671 if (common->bus_ops->ath_bus_type == ATH_USB)
@@ -960,7 +962,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
960 struct ath_common *common = ath9k_hw_common(ah); 962 struct ath_common *common = ath9k_hw_common(ah);
961 struct ieee80211_conf *conf = &common->hw->conf; 963 struct ieee80211_conf *conf = &common->hw->conf;
962 const struct ath9k_channel *chan = ah->curchan; 964 const struct ath9k_channel *chan = ah->curchan;
963 int acktimeout; 965 int acktimeout, ctstimeout;
964 int slottime; 966 int slottime;
965 int sifstime; 967 int sifstime;
966 int rx_lat = 0, tx_lat = 0, eifs = 0; 968 int rx_lat = 0, tx_lat = 0, eifs = 0;
@@ -975,7 +977,10 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
975 if (ah->misc_mode != 0) 977 if (ah->misc_mode != 0)
976 REG_SET_BIT(ah, AR_PCU_MISC, ah->misc_mode); 978 REG_SET_BIT(ah, AR_PCU_MISC, ah->misc_mode);
977 979
978 rx_lat = 37; 980 if (IS_CHAN_A_FAST_CLOCK(ah, chan))
981 rx_lat = 41;
982 else
983 rx_lat = 37;
979 tx_lat = 54; 984 tx_lat = 54;
980 985
981 if (IS_CHAN_HALF_RATE(chan)) { 986 if (IS_CHAN_HALF_RATE(chan)) {
@@ -989,7 +994,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
989 sifstime = 32; 994 sifstime = 32;
990 } else if (IS_CHAN_QUARTER_RATE(chan)) { 995 } else if (IS_CHAN_QUARTER_RATE(chan)) {
991 eifs = 340; 996 eifs = 340;
992 rx_lat *= 4; 997 rx_lat = (rx_lat * 4) - 1;
993 tx_lat *= 4; 998 tx_lat *= 4;
994 if (IS_CHAN_A_FAST_CLOCK(ah, chan)) 999 if (IS_CHAN_A_FAST_CLOCK(ah, chan))
995 tx_lat += 22; 1000 tx_lat += 22;
@@ -1017,6 +1022,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
1017 1022
1018 /* As defined by IEEE 802.11-2007 17.3.8.6 */ 1023 /* As defined by IEEE 802.11-2007 17.3.8.6 */
1019 acktimeout = slottime + sifstime + 3 * ah->coverage_class; 1024 acktimeout = slottime + sifstime + 3 * ah->coverage_class;
1025 ctstimeout = acktimeout;
1020 1026
1021 /* 1027 /*
1022 * Workaround for early ACK timeouts, add an offset to match the 1028 * Workaround for early ACK timeouts, add an offset to match the
@@ -1031,7 +1037,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
1031 ath9k_hw_set_sifs_time(ah, sifstime); 1037 ath9k_hw_set_sifs_time(ah, sifstime);
1032 ath9k_hw_setslottime(ah, slottime); 1038 ath9k_hw_setslottime(ah, slottime);
1033 ath9k_hw_set_ack_timeout(ah, acktimeout); 1039 ath9k_hw_set_ack_timeout(ah, acktimeout);
1034 ath9k_hw_set_cts_timeout(ah, acktimeout); 1040 ath9k_hw_set_cts_timeout(ah, ctstimeout);
1035 if (ah->globaltxtimeout != (u32) -1) 1041 if (ah->globaltxtimeout != (u32) -1)
1036 ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout); 1042 ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout);
1037 1043
@@ -1336,6 +1342,7 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
1336 1342
1337static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type) 1343static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type)
1338{ 1344{
1345
1339 if (AR_SREV_9300_20_OR_LATER(ah)) { 1346 if (AR_SREV_9300_20_OR_LATER(ah)) {
1340 REG_WRITE(ah, AR_WA, ah->WARegVal); 1347 REG_WRITE(ah, AR_WA, ah->WARegVal);
1341 udelay(10); 1348 udelay(10);
@@ -1475,9 +1482,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
1475 u64 tsf = 0; 1482 u64 tsf = 0;
1476 int i, r; 1483 int i, r;
1477 1484
1478 ah->txchainmask = common->tx_chainmask;
1479 ah->rxchainmask = common->rx_chainmask;
1480
1481 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) 1485 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
1482 return -EIO; 1486 return -EIO;
1483 1487
@@ -1495,14 +1499,16 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
1495 } 1499 }
1496 ah->noise = ath9k_hw_getchan_noise(ah, chan); 1500 ah->noise = ath9k_hw_getchan_noise(ah, chan);
1497 1501
1502 if ((AR_SREV_9280(ah) && common->bus_ops->ath_bus_type == ATH_PCI) ||
1503 (AR_SREV_9300_20_OR_LATER(ah) && IS_CHAN_5GHZ(chan)))
1504 bChannelChange = false;
1505
1498 if (bChannelChange && 1506 if (bChannelChange &&
1499 (ah->chip_fullsleep != true) && 1507 (ah->chip_fullsleep != true) &&
1500 (ah->curchan != NULL) && 1508 (ah->curchan != NULL) &&
1501 (chan->channel != ah->curchan->channel) && 1509 (chan->channel != ah->curchan->channel) &&
1502 ((chan->channelFlags & CHANNEL_ALL) == 1510 ((chan->channelFlags & CHANNEL_ALL) ==
1503 (ah->curchan->channelFlags & CHANNEL_ALL)) && 1511 (ah->curchan->channelFlags & CHANNEL_ALL))) {
1504 (!AR_SREV_9280(ah) || AR_DEVID_7010(ah))) {
1505
1506 if (ath9k_hw_channel_change(ah, chan)) { 1512 if (ath9k_hw_channel_change(ah, chan)) {
1507 ath9k_hw_loadnf(ah, ah->curchan); 1513 ath9k_hw_loadnf(ah, ah->curchan);
1508 ath9k_hw_start_nfcal(ah, true); 1514 ath9k_hw_start_nfcal(ah, true);
@@ -1742,25 +1748,41 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
1742{ 1748{
1743 REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); 1749 REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
1744 if (setChip) { 1750 if (setChip) {
1751 if (AR_SREV_9480(ah)) {
1752 REG_WRITE(ah, AR_TIMER_MODE,
1753 REG_READ(ah, AR_TIMER_MODE) & 0xFFFFFF00);
1754 REG_WRITE(ah, AR_NDP2_TIMER_MODE, REG_READ(ah,
1755 AR_NDP2_TIMER_MODE) & 0xFFFFFF00);
1756 REG_WRITE(ah, AR_SLP32_INC,
1757 REG_READ(ah, AR_SLP32_INC) & 0xFFF00000);
1758 /* xxx Required for WLAN only case ? */
1759 REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0);
1760 udelay(100);
1761 }
1762
1745 /* 1763 /*
1746 * Clear the RTC force wake bit to allow the 1764 * Clear the RTC force wake bit to allow the
1747 * mac to go to sleep. 1765 * mac to go to sleep.
1748 */ 1766 */
1749 REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, 1767 REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
1750 AR_RTC_FORCE_WAKE_EN); 1768
1769 if (AR_SREV_9480(ah))
1770 udelay(100);
1771
1751 if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah)) 1772 if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
1752 REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF); 1773 REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
1753 1774
1754 /* Shutdown chip. Active low */ 1775 /* Shutdown chip. Active low */
1755 if (!AR_SREV_5416(ah) && !AR_SREV_9271(ah)) 1776 if (!AR_SREV_5416(ah) &&
1756 REG_CLR_BIT(ah, (AR_RTC_RESET), 1777 !AR_SREV_9271(ah) && !AR_SREV_9480_10(ah)) {
1757 AR_RTC_RESET_EN); 1778 REG_CLR_BIT(ah, AR_RTC_RESET, AR_RTC_RESET_EN);
1779 udelay(2);
1780 }
1758 } 1781 }
1759 1782
1760 /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */ 1783 /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. */
1761 if (AR_SREV_9300_20_OR_LATER(ah)) 1784 if (!AR_SREV_9480(ah))
1762 REG_WRITE(ah, AR_WA, 1785 REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
1763 ah->WARegVal & ~AR_WA_D3_L1_DISABLE);
1764} 1786}
1765 1787
1766/* 1788/*
@@ -1770,6 +1792,8 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
1770 */ 1792 */
1771static void ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip) 1793static void ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip)
1772{ 1794{
1795 u32 val;
1796
1773 REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV); 1797 REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
1774 if (setChip) { 1798 if (setChip) {
1775 struct ath9k_hw_capabilities *pCap = &ah->caps; 1799 struct ath9k_hw_capabilities *pCap = &ah->caps;
@@ -1779,12 +1803,30 @@ static void ath9k_set_power_network_sleep(struct ath_hw *ah, int setChip)
1779 REG_WRITE(ah, AR_RTC_FORCE_WAKE, 1803 REG_WRITE(ah, AR_RTC_FORCE_WAKE,
1780 AR_RTC_FORCE_WAKE_ON_INT); 1804 AR_RTC_FORCE_WAKE_ON_INT);
1781 } else { 1805 } else {
1806
1807 /* When chip goes into network sleep, it could be waken
1808 * up by MCI_INT interrupt caused by BT's HW messages
1809 * (LNA_xxx, CONT_xxx) which chould be in a very fast
1810 * rate (~100us). This will cause chip to leave and
1811 * re-enter network sleep mode frequently, which in
1812 * consequence will have WLAN MCI HW to generate lots of
1813 * SYS_WAKING and SYS_SLEEPING messages which will make
1814 * BT CPU to busy to process.
1815 */
1816 if (AR_SREV_9480(ah)) {
1817 val = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_EN) &
1818 ~AR_MCI_INTERRUPT_RX_HW_MSG_MASK;
1819 REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, val);
1820 }
1782 /* 1821 /*
1783 * Clear the RTC force wake bit to allow the 1822 * Clear the RTC force wake bit to allow the
1784 * mac to go to sleep. 1823 * mac to go to sleep.
1785 */ 1824 */
1786 REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, 1825 REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,
1787 AR_RTC_FORCE_WAKE_EN); 1826 AR_RTC_FORCE_WAKE_EN);
1827
1828 if (AR_SREV_9480(ah))
1829 udelay(30);
1788 } 1830 }
1789 } 1831 }
1790 1832
@@ -2091,6 +2133,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
2091 2133
2092 pCap->tx_chainmask = fixup_chainmask(chip_chainmask, pCap->tx_chainmask); 2134 pCap->tx_chainmask = fixup_chainmask(chip_chainmask, pCap->tx_chainmask);
2093 pCap->rx_chainmask = fixup_chainmask(chip_chainmask, pCap->rx_chainmask); 2135 pCap->rx_chainmask = fixup_chainmask(chip_chainmask, pCap->rx_chainmask);
2136 ah->txchainmask = pCap->tx_chainmask;
2137 ah->rxchainmask = pCap->rx_chainmask;
2094 2138
2095 ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA; 2139 ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA;
2096 2140
@@ -2401,6 +2445,9 @@ void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
2401 2445
2402 ENABLE_REGWRITE_BUFFER(ah); 2446 ENABLE_REGWRITE_BUFFER(ah);
2403 2447
2448 if (AR_SREV_9480(ah))
2449 bits |= ATH9K_RX_FILTER_CONTROL_WRAPPER;
2450
2404 REG_WRITE(ah, AR_RX_FILTER, bits); 2451 REG_WRITE(ah, AR_RX_FILTER, bits);
2405 2452
2406 phybits = 0; 2453 phybits = 0;
@@ -2447,13 +2494,13 @@ void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test)
2447 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); 2494 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
2448 struct ath9k_channel *chan = ah->curchan; 2495 struct ath9k_channel *chan = ah->curchan;
2449 struct ieee80211_channel *channel = chan->chan; 2496 struct ieee80211_channel *channel = chan->chan;
2450 int reg_pwr = min_t(int, MAX_RATE_POWER, regulatory->power_limit); 2497 int reg_pwr = min_t(int, MAX_RATE_POWER, limit);
2451 int chan_pwr = channel->max_power * 2; 2498 int chan_pwr = channel->max_power * 2;
2452 2499
2453 if (test) 2500 if (test)
2454 reg_pwr = chan_pwr = MAX_RATE_POWER; 2501 reg_pwr = chan_pwr = MAX_RATE_POWER;
2455 2502
2456 regulatory->power_limit = min(limit, (u32) MAX_RATE_POWER); 2503 regulatory->power_limit = reg_pwr;
2457 2504
2458 ah->eep_ops->set_txpower(ah, chan, 2505 ah->eep_ops->set_txpower(ah, chan,
2459 ath9k_regd_get_ctl(regulatory, chan), 2506 ath9k_regd_get_ctl(regulatory, chan),
@@ -2657,6 +2704,20 @@ void ath9k_hw_gen_timer_start(struct ath_hw *ah,
2657 REG_SET_BIT(ah, gen_tmr_configuration[timer->index].mode_addr, 2704 REG_SET_BIT(ah, gen_tmr_configuration[timer->index].mode_addr,
2658 gen_tmr_configuration[timer->index].mode_mask); 2705 gen_tmr_configuration[timer->index].mode_mask);
2659 2706
2707 if (AR_SREV_9480(ah)) {
2708 /*
2709 * Starting from AR9480, each generic timer can select which tsf
2710 * to use. But we still follow the old rule, 0 - 7 use tsf and
2711 * 8 - 15 use tsf2.
2712 */
2713 if ((timer->index < AR_GEN_TIMER_BANK_1_LEN))
2714 REG_CLR_BIT(ah, AR_MAC_PCU_GEN_TIMER_TSF_SEL,
2715 (1 << timer->index));
2716 else
2717 REG_SET_BIT(ah, AR_MAC_PCU_GEN_TIMER_TSF_SEL,
2718 (1 << timer->index));
2719 }
2720
2660 /* Enable both trigger and thresh interrupt masks */ 2721 /* Enable both trigger and thresh interrupt masks */
2661 REG_SET_BIT(ah, AR_IMR_S5, 2722 REG_SET_BIT(ah, AR_IMR_S5,
2662 (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) | 2723 (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) |
@@ -2762,6 +2823,7 @@ static struct {
2762 { AR_SREV_VERSION_9330, "9330" }, 2823 { AR_SREV_VERSION_9330, "9330" },
2763 { AR_SREV_VERSION_9340, "9340" }, 2824 { AR_SREV_VERSION_9340, "9340" },
2764 { AR_SREV_VERSION_9485, "9485" }, 2825 { AR_SREV_VERSION_9485, "9485" },
2826 { AR_SREV_VERSION_9480, "9480" },
2765}; 2827};
2766 2828
2767/* For devices with external radios */ 2829/* For devices with external radios */
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index c8af86c795e5..24889f78a053 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -46,6 +46,7 @@
46#define AR9300_DEVID_AR9340 0x0031 46#define AR9300_DEVID_AR9340 0x0031
47#define AR9300_DEVID_AR9485_PCIE 0x0032 47#define AR9300_DEVID_AR9485_PCIE 0x0032
48#define AR9300_DEVID_AR9580 0x0033 48#define AR9300_DEVID_AR9580 0x0033
49#define AR9300_DEVID_AR9480 0x0034
49#define AR9300_DEVID_AR9330 0x0035 50#define AR9300_DEVID_AR9330 0x0035
50 51
51#define AR5416_AR9100_DEVID 0x000b 52#define AR5416_AR9100_DEVID 0x000b
@@ -583,7 +584,6 @@ struct ath_hw_private_ops {
583 bool (*rfbus_req)(struct ath_hw *ah); 584 bool (*rfbus_req)(struct ath_hw *ah);
584 void (*rfbus_done)(struct ath_hw *ah); 585 void (*rfbus_done)(struct ath_hw *ah);
585 void (*restore_chainmask)(struct ath_hw *ah); 586 void (*restore_chainmask)(struct ath_hw *ah);
586 void (*set_diversity)(struct ath_hw *ah, bool value);
587 u32 (*compute_pll_control)(struct ath_hw *ah, 587 u32 (*compute_pll_control)(struct ath_hw *ah,
588 struct ath9k_channel *chan); 588 struct ath9k_channel *chan);
589 bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd, 589 bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd,
@@ -615,30 +615,10 @@ struct ath_hw_ops {
615 u8 rxchainmask, 615 u8 rxchainmask,
616 bool longcal); 616 bool longcal);
617 bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked); 617 bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked);
618 void (*fill_txdesc)(struct ath_hw *ah, void *ds, u32 seglen, 618 void (*set_txdesc)(struct ath_hw *ah, void *ds,
619 bool is_firstseg, bool is_is_lastseg, 619 struct ath_tx_info *i);
620 const void *ds0, dma_addr_t buf_addr,
621 unsigned int qcu);
622 int (*proc_txdesc)(struct ath_hw *ah, void *ds, 620 int (*proc_txdesc)(struct ath_hw *ah, void *ds,
623 struct ath_tx_status *ts); 621 struct ath_tx_status *ts);
624 void (*set11n_txdesc)(struct ath_hw *ah, void *ds,
625 u32 pktLen, enum ath9k_pkt_type type,
626 u32 txPower, u8 keyIx,
627 enum ath9k_key_type keyType,
628 u32 flags);
629 void (*set11n_ratescenario)(struct ath_hw *ah, void *ds,
630 void *lastds,
631 u32 durUpdateEn, u32 rtsctsRate,
632 u32 rtsctsDuration,
633 struct ath9k_11n_rate_series series[],
634 u32 nseries, u32 flags);
635 void (*set11n_aggr_first)(struct ath_hw *ah, void *ds,
636 u32 aggrLen);
637 void (*set11n_aggr_middle)(struct ath_hw *ah, void *ds,
638 u32 numDelims);
639 void (*set11n_aggr_last)(struct ath_hw *ah, void *ds);
640 void (*clr11n_aggr)(struct ath_hw *ah, void *ds);
641 void (*set_clrdmask)(struct ath_hw *ah, void *ds, bool val);
642 void (*antdiv_comb_conf_get)(struct ath_hw *ah, 622 void (*antdiv_comb_conf_get)(struct ath_hw *ah,
643 struct ath_hw_antcomb_conf *antconf); 623 struct ath_hw_antcomb_conf *antconf);
644 void (*antdiv_comb_conf_set)(struct ath_hw *ah, 624 void (*antdiv_comb_conf_set)(struct ath_hw *ah,
@@ -827,11 +807,14 @@ struct ath_hw {
827 struct ar5416IniArray iniModes_9271_1_0_only; 807 struct ar5416IniArray iniModes_9271_1_0_only;
828 struct ar5416IniArray iniCckfirNormal; 808 struct ar5416IniArray iniCckfirNormal;
829 struct ar5416IniArray iniCckfirJapan2484; 809 struct ar5416IniArray iniCckfirJapan2484;
810 struct ar5416IniArray ini_japan2484;
830 struct ar5416IniArray iniCommon_normal_cck_fir_coeff_9271; 811 struct ar5416IniArray iniCommon_normal_cck_fir_coeff_9271;
831 struct ar5416IniArray iniCommon_japan_2484_cck_fir_coeff_9271; 812 struct ar5416IniArray iniCommon_japan_2484_cck_fir_coeff_9271;
832 struct ar5416IniArray iniModes_9271_ANI_reg; 813 struct ar5416IniArray iniModes_9271_ANI_reg;
833 struct ar5416IniArray iniModes_high_power_tx_gain_9271; 814 struct ar5416IniArray iniModes_high_power_tx_gain_9271;
834 struct ar5416IniArray iniModes_normal_power_tx_gain_9271; 815 struct ar5416IniArray iniModes_normal_power_tx_gain_9271;
816 struct ar5416IniArray ini_radio_post_sys2ant;
817 struct ar5416IniArray ini_BTCOEX_MAX_TXPWR;
835 818
836 struct ar5416IniArray iniMac[ATH_INI_NUM_SPLIT]; 819 struct ar5416IniArray iniMac[ATH_INI_NUM_SPLIT];
837 struct ar5416IniArray iniBB[ATH_INI_NUM_SPLIT]; 820 struct ar5416IniArray iniBB[ATH_INI_NUM_SPLIT];
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index dd71a5f77516..39514de044ef 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -270,8 +270,8 @@ static void setup_ht_cap(struct ath_softc *sc,
270 270
271 /* set up supported mcs set */ 271 /* set up supported mcs set */
272 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs)); 272 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
273 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, max_streams); 273 tx_streams = ath9k_cmn_count_streams(ah->txchainmask, max_streams);
274 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, max_streams); 274 rx_streams = ath9k_cmn_count_streams(ah->rxchainmask, max_streams);
275 275
276 ath_dbg(common, ATH_DBG_CONFIG, 276 ath_dbg(common, ATH_DBG_CONFIG,
277 "TX streams %d, RX streams: %d\n", 277 "TX streams %d, RX streams: %d\n",
@@ -506,10 +506,6 @@ static void ath9k_init_misc(struct ath_softc *sc)
506 sc->sc_flags |= SC_OP_RXAGGR; 506 sc->sc_flags |= SC_OP_RXAGGR;
507 } 507 }
508 508
509 common->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
510 common->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
511
512 ath9k_hw_set_diversity(sc->sc_ah, true);
513 sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah); 509 sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah);
514 510
515 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN); 511 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
@@ -646,10 +642,8 @@ static void ath9k_init_band_txpower(struct ath_softc *sc, int band)
646static void ath9k_init_txpower_limits(struct ath_softc *sc) 642static void ath9k_init_txpower_limits(struct ath_softc *sc)
647{ 643{
648 struct ath_hw *ah = sc->sc_ah; 644 struct ath_hw *ah = sc->sc_ah;
649 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
650 struct ath9k_channel *curchan = ah->curchan; 645 struct ath9k_channel *curchan = ah->curchan;
651 646
652 ah->txchainmask = common->tx_chainmask;
653 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) 647 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
654 ath9k_init_band_txpower(sc, IEEE80211_BAND_2GHZ); 648 ath9k_init_band_txpower(sc, IEEE80211_BAND_2GHZ);
655 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) 649 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
@@ -658,9 +652,22 @@ static void ath9k_init_txpower_limits(struct ath_softc *sc)
658 ah->curchan = curchan; 652 ah->curchan = curchan;
659} 653}
660 654
655void ath9k_reload_chainmask_settings(struct ath_softc *sc)
656{
657 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT))
658 return;
659
660 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
661 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
662 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
663 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
664}
665
666
661void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw) 667void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
662{ 668{
663 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 669 struct ath_hw *ah = sc->sc_ah;
670 struct ath_common *common = ath9k_hw_common(ah);
664 671
665 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | 672 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
666 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | 673 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
@@ -698,6 +705,16 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
698 hw->sta_data_size = sizeof(struct ath_node); 705 hw->sta_data_size = sizeof(struct ath_node);
699 hw->vif_data_size = sizeof(struct ath_vif); 706 hw->vif_data_size = sizeof(struct ath_vif);
700 707
708 hw->wiphy->available_antennas_rx = BIT(ah->caps.max_rxchains) - 1;
709 hw->wiphy->available_antennas_tx = BIT(ah->caps.max_txchains) - 1;
710
711 /* single chain devices with rx diversity */
712 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
713 hw->wiphy->available_antennas_rx = BIT(0) | BIT(1);
714
715 sc->ant_rx = hw->wiphy->available_antennas_rx;
716 sc->ant_tx = hw->wiphy->available_antennas_tx;
717
701#ifdef CONFIG_ATH9K_RATE_CONTROL 718#ifdef CONFIG_ATH9K_RATE_CONTROL
702 hw->rate_control_algorithm = "ath9k_rate_control"; 719 hw->rate_control_algorithm = "ath9k_rate_control";
703#endif 720#endif
@@ -709,12 +726,7 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
709 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 726 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
710 &sc->sbands[IEEE80211_BAND_5GHZ]; 727 &sc->sbands[IEEE80211_BAND_5GHZ];
711 728
712 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { 729 ath9k_reload_chainmask_settings(sc);
713 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
714 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
715 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
716 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
717 }
718 730
719 SET_IEEE80211_PERM_ADDR(hw, common->macaddr); 731 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
720} 732}
@@ -782,6 +794,7 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
782 goto error_world; 794 goto error_world;
783 } 795 }
784 796
797 INIT_WORK(&sc->hw_reset_work, ath_reset_work);
785 INIT_WORK(&sc->hw_check_work, ath_hw_check); 798 INIT_WORK(&sc->hw_check_work, ath_hw_check);
786 INIT_WORK(&sc->paprd_work, ath_paprd_calibrate); 799 INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
787 INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work); 800 INIT_DELAYED_WORK(&sc->hw_pll_work, ath_hw_pll_work);
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index 7ce9b320f0d9..22f23eafe8ba 100644
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -62,18 +62,6 @@ void ath9k_hw_txstart(struct ath_hw *ah, u32 q)
62} 62}
63EXPORT_SYMBOL(ath9k_hw_txstart); 63EXPORT_SYMBOL(ath9k_hw_txstart);
64 64
65void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds)
66{
67 struct ar5416_desc *ads = AR5416DESC(ds);
68
69 ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
70 ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
71 ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
72 ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
73 ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
74}
75EXPORT_SYMBOL(ath9k_hw_cleartxdesc);
76
77u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q) 65u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q)
78{ 66{
79 u32 npend; 67 u32 npend;
@@ -596,7 +584,7 @@ int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds,
596 else 584 else
597 rs->rs_keyix = ATH9K_RXKEYIX_INVALID; 585 rs->rs_keyix = ATH9K_RXKEYIX_INVALID;
598 586
599 rs->rs_rate = RXSTATUS_RATE(ah, (&ads)); 587 rs->rs_rate = MS(ads.ds_rxstatus0, AR_RxRate);
600 rs->rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0; 588 rs->rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0;
601 589
602 rs->rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0; 590 rs->rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0;
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h
index acb83bfd05a0..91c96546c0cd 100644
--- a/drivers/net/wireless/ath/ath9k/mac.h
+++ b/drivers/net/wireless/ath/ath9k/mac.h
@@ -17,10 +17,6 @@
17#ifndef MAC_H 17#ifndef MAC_H
18#define MAC_H 18#define MAC_H
19 19
20#define RXSTATUS_RATE(ah, ads) (AR_SREV_5416_20_OR_LATER(ah) ? \
21 MS(ads->ds_rxstatus0, AR_RxRate) : \
22 (ads->ds_rxstatus3 >> 2) & 0xFF)
23
24#define set11nTries(_series, _index) \ 20#define set11nTries(_series, _index) \
25 (SM((_series)[_index].Tries, AR_XmitDataTries##_index)) 21 (SM((_series)[_index].Tries, AR_XmitDataTries##_index))
26 22
@@ -263,7 +259,11 @@ struct ath_desc {
263#define ATH9K_TXDESC_VMF 0x0100 259#define ATH9K_TXDESC_VMF 0x0100
264#define ATH9K_TXDESC_FRAG_IS_ON 0x0200 260#define ATH9K_TXDESC_FRAG_IS_ON 0x0200
265#define ATH9K_TXDESC_LOWRXCHAIN 0x0400 261#define ATH9K_TXDESC_LOWRXCHAIN 0x0400
266#define ATH9K_TXDESC_LDPC 0x00010000 262#define ATH9K_TXDESC_LDPC 0x0800
263#define ATH9K_TXDESC_CLRDMASK 0x1000
264
265#define ATH9K_TXDESC_PAPRD 0x70000
266#define ATH9K_TXDESC_PAPRD_S 16
267 267
268#define ATH9K_RXDESC_INTREQ 0x0020 268#define ATH9K_RXDESC_INTREQ 0x0020
269 269
@@ -644,6 +644,7 @@ enum ath9k_rx_filter {
644 ATH9K_RX_FILTER_PSPOLL = 0x00004000, 644 ATH9K_RX_FILTER_PSPOLL = 0x00004000,
645 ATH9K_RX_FILTER_PHYRADAR = 0x00002000, 645 ATH9K_RX_FILTER_PHYRADAR = 0x00002000,
646 ATH9K_RX_FILTER_MCAST_BCAST_ALL = 0x00008000, 646 ATH9K_RX_FILTER_MCAST_BCAST_ALL = 0x00008000,
647 ATH9K_RX_FILTER_CONTROL_WRAPPER = 0x00080000,
647}; 648};
648 649
649#define ATH9K_RATESERIES_RTS_CTS 0x0001 650#define ATH9K_RATESERIES_RTS_CTS 0x0001
@@ -659,6 +660,13 @@ struct ath9k_11n_rate_series {
659 u32 RateFlags; 660 u32 RateFlags;
660}; 661};
661 662
663enum aggr_type {
664 AGGR_BUF_NONE,
665 AGGR_BUF_FIRST,
666 AGGR_BUF_MIDDLE,
667 AGGR_BUF_LAST,
668};
669
662enum ath9k_key_type { 670enum ath9k_key_type {
663 ATH9K_KEY_TYPE_CLEAR, 671 ATH9K_KEY_TYPE_CLEAR,
664 ATH9K_KEY_TYPE_WEP, 672 ATH9K_KEY_TYPE_WEP,
@@ -666,6 +674,33 @@ enum ath9k_key_type {
666 ATH9K_KEY_TYPE_TKIP, 674 ATH9K_KEY_TYPE_TKIP,
667}; 675};
668 676
677struct ath_tx_info {
678 u8 qcu;
679
680 bool is_first;
681 bool is_last;
682
683 enum aggr_type aggr;
684 u8 ndelim;
685 u16 aggr_len;
686
687 dma_addr_t link;
688 int pkt_len;
689 u32 flags;
690
691 dma_addr_t buf_addr[4];
692 int buf_len[4];
693
694 struct ath9k_11n_rate_series rates[4];
695 u8 rtscts_rate;
696 bool dur_update;
697
698 enum ath9k_pkt_type type;
699 enum ath9k_key_type keytype;
700 u8 keyix;
701 u8 txpower;
702};
703
669struct ath_hw; 704struct ath_hw;
670struct ath9k_channel; 705struct ath9k_channel;
671enum ath9k_int; 706enum ath9k_int;
@@ -673,7 +708,6 @@ enum ath9k_int;
673u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q); 708u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q);
674void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp); 709void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp);
675void ath9k_hw_txstart(struct ath_hw *ah, u32 q); 710void ath9k_hw_txstart(struct ath_hw *ah, u32 q);
676void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds);
677u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q); 711u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q);
678bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel); 712bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel);
679bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q); 713bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q);
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 7b7864dfab75..ee39702da5d8 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -111,24 +111,29 @@ void ath9k_ps_wakeup(struct ath_softc *sc)
111void ath9k_ps_restore(struct ath_softc *sc) 111void ath9k_ps_restore(struct ath_softc *sc)
112{ 112{
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
114 unsigned long flags; 115 unsigned long flags;
115 116
116 spin_lock_irqsave(&sc->sc_pm_lock, flags); 117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
117 if (--sc->ps_usecount != 0) 118 if (--sc->ps_usecount != 0)
118 goto unlock; 119 goto unlock;
119 120
120 spin_lock(&common->cc_lock);
121 ath_hw_cycle_counters_update(common);
122 spin_unlock(&common->cc_lock);
123
124 if (sc->ps_idle) 121 if (sc->ps_idle)
125 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP); 122 mode = ATH9K_PM_FULL_SLEEP;
126 else if (sc->ps_enabled && 123 else if (sc->ps_enabled &&
127 !(sc->ps_flags & (PS_WAIT_FOR_BEACON | 124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
128 PS_WAIT_FOR_CAB | 125 PS_WAIT_FOR_CAB |
129 PS_WAIT_FOR_PSPOLL_DATA | 126 PS_WAIT_FOR_PSPOLL_DATA |
130 PS_WAIT_FOR_TX_ACK))) 127 PS_WAIT_FOR_TX_ACK)))
131 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP); 128 mode = ATH9K_PM_NETWORK_SLEEP;
129 else
130 goto unlock;
131
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 spin_unlock(&common->cc_lock);
135
136 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
132 137
133 unlock: 138 unlock:
134 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
@@ -212,83 +217,58 @@ static int ath_update_survey_stats(struct ath_softc *sc)
212 return ret; 217 return ret;
213} 218}
214 219
215/* 220static void __ath_cancel_work(struct ath_softc *sc)
216 * Set/change channels. If the channel is really being changed, it's done
217 * by reseting the chip. To accomplish this we must first cleanup any pending
218 * DMA, then restart stuff.
219*/
220static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
221 struct ath9k_channel *hchan)
222{ 221{
223 struct ath_hw *ah = sc->sc_ah;
224 struct ath_common *common = ath9k_hw_common(ah);
225 struct ieee80211_conf *conf = &common->hw->conf;
226 bool fastcc = true, stopped;
227 struct ieee80211_channel *channel = hw->conf.channel;
228 struct ath9k_hw_cal_data *caldata = NULL;
229 int r;
230
231 if (sc->sc_flags & SC_OP_INVALID)
232 return -EIO;
233
234 sc->hw_busy_count = 0;
235
236 del_timer_sync(&common->ani.timer);
237 cancel_work_sync(&sc->paprd_work); 222 cancel_work_sync(&sc->paprd_work);
238 cancel_work_sync(&sc->hw_check_work); 223 cancel_work_sync(&sc->hw_check_work);
239 cancel_delayed_work_sync(&sc->tx_complete_work); 224 cancel_delayed_work_sync(&sc->tx_complete_work);
240 cancel_delayed_work_sync(&sc->hw_pll_work); 225 cancel_delayed_work_sync(&sc->hw_pll_work);
226}
241 227
242 ath9k_ps_wakeup(sc); 228static void ath_cancel_work(struct ath_softc *sc)
229{
230 __ath_cancel_work(sc);
231 cancel_work_sync(&sc->hw_reset_work);
232}
243 233
244 spin_lock_bh(&sc->sc_pcu_lock); 234static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
235{
236 struct ath_hw *ah = sc->sc_ah;
237 struct ath_common *common = ath9k_hw_common(ah);
238 bool ret;
245 239
246 /* 240 ieee80211_stop_queues(sc->hw);
247 * This is only performed if the channel settings have
248 * actually changed.
249 *
250 * To switch channels clear any pending DMA operations;
251 * wait long enough for the RX fifo to drain, reset the
252 * hardware at the new frequency, and then re-enable
253 * the relevant bits of the h/w.
254 */
255 ath9k_hw_disable_interrupts(ah);
256 stopped = ath_drain_all_txq(sc, false);
257 241
258 if (!ath_stoprecv(sc)) 242 sc->hw_busy_count = 0;
259 stopped = false; 243 del_timer_sync(&common->ani.timer);
260 244
261 if (!ath9k_hw_check_alive(ah)) 245 ath9k_debug_samp_bb_mac(sc);
262 stopped = false; 246 ath9k_hw_disable_interrupts(ah);
263 247
264 /* XXX: do not flush receive queue here. We don't want 248 ret = ath_drain_all_txq(sc, retry_tx);
265 * to flush data frames already in queue because of
266 * changing channel. */
267 249
268 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL)) 250 if (!ath_stoprecv(sc))
269 fastcc = false; 251 ret = false;
270 252
271 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) 253 if (!flush) {
272 caldata = &sc->caldata; 254 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
255 ath_rx_tasklet(sc, 1, true);
256 ath_rx_tasklet(sc, 1, false);
257 } else {
258 ath_flushrecv(sc);
259 }
273 260
274 ath_dbg(common, ATH_DBG_CONFIG, 261 return ret;
275 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n", 262}
276 sc->sc_ah->curchan->channel,
277 channel->center_freq, conf_is_ht40(conf),
278 fastcc);
279 263
280 r = ath9k_hw_reset(ah, hchan, caldata, fastcc); 264static bool ath_complete_reset(struct ath_softc *sc, bool start)
281 if (r) { 265{
282 ath_err(common, 266 struct ath_hw *ah = sc->sc_ah;
283 "Unable to reset channel (%u MHz), reset status %d\n", 267 struct ath_common *common = ath9k_hw_common(ah);
284 channel->center_freq, r);
285 goto ps_restore;
286 }
287 268
288 if (ath_startrecv(sc) != 0) { 269 if (ath_startrecv(sc) != 0) {
289 ath_err(common, "Unable to restart recv logic\n"); 270 ath_err(common, "Unable to restart recv logic\n");
290 r = -EIO; 271 return false;
291 goto ps_restore;
292 } 272 }
293 273
294 ath9k_cmn_update_txpow(ah, sc->curtxpow, 274 ath9k_cmn_update_txpow(ah, sc->curtxpow,
@@ -296,21 +276,109 @@ static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
296 ath9k_hw_set_interrupts(ah, ah->imask); 276 ath9k_hw_set_interrupts(ah, ah->imask);
297 ath9k_hw_enable_interrupts(ah); 277 ath9k_hw_enable_interrupts(ah);
298 278
299 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) { 279 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
300 if (sc->sc_flags & SC_OP_BEACONS) 280 if (sc->sc_flags & SC_OP_BEACONS)
301 ath_set_beacon(sc); 281 ath_set_beacon(sc);
282
302 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 283 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
303 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2); 284 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
304 if (!common->disable_ani) 285 if (!common->disable_ani)
305 ath_start_ani(common); 286 ath_start_ani(common);
306 } 287 }
307 288
308 ps_restore: 289 if (ath9k_hw_ops(ah)->antdiv_comb_conf_get && sc->ant_rx != 3) {
309 ieee80211_wake_queues(hw); 290 struct ath_hw_antcomb_conf div_ant_conf;
291 u8 lna_conf;
292
293 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
294
295 if (sc->ant_rx == 1)
296 lna_conf = ATH_ANT_DIV_COMB_LNA1;
297 else
298 lna_conf = ATH_ANT_DIV_COMB_LNA2;
299 div_ant_conf.main_lna_conf = lna_conf;
300 div_ant_conf.alt_lna_conf = lna_conf;
301
302 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
303 }
304
305 ieee80211_wake_queues(sc->hw);
306
307 return true;
308}
309
310static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
311 bool retry_tx)
312{
313 struct ath_hw *ah = sc->sc_ah;
314 struct ath_common *common = ath9k_hw_common(ah);
315 struct ath9k_hw_cal_data *caldata = NULL;
316 bool fastcc = true;
317 bool flush = false;
318 int r;
319
320 __ath_cancel_work(sc);
321
322 spin_lock_bh(&sc->sc_pcu_lock);
323
324 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
325 fastcc = false;
326 caldata = &sc->caldata;
327 }
328
329 if (!hchan) {
330 fastcc = false;
331 flush = true;
332 hchan = ah->curchan;
333 }
310 334
335 if (fastcc && !ath9k_hw_check_alive(ah))
336 fastcc = false;
337
338 if (!ath_prepare_reset(sc, retry_tx, flush))
339 fastcc = false;
340
341 ath_dbg(common, ATH_DBG_CONFIG,
342 "Reset to %u MHz, HT40: %d fastcc: %d\n",
343 hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
344 CHANNEL_HT40PLUS)),
345 fastcc);
346
347 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
348 if (r) {
349 ath_err(common,
350 "Unable to reset channel, reset status %d\n", r);
351 goto out;
352 }
353
354 if (!ath_complete_reset(sc, true))
355 r = -EIO;
356
357out:
311 spin_unlock_bh(&sc->sc_pcu_lock); 358 spin_unlock_bh(&sc->sc_pcu_lock);
359 return r;
360}
361
362
363/*
364 * Set/change channels. If the channel is really being changed, it's done
365 * by reseting the chip. To accomplish this we must first cleanup any pending
366 * DMA, then restart stuff.
367*/
368static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
369 struct ath9k_channel *hchan)
370{
371 int r;
372
373 if (sc->sc_flags & SC_OP_INVALID)
374 return -EIO;
375
376 ath9k_ps_wakeup(sc);
377
378 r = ath_reset_internal(sc, hchan, false);
312 379
313 ath9k_ps_restore(sc); 380 ath9k_ps_restore(sc);
381
314 return r; 382 return r;
315} 383}
316 384
@@ -318,7 +386,6 @@ static void ath_paprd_activate(struct ath_softc *sc)
318{ 386{
319 struct ath_hw *ah = sc->sc_ah; 387 struct ath_hw *ah = sc->sc_ah;
320 struct ath9k_hw_cal_data *caldata = ah->caldata; 388 struct ath9k_hw_cal_data *caldata = ah->caldata;
321 struct ath_common *common = ath9k_hw_common(ah);
322 int chain; 389 int chain;
323 390
324 if (!caldata || !caldata->paprd_done) 391 if (!caldata || !caldata->paprd_done)
@@ -327,7 +394,7 @@ static void ath_paprd_activate(struct ath_softc *sc)
327 ath9k_ps_wakeup(sc); 394 ath9k_ps_wakeup(sc);
328 ar9003_paprd_enable(ah, false); 395 ar9003_paprd_enable(ah, false);
329 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 396 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
330 if (!(common->tx_chainmask & BIT(chain))) 397 if (!(ah->txchainmask & BIT(chain)))
331 continue; 398 continue;
332 399
333 ar9003_paprd_populate_single_table(ah, caldata, chain); 400 ar9003_paprd_populate_single_table(ah, caldata, chain);
@@ -414,7 +481,7 @@ void ath_paprd_calibrate(struct work_struct *work)
414 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN); 481 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
415 482
416 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) { 483 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
417 if (!(common->tx_chainmask & BIT(chain))) 484 if (!(ah->txchainmask & BIT(chain)))
418 continue; 485 continue;
419 486
420 chain_ok = 0; 487 chain_ok = 0;
@@ -535,7 +602,7 @@ void ath_ani_calibrate(unsigned long data)
535 if (longcal || shortcal) { 602 if (longcal || shortcal) {
536 common->ani.caldone = 603 common->ani.caldone =
537 ath9k_hw_calibrate(ah, ah->curchan, 604 ath9k_hw_calibrate(ah, ah->curchan,
538 common->rx_chainmask, longcal); 605 ah->rxchainmask, longcal);
539 } 606 }
540 607
541 ath9k_ps_restore(sc); 608 ath9k_ps_restore(sc);
@@ -597,74 +664,6 @@ static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
597 ath_tx_node_cleanup(sc, an); 664 ath_tx_node_cleanup(sc, an);
598} 665}
599 666
600void ath_hw_check(struct work_struct *work)
601{
602 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
603 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
604 unsigned long flags;
605 int busy;
606
607 ath9k_ps_wakeup(sc);
608 if (ath9k_hw_check_alive(sc->sc_ah))
609 goto out;
610
611 spin_lock_irqsave(&common->cc_lock, flags);
612 busy = ath_update_survey_stats(sc);
613 spin_unlock_irqrestore(&common->cc_lock, flags);
614
615 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
616 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
617 if (busy >= 99) {
618 if (++sc->hw_busy_count >= 3) {
619 spin_lock_bh(&sc->sc_pcu_lock);
620 ath_reset(sc, true);
621 spin_unlock_bh(&sc->sc_pcu_lock);
622 }
623 } else if (busy >= 0)
624 sc->hw_busy_count = 0;
625
626out:
627 ath9k_ps_restore(sc);
628}
629
630static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
631{
632 static int count;
633 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
634
635 if (pll_sqsum >= 0x40000) {
636 count++;
637 if (count == 3) {
638 /* Rx is hung for more than 500ms. Reset it */
639 ath_dbg(common, ATH_DBG_RESET,
640 "Possible RX hang, resetting");
641 spin_lock_bh(&sc->sc_pcu_lock);
642 ath_reset(sc, true);
643 spin_unlock_bh(&sc->sc_pcu_lock);
644 count = 0;
645 }
646 } else
647 count = 0;
648}
649
650void ath_hw_pll_work(struct work_struct *work)
651{
652 struct ath_softc *sc = container_of(work, struct ath_softc,
653 hw_pll_work.work);
654 u32 pll_sqsum;
655
656 if (AR_SREV_9485(sc->sc_ah)) {
657
658 ath9k_ps_wakeup(sc);
659 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
660 ath9k_ps_restore(sc);
661
662 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
663
664 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
665 }
666}
667
668 667
669void ath9k_tasklet(unsigned long data) 668void ath9k_tasklet(unsigned long data)
670{ 669{
@@ -675,17 +674,15 @@ void ath9k_tasklet(unsigned long data)
675 u32 status = sc->intrstatus; 674 u32 status = sc->intrstatus;
676 u32 rxmask; 675 u32 rxmask;
677 676
677 ath9k_ps_wakeup(sc);
678 spin_lock(&sc->sc_pcu_lock);
679
678 if ((status & ATH9K_INT_FATAL) || 680 if ((status & ATH9K_INT_FATAL) ||
679 (status & ATH9K_INT_BB_WATCHDOG)) { 681 (status & ATH9K_INT_BB_WATCHDOG)) {
680 spin_lock(&sc->sc_pcu_lock); 682 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
681 ath_reset(sc, true); 683 goto out;
682 spin_unlock(&sc->sc_pcu_lock);
683 return;
684 } 684 }
685 685
686 ath9k_ps_wakeup(sc);
687 spin_lock(&sc->sc_pcu_lock);
688
689 /* 686 /*
690 * Only run the baseband hang check if beacons stop working in AP or 687 * Only run the baseband hang check if beacons stop working in AP or
691 * IBSS mode, because it has a high false positive rate. For station 688 * IBSS mode, because it has a high false positive rate. For station
@@ -733,6 +730,7 @@ void ath9k_tasklet(unsigned long data)
733 if (status & ATH9K_INT_GENTIMER) 730 if (status & ATH9K_INT_GENTIMER)
734 ath_gen_timer_isr(sc->sc_ah); 731 ath_gen_timer_isr(sc->sc_ah);
735 732
733out:
736 /* re-enable hardware interrupt */ 734 /* re-enable hardware interrupt */
737 ath9k_hw_enable_interrupts(ah); 735 ath9k_hw_enable_interrupts(ah);
738 736
@@ -895,28 +893,13 @@ static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
895 channel->center_freq, r); 893 channel->center_freq, r);
896 } 894 }
897 895
898 ath9k_cmn_update_txpow(ah, sc->curtxpow, 896 ath_complete_reset(sc, true);
899 sc->config.txpowlimit, &sc->curtxpow);
900 if (ath_startrecv(sc) != 0) {
901 ath_err(common, "Unable to restart recv logic\n");
902 goto out;
903 }
904 if (sc->sc_flags & SC_OP_BEACONS)
905 ath_set_beacon(sc); /* restart beacons */
906
907 /* Re-Enable interrupts */
908 ath9k_hw_set_interrupts(ah, ah->imask);
909 ath9k_hw_enable_interrupts(ah);
910 897
911 /* Enable LED */ 898 /* Enable LED */
912 ath9k_hw_cfg_output(ah, ah->led_pin, 899 ath9k_hw_cfg_output(ah, ah->led_pin,
913 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 900 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
914 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 901 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
915 902
916 ieee80211_wake_queues(hw);
917 ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
918
919out:
920 spin_unlock_bh(&sc->sc_pcu_lock); 903 spin_unlock_bh(&sc->sc_pcu_lock);
921 904
922 ath9k_ps_restore(sc); 905 ath9k_ps_restore(sc);
@@ -929,11 +912,10 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
929 int r; 912 int r;
930 913
931 ath9k_ps_wakeup(sc); 914 ath9k_ps_wakeup(sc);
932 cancel_delayed_work_sync(&sc->hw_pll_work);
933 915
934 spin_lock_bh(&sc->sc_pcu_lock); 916 ath_cancel_work(sc);
935 917
936 ieee80211_stop_queues(hw); 918 spin_lock_bh(&sc->sc_pcu_lock);
937 919
938 /* 920 /*
939 * Keep the LED on when the radio is disabled 921 * Keep the LED on when the radio is disabled
@@ -944,13 +926,7 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
944 ath9k_hw_cfg_gpio_input(ah, ah->led_pin); 926 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
945 } 927 }
946 928
947 /* Disable interrupts */ 929 ath_prepare_reset(sc, false, true);
948 ath9k_hw_disable_interrupts(ah);
949
950 ath_drain_all_txq(sc, false); /* clear pending tx frames */
951
952 ath_stoprecv(sc); /* turn off frame recv */
953 ath_flushrecv(sc); /* flush recv queue */
954 930
955 if (!ah->curchan) 931 if (!ah->curchan)
956 ah->curchan = ath9k_cmn_get_curchannel(hw, ah); 932 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
@@ -970,51 +946,13 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
970 ath9k_ps_restore(sc); 946 ath9k_ps_restore(sc);
971} 947}
972 948
973int ath_reset(struct ath_softc *sc, bool retry_tx) 949static int ath_reset(struct ath_softc *sc, bool retry_tx)
974{ 950{
975 struct ath_hw *ah = sc->sc_ah;
976 struct ath_common *common = ath9k_hw_common(ah);
977 struct ieee80211_hw *hw = sc->hw;
978 int r; 951 int r;
979 952
980 sc->hw_busy_count = 0;
981
982 ath9k_debug_samp_bb_mac(sc);
983 /* Stop ANI */
984
985 del_timer_sync(&common->ani.timer);
986
987 ath9k_ps_wakeup(sc); 953 ath9k_ps_wakeup(sc);
988 954
989 ieee80211_stop_queues(hw); 955 r = ath_reset_internal(sc, NULL, retry_tx);
990
991 ath9k_hw_disable_interrupts(ah);
992 ath_drain_all_txq(sc, retry_tx);
993
994 ath_stoprecv(sc);
995 ath_flushrecv(sc);
996
997 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
998 if (r)
999 ath_err(common,
1000 "Unable to reset hardware; reset status %d\n", r);
1001
1002 if (ath_startrecv(sc) != 0)
1003 ath_err(common, "Unable to start recv logic\n");
1004
1005 /*
1006 * We may be doing a reset in response to a request
1007 * that changes the channel so update any state that
1008 * might change as a result.
1009 */
1010 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1011 sc->config.txpowlimit, &sc->curtxpow);
1012
1013 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1014 ath_set_beacon(sc); /* restart beacons */
1015
1016 ath9k_hw_set_interrupts(ah, ah->imask);
1017 ath9k_hw_enable_interrupts(ah);
1018 956
1019 if (retry_tx) { 957 if (retry_tx) {
1020 int i; 958 int i;
@@ -1027,15 +965,80 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
1027 } 965 }
1028 } 966 }
1029 967
1030 ieee80211_wake_queues(hw); 968 ath9k_ps_restore(sc);
969
970 return r;
971}
972
973void ath_reset_work(struct work_struct *work)
974{
975 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
1031 976
1032 /* Start ANI */ 977 ath_reset(sc, true);
1033 if (!common->disable_ani) 978}
1034 ath_start_ani(common); 979
980void ath_hw_check(struct work_struct *work)
981{
982 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
983 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
984 unsigned long flags;
985 int busy;
1035 986
987 ath9k_ps_wakeup(sc);
988 if (ath9k_hw_check_alive(sc->sc_ah))
989 goto out;
990
991 spin_lock_irqsave(&common->cc_lock, flags);
992 busy = ath_update_survey_stats(sc);
993 spin_unlock_irqrestore(&common->cc_lock, flags);
994
995 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
996 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
997 if (busy >= 99) {
998 if (++sc->hw_busy_count >= 3)
999 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
1000
1001 } else if (busy >= 0)
1002 sc->hw_busy_count = 0;
1003
1004out:
1036 ath9k_ps_restore(sc); 1005 ath9k_ps_restore(sc);
1006}
1037 1007
1038 return r; 1008static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
1009{
1010 static int count;
1011 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1012
1013 if (pll_sqsum >= 0x40000) {
1014 count++;
1015 if (count == 3) {
1016 /* Rx is hung for more than 500ms. Reset it */
1017 ath_dbg(common, ATH_DBG_RESET,
1018 "Possible RX hang, resetting");
1019 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
1020 count = 0;
1021 }
1022 } else
1023 count = 0;
1024}
1025
1026void ath_hw_pll_work(struct work_struct *work)
1027{
1028 struct ath_softc *sc = container_of(work, struct ath_softc,
1029 hw_pll_work.work);
1030 u32 pll_sqsum;
1031
1032 if (AR_SREV_9485(sc->sc_ah)) {
1033
1034 ath9k_ps_wakeup(sc);
1035 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
1036 ath9k_ps_restore(sc);
1037
1038 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
1039
1040 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
1041 }
1039} 1042}
1040 1043
1041/**********************/ 1044/**********************/
@@ -1084,28 +1087,6 @@ static int ath9k_start(struct ieee80211_hw *hw)
1084 goto mutex_unlock; 1087 goto mutex_unlock;
1085 } 1088 }
1086 1089
1087 /*
1088 * This is needed only to setup initial state
1089 * but it's best done after a reset.
1090 */
1091 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1092 sc->config.txpowlimit, &sc->curtxpow);
1093
1094 /*
1095 * Setup the hardware after reset:
1096 * The receive engine is set going.
1097 * Frame transmit is handled entirely
1098 * in the frame output path; there's nothing to do
1099 * here except setup the interrupt mask.
1100 */
1101 if (ath_startrecv(sc) != 0) {
1102 ath_err(common, "Unable to start recv logic\n");
1103 r = -EIO;
1104 spin_unlock_bh(&sc->sc_pcu_lock);
1105 goto mutex_unlock;
1106 }
1107 spin_unlock_bh(&sc->sc_pcu_lock);
1108
1109 /* Setup our intr mask. */ 1090 /* Setup our intr mask. */
1110 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | 1091 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1111 ATH9K_INT_RXORN | ATH9K_INT_FATAL | 1092 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
@@ -1128,12 +1109,14 @@ static int ath9k_start(struct ieee80211_hw *hw)
1128 1109
1129 /* Disable BMISS interrupt when we're not associated */ 1110 /* Disable BMISS interrupt when we're not associated */
1130 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); 1111 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1131 ath9k_hw_set_interrupts(ah, ah->imask);
1132 ath9k_hw_enable_interrupts(ah);
1133 1112
1134 ieee80211_wake_queues(hw); 1113 if (!ath_complete_reset(sc, false)) {
1114 r = -EIO;
1115 spin_unlock_bh(&sc->sc_pcu_lock);
1116 goto mutex_unlock;
1117 }
1135 1118
1136 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 1119 spin_unlock_bh(&sc->sc_pcu_lock);
1137 1120
1138 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) && 1121 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1139 !ah->btcoex_hw.enabled) { 1122 !ah->btcoex_hw.enabled) {
@@ -1226,10 +1209,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
1226 1209
1227 mutex_lock(&sc->mutex); 1210 mutex_lock(&sc->mutex);
1228 1211
1229 cancel_delayed_work_sync(&sc->tx_complete_work); 1212 ath_cancel_work(sc);
1230 cancel_delayed_work_sync(&sc->hw_pll_work);
1231 cancel_work_sync(&sc->paprd_work);
1232 cancel_work_sync(&sc->hw_check_work);
1233 1213
1234 if (sc->sc_flags & SC_OP_INVALID) { 1214 if (sc->sc_flags & SC_OP_INVALID) {
1235 ath_dbg(common, ATH_DBG_ANY, "Device not present\n"); 1215 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
@@ -2041,6 +2021,7 @@ static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
2041 /* Stop ANI */ 2021 /* Stop ANI */
2042 sc->sc_flags &= ~SC_OP_ANI_RUN; 2022 sc->sc_flags &= ~SC_OP_ANI_RUN;
2043 del_timer_sync(&common->ani.timer); 2023 del_timer_sync(&common->ani.timer);
2024 memset(&sc->caldata, 0, sizeof(sc->caldata));
2044 } 2025 }
2045} 2026}
2046 2027
@@ -2292,7 +2273,11 @@ static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2292 2273
2293 mutex_lock(&sc->mutex); 2274 mutex_lock(&sc->mutex);
2294 ah->coverage_class = coverage_class; 2275 ah->coverage_class = coverage_class;
2276
2277 ath9k_ps_wakeup(sc);
2295 ath9k_hw_init_global_settings(ah); 2278 ath9k_hw_init_global_settings(ah);
2279 ath9k_ps_restore(sc);
2280
2296 mutex_unlock(&sc->mutex); 2281 mutex_unlock(&sc->mutex);
2297} 2282}
2298 2283
@@ -2308,6 +2293,12 @@ static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2308 mutex_lock(&sc->mutex); 2293 mutex_lock(&sc->mutex);
2309 cancel_delayed_work_sync(&sc->tx_complete_work); 2294 cancel_delayed_work_sync(&sc->tx_complete_work);
2310 2295
2296 if (ah->ah_flags & AH_UNPLUGGED) {
2297 ath_dbg(common, ATH_DBG_ANY, "Device has been unplugged!\n");
2298 mutex_unlock(&sc->mutex);
2299 return;
2300 }
2301
2311 if (sc->sc_flags & SC_OP_INVALID) { 2302 if (sc->sc_flags & SC_OP_INVALID) {
2312 ath_dbg(common, ATH_DBG_ANY, "Device not present\n"); 2303 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2313 mutex_unlock(&sc->mutex); 2304 mutex_unlock(&sc->mutex);
@@ -2340,9 +2331,11 @@ static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2340 ath9k_ps_wakeup(sc); 2331 ath9k_ps_wakeup(sc);
2341 spin_lock_bh(&sc->sc_pcu_lock); 2332 spin_lock_bh(&sc->sc_pcu_lock);
2342 drain_txq = ath_drain_all_txq(sc, false); 2333 drain_txq = ath_drain_all_txq(sc, false);
2334 spin_unlock_bh(&sc->sc_pcu_lock);
2335
2343 if (!drain_txq) 2336 if (!drain_txq)
2344 ath_reset(sc, false); 2337 ath_reset(sc, false);
2345 spin_unlock_bh(&sc->sc_pcu_lock); 2338
2346 ath9k_ps_restore(sc); 2339 ath9k_ps_restore(sc);
2347 ieee80211_wake_queues(hw); 2340 ieee80211_wake_queues(hw);
2348 2341
@@ -2419,6 +2412,59 @@ static int ath9k_get_stats(struct ieee80211_hw *hw,
2419 return 0; 2412 return 0;
2420} 2413}
2421 2414
2415static u32 fill_chainmask(u32 cap, u32 new)
2416{
2417 u32 filled = 0;
2418 int i;
2419
2420 for (i = 0; cap && new; i++, cap >>= 1) {
2421 if (!(cap & BIT(0)))
2422 continue;
2423
2424 if (new & BIT(0))
2425 filled |= BIT(i);
2426
2427 new >>= 1;
2428 }
2429
2430 return filled;
2431}
2432
2433static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2434{
2435 struct ath_softc *sc = hw->priv;
2436 struct ath_hw *ah = sc->sc_ah;
2437
2438 if (!rx_ant || !tx_ant)
2439 return -EINVAL;
2440
2441 sc->ant_rx = rx_ant;
2442 sc->ant_tx = tx_ant;
2443
2444 if (ah->caps.rx_chainmask == 1)
2445 return 0;
2446
2447 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2448 if (AR_SREV_9100(ah))
2449 ah->rxchainmask = 0x7;
2450 else
2451 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2452
2453 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2454 ath9k_reload_chainmask_settings(sc);
2455
2456 return 0;
2457}
2458
2459static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2460{
2461 struct ath_softc *sc = hw->priv;
2462
2463 *tx_ant = sc->ant_tx;
2464 *rx_ant = sc->ant_rx;
2465 return 0;
2466}
2467
2422struct ieee80211_ops ath9k_ops = { 2468struct ieee80211_ops ath9k_ops = {
2423 .tx = ath9k_tx, 2469 .tx = ath9k_tx,
2424 .start = ath9k_start, 2470 .start = ath9k_start,
@@ -2445,4 +2491,6 @@ struct ieee80211_ops ath9k_ops = {
2445 .tx_frames_pending = ath9k_tx_frames_pending, 2491 .tx_frames_pending = ath9k_tx_frames_pending,
2446 .tx_last_beacon = ath9k_tx_last_beacon, 2492 .tx_last_beacon = ath9k_tx_last_beacon,
2447 .get_stats = ath9k_get_stats, 2493 .get_stats = ath9k_get_stats,
2494 .set_antenna = ath9k_set_antenna,
2495 .get_antenna = ath9k_get_antenna,
2448}; 2496};
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 891661a61513..d67d6eee3954 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -33,6 +33,7 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
33 { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */ 33 { PCI_VDEVICE(ATHEROS, 0x0030) }, /* PCI-E AR9300 */
34 { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */ 34 { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E AR9485 */
35 { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */ 35 { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E AR9580 */
36 { PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9480 */
36 { 0 } 37 { 0 }
37}; 38};
38 39
@@ -332,16 +333,16 @@ static int ath_pci_resume(struct device *device)
332 if ((val & 0x0000ff00) != 0) 333 if ((val & 0x0000ff00) != 0)
333 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); 334 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
334 335
336 ath9k_ps_wakeup(sc);
335 /* Enable LED */ 337 /* Enable LED */
336 ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin, 338 ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
337 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 339 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
338 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1); 340 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
339 341
340 /* 342 /*
341 * Reset key cache to sane defaults (all entries cleared) instead of 343 * Reset key cache to sane defaults (all entries cleared) instead of
342 * semi-random values after suspend/resume. 344 * semi-random values after suspend/resume.
343 */ 345 */
344 ath9k_ps_wakeup(sc);
345 ath9k_cmn_init_crypto(sc->sc_ah); 346 ath9k_cmn_init_crypto(sc->sc_ah);
346 ath9k_ps_restore(sc); 347 ath9k_ps_restore(sc);
347 348
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index 9c7f905f3871..bcc0b222ec18 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -1839,7 +1839,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1839 * If we're asked to flush receive queue, directly 1839 * If we're asked to flush receive queue, directly
1840 * chain it back at the queue without processing it. 1840 * chain it back at the queue without processing it.
1841 */ 1841 */
1842 if (flush) 1842 if (sc->sc_flags & SC_OP_RXFLUSH)
1843 goto requeue_drop_frag; 1843 goto requeue_drop_frag;
1844 1844
1845 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs, 1845 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
@@ -1950,7 +1950,7 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1950 ath_rx_ps(sc, skb); 1950 ath_rx_ps(sc, skb);
1951 spin_unlock_irqrestore(&sc->sc_pm_lock, flags); 1951 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1952 1952
1953 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) 1953 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3)
1954 ath_ant_comb_scan(sc, &rs); 1954 ath_ant_comb_scan(sc, &rs);
1955 1955
1956 ieee80211_rx(hw, skb); 1956 ieee80211_rx(hw, skb);
@@ -1967,7 +1967,8 @@ requeue:
1967 } else { 1967 } else {
1968 list_move_tail(&bf->list, &sc->rx.rxbuf); 1968 list_move_tail(&bf->list, &sc->rx.rxbuf);
1969 ath_rx_buf_link(sc, bf); 1969 ath_rx_buf_link(sc, bf);
1970 ath9k_hw_rxena(ah); 1970 if (!flush)
1971 ath9k_hw_rxena(ah);
1971 } 1972 }
1972 } while (1); 1973 } while (1);
1973 1974
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index 17a272f4d8d6..b76c49d9c503 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -796,14 +796,13 @@
796#define AR_SREV_VERSION_9340 0x300 796#define AR_SREV_VERSION_9340 0x300
797#define AR_SREV_VERSION_9580 0x1C0 797#define AR_SREV_VERSION_9580 0x1C0
798#define AR_SREV_REVISION_9580_10 4 /* AR9580 1.0 */ 798#define AR_SREV_REVISION_9580_10 4 /* AR9580 1.0 */
799#define AR_SREV_VERSION_9480 0x280
800#define AR_SREV_REVISION_9480_10 0
801#define AR_SREV_REVISION_9480_20 2
799 802
800#define AR_SREV_5416(_ah) \ 803#define AR_SREV_5416(_ah) \
801 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \ 804 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
802 ((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE)) 805 ((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE))
803#define AR_SREV_5416_20_OR_LATER(_ah) \
804 (((AR_SREV_5416(_ah)) && \
805 ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_20)) || \
806 ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9100))
807#define AR_SREV_5416_22_OR_LATER(_ah) \ 806#define AR_SREV_5416_22_OR_LATER(_ah) \
808 (((AR_SREV_5416(_ah)) && \ 807 (((AR_SREV_5416(_ah)) && \
809 ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_22)) || \ 808 ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_22)) || \
@@ -896,6 +895,21 @@
896 (AR_SREV_9285_12_OR_LATER(_ah) && \ 895 (AR_SREV_9285_12_OR_LATER(_ah) && \
897 ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) 896 ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1))
898 897
898#define AR_SREV_9480(_ah) \
899 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480))
900
901#define AR_SREV_9480_10(_ah) \
902 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
903 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9480_10))
904
905#define AR_SREV_9480_20(_ah) \
906 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
907 ((_ah)->hw_version.macRev == AR_SREV_REVISION_9480_20))
908
909#define AR_SREV_9480_20_OR_LATER(_ah) \
910 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9480) && \
911 ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9480_20))
912
899#define AR_SREV_9580(_ah) \ 913#define AR_SREV_9580(_ah) \
900 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \ 914 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \
901 ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9580_10)) 915 ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9580_10))
@@ -1132,7 +1146,7 @@ enum {
1132#define AR_INTR_PRIO_ASYNC_ENABLE (AR_SREV_9340(ah) ? 0x4094 : 0x40d4) 1146#define AR_INTR_PRIO_ASYNC_ENABLE (AR_SREV_9340(ah) ? 0x4094 : 0x40d4)
1133#define AR_ENT_OTP 0x40d8 1147#define AR_ENT_OTP 0x40d8
1134#define AR_ENT_OTP_CHAIN2_DISABLE 0x00020000 1148#define AR_ENT_OTP_CHAIN2_DISABLE 0x00020000
1135#define AR_ENT_OTP_MPSD 0x00800000 1149#define AR_ENT_OTP_MIN_PKT_SIZE_DISABLE 0x00800000
1136 1150
1137#define AR_CH0_BB_DPLL1 0x16180 1151#define AR_CH0_BB_DPLL1 0x16180
1138#define AR_CH0_BB_DPLL1_REFDIV 0xF8000000 1152#define AR_CH0_BB_DPLL1_REFDIV 0xF8000000
@@ -1779,6 +1793,7 @@ enum {
1779#define AR_TXOP_12_15 0x81fc 1793#define AR_TXOP_12_15 0x81fc
1780 1794
1781#define AR_NEXT_NDP2_TIMER 0x8180 1795#define AR_NEXT_NDP2_TIMER 0x8180
1796#define AR_GEN_TIMER_BANK_1_LEN 8
1782#define AR_FIRST_NDP_TIMER 7 1797#define AR_FIRST_NDP_TIMER 7
1783#define AR_NDP2_PERIOD 0x81a0 1798#define AR_NDP2_PERIOD 0x81a0
1784#define AR_NDP2_TIMER_MODE 0x81c0 1799#define AR_NDP2_TIMER_MODE 0x81c0
@@ -1867,9 +1882,10 @@ enum {
1867#define AR_PCU_MISC_MODE2_HWWAR2 0x02000000 1882#define AR_PCU_MISC_MODE2_HWWAR2 0x02000000
1868#define AR_PCU_MISC_MODE2_RESERVED2 0xFFFE0000 1883#define AR_PCU_MISC_MODE2_RESERVED2 0xFFFE0000
1869 1884
1870#define AR_MAC_PCU_ASYNC_FIFO_REG3 0x8358 1885#define AR_MAC_PCU_ASYNC_FIFO_REG3 0x8358
1871#define AR_MAC_PCU_ASYNC_FIFO_REG3_DATAPATH_SEL 0x00000400 1886#define AR_MAC_PCU_ASYNC_FIFO_REG3_DATAPATH_SEL 0x00000400
1872#define AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET 0x80000000 1887#define AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET 0x80000000
1888#define AR_MAC_PCU_GEN_TIMER_TSF_SEL 0x83d8
1873 1889
1874 1890
1875#define AR_AES_MUTE_MASK0 0x805c 1891#define AR_AES_MUTE_MASK0 0x805c
@@ -1920,4 +1936,38 @@ enum {
1920#define AR_PHY_AGC_CONTROL_YCOK_MAX 0x000003c0 1936#define AR_PHY_AGC_CONTROL_YCOK_MAX 0x000003c0
1921#define AR_PHY_AGC_CONTROL_YCOK_MAX_S 6 1937#define AR_PHY_AGC_CONTROL_YCOK_MAX_S 6
1922 1938
1939/* MCI Registers */
1940#define AR_MCI_INTERRUPT_RX_MSG_EN 0x183c
1941#define AR_MCI_INTERRUPT_RX_MSG_REMOTE_RESET 0x00000001
1942#define AR_MCI_INTERRUPT_RX_MSG_REMOTE_RESET_S 0
1943#define AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL 0x00000002
1944#define AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL_S 1
1945#define AR_MCI_INTERRUPT_RX_MSG_CONT_NACK 0x00000004
1946#define AR_MCI_INTERRUPT_RX_MSG_CONT_NACK_S 2
1947#define AR_MCI_INTERRUPT_RX_MSG_CONT_INFO 0x00000008
1948#define AR_MCI_INTERRUPT_RX_MSG_CONT_INFO_S 3
1949#define AR_MCI_INTERRUPT_RX_MSG_CONT_RST 0x00000010
1950#define AR_MCI_INTERRUPT_RX_MSG_CONT_RST_S 4
1951#define AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO 0x00000020
1952#define AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO_S 5
1953#define AR_MCI_INTERRUPT_RX_MSG_CPU_INT 0x00000040
1954#define AR_MCI_INTERRUPT_RX_MSG_CPU_INT_S 6
1955#define AR_MCI_INTERRUPT_RX_MSG_GPM 0x00000100
1956#define AR_MCI_INTERRUPT_RX_MSG_GPM_S 8
1957#define AR_MCI_INTERRUPT_RX_MSG_LNA_INFO 0x00000200
1958#define AR_MCI_INTERRUPT_RX_MSG_LNA_INFO_S 9
1959#define AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING 0x00000400
1960#define AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING_S 10
1961#define AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING 0x00000800
1962#define AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING_S 11
1963#define AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE 0x00001000
1964#define AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE_S 12
1965#define AR_MCI_INTERRUPT_RX_HW_MSG_MASK (AR_MCI_INTERRUPT_RX_MSG_SCHD_INFO | \
1966 AR_MCI_INTERRUPT_RX_MSG_LNA_CONTROL| \
1967 AR_MCI_INTERRUPT_RX_MSG_LNA_INFO | \
1968 AR_MCI_INTERRUPT_RX_MSG_CONT_NACK | \
1969 AR_MCI_INTERRUPT_RX_MSG_CONT_INFO | \
1970 AR_MCI_INTERRUPT_RX_MSG_CONT_RST)
1971
1972
1923#endif 1973#endif
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 68066c56e4e5..fa3dcfdf7174 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -56,10 +56,9 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
56 struct ath_tx_status *ts, int txok, int sendbar); 56 struct ath_tx_status *ts, int txok, int sendbar);
57static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, 57static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
58 struct list_head *head, bool internal); 58 struct list_head *head, bool internal);
59static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len);
60static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf, 59static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
61 struct ath_tx_status *ts, int nframes, int nbad, 60 struct ath_tx_status *ts, int nframes, int nbad,
62 int txok, bool update_rc); 61 int txok);
63static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid, 62static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
64 int seqno); 63 int seqno);
65static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc, 64static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
@@ -263,6 +262,7 @@ static void ath_tx_set_retry(struct ath_softc *sc, struct ath_txq *txq,
263 struct sk_buff *skb) 262 struct sk_buff *skb)
264{ 263{
265 struct ath_frame_info *fi = get_frame_info(skb); 264 struct ath_frame_info *fi = get_frame_info(skb);
265 struct ath_buf *bf = fi->bf;
266 struct ieee80211_hdr *hdr; 266 struct ieee80211_hdr *hdr;
267 267
268 TX_STAT_INC(txq->axq_qnum, a_retries); 268 TX_STAT_INC(txq->axq_qnum, a_retries);
@@ -271,6 +271,8 @@ static void ath_tx_set_retry(struct ath_softc *sc, struct ath_txq *txq,
271 271
272 hdr = (struct ieee80211_hdr *)skb->data; 272 hdr = (struct ieee80211_hdr *)skb->data;
273 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY); 273 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY);
274 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
275 sizeof(*hdr), DMA_TO_DEVICE);
274} 276}
275 277
276static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc) 278static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc)
@@ -390,11 +392,9 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
390 while (bf) { 392 while (bf) {
391 bf_next = bf->bf_next; 393 bf_next = bf->bf_next;
392 394
393 bf->bf_state.bf_type |= BUF_XRETRY;
394 if (!bf->bf_stale || bf_next != NULL) 395 if (!bf->bf_stale || bf_next != NULL)
395 list_move_tail(&bf->list, &bf_head); 396 list_move_tail(&bf->list, &bf_head);
396 397
397 ath_tx_rc_status(sc, bf, ts, 1, 1, 0, false);
398 ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, 398 ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
399 0, 0); 399 0, 0);
400 400
@@ -470,7 +470,6 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
470 clear_filter = true; 470 clear_filter = true;
471 txpending = 1; 471 txpending = 1;
472 } else { 472 } else {
473 bf->bf_state.bf_type |= BUF_XRETRY;
474 txfail = 1; 473 txfail = 1;
475 sendbar = 1; 474 sendbar = 1;
476 txfail_cnt++; 475 txfail_cnt++;
@@ -497,17 +496,14 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
497 496
498 if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) { 497 if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) {
499 memcpy(tx_info->control.rates, rates, sizeof(rates)); 498 memcpy(tx_info->control.rates, rates, sizeof(rates));
500 ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok, true); 499 ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok);
501 rc_update = false; 500 rc_update = false;
502 } else {
503 ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok, false);
504 } 501 }
505 502
506 ath_tx_complete_buf(sc, bf, txq, &bf_head, ts, 503 ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
507 !txfail, sendbar); 504 !txfail, sendbar);
508 } else { 505 } else {
509 /* retry the un-acked ones */ 506 /* retry the un-acked ones */
510 ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, false);
511 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) { 507 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
512 if (bf->bf_next == NULL && bf_last->bf_stale) { 508 if (bf->bf_next == NULL && bf_last->bf_stale) {
513 struct ath_buf *tbf; 509 struct ath_buf *tbf;
@@ -523,26 +519,13 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
523 ath_tx_update_baw(sc, tid, seqno); 519 ath_tx_update_baw(sc, tid, seqno);
524 spin_unlock_bh(&txq->axq_lock); 520 spin_unlock_bh(&txq->axq_lock);
525 521
526 bf->bf_state.bf_type |=
527 BUF_XRETRY;
528 ath_tx_rc_status(sc, bf, ts, nframes,
529 nbad, 0, false);
530 ath_tx_complete_buf(sc, bf, txq, 522 ath_tx_complete_buf(sc, bf, txq,
531 &bf_head, 523 &bf_head,
532 ts, 0, 0); 524 ts, 0, 1);
533 break; 525 break;
534 } 526 }
535 527
536 ath9k_hw_cleartxdesc(sc->sc_ah,
537 tbf->bf_desc);
538 fi->bf = tbf; 528 fi->bf = tbf;
539 } else {
540 /*
541 * Clear descriptor status words for
542 * software retry
543 */
544 ath9k_hw_cleartxdesc(sc->sc_ah,
545 bf->bf_desc);
546 } 529 }
547 } 530 }
548 531
@@ -582,7 +565,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
582 rcu_read_unlock(); 565 rcu_read_unlock();
583 566
584 if (needreset) 567 if (needreset)
585 ath_reset(sc, false); 568 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
586} 569}
587 570
588static bool ath_lookup_legacy(struct ath_buf *bf) 571static bool ath_lookup_legacy(struct ath_buf *bf)
@@ -709,7 +692,8 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
709 * Add delimiter when using RTS/CTS with aggregation 692 * Add delimiter when using RTS/CTS with aggregation
710 * and non enterprise AR9003 card 693 * and non enterprise AR9003 card
711 */ 694 */
712 if (first_subfrm) 695 if (first_subfrm && !AR_SREV_9580_10_OR_LATER(sc->sc_ah) &&
696 (sc->sc_ah->ent_mode & AR_ENT_OTP_MIN_PKT_SIZE_DISABLE))
713 ndelim = max(ndelim, FIRST_DESC_NDELIMS); 697 ndelim = max(ndelim, FIRST_DESC_NDELIMS);
714 698
715 /* 699 /*
@@ -777,7 +761,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
777 if (!bf) 761 if (!bf)
778 continue; 762 continue;
779 763
780 bf->bf_state.bf_type |= BUF_AMPDU; 764 bf->bf_state.bf_type = BUF_AMPDU | BUF_AGGR;
781 seqno = bf->bf_state.seqno; 765 seqno = bf->bf_state.seqno;
782 if (!bf_first) 766 if (!bf_first)
783 bf_first = bf; 767 bf_first = bf;
@@ -804,8 +788,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
804 } 788 }
805 789
806 tx_info = IEEE80211_SKB_CB(bf->bf_mpdu); 790 tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
807 if (nframes && ((tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) || 791 if (nframes && (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
808 !(tx_info->control.rates[0].flags & IEEE80211_TX_RC_MCS)))
809 break; 792 break;
810 793
811 /* do not exceed subframe limit */ 794 /* do not exceed subframe limit */
@@ -827,20 +810,17 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
827 810
828 nframes++; 811 nframes++;
829 bf->bf_next = NULL; 812 bf->bf_next = NULL;
830 ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0);
831 813
832 /* link buffers of this frame to the aggregate */ 814 /* link buffers of this frame to the aggregate */
833 if (!fi->retries) 815 if (!fi->retries)
834 ath_tx_addto_baw(sc, tid, seqno); 816 ath_tx_addto_baw(sc, tid, seqno);
835 ath9k_hw_set11n_aggr_middle(sc->sc_ah, bf->bf_desc, ndelim); 817 bf->bf_state.ndelim = ndelim;
836 818
837 __skb_unlink(skb, &tid->buf_q); 819 __skb_unlink(skb, &tid->buf_q);
838 list_add_tail(&bf->list, bf_q); 820 list_add_tail(&bf->list, bf_q);
839 if (bf_prev) { 821 if (bf_prev)
840 bf_prev->bf_next = bf; 822 bf_prev->bf_next = bf;
841 ath9k_hw_set_desc_link(sc->sc_ah, bf_prev->bf_desc, 823
842 bf->bf_daddr);
843 }
844 bf_prev = bf; 824 bf_prev = bf;
845 825
846 } while (!skb_queue_empty(&tid->buf_q)); 826 } while (!skb_queue_empty(&tid->buf_q));
@@ -851,12 +831,231 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc,
851#undef PADBYTES 831#undef PADBYTES
852} 832}
853 833
834/*
835 * rix - rate index
836 * pktlen - total bytes (delims + data + fcs + pads + pad delims)
837 * width - 0 for 20 MHz, 1 for 40 MHz
838 * half_gi - to use 4us v/s 3.6 us for symbol time
839 */
840static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
841 int width, int half_gi, bool shortPreamble)
842{
843 u32 nbits, nsymbits, duration, nsymbols;
844 int streams;
845
846 /* find number of symbols: PLCP + data */
847 streams = HT_RC_2_STREAMS(rix);
848 nbits = (pktlen << 3) + OFDM_PLCP_BITS;
849 nsymbits = bits_per_symbol[rix % 8][width] * streams;
850 nsymbols = (nbits + nsymbits - 1) / nsymbits;
851
852 if (!half_gi)
853 duration = SYMBOL_TIME(nsymbols);
854 else
855 duration = SYMBOL_TIME_HALFGI(nsymbols);
856
857 /* addup duration for legacy/ht training and signal fields */
858 duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
859
860 return duration;
861}
862
863static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
864 struct ath_tx_info *info, int len)
865{
866 struct ath_hw *ah = sc->sc_ah;
867 struct sk_buff *skb;
868 struct ieee80211_tx_info *tx_info;
869 struct ieee80211_tx_rate *rates;
870 const struct ieee80211_rate *rate;
871 struct ieee80211_hdr *hdr;
872 int i;
873 u8 rix = 0;
874
875 skb = bf->bf_mpdu;
876 tx_info = IEEE80211_SKB_CB(skb);
877 rates = tx_info->control.rates;
878 hdr = (struct ieee80211_hdr *)skb->data;
879
880 /* set dur_update_en for l-sig computation except for PS-Poll frames */
881 info->dur_update = !ieee80211_is_pspoll(hdr->frame_control);
882
883 /*
884 * We check if Short Preamble is needed for the CTS rate by
885 * checking the BSS's global flag.
886 * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
887 */
888 rate = ieee80211_get_rts_cts_rate(sc->hw, tx_info);
889 info->rtscts_rate = rate->hw_value;
890 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
891 info->rtscts_rate |= rate->hw_value_short;
892
893 for (i = 0; i < 4; i++) {
894 bool is_40, is_sgi, is_sp;
895 int phy;
896
897 if (!rates[i].count || (rates[i].idx < 0))
898 continue;
899
900 rix = rates[i].idx;
901 info->rates[i].Tries = rates[i].count;
902
903 if (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
904 info->rates[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
905 info->flags |= ATH9K_TXDESC_RTSENA;
906 } else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
907 info->rates[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
908 info->flags |= ATH9K_TXDESC_CTSENA;
909 }
910
911 if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
912 info->rates[i].RateFlags |= ATH9K_RATESERIES_2040;
913 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
914 info->rates[i].RateFlags |= ATH9K_RATESERIES_HALFGI;
915
916 is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI);
917 is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
918 is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE);
919
920 if (rates[i].flags & IEEE80211_TX_RC_MCS) {
921 /* MCS rates */
922 info->rates[i].Rate = rix | 0x80;
923 info->rates[i].ChSel = ath_txchainmask_reduction(sc,
924 ah->txchainmask, info->rates[i].Rate);
925 info->rates[i].PktDuration = ath_pkt_duration(sc, rix, len,
926 is_40, is_sgi, is_sp);
927 if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC))
928 info->rates[i].RateFlags |= ATH9K_RATESERIES_STBC;
929 continue;
930 }
931
932 /* legacy rates */
933 if ((tx_info->band == IEEE80211_BAND_2GHZ) &&
934 !(rate->flags & IEEE80211_RATE_ERP_G))
935 phy = WLAN_RC_PHY_CCK;
936 else
937 phy = WLAN_RC_PHY_OFDM;
938
939 rate = &sc->sbands[tx_info->band].bitrates[rates[i].idx];
940 info->rates[i].Rate = rate->hw_value;
941 if (rate->hw_value_short) {
942 if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
943 info->rates[i].Rate |= rate->hw_value_short;
944 } else {
945 is_sp = false;
946 }
947
948 if (bf->bf_state.bfs_paprd)
949 info->rates[i].ChSel = ah->txchainmask;
950 else
951 info->rates[i].ChSel = ath_txchainmask_reduction(sc,
952 ah->txchainmask, info->rates[i].Rate);
953
954 info->rates[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
955 phy, rate->bitrate * 100, len, rix, is_sp);
956 }
957
958 /* For AR5416 - RTS cannot be followed by a frame larger than 8K */
959 if (bf_isaggr(bf) && (len > sc->sc_ah->caps.rts_aggr_limit))
960 info->flags &= ~ATH9K_TXDESC_RTSENA;
961
962 /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
963 if (info->flags & ATH9K_TXDESC_RTSENA)
964 info->flags &= ~ATH9K_TXDESC_CTSENA;
965}
966
967static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
968{
969 struct ieee80211_hdr *hdr;
970 enum ath9k_pkt_type htype;
971 __le16 fc;
972
973 hdr = (struct ieee80211_hdr *)skb->data;
974 fc = hdr->frame_control;
975
976 if (ieee80211_is_beacon(fc))
977 htype = ATH9K_PKT_TYPE_BEACON;
978 else if (ieee80211_is_probe_resp(fc))
979 htype = ATH9K_PKT_TYPE_PROBE_RESP;
980 else if (ieee80211_is_atim(fc))
981 htype = ATH9K_PKT_TYPE_ATIM;
982 else if (ieee80211_is_pspoll(fc))
983 htype = ATH9K_PKT_TYPE_PSPOLL;
984 else
985 htype = ATH9K_PKT_TYPE_NORMAL;
986
987 return htype;
988}
989
990static void ath_tx_fill_desc(struct ath_softc *sc, struct ath_buf *bf,
991 struct ath_txq *txq, int len)
992{
993 struct ath_hw *ah = sc->sc_ah;
994 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
995 struct ath_buf *bf_first = bf;
996 struct ath_tx_info info;
997 bool aggr = !!(bf->bf_state.bf_type & BUF_AGGR);
998
999 memset(&info, 0, sizeof(info));
1000 info.is_first = true;
1001 info.is_last = true;
1002 info.txpower = MAX_RATE_POWER;
1003 info.qcu = txq->axq_qnum;
1004
1005 info.flags = ATH9K_TXDESC_INTREQ;
1006 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
1007 info.flags |= ATH9K_TXDESC_NOACK;
1008 if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
1009 info.flags |= ATH9K_TXDESC_LDPC;
1010
1011 ath_buf_set_rate(sc, bf, &info, len);
1012
1013 if (tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
1014 info.flags |= ATH9K_TXDESC_CLRDMASK;
1015
1016 if (bf->bf_state.bfs_paprd)
1017 info.flags |= (u32) bf->bf_state.bfs_paprd << ATH9K_TXDESC_PAPRD_S;
1018
1019
1020 while (bf) {
1021 struct sk_buff *skb = bf->bf_mpdu;
1022 struct ath_frame_info *fi = get_frame_info(skb);
1023
1024 info.type = get_hw_packet_type(skb);
1025 if (bf->bf_next)
1026 info.link = bf->bf_next->bf_daddr;
1027 else
1028 info.link = 0;
1029
1030 info.buf_addr[0] = bf->bf_buf_addr;
1031 info.buf_len[0] = skb->len;
1032 info.pkt_len = fi->framelen;
1033 info.keyix = fi->keyix;
1034 info.keytype = fi->keytype;
1035
1036 if (aggr) {
1037 if (bf == bf_first)
1038 info.aggr = AGGR_BUF_FIRST;
1039 else if (!bf->bf_next)
1040 info.aggr = AGGR_BUF_LAST;
1041 else
1042 info.aggr = AGGR_BUF_MIDDLE;
1043
1044 info.ndelim = bf->bf_state.ndelim;
1045 info.aggr_len = len;
1046 }
1047
1048 ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
1049 bf = bf->bf_next;
1050 }
1051}
1052
854static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq, 1053static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
855 struct ath_atx_tid *tid) 1054 struct ath_atx_tid *tid)
856{ 1055{
857 struct ath_buf *bf; 1056 struct ath_buf *bf;
858 enum ATH_AGGR_STATUS status; 1057 enum ATH_AGGR_STATUS status;
859 struct ath_frame_info *fi; 1058 struct ieee80211_tx_info *tx_info;
860 struct list_head bf_q; 1059 struct list_head bf_q;
861 int aggr_len; 1060 int aggr_len;
862 1061
@@ -877,34 +1076,25 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
877 1076
878 bf = list_first_entry(&bf_q, struct ath_buf, list); 1077 bf = list_first_entry(&bf_q, struct ath_buf, list);
879 bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list); 1078 bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list);
1079 tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
880 1080
881 if (tid->ac->clear_ps_filter) { 1081 if (tid->ac->clear_ps_filter) {
882 tid->ac->clear_ps_filter = false; 1082 tid->ac->clear_ps_filter = false;
883 ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, true); 1083 tx_info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT;
1084 } else {
1085 tx_info->flags &= ~IEEE80211_TX_CTL_CLEAR_PS_FILT;
884 } 1086 }
885 1087
886 /* if only one frame, send as non-aggregate */ 1088 /* if only one frame, send as non-aggregate */
887 if (bf == bf->bf_lastbf) { 1089 if (bf == bf->bf_lastbf) {
888 fi = get_frame_info(bf->bf_mpdu); 1090 aggr_len = get_frame_info(bf->bf_mpdu)->framelen;
889 1091 bf->bf_state.bf_type = BUF_AMPDU;
890 bf->bf_state.bf_type &= ~BUF_AGGR; 1092 } else {
891 ath9k_hw_clr11n_aggr(sc->sc_ah, bf->bf_desc); 1093 TX_STAT_INC(txq->axq_qnum, a_aggr);
892 ath_buf_set_rate(sc, bf, fi->framelen);
893 ath_tx_txqaddbuf(sc, txq, &bf_q, false);
894 continue;
895 } 1094 }
896 1095
897 /* setup first desc of aggregate */ 1096 ath_tx_fill_desc(sc, bf, txq, aggr_len);
898 bf->bf_state.bf_type |= BUF_AGGR;
899 ath_buf_set_rate(sc, bf, aggr_len);
900 ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, aggr_len);
901
902 /* anchor last desc of aggregate */
903 ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc);
904
905 ath_tx_txqaddbuf(sc, txq, &bf_q, false); 1097 ath_tx_txqaddbuf(sc, txq, &bf_q, false);
906 TX_STAT_INC(txq->axq_qnum, a_aggr);
907
908 } while (txq->axq_ampdu_depth < ATH_AGGR_MIN_QDEPTH && 1098 } while (txq->axq_ampdu_depth < ATH_AGGR_MIN_QDEPTH &&
909 status != ATH_AGGR_BAW_CLOSED); 1099 status != ATH_AGGR_BAW_CLOSED);
910} 1100}
@@ -1332,7 +1522,7 @@ void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
1332 struct ath_atx_ac *ac, *ac_tmp, *last_ac; 1522 struct ath_atx_ac *ac, *ac_tmp, *last_ac;
1333 struct ath_atx_tid *tid, *last_tid; 1523 struct ath_atx_tid *tid, *last_tid;
1334 1524
1335 if (list_empty(&txq->axq_acq) || 1525 if (work_pending(&sc->hw_reset_work) || list_empty(&txq->axq_acq) ||
1336 txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) 1526 txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH)
1337 return; 1527 return;
1338 1528
@@ -1482,7 +1672,7 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
1482 if (!bf) 1672 if (!bf)
1483 return; 1673 return;
1484 1674
1485 bf->bf_state.bf_type |= BUF_AMPDU; 1675 bf->bf_state.bf_type = BUF_AMPDU;
1486 INIT_LIST_HEAD(&bf_head); 1676 INIT_LIST_HEAD(&bf_head);
1487 list_add(&bf->list, &bf_head); 1677 list_add(&bf->list, &bf_head);
1488 1678
@@ -1492,7 +1682,7 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
1492 /* Queue to h/w without aggregation */ 1682 /* Queue to h/w without aggregation */
1493 TX_STAT_INC(txctl->txq->axq_qnum, a_queued_hw); 1683 TX_STAT_INC(txctl->txq->axq_qnum, a_queued_hw);
1494 bf->bf_lastbf = bf; 1684 bf->bf_lastbf = bf;
1495 ath_buf_set_rate(sc, bf, fi->framelen); 1685 ath_tx_fill_desc(sc, bf, txctl->txq, fi->framelen);
1496 ath_tx_txqaddbuf(sc, txctl->txq, &bf_head, false); 1686 ath_tx_txqaddbuf(sc, txctl->txq, &bf_head, false);
1497} 1687}
1498 1688
@@ -1512,41 +1702,18 @@ static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
1512 1702
1513 INIT_LIST_HEAD(&bf_head); 1703 INIT_LIST_HEAD(&bf_head);
1514 list_add_tail(&bf->list, &bf_head); 1704 list_add_tail(&bf->list, &bf_head);
1515 bf->bf_state.bf_type &= ~BUF_AMPDU; 1705 bf->bf_state.bf_type = 0;
1516 1706
1517 /* update starting sequence number for subsequent ADDBA request */ 1707 /* update starting sequence number for subsequent ADDBA request */
1518 if (tid) 1708 if (tid)
1519 INCR(tid->seq_start, IEEE80211_SEQ_MAX); 1709 INCR(tid->seq_start, IEEE80211_SEQ_MAX);
1520 1710
1521 bf->bf_lastbf = bf; 1711 bf->bf_lastbf = bf;
1522 ath_buf_set_rate(sc, bf, fi->framelen); 1712 ath_tx_fill_desc(sc, bf, txq, fi->framelen);
1523 ath_tx_txqaddbuf(sc, txq, &bf_head, false); 1713 ath_tx_txqaddbuf(sc, txq, &bf_head, false);
1524 TX_STAT_INC(txq->axq_qnum, queued); 1714 TX_STAT_INC(txq->axq_qnum, queued);
1525} 1715}
1526 1716
1527static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
1528{
1529 struct ieee80211_hdr *hdr;
1530 enum ath9k_pkt_type htype;
1531 __le16 fc;
1532
1533 hdr = (struct ieee80211_hdr *)skb->data;
1534 fc = hdr->frame_control;
1535
1536 if (ieee80211_is_beacon(fc))
1537 htype = ATH9K_PKT_TYPE_BEACON;
1538 else if (ieee80211_is_probe_resp(fc))
1539 htype = ATH9K_PKT_TYPE_PROBE_RESP;
1540 else if (ieee80211_is_atim(fc))
1541 htype = ATH9K_PKT_TYPE_ATIM;
1542 else if (ieee80211_is_pspoll(fc))
1543 htype = ATH9K_PKT_TYPE_PSPOLL;
1544 else
1545 htype = ATH9K_PKT_TYPE_NORMAL;
1546
1547 return htype;
1548}
1549
1550static void setup_frame_info(struct ieee80211_hw *hw, struct sk_buff *skb, 1717static void setup_frame_info(struct ieee80211_hw *hw, struct sk_buff *skb,
1551 int framelen) 1718 int framelen)
1552{ 1719{
@@ -1574,51 +1741,6 @@ static void setup_frame_info(struct ieee80211_hw *hw, struct sk_buff *skb,
1574 fi->framelen = framelen; 1741 fi->framelen = framelen;
1575} 1742}
1576 1743
1577static int setup_tx_flags(struct sk_buff *skb)
1578{
1579 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1580 int flags = 0;
1581
1582 flags |= ATH9K_TXDESC_INTREQ;
1583
1584 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
1585 flags |= ATH9K_TXDESC_NOACK;
1586
1587 if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
1588 flags |= ATH9K_TXDESC_LDPC;
1589
1590 return flags;
1591}
1592
1593/*
1594 * rix - rate index
1595 * pktlen - total bytes (delims + data + fcs + pads + pad delims)
1596 * width - 0 for 20 MHz, 1 for 40 MHz
1597 * half_gi - to use 4us v/s 3.6 us for symbol time
1598 */
1599static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
1600 int width, int half_gi, bool shortPreamble)
1601{
1602 u32 nbits, nsymbits, duration, nsymbols;
1603 int streams;
1604
1605 /* find number of symbols: PLCP + data */
1606 streams = HT_RC_2_STREAMS(rix);
1607 nbits = (pktlen << 3) + OFDM_PLCP_BITS;
1608 nsymbits = bits_per_symbol[rix % 8][width] * streams;
1609 nsymbols = (nbits + nsymbits - 1) / nsymbits;
1610
1611 if (!half_gi)
1612 duration = SYMBOL_TIME(nsymbols);
1613 else
1614 duration = SYMBOL_TIME_HALFGI(nsymbols);
1615
1616 /* addup duration for legacy/ht training and signal fields */
1617 duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
1618
1619 return duration;
1620}
1621
1622u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate) 1744u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate)
1623{ 1745{
1624 struct ath_hw *ah = sc->sc_ah; 1746 struct ath_hw *ah = sc->sc_ah;
@@ -1631,118 +1753,6 @@ u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate)
1631 return chainmask; 1753 return chainmask;
1632} 1754}
1633 1755
1634static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len)
1635{
1636 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1637 struct ath9k_11n_rate_series series[4];
1638 struct sk_buff *skb;
1639 struct ieee80211_tx_info *tx_info;
1640 struct ieee80211_tx_rate *rates;
1641 const struct ieee80211_rate *rate;
1642 struct ieee80211_hdr *hdr;
1643 int i, flags = 0;
1644 u8 rix = 0, ctsrate = 0;
1645 bool is_pspoll;
1646
1647 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
1648
1649 skb = bf->bf_mpdu;
1650 tx_info = IEEE80211_SKB_CB(skb);
1651 rates = tx_info->control.rates;
1652 hdr = (struct ieee80211_hdr *)skb->data;
1653 is_pspoll = ieee80211_is_pspoll(hdr->frame_control);
1654
1655 /*
1656 * We check if Short Preamble is needed for the CTS rate by
1657 * checking the BSS's global flag.
1658 * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
1659 */
1660 rate = ieee80211_get_rts_cts_rate(sc->hw, tx_info);
1661 ctsrate = rate->hw_value;
1662 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
1663 ctsrate |= rate->hw_value_short;
1664
1665 for (i = 0; i < 4; i++) {
1666 bool is_40, is_sgi, is_sp;
1667 int phy;
1668
1669 if (!rates[i].count || (rates[i].idx < 0))
1670 continue;
1671
1672 rix = rates[i].idx;
1673 series[i].Tries = rates[i].count;
1674
1675 if (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
1676 series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
1677 flags |= ATH9K_TXDESC_RTSENA;
1678 } else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
1679 series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
1680 flags |= ATH9K_TXDESC_CTSENA;
1681 }
1682
1683 if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
1684 series[i].RateFlags |= ATH9K_RATESERIES_2040;
1685 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
1686 series[i].RateFlags |= ATH9K_RATESERIES_HALFGI;
1687
1688 is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI);
1689 is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
1690 is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE);
1691
1692 if (rates[i].flags & IEEE80211_TX_RC_MCS) {
1693 /* MCS rates */
1694 series[i].Rate = rix | 0x80;
1695 series[i].ChSel = ath_txchainmask_reduction(sc,
1696 common->tx_chainmask, series[i].Rate);
1697 series[i].PktDuration = ath_pkt_duration(sc, rix, len,
1698 is_40, is_sgi, is_sp);
1699 if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC))
1700 series[i].RateFlags |= ATH9K_RATESERIES_STBC;
1701 continue;
1702 }
1703
1704 /* legacy rates */
1705 if ((tx_info->band == IEEE80211_BAND_2GHZ) &&
1706 !(rate->flags & IEEE80211_RATE_ERP_G))
1707 phy = WLAN_RC_PHY_CCK;
1708 else
1709 phy = WLAN_RC_PHY_OFDM;
1710
1711 rate = &sc->sbands[tx_info->band].bitrates[rates[i].idx];
1712 series[i].Rate = rate->hw_value;
1713 if (rate->hw_value_short) {
1714 if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
1715 series[i].Rate |= rate->hw_value_short;
1716 } else {
1717 is_sp = false;
1718 }
1719
1720 if (bf->bf_state.bfs_paprd)
1721 series[i].ChSel = common->tx_chainmask;
1722 else
1723 series[i].ChSel = ath_txchainmask_reduction(sc,
1724 common->tx_chainmask, series[i].Rate);
1725
1726 series[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
1727 phy, rate->bitrate * 100, len, rix, is_sp);
1728 }
1729
1730 /* For AR5416 - RTS cannot be followed by a frame larger than 8K */
1731 if (bf_isaggr(bf) && (len > sc->sc_ah->caps.rts_aggr_limit))
1732 flags &= ~ATH9K_TXDESC_RTSENA;
1733
1734 /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
1735 if (flags & ATH9K_TXDESC_RTSENA)
1736 flags &= ~ATH9K_TXDESC_CTSENA;
1737
1738 /* set dur_update_en for l-sig computation except for PS-Poll frames */
1739 ath9k_hw_set11n_ratescenario(sc->sc_ah, bf->bf_desc,
1740 bf->bf_lastbf->bf_desc,
1741 !is_pspoll, ctsrate,
1742 0, series, 4, flags);
1743
1744}
1745
1746/* 1756/*
1747 * Assign a descriptor (and sequence number if necessary, 1757 * Assign a descriptor (and sequence number if necessary,
1748 * and map buffer for DMA. Frees skb on error 1758 * and map buffer for DMA. Frees skb on error
@@ -1752,13 +1762,10 @@ static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
1752 struct ath_atx_tid *tid, 1762 struct ath_atx_tid *tid,
1753 struct sk_buff *skb) 1763 struct sk_buff *skb)
1754{ 1764{
1755 struct ath_hw *ah = sc->sc_ah;
1756 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1765 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1757 struct ath_frame_info *fi = get_frame_info(skb); 1766 struct ath_frame_info *fi = get_frame_info(skb);
1758 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1767 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1759 struct ath_buf *bf; 1768 struct ath_buf *bf;
1760 struct ath_desc *ds;
1761 int frm_type;
1762 u16 seqno; 1769 u16 seqno;
1763 1770
1764 bf = ath_tx_get_buffer(sc); 1771 bf = ath_tx_get_buffer(sc);
@@ -1776,7 +1783,6 @@ static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
1776 bf->bf_state.seqno = seqno; 1783 bf->bf_state.seqno = seqno;
1777 } 1784 }
1778 1785
1779 bf->bf_flags = setup_tx_flags(skb);
1780 bf->bf_mpdu = skb; 1786 bf->bf_mpdu = skb;
1781 1787
1782 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, 1788 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
@@ -1790,22 +1796,6 @@ static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
1790 goto error; 1796 goto error;
1791 } 1797 }
1792 1798
1793 frm_type = get_hw_packet_type(skb);
1794
1795 ds = bf->bf_desc;
1796 ath9k_hw_set_desc_link(ah, ds, 0);
1797
1798 ath9k_hw_set11n_txdesc(ah, ds, fi->framelen, frm_type, MAX_RATE_POWER,
1799 fi->keyix, fi->keytype, bf->bf_flags);
1800
1801 ath9k_hw_filltxdesc(ah, ds,
1802 skb->len, /* segment length */
1803 true, /* first segment */
1804 true, /* last segment */
1805 ds, /* first descriptor */
1806 bf->bf_buf_addr,
1807 txq->axq_qnum);
1808
1809 fi->bf = bf; 1799 fi->bf = bf;
1810 1800
1811 return bf; 1801 return bf;
@@ -1848,16 +1838,9 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct sk_buff *skb,
1848 1838
1849 bf->bf_state.bfs_paprd = txctl->paprd; 1839 bf->bf_state.bfs_paprd = txctl->paprd;
1850 1840
1851 if (bf->bf_state.bfs_paprd)
1852 ar9003_hw_set_paprd_txdesc(sc->sc_ah, bf->bf_desc,
1853 bf->bf_state.bfs_paprd);
1854
1855 if (txctl->paprd) 1841 if (txctl->paprd)
1856 bf->bf_state.bfs_paprd_timestamp = jiffies; 1842 bf->bf_state.bfs_paprd_timestamp = jiffies;
1857 1843
1858 if (tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
1859 ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, true);
1860
1861 ath_tx_send_normal(sc, txctl->txq, tid, skb); 1844 ath_tx_send_normal(sc, txctl->txq, tid, skb);
1862 } 1845 }
1863 1846
@@ -1907,6 +1890,7 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
1907 1890
1908 skb_push(skb, padsize); 1891 skb_push(skb, padsize);
1909 memmove(skb->data, skb->data + padsize, padpos); 1892 memmove(skb->data, skb->data + padsize, padpos);
1893 hdr = (struct ieee80211_hdr *) skb->data;
1910 } 1894 }
1911 1895
1912 if ((vif && vif->type != NL80211_IFTYPE_AP && 1896 if ((vif && vif->type != NL80211_IFTYPE_AP &&
@@ -1952,10 +1936,9 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1952 if (tx_flags & ATH_TX_BAR) 1936 if (tx_flags & ATH_TX_BAR)
1953 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK; 1937 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1954 1938
1955 if (!(tx_flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) { 1939 if (!(tx_flags & ATH_TX_ERROR))
1956 /* Frame was ACKed */ 1940 /* Frame was ACKed */
1957 tx_info->flags |= IEEE80211_TX_STAT_ACK; 1941 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1958 }
1959 1942
1960 padpos = ath9k_cmn_padpos(hdr->frame_control); 1943 padpos = ath9k_cmn_padpos(hdr->frame_control);
1961 padsize = padpos & 3; 1944 padsize = padpos & 3;
@@ -1999,18 +1982,18 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
1999 struct ath_tx_status *ts, int txok, int sendbar) 1982 struct ath_tx_status *ts, int txok, int sendbar)
2000{ 1983{
2001 struct sk_buff *skb = bf->bf_mpdu; 1984 struct sk_buff *skb = bf->bf_mpdu;
1985 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
2002 unsigned long flags; 1986 unsigned long flags;
2003 int tx_flags = 0; 1987 int tx_flags = 0;
2004 1988
2005 if (sendbar) 1989 if (sendbar)
2006 tx_flags = ATH_TX_BAR; 1990 tx_flags = ATH_TX_BAR;
2007 1991
2008 if (!txok) { 1992 if (!txok)
2009 tx_flags |= ATH_TX_ERROR; 1993 tx_flags |= ATH_TX_ERROR;
2010 1994
2011 if (bf_isxretried(bf)) 1995 if (ts->ts_status & ATH9K_TXERR_FILT)
2012 tx_flags |= ATH_TX_XRETRY; 1996 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
2013 }
2014 1997
2015 dma_unmap_single(sc->dev, bf->bf_buf_addr, skb->len, DMA_TO_DEVICE); 1998 dma_unmap_single(sc->dev, bf->bf_buf_addr, skb->len, DMA_TO_DEVICE);
2016 bf->bf_buf_addr = 0; 1999 bf->bf_buf_addr = 0;
@@ -2023,7 +2006,7 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
2023 else 2006 else
2024 complete(&sc->paprd_complete); 2007 complete(&sc->paprd_complete);
2025 } else { 2008 } else {
2026 ath_debug_stat_tx(sc, bf, ts, txq); 2009 ath_debug_stat_tx(sc, bf, ts, txq, tx_flags);
2027 ath_tx_complete(sc, skb, tx_flags, txq); 2010 ath_tx_complete(sc, skb, tx_flags, txq);
2028 } 2011 }
2029 /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't 2012 /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't
@@ -2041,7 +2024,7 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
2041 2024
2042static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf, 2025static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
2043 struct ath_tx_status *ts, int nframes, int nbad, 2026 struct ath_tx_status *ts, int nframes, int nbad,
2044 int txok, bool update_rc) 2027 int txok)
2045{ 2028{
2046 struct sk_buff *skb = bf->bf_mpdu; 2029 struct sk_buff *skb = bf->bf_mpdu;
2047 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 2030 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
@@ -2056,9 +2039,7 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
2056 tx_rateindex = ts->ts_rateindex; 2039 tx_rateindex = ts->ts_rateindex;
2057 WARN_ON(tx_rateindex >= hw->max_rates); 2040 WARN_ON(tx_rateindex >= hw->max_rates);
2058 2041
2059 if (ts->ts_status & ATH9K_TXERR_FILT) 2042 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
2060 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
2061 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc) {
2062 tx_info->flags |= IEEE80211_TX_STAT_AMPDU; 2043 tx_info->flags |= IEEE80211_TX_STAT_AMPDU;
2063 2044
2064 BUG_ON(nbad > nframes); 2045 BUG_ON(nbad > nframes);
@@ -2068,7 +2049,7 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
2068 } 2049 }
2069 2050
2070 if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 && 2051 if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 &&
2071 (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) { 2052 (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) == 0) {
2072 /* 2053 /*
2073 * If an underrun error is seen assume it as an excessive 2054 * If an underrun error is seen assume it as an excessive
2074 * retry only if max frame trigger level has been reached 2055 * retry only if max frame trigger level has been reached
@@ -2081,9 +2062,9 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
2081 * successfully by eventually preferring slower rates. 2062 * successfully by eventually preferring slower rates.
2082 * This itself should also alleviate congestion on the bus. 2063 * This itself should also alleviate congestion on the bus.
2083 */ 2064 */
2084 if (ieee80211_is_data(hdr->frame_control) && 2065 if (unlikely(ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN |
2085 (ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN | 2066 ATH9K_TX_DELIM_UNDERRUN)) &&
2086 ATH9K_TX_DELIM_UNDERRUN)) && 2067 ieee80211_is_data(hdr->frame_control) &&
2087 ah->tx_trig_level >= sc->sc_ah->config.max_txtrig_level) 2068 ah->tx_trig_level >= sc->sc_ah->config.max_txtrig_level)
2088 tx_info->status.rates[tx_rateindex].count = 2069 tx_info->status.rates[tx_rateindex].count =
2089 hw->max_rate_tries; 2070 hw->max_rate_tries;
@@ -2114,13 +2095,7 @@ static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
2114 spin_unlock_bh(&txq->axq_lock); 2095 spin_unlock_bh(&txq->axq_lock);
2115 2096
2116 if (!bf_isampdu(bf)) { 2097 if (!bf_isampdu(bf)) {
2117 /* 2098 ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
2118 * This frame is sent out as a single frame.
2119 * Use hardware retry status for this frame.
2120 */
2121 if (ts->ts_status & ATH9K_TXERR_XRETRY)
2122 bf->bf_state.bf_type |= BUF_XRETRY;
2123 ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok, true);
2124 ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok, 0); 2099 ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok, 0);
2125 } else 2100 } else
2126 ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true); 2101 ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
@@ -2147,6 +2122,9 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
2147 2122
2148 spin_lock_bh(&txq->axq_lock); 2123 spin_lock_bh(&txq->axq_lock);
2149 for (;;) { 2124 for (;;) {
2125 if (work_pending(&sc->hw_reset_work))
2126 break;
2127
2150 if (list_empty(&txq->axq_q)) { 2128 if (list_empty(&txq->axq_q)) {
2151 txq->axq_link = NULL; 2129 txq->axq_link = NULL;
2152 if (sc->sc_flags & SC_OP_TXAGGR) 2130 if (sc->sc_flags & SC_OP_TXAGGR)
@@ -2234,9 +2212,7 @@ static void ath_tx_complete_poll_work(struct work_struct *work)
2234 if (needreset) { 2212 if (needreset) {
2235 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET, 2213 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
2236 "tx hung, resetting the chip\n"); 2214 "tx hung, resetting the chip\n");
2237 spin_lock_bh(&sc->sc_pcu_lock); 2215 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
2238 ath_reset(sc, true);
2239 spin_unlock_bh(&sc->sc_pcu_lock);
2240 } 2216 }
2241 2217
2242 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2218 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
@@ -2269,6 +2245,9 @@ void ath_tx_edma_tasklet(struct ath_softc *sc)
2269 int status; 2245 int status;
2270 2246
2271 for (;;) { 2247 for (;;) {
2248 if (work_pending(&sc->hw_reset_work))
2249 break;
2250
2272 status = ath9k_hw_txprocdesc(ah, NULL, (void *)&ts); 2251 status = ath9k_hw_txprocdesc(ah, NULL, (void *)&ts);
2273 if (status == -EINPROGRESS) 2252 if (status == -EINPROGRESS)
2274 break; 2253 break;
diff --git a/drivers/net/wireless/ath/carl9170/main.c b/drivers/net/wireless/ath/carl9170/main.c
index 782b8f3ae58f..af351ecd87c4 100644
--- a/drivers/net/wireless/ath/carl9170/main.c
+++ b/drivers/net/wireless/ath/carl9170/main.c
@@ -1115,8 +1115,10 @@ static int carl9170_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1115 * the high througput speed in 802.11n networks. 1115 * the high througput speed in 802.11n networks.
1116 */ 1116 */
1117 1117
1118 if (!is_main_vif(ar, vif)) 1118 if (!is_main_vif(ar, vif)) {
1119 mutex_lock(&ar->mutex);
1119 goto err_softw; 1120 goto err_softw;
1121 }
1120 1122
1121 /* 1123 /*
1122 * While the hardware supports *catch-all* key, for offloading 1124 * While the hardware supports *catch-all* key, for offloading
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 8ff706289b5d..f8615cdf1075 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -110,6 +110,8 @@
110#define B43_MMIO_TSF_CFP_START_LOW 0x604 110#define B43_MMIO_TSF_CFP_START_LOW 0x604
111#define B43_MMIO_TSF_CFP_START_HIGH 0x606 111#define B43_MMIO_TSF_CFP_START_HIGH 0x606
112#define B43_MMIO_TSF_CFP_PRETBTT 0x612 112#define B43_MMIO_TSF_CFP_PRETBTT 0x612
113#define B43_MMIO_TSF_CLK_FRAC_LOW 0x62E
114#define B43_MMIO_TSF_CLK_FRAC_HIGH 0x630
113#define B43_MMIO_TSF_0 0x632 /* core rev < 3 only */ 115#define B43_MMIO_TSF_0 0x632 /* core rev < 3 only */
114#define B43_MMIO_TSF_1 0x634 /* core rev < 3 only */ 116#define B43_MMIO_TSF_1 0x634 /* core rev < 3 only */
115#define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */ 117#define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */
diff --git a/drivers/net/wireless/b43/bus.c b/drivers/net/wireless/b43/bus.c
index 05f6c7bff6ab..424692df239d 100644
--- a/drivers/net/wireless/b43/bus.c
+++ b/drivers/net/wireless/b43/bus.c
@@ -3,6 +3,8 @@
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 Bus abstraction layer 4 Bus abstraction layer
5 5
6 Copyright (c) 2011 Rafał Miłecki <zajec5@gmail.com>
7
6 This program is free software; you can redistribute it and/or modify 8 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 9 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or 10 the Free Software Foundation; either version 2 of the License, or
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c
index 975d96040548..5e45604f0f5d 100644
--- a/drivers/net/wireless/b43/dma.c
+++ b/drivers/net/wireless/b43/dma.c
@@ -817,9 +817,23 @@ static u64 supported_dma_mask(struct b43_wldev *dev)
817 u32 tmp; 817 u32 tmp;
818 u16 mmio_base; 818 u16 mmio_base;
819 819
820 tmp = b43_read32(dev, SSB_TMSHIGH); 820 switch (dev->dev->bus_type) {
821 if (tmp & SSB_TMSHIGH_DMA64) 821#ifdef CONFIG_B43_BCMA
822 return DMA_BIT_MASK(64); 822 case B43_BUS_BCMA:
823 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOST);
824 if (tmp & BCMA_IOST_DMA64)
825 return DMA_BIT_MASK(64);
826 break;
827#endif
828#ifdef CONFIG_B43_SSB
829 case B43_BUS_SSB:
830 tmp = ssb_read32(dev->dev->sdev, SSB_TMSHIGH);
831 if (tmp & SSB_TMSHIGH_DMA64)
832 return DMA_BIT_MASK(64);
833 break;
834#endif
835 }
836
823 mmio_base = b43_dmacontroller_base(0, 0); 837 mmio_base = b43_dmacontroller_base(0, 0);
824 b43_write32(dev, mmio_base + B43_DMA32_TXCTL, B43_DMA32_TXADDREXT_MASK); 838 b43_write32(dev, mmio_base + B43_DMA32_TXCTL, B43_DMA32_TXADDREXT_MASK);
825 tmp = b43_read32(dev, mmio_base + B43_DMA32_TXCTL); 839 tmp = b43_read32(dev, mmio_base + B43_DMA32_TXCTL);
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 172294170df8..56fa3a3648c4 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -7,6 +7,7 @@
7 Copyright (c) 2005-2009 Michael Buesch <m@bues.ch> 7 Copyright (c) 2005-2009 Michael Buesch <m@bues.ch>
8 Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org> 8 Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> 9 Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 Copyright (c) 2010-2011 Rafał Miłecki <zajec5@gmail.com>
10 11
11 SDIO support 12 SDIO support
12 Copyright (c) 2009 Albert Herranz <albert_herranz@yahoo.es> 13 Copyright (c) 2009 Albert Herranz <albert_herranz@yahoo.es>
@@ -64,6 +65,7 @@ MODULE_AUTHOR("Martin Langer");
64MODULE_AUTHOR("Stefano Brivio"); 65MODULE_AUTHOR("Stefano Brivio");
65MODULE_AUTHOR("Michael Buesch"); 66MODULE_AUTHOR("Michael Buesch");
66MODULE_AUTHOR("Gábor Stefanik"); 67MODULE_AUTHOR("Gábor Stefanik");
68MODULE_AUTHOR("Rafał Miłecki");
67MODULE_LICENSE("GPL"); 69MODULE_LICENSE("GPL");
68 70
69MODULE_FIRMWARE("b43/ucode11.fw"); 71MODULE_FIRMWARE("b43/ucode11.fw");
@@ -1635,7 +1637,8 @@ static void handle_irq_beacon(struct b43_wldev *dev)
1635 u32 cmd, beacon0_valid, beacon1_valid; 1637 u32 cmd, beacon0_valid, beacon1_valid;
1636 1638
1637 if (!b43_is_mode(wl, NL80211_IFTYPE_AP) && 1639 if (!b43_is_mode(wl, NL80211_IFTYPE_AP) &&
1638 !b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT)) 1640 !b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT) &&
1641 !b43_is_mode(wl, NL80211_IFTYPE_ADHOC))
1639 return; 1642 return;
1640 1643
1641 /* This is the bottom half of the asynchronous beacon update. */ 1644 /* This is the bottom half of the asynchronous beacon update. */
@@ -2953,6 +2956,7 @@ static void b43_rate_memory_init(struct b43_wldev *dev)
2953 case B43_PHYTYPE_N: 2956 case B43_PHYTYPE_N:
2954 case B43_PHYTYPE_LP: 2957 case B43_PHYTYPE_LP:
2955 case B43_PHYTYPE_HT: 2958 case B43_PHYTYPE_HT:
2959 case B43_PHYTYPE_LCN:
2956 b43_rate_memory_write(dev, B43_OFDM_RATE_6MB, 1); 2960 b43_rate_memory_write(dev, B43_OFDM_RATE_6MB, 1);
2957 b43_rate_memory_write(dev, B43_OFDM_RATE_12MB, 1); 2961 b43_rate_memory_write(dev, B43_OFDM_RATE_12MB, 1);
2958 b43_rate_memory_write(dev, B43_OFDM_RATE_18MB, 1); 2962 b43_rate_memory_write(dev, B43_OFDM_RATE_18MB, 1);
diff --git a/drivers/net/wireless/b43/phy_ht.c b/drivers/net/wireless/b43/phy_ht.c
index 4d6345e8ee6b..7416c5e9154d 100644
--- a/drivers/net/wireless/b43/phy_ht.c
+++ b/drivers/net/wireless/b43/phy_ht.c
@@ -3,6 +3,8 @@
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 IEEE 802.11n HT-PHY support 4 IEEE 802.11n HT-PHY support
5 5
6 Copyright (c) 2011 Rafał Miłecki <zajec5@gmail.com>
7
6 This program is free software; you can redistribute it and/or modify 8 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 9 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or 10 the Free Software Foundation; either version 2 of the License, or
diff --git a/drivers/net/wireless/b43/phy_lcn.c b/drivers/net/wireless/b43/phy_lcn.c
index 4b2cd6d24ce9..bffeb44b4a40 100644
--- a/drivers/net/wireless/b43/phy_lcn.c
+++ b/drivers/net/wireless/b43/phy_lcn.c
@@ -3,6 +3,8 @@
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 IEEE 802.11n LCN-PHY support 4 IEEE 802.11n LCN-PHY support
5 5
6 Copyright (c) 2011 Rafał Miłecki <zajec5@gmail.com>
7
6 This program is free software; you can redistribute it and/or modify 8 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 9 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or 10 the Free Software Foundation; either version 2 of the License, or
@@ -18,6 +20,14 @@
18 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, 20 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
19 Boston, MA 02110-1301, USA. 21 Boston, MA 02110-1301, USA.
20 22
23 This file incorporates work covered by the following copyright and
24 permission notice:
25
26 Copyright (c) 2010 Broadcom Corporation
27
28 Permission to use, copy, modify, and/or distribute this software for any
29 purpose with or without fee is hereby granted, provided that the above
30 copyright notice and this permission notice appear in all copies.
21*/ 31*/
22 32
23#include <linux/slab.h> 33#include <linux/slab.h>
@@ -27,28 +37,132 @@
27#include "tables_phy_lcn.h" 37#include "tables_phy_lcn.h"
28#include "main.h" 38#include "main.h"
29 39
40struct lcn_tx_gains {
41 u16 gm_gain;
42 u16 pga_gain;
43 u16 pad_gain;
44 u16 dac_gain;
45};
46
47struct lcn_tx_iir_filter {
48 u8 type;
49 u16 values[16];
50};
51
52enum lcn_sense_type {
53 B43_SENSE_TEMP,
54 B43_SENSE_VBAT,
55};
56
57/* In theory it's PHY common function, move if needed */
58/* brcms_b_switch_macfreq */
59static void b43_phy_switch_macfreq(struct b43_wldev *dev, u8 spurmode)
60{
61 if (dev->dev->chip_id == 43224 || dev->dev->chip_id == 43225) {
62 switch (spurmode) {
63 case 2: /* 126 Mhz */
64 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082);
65 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
66 break;
67 case 1: /* 123 Mhz */
68 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341);
69 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
70 break;
71 default: /* 120 Mhz */
72 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889);
73 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8);
74 break;
75 }
76 } else if (dev->phy.type == B43_PHYTYPE_LCN) {
77 switch (spurmode) {
78 case 1: /* 82 Mhz */
79 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0);
80 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
81 break;
82 default: /* 80 Mhz */
83 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD);
84 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC);
85 break;
86 }
87 }
88}
89
30/************************************************** 90/**************************************************
31 * Radio 2064. 91 * Radio 2064.
32 **************************************************/ 92 **************************************************/
33 93
94/* wlc_lcnphy_radio_2064_channel_tune_4313 */
95static void b43_radio_2064_channel_setup(struct b43_wldev *dev)
96{
97 u16 save[2];
98
99 b43_radio_set(dev, 0x09d, 0x4);
100 b43_radio_write(dev, 0x09e, 0xf);
101
102 /* Channel specific values in theory, in practice always the same */
103 b43_radio_write(dev, 0x02a, 0xb);
104 b43_radio_maskset(dev, 0x030, ~0x3, 0xa);
105 b43_radio_maskset(dev, 0x091, ~0x3, 0);
106 b43_radio_maskset(dev, 0x038, ~0xf, 0x7);
107 b43_radio_maskset(dev, 0x030, ~0xc, 0x8);
108 b43_radio_maskset(dev, 0x05e, ~0xf, 0x8);
109 b43_radio_maskset(dev, 0x05e, ~0xf0, 0x80);
110 b43_radio_write(dev, 0x06c, 0x80);
111
112 save[0] = b43_radio_read(dev, 0x044);
113 save[1] = b43_radio_read(dev, 0x12b);
114
115 b43_radio_set(dev, 0x044, 0x7);
116 b43_radio_set(dev, 0x12b, 0xe);
117
118 /* TODO */
119
120 b43_radio_write(dev, 0x040, 0xfb);
121
122 b43_radio_write(dev, 0x041, 0x9a);
123 b43_radio_write(dev, 0x042, 0xa3);
124 b43_radio_write(dev, 0x043, 0x0c);
125
126 /* TODO */
127
128 b43_radio_set(dev, 0x044, 0x0c);
129 udelay(1);
130
131 b43_radio_write(dev, 0x044, save[0]);
132 b43_radio_write(dev, 0x12b, save[1]);
133
134 if (dev->phy.rev == 1) {
135 /* brcmsmac uses outdated 0x3 for 0x038 */
136 b43_radio_write(dev, 0x038, 0x0);
137 b43_radio_write(dev, 0x091, 0x7);
138 }
139}
140
141/* wlc_radio_2064_init */
34static void b43_radio_2064_init(struct b43_wldev *dev) 142static void b43_radio_2064_init(struct b43_wldev *dev)
35{ 143{
36 b43_radio_write(dev, 0x09c, 0x0020); 144 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
37 b43_radio_write(dev, 0x105, 0x0008); 145 b43_radio_write(dev, 0x09c, 0x0020);
146 b43_radio_write(dev, 0x105, 0x0008);
147 } else {
148 /* TODO */
149 }
38 b43_radio_write(dev, 0x032, 0x0062); 150 b43_radio_write(dev, 0x032, 0x0062);
39 b43_radio_write(dev, 0x033, 0x0019); 151 b43_radio_write(dev, 0x033, 0x0019);
40 b43_radio_write(dev, 0x090, 0x0010); 152 b43_radio_write(dev, 0x090, 0x0010);
41 b43_radio_write(dev, 0x010, 0x0000); 153 b43_radio_write(dev, 0x010, 0x0000);
42 b43_radio_write(dev, 0x060, 0x007f); 154 if (dev->phy.rev == 1) {
43 b43_radio_write(dev, 0x061, 0x0072); 155 b43_radio_write(dev, 0x060, 0x007f);
44 b43_radio_write(dev, 0x062, 0x007f); 156 b43_radio_write(dev, 0x061, 0x0072);
157 b43_radio_write(dev, 0x062, 0x007f);
158 }
45 b43_radio_write(dev, 0x01d, 0x0002); 159 b43_radio_write(dev, 0x01d, 0x0002);
46 b43_radio_write(dev, 0x01e, 0x0006); 160 b43_radio_write(dev, 0x01e, 0x0006);
47 161
48 b43_phy_write(dev, 0x4ea, 0x4688); 162 b43_phy_write(dev, 0x4ea, 0x4688);
49 b43_phy_maskset(dev, 0x4eb, ~0x7, 0x2); 163 b43_phy_maskset(dev, 0x4eb, ~0x7, 0x2);
50 b43_phy_mask(dev, 0x4eb, ~0x01c0); 164 b43_phy_mask(dev, 0x4eb, ~0x01c0);
51 b43_phy_maskset(dev, 0x4eb, 0xff00, 0x19); 165 b43_phy_maskset(dev, 0x46a, 0xff00, 0x19);
52 166
53 b43_lcntab_write(dev, B43_LCNTAB16(0x00, 0x55), 0); 167 b43_lcntab_write(dev, B43_LCNTAB16(0x00, 0x55), 0);
54 168
@@ -80,6 +194,7 @@ static void b43_radio_2064_init(struct b43_wldev *dev)
80 * Various PHY ops 194 * Various PHY ops
81 **************************************************/ 195 **************************************************/
82 196
197/* wlc_lcnphy_toggle_afe_pwdn */
83static void b43_phy_lcn_afe_set_unset(struct b43_wldev *dev) 198static void b43_phy_lcn_afe_set_unset(struct b43_wldev *dev)
84{ 199{
85 u16 afe_ctl2 = b43_phy_read(dev, B43_PHY_LCN_AFE_CTL2); 200 u16 afe_ctl2 = b43_phy_read(dev, B43_PHY_LCN_AFE_CTL2);
@@ -95,22 +210,40 @@ static void b43_phy_lcn_afe_set_unset(struct b43_wldev *dev)
95 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1); 210 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1);
96} 211}
97 212
98static void b43_phy_lcn_clean_0x18_table(struct b43_wldev *dev) 213/* wlc_lcnphy_get_pa_gain */
214static u16 b43_phy_lcn_get_pa_gain(struct b43_wldev *dev)
99{ 215{
100 u8 i; 216 return (b43_phy_read(dev, 0x4fb) & 0x7f00) >> 8;
217}
218
219/* wlc_lcnphy_set_dac_gain */
220static void b43_phy_lcn_set_dac_gain(struct b43_wldev *dev, u16 dac_gain)
221{
222 u16 dac_ctrl;
223
224 dac_ctrl = b43_phy_read(dev, 0x439);
225 dac_ctrl = dac_ctrl & 0xc7f;
226 dac_ctrl = dac_ctrl | (dac_gain << 7);
227 b43_phy_maskset(dev, 0x439, ~0xfff, dac_ctrl);
228}
101 229
102 for (i = 0; i < 0x80; i++) 230/* wlc_lcnphy_set_bbmult */
103 b43_lcntab_write(dev, B43_LCNTAB32(0x18, i), 0x80000); 231static void b43_phy_lcn_set_bbmult(struct b43_wldev *dev, u8 m0)
232{
233 b43_lcntab_write(dev, B43_LCNTAB16(0x00, 0x57), m0 << 8);
104} 234}
105 235
106static void b43_phy_lcn_clear_0x07_table(struct b43_wldev *dev) 236/* wlc_lcnphy_clear_tx_power_offsets */
237static void b43_phy_lcn_clear_tx_power_offsets(struct b43_wldev *dev)
107{ 238{
108 u8 i; 239 u8 i;
109 240
110 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x340); 241 if (1) { /* FIXME */
111 for (i = 0; i < 30; i++) { 242 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x340);
112 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0); 243 for (i = 0; i < 30; i++) {
113 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0); 244 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0);
245 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0);
246 }
114 } 247 }
115 248
116 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x80); 249 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x80);
@@ -120,6 +253,447 @@ static void b43_phy_lcn_clear_0x07_table(struct b43_wldev *dev)
120 } 253 }
121} 254}
122 255
256/* wlc_lcnphy_rev0_baseband_init */
257static void b43_phy_lcn_rev0_baseband_init(struct b43_wldev *dev)
258{
259 b43_radio_write(dev, 0x11c, 0);
260
261 b43_phy_write(dev, 0x43b, 0);
262 b43_phy_write(dev, 0x43c, 0);
263 b43_phy_write(dev, 0x44c, 0);
264 b43_phy_write(dev, 0x4e6, 0);
265 b43_phy_write(dev, 0x4f9, 0);
266 b43_phy_write(dev, 0x4b0, 0);
267 b43_phy_write(dev, 0x938, 0);
268 b43_phy_write(dev, 0x4b0, 0);
269 b43_phy_write(dev, 0x44e, 0);
270
271 b43_phy_set(dev, 0x567, 0x03);
272
273 b43_phy_set(dev, 0x44a, 0x44);
274 b43_phy_write(dev, 0x44a, 0x80);
275
276 if (!(dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM))
277 ; /* TODO */
278 b43_phy_maskset(dev, 0x634, ~0xff, 0xc);
279 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM) {
280 b43_phy_maskset(dev, 0x634, ~0xff, 0xa);
281 b43_phy_write(dev, 0x910, 0x1);
282 }
283
284 b43_phy_write(dev, 0x910, 0x1);
285
286 b43_phy_maskset(dev, 0x448, ~0x300, 0x100);
287 b43_phy_maskset(dev, 0x608, ~0xff, 0x17);
288 b43_phy_maskset(dev, 0x604, ~0x7ff, 0x3ea);
289}
290
291/* wlc_lcnphy_bu_tweaks */
292static void b43_phy_lcn_bu_tweaks(struct b43_wldev *dev)
293{
294 b43_phy_set(dev, 0x805, 0x1);
295
296 b43_phy_maskset(dev, 0x42f, ~0x7, 0x3);
297 b43_phy_maskset(dev, 0x030, ~0x7, 0x3);
298
299 b43_phy_write(dev, 0x414, 0x1e10);
300 b43_phy_write(dev, 0x415, 0x0640);
301
302 b43_phy_maskset(dev, 0x4df, (u16) ~0xff00, 0xf700);
303
304 b43_phy_set(dev, 0x44a, 0x44);
305 b43_phy_write(dev, 0x44a, 0x80);
306
307 b43_phy_maskset(dev, 0x434, ~0xff, 0xfd);
308 b43_phy_maskset(dev, 0x420, ~0xff, 0x10);
309
310 if (dev->dev->bus_sprom->board_rev >= 0x1204)
311 b43_radio_set(dev, 0x09b, 0xf0);
312
313 b43_phy_write(dev, 0x7d6, 0x0902);
314
315 b43_phy_maskset(dev, 0x429, ~0xf, 0x9);
316 b43_phy_maskset(dev, 0x429, ~(0x3f << 4), 0xe << 4);
317
318 if (dev->phy.rev == 1) {
319 b43_phy_maskset(dev, 0x423, ~0xff, 0x46);
320 b43_phy_maskset(dev, 0x411, ~0xff, 1);
321 b43_phy_set(dev, 0x434, 0xff); /* FIXME: update to wl */
322
323 /* TODO: wl operates on PHY 0x416, brcmsmac is outdated here */
324
325 b43_phy_maskset(dev, 0x656, ~0xf, 2);
326 b43_phy_set(dev, 0x44d, 4);
327
328 b43_radio_set(dev, 0x0f7, 0x4);
329 b43_radio_mask(dev, 0x0f1, ~0x3);
330 b43_radio_maskset(dev, 0x0f2, ~0xf8, 0x90);
331 b43_radio_maskset(dev, 0x0f3, ~0x3, 0x2);
332 b43_radio_maskset(dev, 0x0f3, ~0xf0, 0xa0);
333
334 b43_radio_set(dev, 0x11f, 0x2);
335
336 b43_phy_lcn_clear_tx_power_offsets(dev);
337
338 /* TODO: something more? */
339 }
340}
341
342/* wlc_lcnphy_vbat_temp_sense_setup */
343static void b43_phy_lcn_sense_setup(struct b43_wldev *dev,
344 enum lcn_sense_type sense_type)
345{
346 u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain;
347 u16 auxpga_vmid;
348 u8 tx_pwr_idx;
349 u8 i;
350
351 u16 save_radio_regs[6][2] = {
352 { 0x007, 0 }, { 0x0ff, 0 }, { 0x11f, 0 }, { 0x005, 0 },
353 { 0x025, 0 }, { 0x112, 0 },
354 };
355 u16 save_phy_regs[14][2] = {
356 { 0x503, 0 }, { 0x4a4, 0 }, { 0x4d0, 0 }, { 0x4d9, 0 },
357 { 0x4da, 0 }, { 0x4a6, 0 }, { 0x938, 0 }, { 0x939, 0 },
358 { 0x4d8, 0 }, { 0x4d0, 0 }, { 0x4d7, 0 }, { 0x4a5, 0 },
359 { 0x40d, 0 }, { 0x4a2, 0 },
360 };
361 u16 save_radio_4a4;
362
363 msleep(1);
364
365 /* Save */
366 for (i = 0; i < 6; i++)
367 save_radio_regs[i][1] = b43_radio_read(dev,
368 save_radio_regs[i][0]);
369 for (i = 0; i < 14; i++)
370 save_phy_regs[i][1] = b43_phy_read(dev, save_phy_regs[i][0]);
371 b43_mac_suspend(dev);
372 save_radio_4a4 = b43_radio_read(dev, 0x4a4);
373 /* wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); */
374 tx_pwr_idx = dev->phy.lcn->tx_pwr_curr_idx;
375
376 /* Setup */
377 /* TODO: wlc_lcnphy_set_tx_pwr_by_index(pi, 127); */
378 b43_radio_set(dev, 0x007, 0x1);
379 b43_radio_set(dev, 0x0ff, 0x10);
380 b43_radio_set(dev, 0x11f, 0x4);
381
382 b43_phy_mask(dev, 0x503, ~0x1);
383 b43_phy_mask(dev, 0x503, ~0x4);
384 b43_phy_mask(dev, 0x4a4, ~0x4000);
385 b43_phy_mask(dev, 0x4a4, (u16) ~0x8000);
386 b43_phy_mask(dev, 0x4d0, ~0x20);
387 b43_phy_set(dev, 0x4a5, 0xff);
388 b43_phy_maskset(dev, 0x4a5, ~0x7000, 0x5000);
389 b43_phy_mask(dev, 0x4a5, ~0x700);
390 b43_phy_maskset(dev, 0x40d, ~0xff, 64);
391 b43_phy_maskset(dev, 0x40d, ~0x700, 0x600);
392 b43_phy_maskset(dev, 0x4a2, ~0xff, 64);
393 b43_phy_maskset(dev, 0x4a2, ~0x700, 0x600);
394 b43_phy_maskset(dev, 0x4d9, ~0x70, 0x20);
395 b43_phy_maskset(dev, 0x4d9, ~0x700, 0x300);
396 b43_phy_maskset(dev, 0x4d9, ~0x7000, 0x1000);
397 b43_phy_mask(dev, 0x4da, ~0x1000);
398 b43_phy_set(dev, 0x4da, 0x2000);
399 b43_phy_set(dev, 0x4a6, 0x8000);
400
401 b43_radio_write(dev, 0x025, 0xc);
402 b43_radio_set(dev, 0x005, 0x8);
403 b43_phy_set(dev, 0x938, 0x4);
404 b43_phy_set(dev, 0x939, 0x4);
405 b43_phy_set(dev, 0x4a4, 0x1000);
406
407 /* FIXME: don't hardcode */
408 b43_lcntab_write(dev, B43_LCNTAB16(0x8, 0x6), 0x640);
409
410 switch (sense_type) {
411 case B43_SENSE_TEMP:
412 b43_phy_set(dev, 0x4d7, 0x8);
413 b43_phy_maskset(dev, 0x4d7, ~0x7000, 0x1000);
414 auxpga_vmidcourse = 8;
415 auxpga_vmidfine = 0x4;
416 auxpga_gain = 2;
417 b43_radio_set(dev, 0x082, 0x20);
418 break;
419 case B43_SENSE_VBAT:
420 b43_phy_set(dev, 0x4d7, 0x8);
421 b43_phy_maskset(dev, 0x4d7, ~0x7000, 0x3000);
422 auxpga_vmidcourse = 7;
423 auxpga_vmidfine = 0xa;
424 auxpga_gain = 2;
425 break;
426 }
427 auxpga_vmid = (0x200 | (auxpga_vmidcourse << 4) | auxpga_vmidfine);
428
429 b43_phy_set(dev, 0x4d8, 0x1);
430 b43_phy_maskset(dev, 0x4d8, ~(0x3ff << 2), auxpga_vmid << 2);
431 b43_phy_set(dev, 0x4d8, 0x2);
432 b43_phy_maskset(dev, 0x4d8, ~(0x7 << 12), auxpga_gain << 12);
433 b43_phy_set(dev, 0x4d0, 0x20);
434 b43_radio_write(dev, 0x112, 0x6);
435
436 /* TODO: dummy transmission? */
437 /* Wait if not done */
438 if (!(b43_phy_read(dev, 0x476) & 0x8000))
439 udelay(10);
440
441 /* Restore */
442 for (i = 0; i < 6; i++)
443 b43_radio_write(dev, save_radio_regs[i][0],
444 save_radio_regs[i][1]);
445 for (i = 0; i < 14; i++)
446 b43_phy_write(dev, save_phy_regs[i][0], save_phy_regs[i][1]);
447 /* TODO: wlc_lcnphy_set_tx_pwr_by_index(tx_pwr_idx) */
448 b43_radio_write(dev, 0x4a4, save_radio_4a4);
449
450 b43_mac_enable(dev);
451
452 msleep(1);
453}
454
455static bool b43_phy_lcn_load_tx_iir_cck_filter(struct b43_wldev *dev,
456 u8 filter_type)
457{
458 int i, j;
459 u16 phy_regs[] = { 0x910, 0x91e, 0x91f, 0x924, 0x925, 0x926, 0x920,
460 0x921, 0x927, 0x928, 0x929, 0x922, 0x923, 0x930,
461 0x931, 0x932 };
462 /* Table is from brcmsmac, values for type 25 were outdated, probably
463 * others need updating too */
464 struct lcn_tx_iir_filter tx_iir_filters_cck[] = {
465 { 0, { 1, 415, 1874, 64, 128, 64, 792, 1656, 64, 128, 64, 778,
466 1582, 64, 128, 64 } },
467 { 1, { 1, 402, 1847, 259, 59, 259, 671, 1794, 68, 54, 68, 608,
468 1863, 93, 167, 93 } },
469 { 2, { 1, 415, 1874, 64, 128, 64, 792, 1656, 192, 384, 192,
470 778, 1582, 64, 128, 64 } },
471 { 3, { 1, 302, 1841, 129, 258, 129, 658, 1720, 205, 410, 205,
472 754, 1760, 170, 340, 170 } },
473 { 20, { 1, 360, 1884, 242, 1734, 242, 752, 1720, 205, 1845, 205,
474 767, 1760, 256, 185, 256 } },
475 { 21, { 1, 360, 1884, 149, 1874, 149, 752, 1720, 205, 1883, 205,
476 767, 1760, 256, 273, 256 } },
477 { 22, { 1, 360, 1884, 98, 1948, 98, 752, 1720, 205, 1924, 205,
478 767, 1760, 256, 352, 256 } },
479 { 23, { 1, 350, 1884, 116, 1966, 116, 752, 1720, 205, 2008, 205,
480 767, 1760, 128, 233, 128 } },
481 { 24, { 1, 325, 1884, 32, 40, 32, 756, 1720, 256, 471, 256, 766,
482 1760, 256, 1881, 256 } },
483 { 25, { 1, 299, 1884, 51, 64, 51, 736, 1720, 256, 471, 256, 765,
484 1760, 262, 1878, 262 } },
485 /* brcmsmac version { 25, { 1, 299, 1884, 51, 64, 51, 736, 1720,
486 * 256, 471, 256, 765, 1760, 256, 1881, 256 } }, */
487 { 26, { 1, 277, 1943, 39, 117, 88, 637, 1838, 64, 192, 144, 614,
488 1864, 128, 384, 288 } },
489 { 27, { 1, 245, 1943, 49, 147, 110, 626, 1838, 256, 768, 576,
490 613, 1864, 128, 384, 288 } },
491 { 30, { 1, 302, 1841, 61, 122, 61, 658, 1720, 205, 410, 205,
492 754, 1760, 170, 340, 170 } },
493 };
494
495 for (i = 0; i < ARRAY_SIZE(tx_iir_filters_cck); i++) {
496 if (tx_iir_filters_cck[i].type == filter_type) {
497 for (j = 0; j < 16; j++)
498 b43_phy_write(dev, phy_regs[j],
499 tx_iir_filters_cck[i].values[j]);
500 return true;
501 }
502 }
503
504 return false;
505}
506
507static bool b43_phy_lcn_load_tx_iir_ofdm_filter(struct b43_wldev *dev,
508 u8 filter_type)
509{
510 int i, j;
511 u16 phy_regs[] = { 0x90f, 0x900, 0x901, 0x906, 0x907, 0x908, 0x902,
512 0x903, 0x909, 0x90a, 0x90b, 0x904, 0x905, 0x90c,
513 0x90d, 0x90e };
514 struct lcn_tx_iir_filter tx_iir_filters_ofdm[] = {
515 { 0, { 0, 0xa2, 0x0, 0x100, 0x100, 0x0, 0x0, 0x0, 0x100, 0x0,
516 0x0, 0x278, 0xfea0, 0x80, 0x100, 0x80 } },
517 { 1, { 0, 374, 0xFF79, 16, 32, 16, 799, 0xFE74, 50, 32, 50, 750,
518 0xFE2B, 212, 0xFFCE, 212 } },
519 { 2, { 0, 375, 0xFF16, 37, 76, 37, 799, 0xFE74, 32, 20, 32, 748,
520 0xFEF2, 128, 0xFFE2, 128 } },
521 };
522
523 for (i = 0; i < ARRAY_SIZE(tx_iir_filters_ofdm); i++) {
524 if (tx_iir_filters_ofdm[i].type == filter_type) {
525 for (j = 0; j < 16; j++)
526 b43_phy_write(dev, phy_regs[j],
527 tx_iir_filters_ofdm[i].values[j]);
528 return true;
529 }
530 }
531
532 return false;
533}
534
535/* wlc_lcnphy_set_tx_gain_override */
536static void b43_phy_lcn_set_tx_gain_override(struct b43_wldev *dev, bool enable)
537{
538 b43_phy_maskset(dev, 0x4b0, ~(0x1 << 7), enable << 7);
539 b43_phy_maskset(dev, 0x4b0, ~(0x1 << 14), enable << 14);
540 b43_phy_maskset(dev, 0x43b, ~(0x1 << 6), enable << 6);
541}
542
543/* wlc_lcnphy_set_tx_gain */
544static void b43_phy_lcn_set_tx_gain(struct b43_wldev *dev,
545 struct lcn_tx_gains *target_gains)
546{
547 u16 pa_gain = b43_phy_lcn_get_pa_gain(dev);
548
549 b43_phy_write(dev, 0x4b5,
550 (target_gains->gm_gain | (target_gains->pga_gain << 8)));
551 b43_phy_maskset(dev, 0x4fb, ~0x7fff,
552 (target_gains->pad_gain | (pa_gain << 8)));
553 b43_phy_write(dev, 0x4fc,
554 (target_gains->gm_gain | (target_gains->pga_gain << 8)));
555 b43_phy_maskset(dev, 0x4fd, ~0x7fff,
556 (target_gains->pad_gain | (pa_gain << 8)));
557
558 b43_phy_lcn_set_dac_gain(dev, target_gains->dac_gain);
559 b43_phy_lcn_set_tx_gain_override(dev, true);
560}
561
562/* wlc_lcnphy_tx_pwr_ctrl_init */
563static void b43_phy_lcn_tx_pwr_ctl_init(struct b43_wldev *dev)
564{
565 struct lcn_tx_gains tx_gains;
566 u8 bbmult;
567
568 b43_mac_suspend(dev);
569
570 if (!dev->phy.lcn->hw_pwr_ctl_capable) {
571 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
572 tx_gains.gm_gain = 4;
573 tx_gains.pga_gain = 12;
574 tx_gains.pad_gain = 12;
575 tx_gains.dac_gain = 0;
576 bbmult = 150;
577 } else {
578 tx_gains.gm_gain = 7;
579 tx_gains.pga_gain = 15;
580 tx_gains.pad_gain = 14;
581 tx_gains.dac_gain = 0;
582 bbmult = 150;
583 }
584 b43_phy_lcn_set_tx_gain(dev, &tx_gains);
585 b43_phy_lcn_set_bbmult(dev, bbmult);
586 b43_phy_lcn_sense_setup(dev, B43_SENSE_TEMP);
587 } else {
588 b43err(dev->wl, "TX power control not supported for this HW\n");
589 }
590
591 b43_mac_enable(dev);
592}
593
594/* wlc_lcnphy_txrx_spur_avoidance_mode */
595static void b43_phy_lcn_txrx_spur_avoidance_mode(struct b43_wldev *dev,
596 bool enable)
597{
598 if (enable) {
599 b43_phy_write(dev, 0x942, 0x7);
600 b43_phy_write(dev, 0x93b, ((1 << 13) + 23));
601 b43_phy_write(dev, 0x93c, ((1 << 13) + 1989));
602
603 b43_phy_write(dev, 0x44a, 0x084);
604 b43_phy_write(dev, 0x44a, 0x080);
605 b43_phy_write(dev, 0x6d3, 0x2222);
606 b43_phy_write(dev, 0x6d3, 0x2220);
607 } else {
608 b43_phy_write(dev, 0x942, 0x0);
609 b43_phy_write(dev, 0x93b, ((0 << 13) + 23));
610 b43_phy_write(dev, 0x93c, ((0 << 13) + 1989));
611 }
612 b43_phy_switch_macfreq(dev, enable);
613}
614
615/**************************************************
616 * Channel switching ops.
617 **************************************************/
618
619/* wlc_lcnphy_set_chanspec_tweaks */
620static void b43_phy_lcn_set_channel_tweaks(struct b43_wldev *dev, int channel)
621{
622 struct bcma_drv_cc *cc = &dev->dev->bdev->bus->drv_cc;
623
624 b43_phy_maskset(dev, 0x448, ~0x300, (channel == 14) ? 0x200 : 0x100);
625
626 if (channel == 1 || channel == 2 || channel == 3 || channel == 4 ||
627 channel == 9 || channel == 10 || channel == 11 || channel == 12) {
628 bcma_chipco_pll_write(cc, 0x2, 0x03000c04);
629 bcma_chipco_pll_maskset(cc, 0x3, 0x00ffffff, 0x0);
630 bcma_chipco_pll_write(cc, 0x4, 0x200005c0);
631
632 bcma_cc_set32(cc, BCMA_CC_PMU_CTL, 0x400);
633
634 b43_phy_write(dev, 0x942, 0);
635
636 b43_phy_lcn_txrx_spur_avoidance_mode(dev, false);
637 b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1b00);
638 b43_phy_write(dev, 0x425, 0x5907);
639 } else {
640 bcma_chipco_pll_write(cc, 0x2, 0x03140c04);
641 bcma_chipco_pll_maskset(cc, 0x3, 0x00ffffff, 0x333333);
642 bcma_chipco_pll_write(cc, 0x4, 0x202c2820);
643
644 bcma_cc_set32(cc, BCMA_CC_PMU_CTL, 0x400);
645
646 b43_phy_write(dev, 0x942, 0);
647
648 b43_phy_lcn_txrx_spur_avoidance_mode(dev, true);
649 b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1f00);
650 b43_phy_write(dev, 0x425, 0x590a);
651 }
652
653 b43_phy_set(dev, 0x44a, 0x44);
654 b43_phy_write(dev, 0x44a, 0x80);
655}
656
657/* wlc_phy_chanspec_set_lcnphy */
658static int b43_phy_lcn_set_channel(struct b43_wldev *dev,
659 struct ieee80211_channel *channel,
660 enum nl80211_channel_type channel_type)
661{
662 static const u16 sfo_cfg[14][2] = {
663 {965, 1087}, {967, 1085}, {969, 1082}, {971, 1080}, {973, 1078},
664 {975, 1076}, {977, 1073}, {979, 1071}, {981, 1069}, {983, 1067},
665 {985, 1065}, {987, 1063}, {989, 1060}, {994, 1055},
666 };
667
668 b43_phy_lcn_set_channel_tweaks(dev, channel->hw_value);
669
670 b43_phy_set(dev, 0x44a, 0x44);
671 b43_phy_write(dev, 0x44a, 0x80);
672
673 b43_radio_2064_channel_setup(dev);
674 mdelay(1);
675
676 b43_phy_lcn_afe_set_unset(dev);
677
678 b43_phy_write(dev, 0x657, sfo_cfg[channel->hw_value - 1][0]);
679 b43_phy_write(dev, 0x658, sfo_cfg[channel->hw_value - 1][1]);
680
681 if (channel->hw_value == 14) {
682 b43_phy_maskset(dev, 0x448, ~(0x3 << 8), (2) << 8);
683 b43_phy_lcn_load_tx_iir_cck_filter(dev, 3);
684 } else {
685 b43_phy_maskset(dev, 0x448, ~(0x3 << 8), (1) << 8);
686 /* brcmsmac uses filter_type 2, we follow wl with 25 */
687 b43_phy_lcn_load_tx_iir_cck_filter(dev, 25);
688 }
689 /* brcmsmac uses filter_type 2, we follow wl with 0 */
690 b43_phy_lcn_load_tx_iir_ofdm_filter(dev, 0);
691
692 b43_phy_maskset(dev, 0x4eb, ~(0x7 << 3), 0x1 << 3);
693
694 return 0;
695}
696
123/************************************************** 697/**************************************************
124 * Basic PHY ops. 698 * Basic PHY ops.
125 **************************************************/ 699 **************************************************/
@@ -153,8 +727,11 @@ static void b43_phy_lcn_op_prepare_structs(struct b43_wldev *dev)
153 memset(phy_lcn, 0, sizeof(*phy_lcn)); 727 memset(phy_lcn, 0, sizeof(*phy_lcn));
154} 728}
155 729
730/* wlc_phy_init_lcnphy */
156static int b43_phy_lcn_op_init(struct b43_wldev *dev) 731static int b43_phy_lcn_op_init(struct b43_wldev *dev)
157{ 732{
733 struct bcma_drv_cc *cc = &dev->dev->bdev->bus->drv_cc;
734
158 b43_phy_set(dev, 0x44a, 0x80); 735 b43_phy_set(dev, 0x44a, 0x80);
159 b43_phy_mask(dev, 0x44a, 0x7f); 736 b43_phy_mask(dev, 0x44a, 0x7f);
160 b43_phy_set(dev, 0x6d1, 0x80); 737 b43_phy_set(dev, 0x6d1, 0x80);
@@ -167,18 +744,31 @@ static int b43_phy_lcn_op_init(struct b43_wldev *dev)
167 b43_phy_maskset(dev, 0x663, 0xFF00, 0x64); 744 b43_phy_maskset(dev, 0x663, 0xFF00, 0x64);
168 745
169 b43_phy_lcn_tables_init(dev); 746 b43_phy_lcn_tables_init(dev);
170 /* TODO: various tables ops here */
171 b43_phy_lcn_clean_0x18_table(dev);
172
173 /* TODO: some ops here */
174 747
175 b43_phy_lcn_clear_0x07_table(dev); 748 b43_phy_lcn_rev0_baseband_init(dev);
749 b43_phy_lcn_bu_tweaks(dev);
176 750
177 if (dev->phy.radio_ver == 0x2064) 751 if (dev->phy.radio_ver == 0x2064)
178 b43_radio_2064_init(dev); 752 b43_radio_2064_init(dev);
179 else 753 else
180 B43_WARN_ON(1); 754 B43_WARN_ON(1);
181 755
756 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
757 b43_phy_lcn_tx_pwr_ctl_init(dev);
758
759 b43_switch_channel(dev, dev->phy.channel);
760
761 bcma_chipco_regctl_maskset(cc, 0, 0xf, 0x9);
762 bcma_chipco_chipctl_maskset(cc, 0, 0, 0x03cddddd);
763
764 /* TODO */
765
766 b43_phy_set(dev, 0x448, 0x4000);
767 udelay(100);
768 b43_phy_mask(dev, 0x448, ~0x4000);
769
770 /* TODO */
771
182 return 0; 772 return 0;
183} 773}
184 774
@@ -215,6 +805,22 @@ static void b43_phy_lcn_op_switch_analog(struct b43_wldev *dev, bool on)
215 } 805 }
216} 806}
217 807
808static int b43_phy_lcn_op_switch_channel(struct b43_wldev *dev,
809 unsigned int new_channel)
810{
811 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
812 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
813
814 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
815 if ((new_channel < 1) || (new_channel > 14))
816 return -EINVAL;
817 } else {
818 return -EINVAL;
819 }
820
821 return b43_phy_lcn_set_channel(dev, channel, channel_type);
822}
823
218static unsigned int b43_phy_lcn_op_get_default_chan(struct b43_wldev *dev) 824static unsigned int b43_phy_lcn_op_get_default_chan(struct b43_wldev *dev)
219{ 825{
220 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 826 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
@@ -233,6 +839,46 @@ static void b43_phy_lcn_op_adjust_txpower(struct b43_wldev *dev)
233} 839}
234 840
235/************************************************** 841/**************************************************
842 * R/W ops.
843 **************************************************/
844
845static u16 b43_phy_lcn_op_read(struct b43_wldev *dev, u16 reg)
846{
847 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
848 return b43_read16(dev, B43_MMIO_PHY_DATA);
849}
850
851static void b43_phy_lcn_op_write(struct b43_wldev *dev, u16 reg, u16 value)
852{
853 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
854 b43_write16(dev, B43_MMIO_PHY_DATA, value);
855}
856
857static void b43_phy_lcn_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
858 u16 set)
859{
860 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
861 b43_write16(dev, B43_MMIO_PHY_DATA,
862 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
863}
864
865static u16 b43_phy_lcn_op_radio_read(struct b43_wldev *dev, u16 reg)
866{
867 /* LCN-PHY needs 0x200 for read access */
868 reg |= 0x200;
869
870 b43_write16(dev, B43_MMIO_RADIO24_CONTROL, reg);
871 return b43_read16(dev, B43_MMIO_RADIO24_DATA);
872}
873
874static void b43_phy_lcn_op_radio_write(struct b43_wldev *dev, u16 reg,
875 u16 value)
876{
877 b43_write16(dev, B43_MMIO_RADIO24_CONTROL, reg);
878 b43_write16(dev, B43_MMIO_RADIO24_DATA, value);
879}
880
881/**************************************************
236 * PHY ops struct. 882 * PHY ops struct.
237 **************************************************/ 883 **************************************************/
238 884
@@ -241,18 +887,14 @@ const struct b43_phy_operations b43_phyops_lcn = {
241 .free = b43_phy_lcn_op_free, 887 .free = b43_phy_lcn_op_free,
242 .prepare_structs = b43_phy_lcn_op_prepare_structs, 888 .prepare_structs = b43_phy_lcn_op_prepare_structs,
243 .init = b43_phy_lcn_op_init, 889 .init = b43_phy_lcn_op_init,
244 /*
245 .phy_read = b43_phy_lcn_op_read, 890 .phy_read = b43_phy_lcn_op_read,
246 .phy_write = b43_phy_lcn_op_write, 891 .phy_write = b43_phy_lcn_op_write,
247 .phy_maskset = b43_phy_lcn_op_maskset, 892 .phy_maskset = b43_phy_lcn_op_maskset,
248 .radio_read = b43_phy_lcn_op_radio_read, 893 .radio_read = b43_phy_lcn_op_radio_read,
249 .radio_write = b43_phy_lcn_op_radio_write, 894 .radio_write = b43_phy_lcn_op_radio_write,
250 */
251 .software_rfkill = b43_phy_lcn_op_software_rfkill, 895 .software_rfkill = b43_phy_lcn_op_software_rfkill,
252 .switch_analog = b43_phy_lcn_op_switch_analog, 896 .switch_analog = b43_phy_lcn_op_switch_analog,
253 /*
254 .switch_channel = b43_phy_lcn_op_switch_channel, 897 .switch_channel = b43_phy_lcn_op_switch_channel,
255 */
256 .get_default_chan = b43_phy_lcn_op_get_default_chan, 898 .get_default_chan = b43_phy_lcn_op_get_default_chan,
257 .recalc_txpower = b43_phy_lcn_op_recalc_txpower, 899 .recalc_txpower = b43_phy_lcn_op_recalc_txpower,
258 .adjust_txpower = b43_phy_lcn_op_adjust_txpower, 900 .adjust_txpower = b43_phy_lcn_op_adjust_txpower,
diff --git a/drivers/net/wireless/b43/phy_lcn.h b/drivers/net/wireless/b43/phy_lcn.h
index 25f06e8d4531..6a7092e13fff 100644
--- a/drivers/net/wireless/b43/phy_lcn.h
+++ b/drivers/net/wireless/b43/phy_lcn.h
@@ -19,6 +19,9 @@
19 19
20 20
21struct b43_phy_lcn { 21struct b43_phy_lcn {
22 bool hw_pwr_ctl;
23 bool hw_pwr_ctl_capable;
24 u8 tx_pwr_curr_idx;
22}; 25};
23 26
24 27
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index 2eadadf5f4fc..b17d9b6c33a5 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -4,6 +4,7 @@
4 IEEE 802.11n PHY support 4 IEEE 802.11n PHY support
5 5
6 Copyright (c) 2008 Michael Buesch <m@bues.ch> 6 Copyright (c) 2008 Michael Buesch <m@bues.ch>
7 Copyright (c) 2010-2011 Rafał Miłecki <zajec5@gmail.com>
7 8
8 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
@@ -77,6 +78,7 @@ enum b43_nphy_rssi_type {
77 B43_NPHY_RSSI_TBD, 78 B43_NPHY_RSSI_TBD,
78}; 79};
79 80
81/* TODO: reorder functions */
80static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, 82static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev,
81 bool enable); 83 bool enable);
82static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd, 84static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
@@ -87,6 +89,14 @@ static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
87 u16 value, u8 core, bool off); 89 u16 value, u8 core, bool off);
88static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field, 90static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
89 u16 value, u8 core); 91 u16 value, u8 core);
92static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev);
93
94static inline bool b43_nphy_ipa(struct b43_wldev *dev)
95{
96 enum ieee80211_band band = b43_current_band(dev->wl);
97 return ((dev->phy.n->ipa2g_on && band == IEEE80211_BAND_2GHZ) ||
98 (dev->phy.n->ipa5g_on && band == IEEE80211_BAND_5GHZ));
99}
90 100
91void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna) 101void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
92{//TODO 102{//TODO
@@ -248,15 +258,25 @@ static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
248{ 258{
249 struct b43_phy_n *nphy = dev->phy.n; 259 struct b43_phy_n *nphy = dev->phy.n;
250 u8 i; 260 u8 i;
251 u16 tmp; 261 u16 bmask, val, tmp;
262 enum ieee80211_band band = b43_current_band(dev->wl);
252 263
253 if (nphy->hang_avoid) 264 if (nphy->hang_avoid)
254 b43_nphy_stay_in_carrier_search(dev, 1); 265 b43_nphy_stay_in_carrier_search(dev, 1);
255 266
256 nphy->txpwrctrl = enable; 267 nphy->txpwrctrl = enable;
257 if (!enable) { 268 if (!enable) {
258 if (dev->phy.rev >= 3) 269 if (dev->phy.rev >= 3 &&
259 ; /* TODO */ 270 (b43_phy_read(dev, B43_NPHY_TXPCTL_CMD) &
271 (B43_NPHY_TXPCTL_CMD_COEFF |
272 B43_NPHY_TXPCTL_CMD_HWPCTLEN |
273 B43_NPHY_TXPCTL_CMD_PCTLEN))) {
274 /* We disable enabled TX pwr ctl, save it's state */
275 nphy->tx_pwr_idx[0] = b43_phy_read(dev,
276 B43_NPHY_C1_TXPCTL_STAT) & 0x7f;
277 nphy->tx_pwr_idx[1] = b43_phy_read(dev,
278 B43_NPHY_C2_TXPCTL_STAT) & 0x7f;
279 }
260 280
261 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6840); 281 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6840);
262 for (i = 0; i < 84; i++) 282 for (i = 0; i < 84; i++)
@@ -285,10 +305,67 @@ static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
285 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, 305 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
286 ~B43_NPHY_BPHY_CTL3_SCALE, 0x5A); 306 ~B43_NPHY_BPHY_CTL3_SCALE, 0x5A);
287 307
288 if (dev->phy.rev < 2 && 0) 308 if (dev->phy.rev < 2 && dev->phy.is_40mhz)
289 ; /* TODO */ 309 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_TSSIRPSMW);
290 } else { 310 } else {
291 b43err(dev->wl, "enabling tx pwr ctrl not implemented yet\n"); 311 b43_ntab_write_bulk(dev, B43_NTAB16(26, 64), 84,
312 nphy->adj_pwr_tbl);
313 b43_ntab_write_bulk(dev, B43_NTAB16(27, 64), 84,
314 nphy->adj_pwr_tbl);
315
316 bmask = B43_NPHY_TXPCTL_CMD_COEFF |
317 B43_NPHY_TXPCTL_CMD_HWPCTLEN;
318 /* wl does useless check for "enable" param here */
319 val = B43_NPHY_TXPCTL_CMD_COEFF | B43_NPHY_TXPCTL_CMD_HWPCTLEN;
320 if (dev->phy.rev >= 3) {
321 bmask |= B43_NPHY_TXPCTL_CMD_PCTLEN;
322 if (val)
323 val |= B43_NPHY_TXPCTL_CMD_PCTLEN;
324 }
325 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD, ~(bmask), val);
326
327 if (band == IEEE80211_BAND_5GHZ) {
328 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD,
329 ~B43_NPHY_TXPCTL_CMD_INIT, 0x64);
330 if (dev->phy.rev > 1)
331 b43_phy_maskset(dev, B43_NPHY_TXPCTL_INIT,
332 ~B43_NPHY_TXPCTL_INIT_PIDXI1,
333 0x64);
334 }
335
336 if (dev->phy.rev >= 3) {
337 if (nphy->tx_pwr_idx[0] != 128 &&
338 nphy->tx_pwr_idx[1] != 128) {
339 /* Recover TX pwr ctl state */
340 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD,
341 ~B43_NPHY_TXPCTL_CMD_INIT,
342 nphy->tx_pwr_idx[0]);
343 if (dev->phy.rev > 1)
344 b43_phy_maskset(dev,
345 B43_NPHY_TXPCTL_INIT,
346 ~0xff, nphy->tx_pwr_idx[1]);
347 }
348 }
349
350 if (dev->phy.rev >= 3) {
351 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, ~0x100);
352 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x100);
353 } else {
354 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x4000);
355 }
356
357 if (dev->phy.rev == 2)
358 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, ~0xFF, 0x3b);
359 else if (dev->phy.rev < 2)
360 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, ~0xFF, 0x40);
361
362 if (dev->phy.rev < 2 && dev->phy.is_40mhz)
363 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_TSSIRPSMW);
364
365 if (b43_nphy_ipa(dev)) {
366 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x4);
367 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x4);
368 }
292 } 369 }
293 370
294 if (nphy->hang_avoid) 371 if (nphy->hang_avoid)
@@ -369,22 +446,23 @@ static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
369 else 446 else
370 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN2, dac_gain); 447 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN2, dac_gain);
371 448
372 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D10 + i); 449 b43_ntab_write(dev, B43_NTAB16(0x7, 0x110 + i), radio_gain);
373 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, radio_gain);
374
375 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
376 tmp = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
377 450
451 tmp = b43_ntab_read(dev, B43_NTAB16(0xF, 0x57));
378 if (i == 0) 452 if (i == 0)
379 tmp = (tmp & 0x00FF) | (bbmult << 8); 453 tmp = (tmp & 0x00FF) | (bbmult << 8);
380 else 454 else
381 tmp = (tmp & 0xFF00) | bbmult; 455 tmp = (tmp & 0xFF00) | bbmult;
382 456 b43_ntab_write(dev, B43_NTAB16(0xF, 0x57), tmp);
383 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57); 457
384 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, tmp); 458 if (b43_nphy_ipa(dev)) {
385 459 u32 tmp32;
386 if (0) 460 u16 reg = (i == 0) ?
387 ; /* TODO */ 461 B43_NPHY_PAPD_EN0 : B43_NPHY_PAPD_EN1;
462 tmp32 = b43_ntab_read(dev, B43_NTAB32(26 + i, txpi[i]));
463 b43_phy_maskset(dev, reg, 0xE00F, (u32) tmp32 << 4);
464 b43_phy_set(dev, reg, 0x4);
465 }
388 } 466 }
389 467
390 b43_phy_mask(dev, B43_NPHY_BPHY_CTL2, ~B43_NPHY_BPHY_CTL2_LUT); 468 b43_phy_mask(dev, B43_NPHY_BPHY_CTL2, ~B43_NPHY_BPHY_CTL2_LUT);
@@ -393,6 +471,57 @@ static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
393 b43_nphy_stay_in_carrier_search(dev, 0); 471 b43_nphy_stay_in_carrier_search(dev, 0);
394} 472}
395 473
474static void b43_nphy_tx_gain_table_upload(struct b43_wldev *dev)
475{
476 struct b43_phy *phy = &dev->phy;
477
478 const u32 *table = NULL;
479#if 0
480 TODO: b43_ntab_papd_pga_gain_delta_ipa_2*
481 u32 rfpwr_offset;
482 u8 pga_gain;
483 int i;
484#endif
485
486 if (phy->rev >= 3) {
487 if (b43_nphy_ipa(dev)) {
488 table = b43_nphy_get_ipa_gain_table(dev);
489 } else {
490 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
491 if (phy->rev == 3)
492 table = b43_ntab_tx_gain_rev3_5ghz;
493 if (phy->rev == 4)
494 table = b43_ntab_tx_gain_rev4_5ghz;
495 else
496 table = b43_ntab_tx_gain_rev5plus_5ghz;
497 } else {
498 table = b43_ntab_tx_gain_rev3plus_2ghz;
499 }
500 }
501 } else {
502 table = b43_ntab_tx_gain_rev0_1_2;
503 }
504 b43_ntab_write_bulk(dev, B43_NTAB32(26, 192), 128, table);
505 b43_ntab_write_bulk(dev, B43_NTAB32(27, 192), 128, table);
506
507 if (phy->rev >= 3) {
508#if 0
509 nphy->gmval = (table[0] >> 16) & 0x7000;
510
511 for (i = 0; i < 128; i++) {
512 pga_gain = (table[i] >> 24) & 0xF;
513 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
514 rfpwr_offset = b43_ntab_papd_pga_gain_delta_ipa_2g[pga_gain];
515 else
516 rfpwr_offset = b43_ntab_papd_pga_gain_delta_ipa_5g[pga_gain];
517 b43_ntab_write(dev, B43_NTAB32(26, 576 + i),
518 rfpwr_offset);
519 b43_ntab_write(dev, B43_NTAB32(27, 576 + i),
520 rfpwr_offset);
521 }
522#endif
523 }
524}
396 525
397/* http://bcm-v4.sipsolutions.net/802.11/PHY/Radio/2055Setup */ 526/* http://bcm-v4.sipsolutions.net/802.11/PHY/Radio/2055Setup */
398static void b43_radio_2055_setup(struct b43_wldev *dev, 527static void b43_radio_2055_setup(struct b43_wldev *dev,
@@ -581,14 +710,10 @@ static void b43_nphy_pa_override(struct b43_wldev *dev, bool enable)
581/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxLpFbw */ 710/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxLpFbw */
582static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev) 711static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
583{ 712{
584 struct b43_phy_n *nphy = dev->phy.n;
585 u16 tmp; 713 u16 tmp;
586 enum ieee80211_band band = b43_current_band(dev->wl);
587 bool ipa = (nphy->ipa2g_on && band == IEEE80211_BAND_2GHZ) ||
588 (nphy->ipa5g_on && band == IEEE80211_BAND_5GHZ);
589 714
590 if (dev->phy.rev >= 3) { 715 if (dev->phy.rev >= 3) {
591 if (ipa) { 716 if (b43_nphy_ipa(dev)) {
592 tmp = 4; 717 tmp = 4;
593 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S2, 718 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S2,
594 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp); 719 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
@@ -899,11 +1024,7 @@ static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
899static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev) 1024static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
900{ 1025{
901 u16 array[4]; 1026 u16 array[4];
902 int i; 1027 b43_ntab_read_bulk(dev, B43_NTAB16(0xF, 0x50), 4, array);
903
904 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C50);
905 for (i = 0; i < 4; i++)
906 array[i] = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
907 1028
908 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW0, array[0]); 1029 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW0, array[0]);
909 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW1, array[1]); 1030 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW1, array[1]);
@@ -1366,180 +1487,220 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
1366 } 1487 }
1367} 1488}
1368 1489
1369/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */ 1490static void b43_nphy_workarounds_rev3plus(struct b43_wldev *dev)
1370static void b43_nphy_workarounds(struct b43_wldev *dev)
1371{ 1491{
1492 struct b43_phy_n *nphy = dev->phy.n;
1372 struct ssb_sprom *sprom = dev->dev->bus_sprom; 1493 struct ssb_sprom *sprom = dev->dev->bus_sprom;
1373 struct b43_phy *phy = &dev->phy;
1374 struct b43_phy_n *nphy = phy->n;
1375 1494
1376 u8 events1[7] = { 0x0, 0x1, 0x2, 0x8, 0x4, 0x5, 0x3 }; 1495 /* TX to RX */
1377 u8 delays1[7] = { 0x8, 0x6, 0x6, 0x2, 0x4, 0x3C, 0x1 }; 1496 u8 tx2rx_events[9] = { 0x4, 0x3, 0x6, 0x5, 0x2, 0x1, 0x8, 0x1F };
1378 1497 u8 tx2rx_delays[9] = { 8, 4, 2, 2, 4, 4, 6, 1 };
1379 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 }; 1498 /* RX to TX */
1380 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 }; 1499 u8 rx2tx_events_ipa[9] = { 0x0, 0x1, 0x2, 0x8, 0x5, 0x6, 0xF, 0x3,
1500 0x1F };
1501 u8 rx2tx_delays_ipa[9] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
1502 u8 rx2tx_events[9] = { 0x0, 0x1, 0x2, 0x8, 0x5, 0x6, 0x3, 0x4, 0x1F };
1503 u8 rx2tx_delays[9] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 };
1381 1504
1382 u16 tmp16; 1505 u16 tmp16;
1383 u32 tmp32; 1506 u32 tmp32;
1384 1507
1385 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) 1508 tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0));
1386 b43_nphy_classifier(dev, 1, 0); 1509 tmp32 &= 0xffffff;
1387 else 1510 b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32);
1388 b43_nphy_classifier(dev, 1, 1); 1511
1512 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x0125);
1513 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x01B3);
1514 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x0105);
1515 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x016E);
1516 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0x00CD);
1517 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x0020);
1518
1519 b43_phy_write(dev, B43_NPHY_C2_CLIP1_MEDGAIN, 0x000C);
1520 b43_phy_write(dev, 0x2AE, 0x000C);
1521
1522 /* TX to RX */
1523 b43_nphy_set_rf_sequence(dev, 1, tx2rx_events, tx2rx_delays, 9);
1524
1525 /* RX to TX */
1526 if (b43_nphy_ipa(dev))
1527 b43_nphy_set_rf_sequence(dev, 1, rx2tx_events_ipa,
1528 rx2tx_delays_ipa, 9);
1529 if (nphy->hw_phyrxchain != 3 &&
1530 nphy->hw_phyrxchain != nphy->hw_phytxchain) {
1531 if (b43_nphy_ipa(dev)) {
1532 rx2tx_delays[5] = 59;
1533 rx2tx_delays[6] = 1;
1534 rx2tx_events[7] = 0x1F;
1535 }
1536 b43_nphy_set_rf_sequence(dev, 1, rx2tx_events, rx2tx_delays, 9);
1537 }
1389 1538
1390 if (nphy->hang_avoid) 1539 tmp16 = (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) ?
1391 b43_nphy_stay_in_carrier_search(dev, 1); 1540 0x2 : 0x9C40;
1541 b43_phy_write(dev, B43_NPHY_ENDROP_TLEN, tmp16);
1392 1542
1393 b43_phy_set(dev, B43_NPHY_IQFLIP, 1543 b43_phy_maskset(dev, 0x294, 0xF0FF, 0x0700);
1394 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
1395 1544
1396 if (dev->phy.rev >= 3) { 1545 b43_ntab_write(dev, B43_NTAB32(16, 3), 0x18D);
1397 tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0)); 1546 b43_ntab_write(dev, B43_NTAB32(16, 127), 0x18D);
1398 tmp32 &= 0xffffff;
1399 b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32);
1400 1547
1401 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x0125); 1548 b43_nphy_gain_ctrl_workarounds(dev);
1402 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x01B3);
1403 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x0105);
1404 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x016E);
1405 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0x00CD);
1406 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x0020);
1407 1549
1408 b43_phy_write(dev, B43_NPHY_C2_CLIP1_MEDGAIN, 0x000C); 1550 b43_ntab_write(dev, B43_NTAB32(8, 0), 2);
1409 b43_phy_write(dev, 0x2AE, 0x000C); 1551 b43_ntab_write(dev, B43_NTAB32(8, 16), 2);
1410 1552
1411 /* TODO */ 1553 /* TODO */
1412 1554
1413 tmp16 = (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) ? 1555 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_MAST_BIAS, 0x00);
1414 0x2 : 0x9C40; 1556 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_MAST_BIAS, 0x00);
1415 b43_phy_write(dev, B43_NPHY_ENDROP_TLEN, tmp16); 1557 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_BIAS_MAIN, 0x06);
1558 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_MAIN, 0x06);
1559 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_BIAS_AUX, 0x07);
1560 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_AUX, 0x07);
1561 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_LOB_BIAS, 0x88);
1562 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_LOB_BIAS, 0x88);
1563 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
1564 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
1565
1566 /* N PHY WAR TX Chain Update with hw_phytxchain as argument */
1567
1568 if ((sprom->boardflags2_lo & B43_BFL2_APLL_WAR &&
1569 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
1570 (sprom->boardflags2_lo & B43_BFL2_GPLL_WAR &&
1571 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ))
1572 tmp32 = 0x00088888;
1573 else
1574 tmp32 = 0x88888888;
1575 b43_ntab_write(dev, B43_NTAB32(30, 1), tmp32);
1576 b43_ntab_write(dev, B43_NTAB32(30, 2), tmp32);
1577 b43_ntab_write(dev, B43_NTAB32(30, 3), tmp32);
1578
1579 if (dev->phy.rev == 4 &&
1580 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1581 b43_radio_write(dev, B2056_TX0 | B2056_TX_GMBB_IDAC,
1582 0x70);
1583 b43_radio_write(dev, B2056_TX1 | B2056_TX_GMBB_IDAC,
1584 0x70);
1585 }
1416 1586
1417 b43_phy_maskset(dev, 0x294, 0xF0FF, 0x0700); 1587 b43_phy_write(dev, 0x224, 0x039C);
1588 b43_phy_write(dev, 0x225, 0x0357);
1589 b43_phy_write(dev, 0x226, 0x0317);
1590 b43_phy_write(dev, 0x227, 0x02D7);
1591 b43_phy_write(dev, 0x228, 0x039C);
1592 b43_phy_write(dev, 0x229, 0x0357);
1593 b43_phy_write(dev, 0x22A, 0x0317);
1594 b43_phy_write(dev, 0x22B, 0x02D7);
1595 b43_phy_write(dev, 0x22C, 0x039C);
1596 b43_phy_write(dev, 0x22D, 0x0357);
1597 b43_phy_write(dev, 0x22E, 0x0317);
1598 b43_phy_write(dev, 0x22F, 0x02D7);
1599}
1418 1600
1419 b43_ntab_write(dev, B43_NTAB32(16, 3), 0x18D); 1601static void b43_nphy_workarounds_rev1_2(struct b43_wldev *dev)
1420 b43_ntab_write(dev, B43_NTAB32(16, 127), 0x18D); 1602{
1603 struct ssb_sprom *sprom = dev->dev->bus_sprom;
1604 struct b43_phy *phy = &dev->phy;
1605 struct b43_phy_n *nphy = phy->n;
1421 1606
1422 b43_nphy_gain_ctrl_workarounds(dev); 1607 u8 events1[7] = { 0x0, 0x1, 0x2, 0x8, 0x4, 0x5, 0x3 };
1608 u8 delays1[7] = { 0x8, 0x6, 0x6, 0x2, 0x4, 0x3C, 0x1 };
1423 1609
1424 b43_ntab_write(dev, B43_NTAB32(8, 0), 2); 1610 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
1425 b43_ntab_write(dev, B43_NTAB32(8, 16), 2); 1611 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
1426 1612
1427 /* TODO */ 1613 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
1614 nphy->band5g_pwrgain) {
1615 b43_radio_mask(dev, B2055_C1_TX_RF_SPARE, ~0x8);
1616 b43_radio_mask(dev, B2055_C2_TX_RF_SPARE, ~0x8);
1617 } else {
1618 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8);
1619 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
1620 }
1428 1621
1429 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_MAST_BIAS, 0x00); 1622 b43_ntab_write(dev, B43_NTAB16(8, 0x00), 0x000A);
1430 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_MAST_BIAS, 0x00); 1623 b43_ntab_write(dev, B43_NTAB16(8, 0x10), 0x000A);
1431 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_BIAS_MAIN, 0x06); 1624 b43_ntab_write(dev, B43_NTAB16(8, 0x02), 0xCDAA);
1432 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_MAIN, 0x06); 1625 b43_ntab_write(dev, B43_NTAB16(8, 0x12), 0xCDAA);
1433 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_BIAS_AUX, 0x07);
1434 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_AUX, 0x07);
1435 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_LOB_BIAS, 0x88);
1436 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_LOB_BIAS, 0x88);
1437 b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
1438 b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
1439
1440 /* N PHY WAR TX Chain Update with hw_phytxchain as argument */
1441
1442 if ((sprom->boardflags2_lo & B43_BFL2_APLL_WAR &&
1443 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
1444 (sprom->boardflags2_lo & B43_BFL2_GPLL_WAR &&
1445 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ))
1446 tmp32 = 0x00088888;
1447 else
1448 tmp32 = 0x88888888;
1449 b43_ntab_write(dev, B43_NTAB32(30, 1), tmp32);
1450 b43_ntab_write(dev, B43_NTAB32(30, 2), tmp32);
1451 b43_ntab_write(dev, B43_NTAB32(30, 3), tmp32);
1452
1453 if (dev->phy.rev == 4 &&
1454 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1455 b43_radio_write(dev, B2056_TX0 | B2056_TX_GMBB_IDAC,
1456 0x70);
1457 b43_radio_write(dev, B2056_TX1 | B2056_TX_GMBB_IDAC,
1458 0x70);
1459 }
1460 1626
1461 b43_phy_write(dev, 0x224, 0x039C); 1627 if (dev->phy.rev < 2) {
1462 b43_phy_write(dev, 0x225, 0x0357); 1628 b43_ntab_write(dev, B43_NTAB16(8, 0x08), 0x0000);
1463 b43_phy_write(dev, 0x226, 0x0317); 1629 b43_ntab_write(dev, B43_NTAB16(8, 0x18), 0x0000);
1464 b43_phy_write(dev, 0x227, 0x02D7); 1630 b43_ntab_write(dev, B43_NTAB16(8, 0x07), 0x7AAB);
1465 b43_phy_write(dev, 0x228, 0x039C); 1631 b43_ntab_write(dev, B43_NTAB16(8, 0x17), 0x7AAB);
1466 b43_phy_write(dev, 0x229, 0x0357); 1632 b43_ntab_write(dev, B43_NTAB16(8, 0x06), 0x0800);
1467 b43_phy_write(dev, 0x22A, 0x0317); 1633 b43_ntab_write(dev, B43_NTAB16(8, 0x16), 0x0800);
1468 b43_phy_write(dev, 0x22B, 0x02D7); 1634 }
1469 b43_phy_write(dev, 0x22C, 0x039C);
1470 b43_phy_write(dev, 0x22D, 0x0357);
1471 b43_phy_write(dev, 0x22E, 0x0317);
1472 b43_phy_write(dev, 0x22F, 0x02D7);
1473 } else {
1474 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
1475 nphy->band5g_pwrgain) {
1476 b43_radio_mask(dev, B2055_C1_TX_RF_SPARE, ~0x8);
1477 b43_radio_mask(dev, B2055_C2_TX_RF_SPARE, ~0x8);
1478 } else {
1479 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8);
1480 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
1481 }
1482 1635
1483 b43_ntab_write(dev, B43_NTAB16(8, 0x00), 0x000A); 1636 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
1484 b43_ntab_write(dev, B43_NTAB16(8, 0x10), 0x000A); 1637 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
1485 b43_ntab_write(dev, B43_NTAB16(8, 0x02), 0xCDAA); 1638 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
1486 b43_ntab_write(dev, B43_NTAB16(8, 0x12), 0xCDAA); 1639 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
1487 1640
1488 if (dev->phy.rev < 2) { 1641 if (sprom->boardflags2_lo & B43_BFL2_SKWRKFEM_BRD &&
1489 b43_ntab_write(dev, B43_NTAB16(8, 0x08), 0x0000); 1642 dev->dev->board_type == 0x8B) {
1490 b43_ntab_write(dev, B43_NTAB16(8, 0x18), 0x0000); 1643 delays1[0] = 0x1;
1491 b43_ntab_write(dev, B43_NTAB16(8, 0x07), 0x7AAB); 1644 delays1[5] = 0x14;
1492 b43_ntab_write(dev, B43_NTAB16(8, 0x17), 0x7AAB); 1645 }
1493 b43_ntab_write(dev, B43_NTAB16(8, 0x06), 0x0800); 1646 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7);
1494 b43_ntab_write(dev, B43_NTAB16(8, 0x16), 0x0800); 1647 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7);
1495 }
1496 1648
1497 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8); 1649 b43_nphy_gain_ctrl_workarounds(dev);
1498 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
1499 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
1500 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
1501 1650
1502 if (sprom->boardflags2_lo & 0x100 && 1651 if (dev->phy.rev < 2) {
1503 dev->dev->board_type == 0x8B) { 1652 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2)
1504 delays1[0] = 0x1; 1653 b43_hf_write(dev, b43_hf_read(dev) |
1505 delays1[5] = 0x14; 1654 B43_HF_MLADVW);
1506 } 1655 } else if (dev->phy.rev == 2) {
1507 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7); 1656 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0);
1508 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7); 1657 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0);
1658 }
1509 1659
1510 b43_nphy_gain_ctrl_workarounds(dev); 1660 if (dev->phy.rev < 2)
1661 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL,
1662 ~B43_NPHY_SCRAM_SIGCTL_SCM);
1663
1664 /* Set phase track alpha and beta */
1665 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125);
1666 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3);
1667 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105);
1668 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E);
1669 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD);
1670 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
1671
1672 b43_phy_mask(dev, B43_NPHY_PIL_DW1,
1673 ~B43_NPHY_PIL_DW_64QAM & 0xFFFF);
1674 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5);
1675 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4);
1676 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00);
1677
1678 if (dev->phy.rev == 2)
1679 b43_phy_set(dev, B43_NPHY_FINERX2_CGC,
1680 B43_NPHY_FINERX2_CGC_DECGC);
1681}
1511 1682
1512 if (dev->phy.rev < 2) { 1683/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
1513 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2) 1684static void b43_nphy_workarounds(struct b43_wldev *dev)
1514 b43_hf_write(dev, b43_hf_read(dev) | 1685{
1515 B43_HF_MLADVW); 1686 struct b43_phy *phy = &dev->phy;
1516 } else if (dev->phy.rev == 2) { 1687 struct b43_phy_n *nphy = phy->n;
1517 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0);
1518 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0);
1519 }
1520 1688
1521 if (dev->phy.rev < 2) 1689 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
1522 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL, 1690 b43_nphy_classifier(dev, 1, 0);
1523 ~B43_NPHY_SCRAM_SIGCTL_SCM); 1691 else
1692 b43_nphy_classifier(dev, 1, 1);
1524 1693
1525 /* Set phase track alpha and beta */ 1694 if (nphy->hang_avoid)
1526 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125); 1695 b43_nphy_stay_in_carrier_search(dev, 1);
1527 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3);
1528 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105);
1529 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E);
1530 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD);
1531 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
1532 1696
1533 b43_phy_mask(dev, B43_NPHY_PIL_DW1, 1697 b43_phy_set(dev, B43_NPHY_IQFLIP,
1534 ~B43_NPHY_PIL_DW_64QAM & 0xFFFF); 1698 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
1535 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5);
1536 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4);
1537 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00);
1538 1699
1539 if (dev->phy.rev == 2) 1700 if (dev->phy.rev >= 3)
1540 b43_phy_set(dev, B43_NPHY_FINERX2_CGC, 1701 b43_nphy_workarounds_rev3plus(dev);
1541 B43_NPHY_FINERX2_CGC_DECGC); 1702 else
1542 } 1703 b43_nphy_workarounds_rev1_2(dev);
1543 1704
1544 if (nphy->hang_avoid) 1705 if (nphy->hang_avoid)
1545 b43_nphy_stay_in_carrier_search(dev, 0); 1706 b43_nphy_stay_in_carrier_search(dev, 0);
@@ -2135,7 +2296,6 @@ static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
2135 2296
2136static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type) 2297static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
2137{ 2298{
2138 struct b43_phy_n *nphy = dev->phy.n;
2139 u8 i; 2299 u8 i;
2140 u16 reg, val; 2300 u16 reg, val;
2141 2301
@@ -2199,10 +2359,7 @@ static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
2199 enum ieee80211_band band = 2359 enum ieee80211_band band =
2200 b43_current_band(dev->wl); 2360 b43_current_band(dev->wl);
2201 2361
2202 if ((nphy->ipa2g_on && 2362 if (b43_nphy_ipa(dev))
2203 band == IEEE80211_BAND_2GHZ) ||
2204 (nphy->ipa5g_on &&
2205 band == IEEE80211_BAND_5GHZ))
2206 val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE; 2363 val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE;
2207 else 2364 else
2208 val = 0x11; 2365 val = 0x11;
@@ -2577,8 +2734,8 @@ static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev)
2577{ 2734{
2578 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { 2735 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2579 if (dev->phy.rev >= 6) { 2736 if (dev->phy.rev >= 6) {
2580 /* TODO If the chip is 47162 2737 if (dev->dev->chip_id == 47162)
2581 return txpwrctrl_tx_gain_ipa_rev5 */ 2738 return txpwrctrl_tx_gain_ipa_rev5;
2582 return txpwrctrl_tx_gain_ipa_rev6; 2739 return txpwrctrl_tx_gain_ipa_rev6;
2583 } else if (dev->phy.rev >= 5) { 2740 } else if (dev->phy.rev >= 5) {
2584 return txpwrctrl_tx_gain_ipa_rev5; 2741 return txpwrctrl_tx_gain_ipa_rev5;
@@ -2828,10 +2985,7 @@ static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
2828 enum ieee80211_band band = 2985 enum ieee80211_band band =
2829 b43_current_band(dev->wl); 2986 b43_current_band(dev->wl);
2830 2987
2831 if ((nphy->ipa2g_on && 2988 if (b43_nphy_ipa(dev)) {
2832 band == IEEE80211_BAND_2GHZ) ||
2833 (nphy->ipa5g_on &&
2834 band == IEEE80211_BAND_5GHZ)) {
2835 table = b43_nphy_get_ipa_gain_table(dev); 2989 table = b43_nphy_get_ipa_gain_table(dev);
2836 } else { 2990 } else {
2837 if (band == IEEE80211_BAND_5GHZ) { 2991 if (band == IEEE80211_BAND_5GHZ) {
@@ -3648,7 +3802,7 @@ int b43_phy_initn(struct b43_wldev *dev)
3648 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20); 3802 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20);
3649 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20); 3803 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20);
3650 3804
3651 if (sprom->boardflags2_lo & 0x100 || 3805 if (sprom->boardflags2_lo & B43_BFL2_SKWRKFEM_BRD ||
3652 (dev->dev->board_vendor == PCI_VENDOR_ID_APPLE && 3806 (dev->dev->board_vendor == PCI_VENDOR_ID_APPLE &&
3653 dev->dev->board_type == 0x8B)) 3807 dev->dev->board_type == 0x8B))
3654 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0); 3808 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0);
@@ -3667,8 +3821,7 @@ int b43_phy_initn(struct b43_wldev *dev)
3667 } 3821 }
3668 3822
3669 tmp2 = b43_current_band(dev->wl); 3823 tmp2 = b43_current_band(dev->wl);
3670 if ((nphy->ipa2g_on && tmp2 == IEEE80211_BAND_2GHZ) || 3824 if (b43_nphy_ipa(dev)) {
3671 (nphy->ipa5g_on && tmp2 == IEEE80211_BAND_5GHZ)) {
3672 b43_phy_set(dev, B43_NPHY_PAPD_EN0, 0x1); 3825 b43_phy_set(dev, B43_NPHY_PAPD_EN0, 0x1);
3673 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ0, 0x007F, 3826 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ0, 0x007F,
3674 nphy->papd_epsilon_offset[0] << 7); 3827 nphy->papd_epsilon_offset[0] << 7);
@@ -3706,15 +3859,7 @@ int b43_phy_initn(struct b43_wldev *dev)
3706 b43_nphy_tx_power_fix(dev); 3859 b43_nphy_tx_power_fix(dev);
3707 /* TODO N PHY TX Power Control Idle TSSI */ 3860 /* TODO N PHY TX Power Control Idle TSSI */
3708 /* TODO N PHY TX Power Control Setup */ 3861 /* TODO N PHY TX Power Control Setup */
3709 3862 b43_nphy_tx_gain_table_upload(dev);
3710 if (phy->rev >= 3) {
3711 /* TODO */
3712 } else {
3713 b43_ntab_write_bulk(dev, B43_NTAB32(26, 192), 128,
3714 b43_ntab_tx_gain_rev0_1_2);
3715 b43_ntab_write_bulk(dev, B43_NTAB32(27, 192), 128,
3716 b43_ntab_tx_gain_rev0_1_2);
3717 }
3718 3863
3719 if (nphy->phyrxchain != 3) 3864 if (nphy->phyrxchain != 3)
3720 b43_nphy_set_rx_core_state(dev, nphy->phyrxchain); 3865 b43_nphy_set_rx_core_state(dev, nphy->phyrxchain);
@@ -3918,6 +4063,10 @@ static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
3918 nphy->txrx_chain = 2; /* sth different than 0 and 1 for now */ 4063 nphy->txrx_chain = 2; /* sth different than 0 and 1 for now */
3919 nphy->phyrxchain = 3; /* to avoid b43_nphy_set_rx_core_state like wl */ 4064 nphy->phyrxchain = 3; /* to avoid b43_nphy_set_rx_core_state like wl */
3920 nphy->perical = 2; /* avoid additional rssi cal on init (like wl) */ 4065 nphy->perical = 2; /* avoid additional rssi cal on init (like wl) */
4066 /* 128 can mean disabled-by-default state of TX pwr ctl. Max value is
4067 * 0x7f == 127 and we check for 128 when restoring TX pwr ctl. */
4068 nphy->tx_pwr_idx[0] = 128;
4069 nphy->tx_pwr_idx[1] = 128;
3921} 4070}
3922 4071
3923static void b43_nphy_op_free(struct b43_wldev *dev) 4072static void b43_nphy_op_free(struct b43_wldev *dev)
diff --git a/drivers/net/wireless/b43/phy_n.h b/drivers/net/wireless/b43/phy_n.h
index e789a89f1047..fbf520285bd1 100644
--- a/drivers/net/wireless/b43/phy_n.h
+++ b/drivers/net/wireless/b43/phy_n.h
@@ -764,6 +764,8 @@ struct b43_phy_n {
764 u8 cal_orig_pwr_idx[2]; 764 u8 cal_orig_pwr_idx[2];
765 u8 measure_hold; 765 u8 measure_hold;
766 u8 phyrxchain; 766 u8 phyrxchain;
767 u8 hw_phyrxchain;
768 u8 hw_phytxchain;
767 u8 perical; 769 u8 perical;
768 u32 deaf_count; 770 u32 deaf_count;
769 u32 rxcalparams; 771 u32 rxcalparams;
@@ -783,6 +785,8 @@ struct b43_phy_n {
783 u16 mphase_txcal_bestcoeffs[11]; 785 u16 mphase_txcal_bestcoeffs[11];
784 786
785 bool txpwrctrl; 787 bool txpwrctrl;
788 u8 tx_pwr_idx[2];
789 u16 adj_pwr_tbl[84];
786 u16 txcal_bbmult; 790 u16 txcal_bbmult;
787 u16 txiqlocal_bestc[11]; 791 u16 txiqlocal_bestc[11];
788 bool txiqlocal_coeffsvalid; 792 bool txiqlocal_coeffsvalid;
diff --git a/drivers/net/wireless/b43/radio_2055.c b/drivers/net/wireless/b43/radio_2055.c
index 93643f18c2b3..5289a18ddd8c 100644
--- a/drivers/net/wireless/b43/radio_2055.c
+++ b/drivers/net/wireless/b43/radio_2055.c
@@ -4,6 +4,7 @@
4 IEEE 802.11n PHY and radio device data tables 4 IEEE 802.11n PHY and radio device data tables
5 5
6 Copyright (c) 2008 Michael Buesch <m@bues.ch> 6 Copyright (c) 2008 Michael Buesch <m@bues.ch>
7 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
7 8
8 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
diff --git a/drivers/net/wireless/b43/radio_2056.c b/drivers/net/wireless/b43/radio_2056.c
index 8890df067029..a01f776ca4de 100644
--- a/drivers/net/wireless/b43/radio_2056.c
+++ b/drivers/net/wireless/b43/radio_2056.c
@@ -3,6 +3,8 @@
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 IEEE 802.11n 2056 radio device data tables 4 IEEE 802.11n 2056 radio device data tables
5 5
6 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
7
6 This program is free software; you can redistribute it and/or modify 8 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 9 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or 10 the Free Software Foundation; either version 2 of the License, or
diff --git a/drivers/net/wireless/b43/radio_2056.h b/drivers/net/wireless/b43/radio_2056.h
index d52df6be705a..a7159d8578be 100644
--- a/drivers/net/wireless/b43/radio_2056.h
+++ b/drivers/net/wireless/b43/radio_2056.h
@@ -1,29 +1,3 @@
1/*
2
3 Broadcom B43 wireless driver
4
5 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
6
7 Some parts of the code in this file are derived from the brcm80211
8 driver Copyright (c) 2010 Broadcom Corporation
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; see the file COPYING. If not, write to
22 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
23 Boston, MA 02110-1301, USA.
24
25*/
26
27#ifndef B43_RADIO_2056_H_ 1#ifndef B43_RADIO_2056_H_
28#define B43_RADIO_2056_H_ 2#define B43_RADIO_2056_H_
29 3
diff --git a/drivers/net/wireless/b43/radio_2059.c b/drivers/net/wireless/b43/radio_2059.c
index f029f6e1f5d1..d4ce8a12ff9a 100644
--- a/drivers/net/wireless/b43/radio_2059.c
+++ b/drivers/net/wireless/b43/radio_2059.c
@@ -3,6 +3,8 @@
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 IEEE 802.11n 2059 radio device data tables 4 IEEE 802.11n 2059 radio device data tables
5 5
6 Copyright (c) 2011 Rafał Miłecki <zajec5@gmail.com>
7
6 This program is free software; you can redistribute it and/or modify 8 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 9 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or 10 the Free Software Foundation; either version 2 of the License, or
diff --git a/drivers/net/wireless/b43/tables_nphy.c b/drivers/net/wireless/b43/tables_nphy.c
index 916f238a71df..7b326f2efdc9 100644
--- a/drivers/net/wireless/b43/tables_nphy.c
+++ b/drivers/net/wireless/b43/tables_nphy.c
@@ -4,6 +4,7 @@
4 IEEE 802.11n PHY data tables 4 IEEE 802.11n PHY data tables
5 5
6 Copyright (c) 2008 Michael Buesch <m@bues.ch> 6 Copyright (c) 2008 Michael Buesch <m@bues.ch>
7 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
7 8
8 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
diff --git a/drivers/net/wireless/b43/tables_phy_ht.c b/drivers/net/wireless/b43/tables_phy_ht.c
index 677d217b5fb3..176c49d74ef4 100644
--- a/drivers/net/wireless/b43/tables_phy_ht.c
+++ b/drivers/net/wireless/b43/tables_phy_ht.c
@@ -3,6 +3,8 @@
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 IEEE 802.11n HT-PHY data tables 4 IEEE 802.11n HT-PHY data tables
5 5
6 Copyright (c) 2011 Rafał Miłecki <zajec5@gmail.com>
7
6 This program is free software; you can redistribute it and/or modify 8 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 9 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or 10 the Free Software Foundation; either version 2 of the License, or
diff --git a/drivers/net/wireless/b43/tables_phy_lcn.c b/drivers/net/wireless/b43/tables_phy_lcn.c
index 0a5842808a78..9d484e2f79bf 100644
--- a/drivers/net/wireless/b43/tables_phy_lcn.c
+++ b/drivers/net/wireless/b43/tables_phy_lcn.c
@@ -3,6 +3,8 @@
3 Broadcom B43 wireless driver 3 Broadcom B43 wireless driver
4 IEEE 802.11n LCN-PHY data tables 4 IEEE 802.11n LCN-PHY data tables
5 5
6 Copyright (c) 2011 Rafał Miłecki <zajec5@gmail.com>
7
6 This program is free software; you can redistribute it and/or modify 8 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by 9 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or 10 the Free Software Foundation; either version 2 of the License, or
@@ -25,6 +27,18 @@
25#include "phy_common.h" 27#include "phy_common.h"
26#include "phy_lcn.h" 28#include "phy_lcn.h"
27 29
30struct b43_lcntab_tx_gain_tbl_entry {
31 u8 gm;
32 u8 pga;
33 u8 pad;
34 u8 dac;
35 u8 bb_mult;
36};
37
38/**************************************************
39 * Static tables.
40 **************************************************/
41
28static const u16 b43_lcntab_0x02[] = { 42static const u16 b43_lcntab_0x02[] = {
29 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 43 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
30 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 44 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d,
@@ -296,6 +310,160 @@ static const u32 b43_lcntab_0x18[] = {
296}; 310};
297 311
298/************************************************** 312/**************************************************
313 * TX gain.
314 **************************************************/
315
316const struct b43_lcntab_tx_gain_tbl_entry
317 b43_lcntab_tx_gain_tbl_2ghz_ext_pa_rev0[B43_LCNTAB_TX_GAIN_SIZE] = {
318 { 0x03, 0x00, 0x1f, 0x0, 0x48 },
319 { 0x03, 0x00, 0x1f, 0x0, 0x46 },
320 { 0x03, 0x00, 0x1f, 0x0, 0x44 },
321 { 0x03, 0x00, 0x1e, 0x0, 0x43 },
322 { 0x03, 0x00, 0x1d, 0x0, 0x44 },
323 { 0x03, 0x00, 0x1c, 0x0, 0x44 },
324 { 0x03, 0x00, 0x1b, 0x0, 0x45 },
325 { 0x03, 0x00, 0x1a, 0x0, 0x46 },
326 { 0x03, 0x00, 0x19, 0x0, 0x46 },
327 { 0x03, 0x00, 0x18, 0x0, 0x47 },
328 { 0x03, 0x00, 0x17, 0x0, 0x48 },
329 { 0x03, 0x00, 0x17, 0x0, 0x46 },
330 { 0x03, 0x00, 0x16, 0x0, 0x47 },
331 { 0x03, 0x00, 0x15, 0x0, 0x48 },
332 { 0x03, 0x00, 0x15, 0x0, 0x46 },
333 { 0x03, 0x00, 0x15, 0x0, 0x44 },
334 { 0x03, 0x00, 0x15, 0x0, 0x42 },
335 { 0x03, 0x00, 0x15, 0x0, 0x40 },
336 { 0x03, 0x00, 0x15, 0x0, 0x3f },
337 { 0x03, 0x00, 0x14, 0x0, 0x40 },
338 { 0x03, 0x00, 0x13, 0x0, 0x41 },
339 { 0x03, 0x00, 0x13, 0x0, 0x40 },
340 { 0x03, 0x00, 0x12, 0x0, 0x41 },
341 { 0x03, 0x00, 0x12, 0x0, 0x40 },
342 { 0x03, 0x00, 0x11, 0x0, 0x41 },
343 { 0x03, 0x00, 0x11, 0x0, 0x40 },
344 { 0x03, 0x00, 0x10, 0x0, 0x41 },
345 { 0x03, 0x00, 0x10, 0x0, 0x40 },
346 { 0x03, 0x00, 0x10, 0x0, 0x3e },
347 { 0x03, 0x00, 0x10, 0x0, 0x3c },
348 { 0x03, 0x00, 0x10, 0x0, 0x3a },
349 { 0x03, 0x00, 0x0f, 0x0, 0x3d },
350 { 0x03, 0x00, 0x0f, 0x0, 0x3b },
351 { 0x03, 0x00, 0x0e, 0x0, 0x3d },
352 { 0x03, 0x00, 0x0e, 0x0, 0x3c },
353 { 0x03, 0x00, 0x0e, 0x0, 0x3a },
354 { 0x03, 0x00, 0x0d, 0x0, 0x3c },
355 { 0x03, 0x00, 0x0d, 0x0, 0x3b },
356 { 0x03, 0x00, 0x0c, 0x0, 0x3e },
357 { 0x03, 0x00, 0x0c, 0x0, 0x3c },
358 { 0x03, 0x00, 0x0c, 0x0, 0x3a },
359 { 0x03, 0x00, 0x0b, 0x0, 0x3e },
360 { 0x03, 0x00, 0x0b, 0x0, 0x3c },
361 { 0x03, 0x00, 0x0b, 0x0, 0x3b },
362 { 0x03, 0x00, 0x0b, 0x0, 0x39 },
363 { 0x03, 0x00, 0x0a, 0x0, 0x3d },
364 { 0x03, 0x00, 0x0a, 0x0, 0x3b },
365 { 0x03, 0x00, 0x0a, 0x0, 0x39 },
366 { 0x03, 0x00, 0x09, 0x0, 0x3e },
367 { 0x03, 0x00, 0x09, 0x0, 0x3c },
368 { 0x03, 0x00, 0x09, 0x0, 0x3a },
369 { 0x03, 0x00, 0x09, 0x0, 0x39 },
370 { 0x03, 0x00, 0x08, 0x0, 0x3e },
371 { 0x03, 0x00, 0x08, 0x0, 0x3c },
372 { 0x03, 0x00, 0x08, 0x0, 0x3a },
373 { 0x03, 0x00, 0x08, 0x0, 0x39 },
374 { 0x03, 0x00, 0x08, 0x0, 0x37 },
375 { 0x03, 0x00, 0x07, 0x0, 0x3d },
376 { 0x03, 0x00, 0x07, 0x0, 0x3c },
377 { 0x03, 0x00, 0x07, 0x0, 0x3a },
378 { 0x03, 0x00, 0x07, 0x0, 0x38 },
379 { 0x03, 0x00, 0x07, 0x0, 0x37 },
380 { 0x03, 0x00, 0x06, 0x0, 0x3e },
381 { 0x03, 0x00, 0x06, 0x0, 0x3c },
382 { 0x03, 0x00, 0x06, 0x0, 0x3a },
383 { 0x03, 0x00, 0x06, 0x0, 0x39 },
384 { 0x03, 0x00, 0x06, 0x0, 0x37 },
385 { 0x03, 0x00, 0x06, 0x0, 0x36 },
386 { 0x03, 0x00, 0x06, 0x0, 0x34 },
387 { 0x03, 0x00, 0x05, 0x0, 0x3d },
388 { 0x03, 0x00, 0x05, 0x0, 0x3b },
389 { 0x03, 0x00, 0x05, 0x0, 0x39 },
390 { 0x03, 0x00, 0x05, 0x0, 0x38 },
391 { 0x03, 0x00, 0x05, 0x0, 0x36 },
392 { 0x03, 0x00, 0x05, 0x0, 0x35 },
393 { 0x03, 0x00, 0x05, 0x0, 0x33 },
394 { 0x03, 0x00, 0x04, 0x0, 0x3e },
395 { 0x03, 0x00, 0x04, 0x0, 0x3c },
396 { 0x03, 0x00, 0x04, 0x0, 0x3a },
397 { 0x03, 0x00, 0x04, 0x0, 0x39 },
398 { 0x03, 0x00, 0x04, 0x0, 0x37 },
399 { 0x03, 0x00, 0x04, 0x0, 0x36 },
400 { 0x03, 0x00, 0x04, 0x0, 0x34 },
401 { 0x03, 0x00, 0x04, 0x0, 0x33 },
402 { 0x03, 0x00, 0x04, 0x0, 0x31 },
403 { 0x03, 0x00, 0x04, 0x0, 0x30 },
404 { 0x03, 0x00, 0x04, 0x0, 0x2e },
405 { 0x03, 0x00, 0x03, 0x0, 0x3c },
406 { 0x03, 0x00, 0x03, 0x0, 0x3a },
407 { 0x03, 0x00, 0x03, 0x0, 0x39 },
408 { 0x03, 0x00, 0x03, 0x0, 0x37 },
409 { 0x03, 0x00, 0x03, 0x0, 0x36 },
410 { 0x03, 0x00, 0x03, 0x0, 0x34 },
411 { 0x03, 0x00, 0x03, 0x0, 0x33 },
412 { 0x03, 0x00, 0x03, 0x0, 0x31 },
413 { 0x03, 0x00, 0x03, 0x0, 0x30 },
414 { 0x03, 0x00, 0x03, 0x0, 0x2e },
415 { 0x03, 0x00, 0x03, 0x0, 0x2d },
416 { 0x03, 0x00, 0x03, 0x0, 0x2c },
417 { 0x03, 0x00, 0x03, 0x0, 0x2b },
418 { 0x03, 0x00, 0x03, 0x0, 0x29 },
419 { 0x03, 0x00, 0x02, 0x0, 0x3d },
420 { 0x03, 0x00, 0x02, 0x0, 0x3b },
421 { 0x03, 0x00, 0x02, 0x0, 0x39 },
422 { 0x03, 0x00, 0x02, 0x0, 0x38 },
423 { 0x03, 0x00, 0x02, 0x0, 0x36 },
424 { 0x03, 0x00, 0x02, 0x0, 0x35 },
425 { 0x03, 0x00, 0x02, 0x0, 0x33 },
426 { 0x03, 0x00, 0x02, 0x0, 0x32 },
427 { 0x03, 0x00, 0x02, 0x0, 0x30 },
428 { 0x03, 0x00, 0x02, 0x0, 0x2f },
429 { 0x03, 0x00, 0x02, 0x0, 0x2e },
430 { 0x03, 0x00, 0x02, 0x0, 0x2c },
431 { 0x03, 0x00, 0x02, 0x0, 0x2b },
432 { 0x03, 0x00, 0x02, 0x0, 0x2a },
433 { 0x03, 0x00, 0x02, 0x0, 0x29 },
434 { 0x03, 0x00, 0x02, 0x0, 0x27 },
435 { 0x03, 0x00, 0x02, 0x0, 0x26 },
436 { 0x03, 0x00, 0x02, 0x0, 0x25 },
437 { 0x03, 0x00, 0x02, 0x0, 0x24 },
438 { 0x03, 0x00, 0x02, 0x0, 0x23 },
439 { 0x03, 0x00, 0x02, 0x0, 0x22 },
440 { 0x03, 0x00, 0x02, 0x0, 0x21 },
441 { 0x03, 0x00, 0x02, 0x0, 0x20 },
442 { 0x03, 0x00, 0x01, 0x0, 0x3f },
443 { 0x03, 0x00, 0x01, 0x0, 0x3d },
444 { 0x03, 0x00, 0x01, 0x0, 0x3b },
445 { 0x03, 0x00, 0x01, 0x0, 0x39 },
446};
447
448/**************************************************
449 * SW control.
450 **************************************************/
451
452const u16 b43_lcntab_sw_ctl_4313_epa_rev0[] = {
453 0x0002, 0x0008, 0x0004, 0x0001, 0x0002, 0x0008,
454 0x0004, 0x0001, 0x0002, 0x0008, 0x0004, 0x0001,
455 0x0002, 0x0008, 0x0004, 0x0001, 0x0002, 0x0008,
456 0x0004, 0x0001, 0x0002, 0x0008, 0x0004, 0x0001,
457 0x0002, 0x0008, 0x0004, 0x0001, 0x0002, 0x0008,
458 0x0004, 0x0001, 0x0002, 0x0008, 0x0004, 0x0001,
459 0x0002, 0x0008, 0x0004, 0x0001, 0x0002, 0x0008,
460 0x0004, 0x0001, 0x0002, 0x0008, 0x0004, 0x0001,
461 0x0002, 0x0008, 0x0004, 0x0001, 0x0002, 0x0008,
462 0x0004, 0x0001, 0x0002, 0x0008, 0x0004, 0x0001,
463 0x0002, 0x0008, 0x0004, 0x0001,
464};
465
466/**************************************************
299 * R/W ops. 467 * R/W ops.
300 **************************************************/ 468 **************************************************/
301 469
@@ -318,9 +486,8 @@ u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset)
318 break; 486 break;
319 case B43_LCNTAB_32BIT: 487 case B43_LCNTAB_32BIT:
320 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset); 488 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, offset);
321 value = b43_phy_read(dev, B43_PHY_LCN_TABLE_DATAHI); 489 value = b43_phy_read(dev, B43_PHY_LCN_TABLE_DATALO);
322 value <<= 16; 490 value |= (b43_phy_read(dev, B43_PHY_LCN_TABLE_DATAHI) << 16);
323 value |= b43_phy_read(dev, B43_PHY_LCN_TABLE_DATALO);
324 break; 491 break;
325 default: 492 default:
326 B43_WARN_ON(1); 493 B43_WARN_ON(1);
@@ -357,10 +524,9 @@ void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset,
357 break; 524 break;
358 case B43_LCNTAB_32BIT: 525 case B43_LCNTAB_32BIT:
359 *((u32 *)data) = b43_phy_read(dev, 526 *((u32 *)data) = b43_phy_read(dev,
360 B43_PHY_LCN_TABLE_DATAHI);
361 *((u32 *)data) <<= 16;
362 *((u32 *)data) |= b43_phy_read(dev,
363 B43_PHY_LCN_TABLE_DATALO); 527 B43_PHY_LCN_TABLE_DATALO);
528 *((u32 *)data) |= (b43_phy_read(dev,
529 B43_PHY_LCN_TABLE_DATAHI) << 16);
364 data += 4; 530 data += 4;
365 break; 531 break;
366 default: 532 default:
@@ -447,7 +613,7 @@ void b43_lcntab_write_bulk(struct b43_wldev *dev, u32 offset,
447#define lcntab_upload(dev, offset, data) do { \ 613#define lcntab_upload(dev, offset, data) do { \
448 b43_lcntab_write_bulk(dev, offset, ARRAY_SIZE(data), data); \ 614 b43_lcntab_write_bulk(dev, offset, ARRAY_SIZE(data), data); \
449 } while (0) 615 } while (0)
450void b43_phy_lcn_tables_init(struct b43_wldev *dev) 616static void b43_phy_lcn_upload_static_tables(struct b43_wldev *dev)
451{ 617{
452 lcntab_upload(dev, B43_LCNTAB16(0x02, 0), b43_lcntab_0x02); 618 lcntab_upload(dev, B43_LCNTAB16(0x02, 0), b43_lcntab_0x02);
453 lcntab_upload(dev, B43_LCNTAB16(0x01, 0), b43_lcntab_0x01); 619 lcntab_upload(dev, B43_LCNTAB16(0x01, 0), b43_lcntab_0x01);
@@ -464,3 +630,78 @@ void b43_phy_lcn_tables_init(struct b43_wldev *dev)
464 lcntab_upload(dev, B43_LCNTAB16(0x00, 0), b43_lcntab_0x00); 630 lcntab_upload(dev, B43_LCNTAB16(0x00, 0), b43_lcntab_0x00);
465 lcntab_upload(dev, B43_LCNTAB32(0x18, 0), b43_lcntab_0x18); 631 lcntab_upload(dev, B43_LCNTAB32(0x18, 0), b43_lcntab_0x18);
466} 632}
633
634void b43_phy_lcn_load_tx_gain_tab(struct b43_wldev *dev,
635 const struct b43_lcntab_tx_gain_tbl_entry *gain_table)
636{
637 u32 i;
638 u32 val;
639
640 u16 pa_gain = 0x70;
641 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM)
642 pa_gain = 0x10;
643
644 for (i = 0; i < B43_LCNTAB_TX_GAIN_SIZE; i++) {
645 val = ((pa_gain << 24) |
646 (gain_table[i].pad << 16) |
647 (gain_table[i].pga << 8) |
648 gain_table[i].gm);
649 b43_lcntab_write(dev, B43_LCNTAB32(0x7, 0xc0 + i), val);
650
651 /* brcmsmac doesn't maskset, we follow newer wl here */
652 val = b43_lcntab_read(dev, B43_LCNTAB32(0x7, 0x140 + i));
653 val &= 0x000fffff;
654 val |= ((gain_table[i].dac << 28) |
655 (gain_table[i].bb_mult << 20));
656 b43_lcntab_write(dev, B43_LCNTAB32(0x7, 0x140 + i), val);
657 }
658}
659
660/* Not implemented in brcmsmac, noticed in wl in MMIO dump */
661static void b43_phy_lcn_rewrite_tables(struct b43_wldev *dev)
662{
663 int i;
664 u32 tmp;
665 for (i = 0; i < 128; i++) {
666 tmp = b43_lcntab_read(dev, B43_LCNTAB32(0x7, 0x240 + i));
667 b43_lcntab_write(dev, B43_LCNTAB32(0x7, 0x240 + i), tmp);
668 }
669}
670
671/* wlc_lcnphy_clear_papd_comptable */
672static void b43_phy_lcn_clean_papd_comp_table(struct b43_wldev *dev)
673{
674 u8 i;
675
676 for (i = 0; i < 0x80; i++)
677 b43_lcntab_write(dev, B43_LCNTAB32(0x18, i), 0x80000);
678}
679
680/* wlc_lcnphy_tbl_init */
681void b43_phy_lcn_tables_init(struct b43_wldev *dev)
682{
683 struct ssb_sprom *sprom = dev->dev->bus_sprom;
684
685 b43_phy_lcn_upload_static_tables(dev);
686
687 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
688 if (sprom->boardflags_lo & B43_BFL_EXTLNA)
689 b43_phy_lcn_load_tx_gain_tab(dev,
690 b43_lcntab_tx_gain_tbl_2ghz_ext_pa_rev0);
691 else
692 b43err(dev->wl,
693 "TX gain table unknown for this card\n");
694 }
695
696 if (sprom->boardflags_lo & B43_BFL_FEM &&
697 !(sprom->boardflags_hi & B43_BFH_FEM_BT))
698 b43_lcntab_write_bulk(dev, B43_LCNTAB16(0xf, 0),
699 ARRAY_SIZE(b43_lcntab_sw_ctl_4313_epa_rev0),
700 b43_lcntab_sw_ctl_4313_epa_rev0);
701 else
702 b43err(dev->wl, "SW ctl table is unknown for this card\n");
703
704 /* TODO: various tables ops here */
705 b43_phy_lcn_rewrite_tables(dev);
706 b43_phy_lcn_clean_papd_comp_table(dev);
707}
diff --git a/drivers/net/wireless/b43/tables_phy_lcn.h b/drivers/net/wireless/b43/tables_phy_lcn.h
index b6471e89c36f..caff9db6831f 100644
--- a/drivers/net/wireless/b43/tables_phy_lcn.h
+++ b/drivers/net/wireless/b43/tables_phy_lcn.h
@@ -10,6 +10,8 @@
10#define B43_LCNTAB16(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_16BIT) 10#define B43_LCNTAB16(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_16BIT)
11#define B43_LCNTAB32(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_32BIT) 11#define B43_LCNTAB32(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_32BIT)
12 12
13#define B43_LCNTAB_TX_GAIN_SIZE 128
14
13u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset); 15u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset);
14void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset, 16void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset,
15 unsigned int nr_elements, void *_data); 17 unsigned int nr_elements, void *_data);
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c
index 3774dd034746..ef9ad79d1bfd 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.c
+++ b/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -1903,15 +1903,17 @@ static void ipw2100_down(struct ipw2100_priv *priv)
1903static int ipw2100_net_init(struct net_device *dev) 1903static int ipw2100_net_init(struct net_device *dev)
1904{ 1904{
1905 struct ipw2100_priv *priv = libipw_priv(dev); 1905 struct ipw2100_priv *priv = libipw_priv(dev);
1906
1907 return ipw2100_up(priv, 1);
1908}
1909
1910static int ipw2100_wdev_init(struct net_device *dev)
1911{
1912 struct ipw2100_priv *priv = libipw_priv(dev);
1906 const struct libipw_geo *geo = libipw_get_geo(priv->ieee); 1913 const struct libipw_geo *geo = libipw_get_geo(priv->ieee);
1907 struct wireless_dev *wdev = &priv->ieee->wdev; 1914 struct wireless_dev *wdev = &priv->ieee->wdev;
1908 int ret;
1909 int i; 1915 int i;
1910 1916
1911 ret = ipw2100_up(priv, 1);
1912 if (ret)
1913 return ret;
1914
1915 memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN); 1917 memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN);
1916 1918
1917 /* fill-out priv->ieee->bg_band */ 1919 /* fill-out priv->ieee->bg_band */
@@ -6350,9 +6352,13 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6350 "Error calling register_netdev.\n"); 6352 "Error calling register_netdev.\n");
6351 goto fail; 6353 goto fail;
6352 } 6354 }
6355 registered = 1;
6356
6357 err = ipw2100_wdev_init(dev);
6358 if (err)
6359 goto fail;
6353 6360
6354 mutex_lock(&priv->action_mutex); 6361 mutex_lock(&priv->action_mutex);
6355 registered = 1;
6356 6362
6357 IPW_DEBUG_INFO("%s: Bound to %s\n", dev->name, pci_name(pci_dev)); 6363 IPW_DEBUG_INFO("%s: Bound to %s\n", dev->name, pci_name(pci_dev));
6358 6364
@@ -6389,7 +6395,8 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6389 6395
6390 fail_unlock: 6396 fail_unlock:
6391 mutex_unlock(&priv->action_mutex); 6397 mutex_unlock(&priv->action_mutex);
6392 6398 wiphy_unregister(priv->ieee->wdev.wiphy);
6399 kfree(priv->ieee->bg_band.channels);
6393 fail: 6400 fail:
6394 if (dev) { 6401 if (dev) {
6395 if (registered) 6402 if (registered)
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c
index 4395977d5369..1d546668b2ee 100644
--- a/drivers/net/wireless/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -11426,16 +11426,23 @@ static void ipw_bg_down(struct work_struct *work)
11426/* Called by register_netdev() */ 11426/* Called by register_netdev() */
11427static int ipw_net_init(struct net_device *dev) 11427static int ipw_net_init(struct net_device *dev)
11428{ 11428{
11429 int rc = 0;
11430 struct ipw_priv *priv = libipw_priv(dev);
11431
11432 mutex_lock(&priv->mutex);
11433 if (ipw_up(priv))
11434 rc = -EIO;
11435 mutex_unlock(&priv->mutex);
11436
11437 return rc;
11438}
11439
11440static int ipw_wdev_init(struct net_device *dev)
11441{
11429 int i, rc = 0; 11442 int i, rc = 0;
11430 struct ipw_priv *priv = libipw_priv(dev); 11443 struct ipw_priv *priv = libipw_priv(dev);
11431 const struct libipw_geo *geo = libipw_get_geo(priv->ieee); 11444 const struct libipw_geo *geo = libipw_get_geo(priv->ieee);
11432 struct wireless_dev *wdev = &priv->ieee->wdev; 11445 struct wireless_dev *wdev = &priv->ieee->wdev;
11433 mutex_lock(&priv->mutex);
11434
11435 if (ipw_up(priv)) {
11436 rc = -EIO;
11437 goto out;
11438 }
11439 11446
11440 memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN); 11447 memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN);
11441 11448
@@ -11520,13 +11527,9 @@ static int ipw_net_init(struct net_device *dev)
11520 set_wiphy_dev(wdev->wiphy, &priv->pci_dev->dev); 11527 set_wiphy_dev(wdev->wiphy, &priv->pci_dev->dev);
11521 11528
11522 /* With that information in place, we can now register the wiphy... */ 11529 /* With that information in place, we can now register the wiphy... */
11523 if (wiphy_register(wdev->wiphy)) { 11530 if (wiphy_register(wdev->wiphy))
11524 rc = -EIO; 11531 rc = -EIO;
11525 goto out;
11526 }
11527
11528out: 11532out:
11529 mutex_unlock(&priv->mutex);
11530 return rc; 11533 return rc;
11531} 11534}
11532 11535
@@ -11833,14 +11836,22 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11833 goto out_remove_sysfs; 11836 goto out_remove_sysfs;
11834 } 11837 }
11835 11838
11839 err = ipw_wdev_init(net_dev);
11840 if (err) {
11841 IPW_ERROR("failed to register wireless device\n");
11842 goto out_unregister_netdev;
11843 }
11844
11836#ifdef CONFIG_IPW2200_PROMISCUOUS 11845#ifdef CONFIG_IPW2200_PROMISCUOUS
11837 if (rtap_iface) { 11846 if (rtap_iface) {
11838 err = ipw_prom_alloc(priv); 11847 err = ipw_prom_alloc(priv);
11839 if (err) { 11848 if (err) {
11840 IPW_ERROR("Failed to register promiscuous network " 11849 IPW_ERROR("Failed to register promiscuous network "
11841 "device (error %d).\n", err); 11850 "device (error %d).\n", err);
11842 unregister_netdev(priv->net_dev); 11851 wiphy_unregister(priv->ieee->wdev.wiphy);
11843 goto out_remove_sysfs; 11852 kfree(priv->ieee->a_band.channels);
11853 kfree(priv->ieee->bg_band.channels);
11854 goto out_unregister_netdev;
11844 } 11855 }
11845 } 11856 }
11846#endif 11857#endif
@@ -11852,6 +11863,8 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11852 11863
11853 return 0; 11864 return 0;
11854 11865
11866 out_unregister_netdev:
11867 unregister_netdev(priv->net_dev);
11855 out_remove_sysfs: 11868 out_remove_sysfs:
11856 sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group); 11869 sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group);
11857 out_release_irq: 11870 out_release_irq:
diff --git a/drivers/net/wireless/iwlegacy/iwl-3945-rs.c b/drivers/net/wireless/iwlegacy/iwl-3945-rs.c
index 0cc5177d738d..8faeaf2dddec 100644
--- a/drivers/net/wireless/iwlegacy/iwl-3945-rs.c
+++ b/drivers/net/wireless/iwlegacy/iwl-3945-rs.c
@@ -821,12 +821,15 @@ static void iwl3945_rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
821 821
822 out: 822 out:
823 823
824 rs_sta->last_txrate_idx = index; 824 if (sband->band == IEEE80211_BAND_5GHZ) {
825 if (sband->band == IEEE80211_BAND_5GHZ) 825 if (WARN_ON_ONCE(index < IWL_FIRST_OFDM_RATE))
826 info->control.rates[0].idx = rs_sta->last_txrate_idx - 826 index = IWL_FIRST_OFDM_RATE;
827 IWL_FIRST_OFDM_RATE; 827 rs_sta->last_txrate_idx = index;
828 else 828 info->control.rates[0].idx = index - IWL_FIRST_OFDM_RATE;
829 } else {
830 rs_sta->last_txrate_idx = index;
829 info->control.rates[0].idx = rs_sta->last_txrate_idx; 831 info->control.rates[0].idx = rs_sta->last_txrate_idx;
832 }
830 833
831 IWL_DEBUG_RATE(priv, "leave: %d\n", index); 834 IWL_DEBUG_RATE(priv, "leave: %d\n", index);
832} 835}
diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile
index 48ab9142af38..8fa59cdb3b49 100644
--- a/drivers/net/wireless/iwlwifi/Makefile
+++ b/drivers/net/wireless/iwlwifi/Makefile
@@ -3,18 +3,19 @@ obj-$(CONFIG_IWLAGN) += iwlagn.o
3iwlagn-objs := iwl-agn.o iwl-agn-rs.o 3iwlagn-objs := iwl-agn.o iwl-agn-rs.o
4iwlagn-objs += iwl-agn-ucode.o iwl-agn-tx.o 4iwlagn-objs += iwl-agn-ucode.o iwl-agn-tx.o
5iwlagn-objs += iwl-agn-lib.o iwl-agn-calib.o iwl-io.o 5iwlagn-objs += iwl-agn-lib.o iwl-agn-calib.o iwl-io.o
6iwlagn-objs += iwl-agn-tt.o iwl-agn-sta.o iwl-agn-eeprom.o 6iwlagn-objs += iwl-agn-tt.o iwl-agn-sta.o
7 7
8iwlagn-objs += iwl-core.o iwl-eeprom.o iwl-power.o 8iwlagn-objs += iwl-core.o iwl-eeprom.o iwl-power.o
9iwlagn-objs += iwl-rx.o iwl-sta.o 9iwlagn-objs += iwl-rx.o iwl-sta.o
10iwlagn-objs += iwl-scan.o iwl-led.o 10iwlagn-objs += iwl-scan.o iwl-led.o
11iwlagn-objs += iwl-agn-rxon.o 11iwlagn-objs += iwl-agn-rxon.o
12iwlagn-objs += iwl-5000.o 12iwlagn-objs += iwl-5000.o
13iwlagn-objs += iwl-6000.o 13iwlagn-objs += iwl-6000.o
14iwlagn-objs += iwl-1000.o 14iwlagn-objs += iwl-1000.o
15iwlagn-objs += iwl-2000.o 15iwlagn-objs += iwl-2000.o
16iwlagn-objs += iwl-pci.o 16iwlagn-objs += iwl-pci.o
17iwlagn-objs += iwl-trans.o iwl-trans-rx-pcie.o iwl-trans-tx-pcie.o 17iwlagn-objs += iwl-trans.o
18iwlagn-objs += iwl-trans-pcie.o iwl-trans-pcie-rx.o iwl-trans-pcie-tx.o
18 19
19iwlagn-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o 20iwlagn-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o
20iwlagn-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o 21iwlagn-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index 4766c3a1a2f6..887f9ac434c2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -44,7 +44,7 @@
44#include "iwl-helpers.h" 44#include "iwl-helpers.h"
45#include "iwl-agn-hw.h" 45#include "iwl-agn-hw.h"
46#include "iwl-shared.h" 46#include "iwl-shared.h"
47#include "iwl-pci.h" 47#include "iwl-cfg.h"
48 48
49/* Highest firmware API version supported */ 49/* Highest firmware API version supported */
50#define IWL1000_UCODE_API_MAX 6 50#define IWL1000_UCODE_API_MAX 6
@@ -161,8 +161,6 @@ static int iwl1000_hw_set_hw_params(struct iwl_priv *priv)
161 if (priv->cfg->need_dc_calib) 161 if (priv->cfg->need_dc_calib)
162 hw_params(priv).calib_init_cfg |= BIT(IWL_CALIB_DC); 162 hw_params(priv).calib_init_cfg |= BIT(IWL_CALIB_DC);
163 163
164 hw_params(priv).beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
165
166 return 0; 164 return 0;
167} 165}
168 166
@@ -191,7 +189,6 @@ static struct iwl_base_params iwl1000_base_params = {
191 .max_ll_items = OTP_MAX_LL_ITEMS_1000, 189 .max_ll_items = OTP_MAX_LL_ITEMS_1000,
192 .shadow_ram_support = false, 190 .shadow_ram_support = false,
193 .led_compensation = 51, 191 .led_compensation = 51,
194 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
195 .support_ct_kill_exit = true, 192 .support_ct_kill_exit = true,
196 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF, 193 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF,
197 .chain_noise_scale = 1000, 194 .chain_noise_scale = 1000,
diff --git a/drivers/net/wireless/iwlwifi/iwl-2000.c b/drivers/net/wireless/iwlwifi/iwl-2000.c
index 764d3104e128..db889581c0e5 100644
--- a/drivers/net/wireless/iwlwifi/iwl-2000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-2000.c
@@ -45,7 +45,7 @@
45#include "iwl-agn-hw.h" 45#include "iwl-agn-hw.h"
46#include "iwl-6000-hw.h" 46#include "iwl-6000-hw.h"
47#include "iwl-shared.h" 47#include "iwl-shared.h"
48#include "iwl-pci.h" 48#include "iwl-cfg.h"
49 49
50/* Highest firmware API version supported */ 50/* Highest firmware API version supported */
51#define IWL2030_UCODE_API_MAX 6 51#define IWL2030_UCODE_API_MAX 6
@@ -75,7 +75,7 @@
75#define IWL105_MODULE_FIRMWARE(api) IWL105_FW_PRE __stringify(api) ".ucode" 75#define IWL105_MODULE_FIRMWARE(api) IWL105_FW_PRE __stringify(api) ".ucode"
76 76
77#define IWL135_FW_PRE "iwlwifi-135-" 77#define IWL135_FW_PRE "iwlwifi-135-"
78#define IWL135_MODULE_FIRMWARE(api) IWL135_FW_PRE #api ".ucode" 78#define IWL135_MODULE_FIRMWARE(api) IWL135_FW_PRE __stringify(api) ".ucode"
79 79
80static void iwl2000_set_ct_threshold(struct iwl_priv *priv) 80static void iwl2000_set_ct_threshold(struct iwl_priv *priv)
81{ 81{
@@ -159,8 +159,6 @@ static int iwl2000_hw_set_hw_params(struct iwl_priv *priv)
159 if (priv->cfg->need_temp_offset_calib) 159 if (priv->cfg->need_temp_offset_calib)
160 hw_params(priv).calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET); 160 hw_params(priv).calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET);
161 161
162 hw_params(priv).beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
163
164 return 0; 162 return 0;
165} 163}
166 164
@@ -211,7 +209,6 @@ static struct iwl_base_params iwl2000_base_params = {
211 .max_ll_items = OTP_MAX_LL_ITEMS_2x00, 209 .max_ll_items = OTP_MAX_LL_ITEMS_2x00,
212 .shadow_ram_support = true, 210 .shadow_ram_support = true,
213 .led_compensation = 51, 211 .led_compensation = 51,
214 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
215 .adv_thermal_throttle = true, 212 .adv_thermal_throttle = true,
216 .support_ct_kill_exit = true, 213 .support_ct_kill_exit = true,
217 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, 214 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
@@ -231,7 +228,6 @@ static struct iwl_base_params iwl2030_base_params = {
231 .max_ll_items = OTP_MAX_LL_ITEMS_2x00, 228 .max_ll_items = OTP_MAX_LL_ITEMS_2x00,
232 .shadow_ram_support = true, 229 .shadow_ram_support = true,
233 .led_compensation = 57, 230 .led_compensation = 57,
234 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
235 .adv_thermal_throttle = true, 231 .adv_thermal_throttle = true,
236 .support_ct_kill_exit = true, 232 .support_ct_kill_exit = true,
237 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, 233 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
@@ -268,6 +264,7 @@ static struct iwl_bt_params iwl2030_bt_params = {
268 .base_params = &iwl2000_base_params, \ 264 .base_params = &iwl2000_base_params, \
269 .need_dc_calib = true, \ 265 .need_dc_calib = true, \
270 .need_temp_offset_calib = true, \ 266 .need_temp_offset_calib = true, \
267 .temp_offset_v2 = true, \
271 .led_mode = IWL_LED_RF_STATE, \ 268 .led_mode = IWL_LED_RF_STATE, \
272 .iq_invert = true \ 269 .iq_invert = true \
273 270
@@ -285,6 +282,7 @@ struct iwl_cfg iwl2000_2bg_cfg = {
285struct iwl_cfg iwl2000_2bgn_d_cfg = { 282struct iwl_cfg iwl2000_2bgn_d_cfg = {
286 .name = "2000D Series 2x2 BGN", 283 .name = "2000D Series 2x2 BGN",
287 IWL_DEVICE_2000, 284 IWL_DEVICE_2000,
285 .ht_params = &iwl2000_ht_params,
288}; 286};
289 287
290#define IWL_DEVICE_2030 \ 288#define IWL_DEVICE_2030 \
@@ -299,6 +297,7 @@ struct iwl_cfg iwl2000_2bgn_d_cfg = {
299 .bt_params = &iwl2030_bt_params, \ 297 .bt_params = &iwl2030_bt_params, \
300 .need_dc_calib = true, \ 298 .need_dc_calib = true, \
301 .need_temp_offset_calib = true, \ 299 .need_temp_offset_calib = true, \
300 .temp_offset_v2 = true, \
302 .led_mode = IWL_LED_RF_STATE, \ 301 .led_mode = IWL_LED_RF_STATE, \
303 .adv_pm = true, \ 302 .adv_pm = true, \
304 .iq_invert = true \ 303 .iq_invert = true \
@@ -325,6 +324,7 @@ struct iwl_cfg iwl2030_2bg_cfg = {
325 .base_params = &iwl2000_base_params, \ 324 .base_params = &iwl2000_base_params, \
326 .need_dc_calib = true, \ 325 .need_dc_calib = true, \
327 .need_temp_offset_calib = true, \ 326 .need_temp_offset_calib = true, \
327 .temp_offset_v2 = true, \
328 .led_mode = IWL_LED_RF_STATE, \ 328 .led_mode = IWL_LED_RF_STATE, \
329 .adv_pm = true, \ 329 .adv_pm = true, \
330 .rx_with_siso_diversity = true, \ 330 .rx_with_siso_diversity = true, \
@@ -353,6 +353,7 @@ struct iwl_cfg iwl105_bgn_cfg = {
353 .bt_params = &iwl2030_bt_params, \ 353 .bt_params = &iwl2030_bt_params, \
354 .need_dc_calib = true, \ 354 .need_dc_calib = true, \
355 .need_temp_offset_calib = true, \ 355 .need_temp_offset_calib = true, \
356 .temp_offset_v2 = true, \
356 .led_mode = IWL_LED_RF_STATE, \ 357 .led_mode = IWL_LED_RF_STATE, \
357 .adv_pm = true, \ 358 .adv_pm = true, \
358 .rx_with_siso_diversity = true, \ 359 .rx_with_siso_diversity = true, \
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
index f9630a3c79fe..c0135988e777 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
@@ -74,8 +74,8 @@
74static inline s32 iwl_temp_calib_to_offset(struct iwl_priv *priv) 74static inline s32 iwl_temp_calib_to_offset(struct iwl_priv *priv)
75{ 75{
76 u16 temperature, voltage; 76 u16 temperature, voltage;
77 __le16 *temp_calib = 77 __le16 *temp_calib = (__le16 *)iwl_eeprom_query_addr(priv,
78 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_TEMPERATURE); 78 EEPROM_KELVIN_TEMPERATURE);
79 79
80 temperature = le16_to_cpu(temp_calib[0]); 80 temperature = le16_to_cpu(temp_calib[0]);
81 voltage = le16_to_cpu(temp_calib[1]); 81 voltage = le16_to_cpu(temp_calib[1]);
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index 7cb4d69e0c37..290701620f03 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -47,7 +47,7 @@
47#include "iwl-5000-hw.h" 47#include "iwl-5000-hw.h"
48#include "iwl-trans.h" 48#include "iwl-trans.h"
49#include "iwl-shared.h" 49#include "iwl-shared.h"
50#include "iwl-pci.h" 50#include "iwl-cfg.h"
51 51
52/* Highest firmware API version supported */ 52/* Highest firmware API version supported */
53#define IWL5000_UCODE_API_MAX 5 53#define IWL5000_UCODE_API_MAX 5
@@ -184,8 +184,6 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
184 BIT(IWL_CALIB_TX_IQ_PERD) | 184 BIT(IWL_CALIB_TX_IQ_PERD) |
185 BIT(IWL_CALIB_BASE_BAND); 185 BIT(IWL_CALIB_BASE_BAND);
186 186
187 hw_params(priv).beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
188
189 return 0; 187 return 0;
190} 188}
191 189
@@ -223,8 +221,6 @@ static int iwl5150_hw_set_hw_params(struct iwl_priv *priv)
223 if (priv->cfg->need_dc_calib) 221 if (priv->cfg->need_dc_calib)
224 hw_params(priv).calib_init_cfg |= BIT(IWL_CALIB_DC); 222 hw_params(priv).calib_init_cfg |= BIT(IWL_CALIB_DC);
225 223
226 hw_params(priv).beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
227
228 return 0; 224 return 0;
229} 225}
230 226
@@ -353,7 +349,6 @@ static struct iwl_base_params iwl5000_base_params = {
353 .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES, 349 .num_of_ampdu_queues = IWLAGN_NUM_AMPDU_QUEUES,
354 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL, 350 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
355 .led_compensation = 51, 351 .led_compensation = 51,
356 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
357 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, 352 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
358 .chain_noise_scale = 1000, 353 .chain_noise_scale = 1000,
359 .wd_timeout = IWL_LONG_WD_TIMEOUT, 354 .wd_timeout = IWL_LONG_WD_TIMEOUT,
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index 2a98e65ca84c..37837f7b6990 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -46,7 +46,7 @@
46#include "iwl-6000-hw.h" 46#include "iwl-6000-hw.h"
47#include "iwl-trans.h" 47#include "iwl-trans.h"
48#include "iwl-shared.h" 48#include "iwl-shared.h"
49#include "iwl-pci.h" 49#include "iwl-cfg.h"
50 50
51/* Highest firmware API version supported */ 51/* Highest firmware API version supported */
52#define IWL6000_UCODE_API_MAX 4 52#define IWL6000_UCODE_API_MAX 4
@@ -180,8 +180,6 @@ static int iwl6000_hw_set_hw_params(struct iwl_priv *priv)
180 if (priv->cfg->need_temp_offset_calib) 180 if (priv->cfg->need_temp_offset_calib)
181 hw_params(priv).calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET); 181 hw_params(priv).calib_init_cfg |= BIT(IWL_CALIB_TEMP_OFFSET);
182 182
183 hw_params(priv).beacon_time_tsf_bits = IWLAGN_EXT_BEACON_TIME_POS;
184
185 return 0; 183 return 0;
186} 184}
187 185
@@ -305,7 +303,6 @@ static struct iwl_base_params iwl6000_base_params = {
305 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 303 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
306 .shadow_ram_support = true, 304 .shadow_ram_support = true,
307 .led_compensation = 51, 305 .led_compensation = 51,
308 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
309 .adv_thermal_throttle = true, 306 .adv_thermal_throttle = true,
310 .support_ct_kill_exit = true, 307 .support_ct_kill_exit = true,
311 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, 308 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
@@ -323,7 +320,6 @@ static struct iwl_base_params iwl6050_base_params = {
323 .max_ll_items = OTP_MAX_LL_ITEMS_6x50, 320 .max_ll_items = OTP_MAX_LL_ITEMS_6x50,
324 .shadow_ram_support = true, 321 .shadow_ram_support = true,
325 .led_compensation = 51, 322 .led_compensation = 51,
326 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
327 .adv_thermal_throttle = true, 323 .adv_thermal_throttle = true,
328 .support_ct_kill_exit = true, 324 .support_ct_kill_exit = true,
329 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, 325 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
@@ -340,7 +336,6 @@ static struct iwl_base_params iwl6000_g2_base_params = {
340 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 336 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
341 .shadow_ram_support = true, 337 .shadow_ram_support = true,
342 .led_compensation = 57, 338 .led_compensation = 57,
343 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
344 .adv_thermal_throttle = true, 339 .adv_thermal_throttle = true,
345 .support_ct_kill_exit = true, 340 .support_ct_kill_exit = true,
346 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, 341 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-calib.c b/drivers/net/wireless/iwlwifi/iwl-agn-calib.c
index b725f6970dee..03bac48558b2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-calib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-calib.c
@@ -766,12 +766,9 @@ static void iwl_find_disconn_antenna(struct iwl_priv *priv, u32* average_sig,
766 u8 first_chain; 766 u8 first_chain;
767 u16 i = 0; 767 u16 i = 0;
768 768
769 average_sig[0] = data->chain_signal_a / 769 average_sig[0] = data->chain_signal_a / IWL_CAL_NUM_BEACONS;
770 priv->cfg->base_params->chain_noise_num_beacons; 770 average_sig[1] = data->chain_signal_b / IWL_CAL_NUM_BEACONS;
771 average_sig[1] = data->chain_signal_b / 771 average_sig[2] = data->chain_signal_c / IWL_CAL_NUM_BEACONS;
772 priv->cfg->base_params->chain_noise_num_beacons;
773 average_sig[2] = data->chain_signal_c /
774 priv->cfg->base_params->chain_noise_num_beacons;
775 772
776 if (average_sig[0] >= average_sig[1]) { 773 if (average_sig[0] >= average_sig[1]) {
777 max_average_sig = average_sig[0]; 774 max_average_sig = average_sig[0];
@@ -1038,8 +1035,7 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv)
1038 /* If this is the "chain_noise_num_beacons", determine: 1035 /* If this is the "chain_noise_num_beacons", determine:
1039 * 1) Disconnected antennas (using signal strengths) 1036 * 1) Disconnected antennas (using signal strengths)
1040 * 2) Differential gain (using silence noise) to balance receivers */ 1037 * 2) Differential gain (using silence noise) to balance receivers */
1041 if (data->beacon_count != 1038 if (data->beacon_count != IWL_CAL_NUM_BEACONS)
1042 priv->cfg->base_params->chain_noise_num_beacons)
1043 return; 1039 return;
1044 1040
1045 /* Analyze signal for disconnected antenna */ 1041 /* Analyze signal for disconnected antenna */
@@ -1055,12 +1051,9 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv)
1055 iwl_find_disconn_antenna(priv, average_sig, data); 1051 iwl_find_disconn_antenna(priv, average_sig, data);
1056 1052
1057 /* Analyze noise for rx balance */ 1053 /* Analyze noise for rx balance */
1058 average_noise[0] = data->chain_noise_a / 1054 average_noise[0] = data->chain_noise_a / IWL_CAL_NUM_BEACONS;
1059 priv->cfg->base_params->chain_noise_num_beacons; 1055 average_noise[1] = data->chain_noise_b / IWL_CAL_NUM_BEACONS;
1060 average_noise[1] = data->chain_noise_b / 1056 average_noise[2] = data->chain_noise_c / IWL_CAL_NUM_BEACONS;
1061 priv->cfg->base_params->chain_noise_num_beacons;
1062 average_noise[2] = data->chain_noise_c /
1063 priv->cfg->base_params->chain_noise_num_beacons;
1064 1057
1065 for (i = 0; i < NUM_RX_CHAINS; i++) { 1058 for (i = 0; i < NUM_RX_CHAINS; i++) {
1066 if (!(data->disconn_array[i]) && 1059 if (!(data->disconn_array[i]) &&
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
deleted file mode 100644
index c62ddc2a31bd..000000000000
--- a/drivers/net/wireless/iwlwifi/iwl-agn-eeprom.c
+++ /dev/null
@@ -1,299 +0,0 @@
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/
62
63
64#include <linux/kernel.h>
65#include <linux/module.h>
66#include <linux/slab.h>
67#include <linux/init.h>
68
69#include <net/mac80211.h>
70
71#include "iwl-commands.h"
72#include "iwl-dev.h"
73#include "iwl-core.h"
74#include "iwl-debug.h"
75#include "iwl-agn.h"
76#include "iwl-io.h"
77
78/******************************************************************************
79 *
80 * EEPROM related functions
81 *
82******************************************************************************/
83
84int iwl_eeprom_check_version(struct iwl_priv *priv)
85{
86 u16 eeprom_ver;
87 u16 calib_ver;
88
89 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
90 calib_ver = iwlagn_eeprom_calib_version(priv);
91
92 if (eeprom_ver < priv->cfg->eeprom_ver ||
93 calib_ver < priv->cfg->eeprom_calib_ver)
94 goto err;
95
96 IWL_INFO(priv, "device EEPROM VER=0x%x, CALIB=0x%x\n",
97 eeprom_ver, calib_ver);
98
99 return 0;
100err:
101 IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x "
102 "CALIB=0x%x < 0x%x\n",
103 eeprom_ver, priv->cfg->eeprom_ver,
104 calib_ver, priv->cfg->eeprom_calib_ver);
105 return -EINVAL;
106
107}
108
109int iwl_eeprom_check_sku(struct iwl_priv *priv)
110{
111 u16 radio_cfg;
112
113 if (!priv->cfg->sku) {
114 /* not using sku overwrite */
115 priv->cfg->sku = iwl_eeprom_query16(priv, EEPROM_SKU_CAP);
116 if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE &&
117 !priv->cfg->ht_params) {
118 IWL_ERR(priv, "Invalid 11n configuration\n");
119 return -EINVAL;
120 }
121 }
122 if (!priv->cfg->sku) {
123 IWL_ERR(priv, "Invalid device sku\n");
124 return -EINVAL;
125 }
126
127 IWL_INFO(priv, "Device SKU: 0X%x\n", priv->cfg->sku);
128
129 if (!priv->cfg->valid_tx_ant && !priv->cfg->valid_rx_ant) {
130 /* not using .cfg overwrite */
131 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
132 priv->cfg->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
133 priv->cfg->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
134 if (!priv->cfg->valid_tx_ant || !priv->cfg->valid_rx_ant) {
135 IWL_ERR(priv, "Invalid chain (0X%x, 0X%x)\n",
136 priv->cfg->valid_tx_ant,
137 priv->cfg->valid_rx_ant);
138 return -EINVAL;
139 }
140 IWL_INFO(priv, "Valid Tx ant: 0X%x, Valid Rx ant: 0X%x\n",
141 priv->cfg->valid_tx_ant, priv->cfg->valid_rx_ant);
142 }
143 /*
144 * for some special cases,
145 * EEPROM did not reflect the correct antenna setting
146 * so overwrite the valid tx/rx antenna from .cfg
147 */
148 return 0;
149}
150
151void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
152{
153 const u8 *addr = iwl_eeprom_query_addr(priv,
154 EEPROM_MAC_ADDRESS);
155 memcpy(mac, addr, ETH_ALEN);
156}
157
158/**
159 * iwl_get_max_txpower_avg - get the highest tx power from all chains.
160 * find the highest tx power from all chains for the channel
161 */
162static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
163 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
164 int element, s8 *max_txpower_in_half_dbm)
165{
166 s8 max_txpower_avg = 0; /* (dBm) */
167
168 /* Take the highest tx power from any valid chains */
169 if ((priv->cfg->valid_tx_ant & ANT_A) &&
170 (enhanced_txpower[element].chain_a_max > max_txpower_avg))
171 max_txpower_avg = enhanced_txpower[element].chain_a_max;
172 if ((priv->cfg->valid_tx_ant & ANT_B) &&
173 (enhanced_txpower[element].chain_b_max > max_txpower_avg))
174 max_txpower_avg = enhanced_txpower[element].chain_b_max;
175 if ((priv->cfg->valid_tx_ant & ANT_C) &&
176 (enhanced_txpower[element].chain_c_max > max_txpower_avg))
177 max_txpower_avg = enhanced_txpower[element].chain_c_max;
178 if (((priv->cfg->valid_tx_ant == ANT_AB) |
179 (priv->cfg->valid_tx_ant == ANT_BC) |
180 (priv->cfg->valid_tx_ant == ANT_AC)) &&
181 (enhanced_txpower[element].mimo2_max > max_txpower_avg))
182 max_txpower_avg = enhanced_txpower[element].mimo2_max;
183 if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
184 (enhanced_txpower[element].mimo3_max > max_txpower_avg))
185 max_txpower_avg = enhanced_txpower[element].mimo3_max;
186
187 /*
188 * max. tx power in EEPROM is in 1/2 dBm format
189 * convert from 1/2 dBm to dBm (round-up convert)
190 * but we also do not want to loss 1/2 dBm resolution which
191 * will impact performance
192 */
193 *max_txpower_in_half_dbm = max_txpower_avg;
194 return (max_txpower_avg & 0x01) + (max_txpower_avg >> 1);
195}
196
197static void
198iwl_eeprom_enh_txp_read_element(struct iwl_priv *priv,
199 struct iwl_eeprom_enhanced_txpwr *txp,
200 s8 max_txpower_avg)
201{
202 int ch_idx;
203 bool is_ht40 = txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ;
204 enum ieee80211_band band;
205
206 band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ?
207 IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
208
209 for (ch_idx = 0; ch_idx < priv->channel_count; ch_idx++) {
210 struct iwl_channel_info *ch_info = &priv->channel_info[ch_idx];
211
212 /* update matching channel or from common data only */
213 if (txp->channel != 0 && ch_info->channel != txp->channel)
214 continue;
215
216 /* update matching band only */
217 if (band != ch_info->band)
218 continue;
219
220 if (ch_info->max_power_avg < max_txpower_avg && !is_ht40) {
221 ch_info->max_power_avg = max_txpower_avg;
222 ch_info->curr_txpow = max_txpower_avg;
223 ch_info->scan_power = max_txpower_avg;
224 }
225
226 if (is_ht40 && ch_info->ht40_max_power_avg < max_txpower_avg)
227 ch_info->ht40_max_power_avg = max_txpower_avg;
228 }
229}
230
231#define EEPROM_TXP_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT)
232#define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
233#define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
234
235#define TXP_CHECK_AND_PRINT(x) ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) \
236 ? # x " " : "")
237
238void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
239{
240 struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
241 int idx, entries;
242 __le16 *txp_len;
243 s8 max_txp_avg, max_txp_avg_halfdbm;
244
245 BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
246
247 /* the length is in 16-bit words, but we want entries */
248 txp_len = (__le16 *) iwl_eeprom_query_addr(priv, EEPROM_TXP_SZ_OFFS);
249 entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
250
251 txp_array = (void *) iwl_eeprom_query_addr(priv, EEPROM_TXP_OFFS);
252
253 for (idx = 0; idx < entries; idx++) {
254 txp = &txp_array[idx];
255 /* skip invalid entries */
256 if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
257 continue;
258
259 IWL_DEBUG_EEPROM(priv, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
260 (txp->channel && (txp->flags &
261 IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
262 "Common " : (txp->channel) ?
263 "Channel" : "Common",
264 (txp->channel),
265 TXP_CHECK_AND_PRINT(VALID),
266 TXP_CHECK_AND_PRINT(BAND_52G),
267 TXP_CHECK_AND_PRINT(OFDM),
268 TXP_CHECK_AND_PRINT(40MHZ),
269 TXP_CHECK_AND_PRINT(HT_AP),
270 TXP_CHECK_AND_PRINT(RES1),
271 TXP_CHECK_AND_PRINT(RES2),
272 TXP_CHECK_AND_PRINT(COMMON_TYPE),
273 txp->flags);
274 IWL_DEBUG_EEPROM(priv, "\t\t chain_A: 0x%02x "
275 "chain_B: 0X%02x chain_C: 0X%02x\n",
276 txp->chain_a_max, txp->chain_b_max,
277 txp->chain_c_max);
278 IWL_DEBUG_EEPROM(priv, "\t\t MIMO2: 0x%02x "
279 "MIMO3: 0x%02x High 20_on_40: 0x%02x "
280 "Low 20_on_40: 0x%02x\n",
281 txp->mimo2_max, txp->mimo3_max,
282 ((txp->delta_20_in_40 & 0xf0) >> 4),
283 (txp->delta_20_in_40 & 0x0f));
284
285 max_txp_avg = iwl_get_max_txpower_avg(priv, txp_array, idx,
286 &max_txp_avg_halfdbm);
287
288 /*
289 * Update the user limit values values to the highest
290 * power supported by any channel
291 */
292 if (max_txp_avg > priv->tx_power_user_lmt)
293 priv->tx_power_user_lmt = max_txp_avg;
294 if (max_txp_avg_halfdbm > priv->tx_power_lmt_in_half_dbm)
295 priv->tx_power_lmt_in_half_dbm = max_txp_avg_halfdbm;
296
297 iwl_eeprom_enh_txp_read_element(priv, txp, max_txp_avg);
298 }
299}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
index 7c036b9c2b30..d30714be515b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-lib.c
@@ -96,11 +96,7 @@ void iwlagn_temperature(struct iwl_priv *priv)
96 96
97u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv) 97u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv)
98{ 98{
99 struct iwl_eeprom_calib_hdr { 99 struct iwl_eeprom_calib_hdr *hdr;
100 u8 version;
101 u8 pa_type;
102 u16 voltage;
103 } *hdr;
104 100
105 hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv, 101 hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
106 EEPROM_CALIB_ALL); 102 EEPROM_CALIB_ALL);
@@ -194,433 +190,6 @@ int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
194 return -1; 190 return -1;
195} 191}
196 192
197static int iwl_get_single_channel_for_scan(struct iwl_priv *priv,
198 struct ieee80211_vif *vif,
199 enum ieee80211_band band,
200 struct iwl_scan_channel *scan_ch)
201{
202 const struct ieee80211_supported_band *sband;
203 u16 passive_dwell = 0;
204 u16 active_dwell = 0;
205 int added = 0;
206 u16 channel = 0;
207
208 sband = iwl_get_hw_mode(priv, band);
209 if (!sband) {
210 IWL_ERR(priv, "invalid band\n");
211 return added;
212 }
213
214 active_dwell = iwl_get_active_dwell_time(priv, band, 0);
215 passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
216
217 if (passive_dwell <= active_dwell)
218 passive_dwell = active_dwell + 1;
219
220 channel = iwl_get_single_channel_number(priv, band);
221 if (channel) {
222 scan_ch->channel = cpu_to_le16(channel);
223 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
224 scan_ch->active_dwell = cpu_to_le16(active_dwell);
225 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
226 /* Set txpower levels to defaults */
227 scan_ch->dsp_atten = 110;
228 if (band == IEEE80211_BAND_5GHZ)
229 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
230 else
231 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
232 added++;
233 } else
234 IWL_ERR(priv, "no valid channel found\n");
235 return added;
236}
237
238static int iwl_get_channels_for_scan(struct iwl_priv *priv,
239 struct ieee80211_vif *vif,
240 enum ieee80211_band band,
241 u8 is_active, u8 n_probes,
242 struct iwl_scan_channel *scan_ch)
243{
244 struct ieee80211_channel *chan;
245 const struct ieee80211_supported_band *sband;
246 const struct iwl_channel_info *ch_info;
247 u16 passive_dwell = 0;
248 u16 active_dwell = 0;
249 int added, i;
250 u16 channel;
251
252 sband = iwl_get_hw_mode(priv, band);
253 if (!sband)
254 return 0;
255
256 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
257 passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
258
259 if (passive_dwell <= active_dwell)
260 passive_dwell = active_dwell + 1;
261
262 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
263 chan = priv->scan_request->channels[i];
264
265 if (chan->band != band)
266 continue;
267
268 channel = chan->hw_value;
269 scan_ch->channel = cpu_to_le16(channel);
270
271 ch_info = iwl_get_channel_info(priv, band, channel);
272 if (!is_channel_valid(ch_info)) {
273 IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
274 channel);
275 continue;
276 }
277
278 if (!is_active || is_channel_passive(ch_info) ||
279 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
280 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
281 else
282 scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
283
284 if (n_probes)
285 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
286
287 scan_ch->active_dwell = cpu_to_le16(active_dwell);
288 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
289
290 /* Set txpower levels to defaults */
291 scan_ch->dsp_atten = 110;
292
293 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
294 * power level:
295 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
296 */
297 if (band == IEEE80211_BAND_5GHZ)
298 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
299 else
300 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
301
302 IWL_DEBUG_SCAN(priv, "Scanning ch=%d prob=0x%X [%s %d]\n",
303 channel, le32_to_cpu(scan_ch->type),
304 (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
305 "ACTIVE" : "PASSIVE",
306 (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
307 active_dwell : passive_dwell);
308
309 scan_ch++;
310 added++;
311 }
312
313 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
314 return added;
315}
316
317int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
318{
319 struct iwl_host_cmd cmd = {
320 .id = REPLY_SCAN_CMD,
321 .len = { sizeof(struct iwl_scan_cmd), },
322 .flags = CMD_SYNC,
323 };
324 struct iwl_scan_cmd *scan;
325 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
326 u32 rate_flags = 0;
327 u16 cmd_len;
328 u16 rx_chain = 0;
329 enum ieee80211_band band;
330 u8 n_probes = 0;
331 u8 rx_ant = hw_params(priv).valid_rx_ant;
332 u8 rate;
333 bool is_active = false;
334 int chan_mod;
335 u8 active_chains;
336 u8 scan_tx_antennas = hw_params(priv).valid_tx_ant;
337 int ret;
338
339 lockdep_assert_held(&priv->shrd->mutex);
340
341 if (vif)
342 ctx = iwl_rxon_ctx_from_vif(vif);
343
344 if (!priv->scan_cmd) {
345 priv->scan_cmd = kmalloc(sizeof(struct iwl_scan_cmd) +
346 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
347 if (!priv->scan_cmd) {
348 IWL_DEBUG_SCAN(priv,
349 "fail to allocate memory for scan\n");
350 return -ENOMEM;
351 }
352 }
353 scan = priv->scan_cmd;
354 memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
355
356 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
357 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
358
359 if (priv->scan_type != IWL_SCAN_ROC &&
360 iwl_is_any_associated(priv)) {
361 u16 interval = 0;
362 u32 extra;
363 u32 suspend_time = 100;
364 u32 scan_suspend_time = 100;
365
366 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
367 switch (priv->scan_type) {
368 case IWL_SCAN_ROC:
369 WARN_ON(1);
370 break;
371 case IWL_SCAN_RADIO_RESET:
372 interval = 0;
373 break;
374 case IWL_SCAN_NORMAL:
375 interval = vif->bss_conf.beacon_int;
376 break;
377 }
378
379 scan->suspend_time = 0;
380 scan->max_out_time = cpu_to_le32(200 * 1024);
381 if (!interval)
382 interval = suspend_time;
383
384 extra = (suspend_time / interval) << 22;
385 scan_suspend_time = (extra |
386 ((suspend_time % interval) * 1024));
387 scan->suspend_time = cpu_to_le32(scan_suspend_time);
388 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
389 scan_suspend_time, interval);
390 } else if (priv->scan_type == IWL_SCAN_ROC) {
391 scan->suspend_time = 0;
392 scan->max_out_time = 0;
393 scan->quiet_time = 0;
394 scan->quiet_plcp_th = 0;
395 }
396
397 switch (priv->scan_type) {
398 case IWL_SCAN_RADIO_RESET:
399 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
400 break;
401 case IWL_SCAN_NORMAL:
402 if (priv->scan_request->n_ssids) {
403 int i, p = 0;
404 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
405 for (i = 0; i < priv->scan_request->n_ssids; i++) {
406 /* always does wildcard anyway */
407 if (!priv->scan_request->ssids[i].ssid_len)
408 continue;
409 scan->direct_scan[p].id = WLAN_EID_SSID;
410 scan->direct_scan[p].len =
411 priv->scan_request->ssids[i].ssid_len;
412 memcpy(scan->direct_scan[p].ssid,
413 priv->scan_request->ssids[i].ssid,
414 priv->scan_request->ssids[i].ssid_len);
415 n_probes++;
416 p++;
417 }
418 is_active = true;
419 } else
420 IWL_DEBUG_SCAN(priv, "Start passive scan.\n");
421 break;
422 case IWL_SCAN_ROC:
423 IWL_DEBUG_SCAN(priv, "Start ROC scan.\n");
424 break;
425 }
426
427 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
428 scan->tx_cmd.sta_id = ctx->bcast_sta_id;
429 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
430
431 switch (priv->scan_band) {
432 case IEEE80211_BAND_2GHZ:
433 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
434 chan_mod = le32_to_cpu(
435 priv->contexts[IWL_RXON_CTX_BSS].active.flags &
436 RXON_FLG_CHANNEL_MODE_MSK)
437 >> RXON_FLG_CHANNEL_MODE_POS;
438 if (chan_mod == CHANNEL_MODE_PURE_40) {
439 rate = IWL_RATE_6M_PLCP;
440 } else {
441 rate = IWL_RATE_1M_PLCP;
442 rate_flags = RATE_MCS_CCK_MSK;
443 }
444 /*
445 * Internal scans are passive, so we can indiscriminately set
446 * the BT ignore flag on 2.4 GHz since it applies to TX only.
447 */
448 if (priv->cfg->bt_params &&
449 priv->cfg->bt_params->advanced_bt_coexist)
450 scan->tx_cmd.tx_flags |= TX_CMD_FLG_IGNORE_BT;
451 break;
452 case IEEE80211_BAND_5GHZ:
453 rate = IWL_RATE_6M_PLCP;
454 break;
455 default:
456 IWL_WARN(priv, "Invalid scan band\n");
457 return -EIO;
458 }
459
460 /*
461 * If active scanning is requested but a certain channel is
462 * marked passive, we can do active scanning if we detect
463 * transmissions.
464 *
465 * There is an issue with some firmware versions that triggers
466 * a sysassert on a "good CRC threshold" of zero (== disabled),
467 * on a radar channel even though this means that we should NOT
468 * send probes.
469 *
470 * The "good CRC threshold" is the number of frames that we
471 * need to receive during our dwell time on a channel before
472 * sending out probes -- setting this to a huge value will
473 * mean we never reach it, but at the same time work around
474 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
475 * here instead of IWL_GOOD_CRC_TH_DISABLED.
476 *
477 * This was fixed in later versions along with some other
478 * scan changes, and the threshold behaves as a flag in those
479 * versions.
480 */
481 if (priv->new_scan_threshold_behaviour)
482 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
483 IWL_GOOD_CRC_TH_DISABLED;
484 else
485 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
486 IWL_GOOD_CRC_TH_NEVER;
487
488 band = priv->scan_band;
489
490 if (priv->cfg->scan_rx_antennas[band])
491 rx_ant = priv->cfg->scan_rx_antennas[band];
492
493 if (band == IEEE80211_BAND_2GHZ &&
494 priv->cfg->bt_params &&
495 priv->cfg->bt_params->advanced_bt_coexist) {
496 /* transmit 2.4 GHz probes only on first antenna */
497 scan_tx_antennas = first_antenna(scan_tx_antennas);
498 }
499
500 priv->scan_tx_ant[band] = iwl_toggle_tx_ant(priv, priv->scan_tx_ant[band],
501 scan_tx_antennas);
502 rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]);
503 scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags);
504
505 /* In power save mode use one chain, otherwise use all chains */
506 if (test_bit(STATUS_POWER_PMI, &priv->shrd->status)) {
507 /* rx_ant has been set to all valid chains previously */
508 active_chains = rx_ant &
509 ((u8)(priv->chain_noise_data.active_chains));
510 if (!active_chains)
511 active_chains = rx_ant;
512
513 IWL_DEBUG_SCAN(priv, "chain_noise_data.active_chains: %u\n",
514 priv->chain_noise_data.active_chains);
515
516 rx_ant = first_antenna(active_chains);
517 }
518 if (priv->cfg->bt_params &&
519 priv->cfg->bt_params->advanced_bt_coexist &&
520 priv->bt_full_concurrent) {
521 /* operated as 1x1 in full concurrency mode */
522 rx_ant = first_antenna(rx_ant);
523 }
524
525 /* MIMO is not used here, but value is required */
526 rx_chain |=
527 hw_params(priv).valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
528 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
529 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
530 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
531 scan->rx_chain = cpu_to_le16(rx_chain);
532 switch (priv->scan_type) {
533 case IWL_SCAN_NORMAL:
534 cmd_len = iwl_fill_probe_req(priv,
535 (struct ieee80211_mgmt *)scan->data,
536 vif->addr,
537 priv->scan_request->ie,
538 priv->scan_request->ie_len,
539 IWL_MAX_SCAN_SIZE - sizeof(*scan));
540 break;
541 case IWL_SCAN_RADIO_RESET:
542 case IWL_SCAN_ROC:
543 /* use bcast addr, will not be transmitted but must be valid */
544 cmd_len = iwl_fill_probe_req(priv,
545 (struct ieee80211_mgmt *)scan->data,
546 iwl_bcast_addr, NULL, 0,
547 IWL_MAX_SCAN_SIZE - sizeof(*scan));
548 break;
549 default:
550 BUG();
551 }
552 scan->tx_cmd.len = cpu_to_le16(cmd_len);
553
554 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
555 RXON_FILTER_BCON_AWARE_MSK);
556
557 switch (priv->scan_type) {
558 case IWL_SCAN_RADIO_RESET:
559 scan->channel_count =
560 iwl_get_single_channel_for_scan(priv, vif, band,
561 (void *)&scan->data[cmd_len]);
562 break;
563 case IWL_SCAN_NORMAL:
564 scan->channel_count =
565 iwl_get_channels_for_scan(priv, vif, band,
566 is_active, n_probes,
567 (void *)&scan->data[cmd_len]);
568 break;
569 case IWL_SCAN_ROC: {
570 struct iwl_scan_channel *scan_ch;
571
572 scan->channel_count = 1;
573
574 scan_ch = (void *)&scan->data[cmd_len];
575 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
576 scan_ch->channel =
577 cpu_to_le16(priv->hw_roc_channel->hw_value);
578 scan_ch->active_dwell =
579 scan_ch->passive_dwell =
580 cpu_to_le16(priv->hw_roc_duration);
581
582 /* Set txpower levels to defaults */
583 scan_ch->dsp_atten = 110;
584
585 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
586 * power level:
587 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
588 */
589 if (priv->hw_roc_channel->band == IEEE80211_BAND_5GHZ)
590 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
591 else
592 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
593 }
594 break;
595 }
596
597 if (scan->channel_count == 0) {
598 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
599 return -EIO;
600 }
601
602 cmd.len[0] += le16_to_cpu(scan->tx_cmd.len) +
603 scan->channel_count * sizeof(struct iwl_scan_channel);
604 cmd.data[0] = scan;
605 cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
606 scan->len = cpu_to_le16(cmd.len[0]);
607
608 /* set scan bit here for PAN params */
609 set_bit(STATUS_SCAN_HW, &priv->shrd->status);
610
611 ret = iwlagn_set_pan_params(priv);
612 if (ret)
613 return ret;
614
615 ret = iwl_trans_send_cmd(trans(priv), &cmd);
616 if (ret) {
617 clear_bit(STATUS_SCAN_HW, &priv->shrd->status);
618 iwlagn_set_pan_params(priv);
619 }
620
621 return ret;
622}
623
624int iwlagn_manage_ibss_station(struct iwl_priv *priv, 193int iwlagn_manage_ibss_station(struct iwl_priv *priv,
625 struct ieee80211_vif *vif, bool add) 194 struct ieee80211_vif *vif, bool add)
626{ 195{
@@ -659,7 +228,7 @@ int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
659 IWL_SCD_BE_MSK | IWL_SCD_BK_MSK | 228 IWL_SCD_BE_MSK | IWL_SCD_BK_MSK |
660 IWL_SCD_MGMT_MSK; 229 IWL_SCD_MGMT_MSK;
661 if ((flush_control & BIT(IWL_RXON_CTX_PAN)) && 230 if ((flush_control & BIT(IWL_RXON_CTX_PAN)) &&
662 (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))) 231 (priv->shrd->valid_contexts != BIT(IWL_RXON_CTX_BSS)))
663 flush_cmd.fifo_control |= IWL_PAN_SCD_VO_MSK | 232 flush_cmd.fifo_control |= IWL_PAN_SCD_VO_MSK |
664 IWL_PAN_SCD_VI_MSK | IWL_PAN_SCD_BE_MSK | 233 IWL_PAN_SCD_VI_MSK | IWL_PAN_SCD_BE_MSK |
665 IWL_PAN_SCD_BK_MSK | IWL_PAN_SCD_MGMT_MSK | 234 IWL_PAN_SCD_BK_MSK | IWL_PAN_SCD_MGMT_MSK |
@@ -1136,8 +705,9 @@ static void iwlagn_set_kill_msk(struct iwl_priv *priv,
1136 } 705 }
1137} 706}
1138 707
1139void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv, 708int iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
1140 struct iwl_rx_mem_buffer *rxb) 709 struct iwl_rx_mem_buffer *rxb,
710 struct iwl_device_cmd *cmd)
1141{ 711{
1142 unsigned long flags; 712 unsigned long flags;
1143 struct iwl_rx_packet *pkt = rxb_addr(rxb); 713 struct iwl_rx_packet *pkt = rxb_addr(rxb);
@@ -1146,7 +716,7 @@ void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
1146 716
1147 if (priv->bt_enable_flag == IWLAGN_BT_FLAG_COEX_MODE_DISABLED) { 717 if (priv->bt_enable_flag == IWLAGN_BT_FLAG_COEX_MODE_DISABLED) {
1148 /* bt coex disabled */ 718 /* bt coex disabled */
1149 return; 719 return 0;
1150 } 720 }
1151 721
1152 IWL_DEBUG_COEX(priv, "BT Coex notification:\n"); 722 IWL_DEBUG_COEX(priv, "BT Coex notification:\n");
@@ -1188,6 +758,7 @@ void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
1188 spin_lock_irqsave(&priv->shrd->lock, flags); 758 spin_lock_irqsave(&priv->shrd->lock, flags);
1189 priv->bt_ci_compliance = coex->bt_ci_compliance; 759 priv->bt_ci_compliance = coex->bt_ci_compliance;
1190 spin_unlock_irqrestore(&priv->shrd->lock, flags); 760 spin_unlock_irqrestore(&priv->shrd->lock, flags);
761 return 0;
1191} 762}
1192 763
1193void iwlagn_bt_rx_handler_setup(struct iwl_priv *priv) 764void iwlagn_bt_rx_handler_setup(struct iwl_priv *priv)
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index ffee15ba06a8..c14f8d6fd7d8 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -346,7 +346,7 @@ static void rs_program_fix_rate(struct iwl_priv *priv,
346{ 346{
347 struct iwl_station_priv *sta_priv = 347 struct iwl_station_priv *sta_priv =
348 container_of(lq_sta, struct iwl_station_priv, lq_sta); 348 container_of(lq_sta, struct iwl_station_priv, lq_sta);
349 struct iwl_rxon_context *ctx = sta_priv->common.ctx; 349 struct iwl_rxon_context *ctx = sta_priv->ctx;
350 350
351 lq_sta->active_legacy_rate = 0x0FFF; /* 1 - 54 MBits, includes CCK */ 351 lq_sta->active_legacy_rate = 0x0FFF; /* 1 - 54 MBits, includes CCK */
352 lq_sta->active_siso_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */ 352 lq_sta->active_siso_rate = 0x1FD0; /* 6 - 60 MBits, no 9, no CCK */
@@ -710,7 +710,7 @@ static int rs_toggle_antenna(u32 valid_ant, u32 *rate_n_flags,
710static bool rs_use_green(struct ieee80211_sta *sta) 710static bool rs_use_green(struct ieee80211_sta *sta)
711{ 711{
712 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; 712 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
713 struct iwl_rxon_context *ctx = sta_priv->common.ctx; 713 struct iwl_rxon_context *ctx = sta_priv->ctx;
714 714
715 return (sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD) && 715 return (sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD) &&
716 !(ctx->ht.non_gf_sta_present); 716 !(ctx->ht.non_gf_sta_present);
@@ -917,7 +917,7 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
917 struct iwl_scale_tbl_info tbl_type; 917 struct iwl_scale_tbl_info tbl_type;
918 struct iwl_scale_tbl_info *curr_tbl, *other_tbl, *tmp_tbl; 918 struct iwl_scale_tbl_info *curr_tbl, *other_tbl, *tmp_tbl;
919 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; 919 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
920 struct iwl_rxon_context *ctx = sta_priv->common.ctx; 920 struct iwl_rxon_context *ctx = sta_priv->ctx;
921 921
922 IWL_DEBUG_RATE_LIMIT(priv, "get frame ack response, update rate scale window\n"); 922 IWL_DEBUG_RATE_LIMIT(priv, "get frame ack response, update rate scale window\n");
923 923
@@ -1283,7 +1283,7 @@ static int rs_switch_to_mimo2(struct iwl_priv *priv,
1283 s32 rate; 1283 s32 rate;
1284 s8 is_green = lq_sta->is_green; 1284 s8 is_green = lq_sta->is_green;
1285 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; 1285 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
1286 struct iwl_rxon_context *ctx = sta_priv->common.ctx; 1286 struct iwl_rxon_context *ctx = sta_priv->ctx;
1287 1287
1288 if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported) 1288 if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported)
1289 return -1; 1289 return -1;
@@ -1339,7 +1339,7 @@ static int rs_switch_to_mimo3(struct iwl_priv *priv,
1339 s32 rate; 1339 s32 rate;
1340 s8 is_green = lq_sta->is_green; 1340 s8 is_green = lq_sta->is_green;
1341 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; 1341 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
1342 struct iwl_rxon_context *ctx = sta_priv->common.ctx; 1342 struct iwl_rxon_context *ctx = sta_priv->ctx;
1343 1343
1344 if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported) 1344 if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported)
1345 return -1; 1345 return -1;
@@ -1396,7 +1396,7 @@ static int rs_switch_to_siso(struct iwl_priv *priv,
1396 u8 is_green = lq_sta->is_green; 1396 u8 is_green = lq_sta->is_green;
1397 s32 rate; 1397 s32 rate;
1398 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; 1398 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
1399 struct iwl_rxon_context *ctx = sta_priv->common.ctx; 1399 struct iwl_rxon_context *ctx = sta_priv->ctx;
1400 1400
1401 if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported) 1401 if (!conf_is_ht(conf) || !sta->ht_cap.ht_supported)
1402 return -1; 1402 return -1;
@@ -2263,7 +2263,7 @@ static void rs_rate_scale_perform(struct iwl_priv *priv,
2263 u8 tid = IWL_MAX_TID_COUNT; 2263 u8 tid = IWL_MAX_TID_COUNT;
2264 struct iwl_tid_data *tid_data; 2264 struct iwl_tid_data *tid_data;
2265 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; 2265 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2266 struct iwl_rxon_context *ctx = sta_priv->common.ctx; 2266 struct iwl_rxon_context *ctx = sta_priv->ctx;
2267 2267
2268 IWL_DEBUG_RATE(priv, "rate scale calculate new rate for skb\n"); 2268 IWL_DEBUG_RATE(priv, "rate scale calculate new rate for skb\n");
2269 2269
@@ -2706,7 +2706,7 @@ static void rs_initialize_lq(struct iwl_priv *priv,
2706 return; 2706 return;
2707 2707
2708 sta_priv = (void *)sta->drv_priv; 2708 sta_priv = (void *)sta->drv_priv;
2709 ctx = sta_priv->common.ctx; 2709 ctx = sta_priv->ctx;
2710 2710
2711 i = lq_sta->last_txrate_idx; 2711 i = lq_sta->last_txrate_idx;
2712 2712
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
index 1af276739d87..00e6fc59e459 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rxon.c
@@ -311,7 +311,7 @@ int iwlagn_set_pan_params(struct iwl_priv *priv)
311 int slot0 = 300, slot1 = 0; 311 int slot0 = 300, slot1 = 0;
312 int ret; 312 int ret;
313 313
314 if (priv->valid_contexts == BIT(IWL_RXON_CTX_BSS)) 314 if (priv->shrd->valid_contexts == BIT(IWL_RXON_CTX_BSS))
315 return 0; 315 return 0;
316 316
317 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2); 317 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
@@ -456,7 +456,7 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
456 else 456 else
457 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 457 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
458 458
459 iwl_print_rx_config_cmd(priv, ctx); 459 iwl_print_rx_config_cmd(priv, ctx->ctxid);
460 ret = iwl_check_rxon_cmd(priv, ctx); 460 ret = iwl_check_rxon_cmd(priv, ctx);
461 if (ret) { 461 if (ret) {
462 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n"); 462 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tt.c b/drivers/net/wireless/iwlwifi/iwl-agn-tt.c
index 92ba8cd0ecd5..495f93664741 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-tt.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-tt.c
@@ -209,7 +209,7 @@ static void iwl_perform_ct_kill_task(struct iwl_priv *priv,
209{ 209{
210 if (stop) { 210 if (stop) {
211 IWL_DEBUG_TEMP(priv, "Stop all queues\n"); 211 IWL_DEBUG_TEMP(priv, "Stop all queues\n");
212 if (priv->shrd->mac80211_registered) 212 if (priv->mac80211_registered)
213 ieee80211_stop_queues(priv->hw); 213 ieee80211_stop_queues(priv->hw);
214 IWL_DEBUG_TEMP(priv, 214 IWL_DEBUG_TEMP(priv,
215 "Schedule 5 seconds CT_KILL Timer\n"); 215 "Schedule 5 seconds CT_KILL Timer\n");
@@ -217,7 +217,7 @@ static void iwl_perform_ct_kill_task(struct iwl_priv *priv,
217 jiffies + CT_KILL_EXIT_DURATION * HZ); 217 jiffies + CT_KILL_EXIT_DURATION * HZ);
218 } else { 218 } else {
219 IWL_DEBUG_TEMP(priv, "Wake all queues\n"); 219 IWL_DEBUG_TEMP(priv, "Wake all queues\n");
220 if (priv->shrd->mac80211_registered) 220 if (priv->mac80211_registered)
221 ieee80211_wake_queues(priv->hw); 221 ieee80211_wake_queues(priv->hw);
222 } 222 }
223} 223}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tt.h b/drivers/net/wireless/iwlwifi/iwl-agn-tt.h
index d118ed29bf3f..7282a23e8f1c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-tt.h
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-tt.h
@@ -117,7 +117,6 @@ struct iwl_tt_mgmt {
117u8 iwl_tt_current_power_mode(struct iwl_priv *priv); 117u8 iwl_tt_current_power_mode(struct iwl_priv *priv);
118bool iwl_tt_is_low_power_state(struct iwl_priv *priv); 118bool iwl_tt_is_low_power_state(struct iwl_priv *priv);
119bool iwl_ht_enabled(struct iwl_priv *priv); 119bool iwl_ht_enabled(struct iwl_priv *priv);
120bool iwl_check_for_ct_kill(struct iwl_priv *priv);
121enum iwl_antenna_ok iwl_tx_ant_restriction(struct iwl_priv *priv); 120enum iwl_antenna_ok iwl_tx_ant_restriction(struct iwl_priv *priv);
122enum iwl_antenna_ok iwl_rx_ant_restriction(struct iwl_priv *priv); 121enum iwl_antenna_ok iwl_rx_ant_restriction(struct iwl_priv *priv);
123void iwl_tt_enter_ct_kill(struct iwl_priv *priv); 122void iwl_tt_enter_ct_kill(struct iwl_priv *priv);
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
index f8a4bcf0a34b..8c0f07f56149 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c
@@ -313,6 +313,9 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
313 iwl_sta_modify_sleep_tx_count(priv, sta_id, 1); 313 iwl_sta_modify_sleep_tx_count(priv, sta_id, 1);
314 } 314 }
315 315
316 if (info->flags & IEEE80211_TX_CTL_AMPDU)
317 is_agg = true;
318
316 /* irqs already disabled/saved above when locking priv->shrd->lock */ 319 /* irqs already disabled/saved above when locking priv->shrd->lock */
317 spin_lock(&priv->shrd->sta_lock); 320 spin_lock(&priv->shrd->sta_lock);
318 321
@@ -322,7 +325,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
322 goto drop_unlock_sta; 325 goto drop_unlock_sta;
323 326
324 memset(dev_cmd, 0, sizeof(*dev_cmd)); 327 memset(dev_cmd, 0, sizeof(*dev_cmd));
325 tx_cmd = &dev_cmd->cmd.tx; 328 tx_cmd = (struct iwl_tx_cmd *) dev_cmd->payload;
326 329
327 /* Copy MAC header from skb into command buffer */ 330 /* Copy MAC header from skb into command buffer */
328 memcpy(tx_cmd->hdr, hdr, hdr_len); 331 memcpy(tx_cmd->hdr, hdr, hdr_len);
@@ -736,12 +739,13 @@ static void iwl_check_abort_status(struct iwl_priv *priv,
736 } 739 }
737} 740}
738 741
739void iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) 742int iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
743 struct iwl_device_cmd *cmd)
740{ 744{
741 struct iwl_rx_packet *pkt = rxb_addr(rxb); 745 struct iwl_rx_packet *pkt = rxb_addr(rxb);
742 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 746 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
743 int txq_id = SEQ_TO_QUEUE(sequence); 747 int txq_id = SEQ_TO_QUEUE(sequence);
744 int cmd_index = SEQ_TO_INDEX(sequence); 748 int cmd_index __maybe_unused = SEQ_TO_INDEX(sequence);
745 struct iwlagn_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; 749 struct iwlagn_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
746 struct ieee80211_hdr *hdr; 750 struct ieee80211_hdr *hdr;
747 u32 status = le16_to_cpu(tx_resp->status.status); 751 u32 status = le16_to_cpu(tx_resp->status.status);
@@ -824,6 +828,7 @@ void iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
824 828
825 iwl_check_abort_status(priv, tx_resp->frame_count, status); 829 iwl_check_abort_status(priv, tx_resp->frame_count, status);
826 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags); 830 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
831 return 0;
827} 832}
828 833
829/** 834/**
@@ -832,8 +837,9 @@ void iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
832 * Handles block-acknowledge notification from device, which reports success 837 * Handles block-acknowledge notification from device, which reports success
833 * of frames sent via aggregation. 838 * of frames sent via aggregation.
834 */ 839 */
835void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, 840int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
836 struct iwl_rx_mem_buffer *rxb) 841 struct iwl_rx_mem_buffer *rxb,
842 struct iwl_device_cmd *cmd)
837{ 843{
838 struct iwl_rx_packet *pkt = rxb_addr(rxb); 844 struct iwl_rx_packet *pkt = rxb_addr(rxb);
839 struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba; 845 struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
@@ -857,7 +863,7 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
857 if (scd_flow >= hw_params(priv).max_txq_num) { 863 if (scd_flow >= hw_params(priv).max_txq_num) {
858 IWL_ERR(priv, 864 IWL_ERR(priv,
859 "BUG_ON scd_flow is bigger than number of queues\n"); 865 "BUG_ON scd_flow is bigger than number of queues\n");
860 return; 866 return 0;
861 } 867 }
862 868
863 sta_id = ba_resp->sta_id; 869 sta_id = ba_resp->sta_id;
@@ -877,14 +883,14 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
877 "BA scd_flow %d does not match txq_id %d\n", 883 "BA scd_flow %d does not match txq_id %d\n",
878 scd_flow, agg->txq_id); 884 scd_flow, agg->txq_id);
879 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags); 885 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
880 return; 886 return 0;
881 } 887 }
882 888
883 if (unlikely(!agg->wait_for_ba)) { 889 if (unlikely(!agg->wait_for_ba)) {
884 if (unlikely(ba_resp->bitmap)) 890 if (unlikely(ba_resp->bitmap))
885 IWL_ERR(priv, "Received BA when not expected\n"); 891 IWL_ERR(priv, "Received BA when not expected\n");
886 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags); 892 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
887 return; 893 return 0;
888 } 894 }
889 895
890 IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, " 896 IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, "
@@ -901,7 +907,7 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
901 ba_resp->scd_ssn); 907 ba_resp->scd_ssn);
902 908
903 /* Mark that the expected block-ack response arrived */ 909 /* Mark that the expected block-ack response arrived */
904 agg->wait_for_ba = 0; 910 agg->wait_for_ba = false;
905 911
906 /* Sanity check values reported by uCode */ 912 /* Sanity check values reported by uCode */
907 if (ba_resp->txed_2_done > ba_resp->txed) { 913 if (ba_resp->txed_2_done > ba_resp->txed) {
@@ -955,4 +961,5 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
955 } 961 }
956 962
957 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags); 963 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
964 return 0;
958} 965}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
index ddb255a575df..b4e1e7c4c314 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
@@ -114,13 +114,8 @@ static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
114 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD); 114 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
115 115
116 IWL_DEBUG_FW(priv, "%s uCode section being loaded...\n", name); 116 IWL_DEBUG_FW(priv, "%s uCode section being loaded...\n", name);
117 ret = wait_event_interruptible_timeout(priv->wait_command_queue, 117 ret = wait_event_timeout(priv->shrd->wait_command_queue,
118 priv->ucode_write_complete, 5 * HZ); 118 priv->ucode_write_complete, 5 * HZ);
119 if (ret == -ERESTARTSYS) {
120 IWL_ERR(priv, "Could not load the %s uCode section due "
121 "to interrupt\n", name);
122 return ret;
123 }
124 if (!ret) { 119 if (!ret) {
125 IWL_ERR(priv, "Could not load the %s uCode section\n", 120 IWL_ERR(priv, "Could not load the %s uCode section\n",
126 name); 121 name);
@@ -164,11 +159,11 @@ static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
164{ 159{
165 struct iwl_calib_temperature_offset_cmd cmd; 160 struct iwl_calib_temperature_offset_cmd cmd;
166 __le16 *offset_calib = 161 __le16 *offset_calib =
167 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_TEMPERATURE); 162 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
168 163
169 memset(&cmd, 0, sizeof(cmd)); 164 memset(&cmd, 0, sizeof(cmd));
170 iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD); 165 iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
171 memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(offset_calib)); 166 memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
172 if (!(cmd.radio_sensor_offset)) 167 if (!(cmd.radio_sensor_offset))
173 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET; 168 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
174 169
@@ -178,6 +173,42 @@ static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
178 (u8 *)&cmd, sizeof(cmd)); 173 (u8 *)&cmd, sizeof(cmd));
179} 174}
180 175
176static int iwlagn_set_temperature_offset_calib_v2(struct iwl_priv *priv)
177{
178 struct iwl_calib_temperature_offset_v2_cmd cmd;
179 __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,
180 EEPROM_KELVIN_TEMPERATURE);
181 __le16 *offset_calib_low =
182 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
183 struct iwl_eeprom_calib_hdr *hdr;
184
185 memset(&cmd, 0, sizeof(cmd));
186 iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
187 hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
188 EEPROM_CALIB_ALL);
189 memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
190 sizeof(*offset_calib_high));
191 memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
192 sizeof(*offset_calib_low));
193 if (!(cmd.radio_sensor_offset_low)) {
194 IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
195 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
196 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
197 }
198 memcpy(&cmd.burntVoltageRef, &hdr->voltage,
199 sizeof(hdr->voltage));
200
201 IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
202 le16_to_cpu(cmd.radio_sensor_offset_high));
203 IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
204 le16_to_cpu(cmd.radio_sensor_offset_low));
205 IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
206 le16_to_cpu(cmd.burntVoltageRef));
207
208 return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
209 (u8 *)&cmd, sizeof(cmd));
210}
211
181static int iwlagn_send_calib_cfg(struct iwl_priv *priv) 212static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
182{ 213{
183 struct iwl_calib_cfg_cmd calib_cfg_cmd; 214 struct iwl_calib_cfg_cmd calib_cfg_cmd;
@@ -197,8 +228,9 @@ static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
197 return iwl_trans_send_cmd(trans(priv), &cmd); 228 return iwl_trans_send_cmd(trans(priv), &cmd);
198} 229}
199 230
200void iwlagn_rx_calib_result(struct iwl_priv *priv, 231int iwlagn_rx_calib_result(struct iwl_priv *priv,
201 struct iwl_rx_mem_buffer *rxb) 232 struct iwl_rx_mem_buffer *rxb,
233 struct iwl_device_cmd *cmd)
202{ 234{
203 struct iwl_rx_packet *pkt = rxb_addr(rxb); 235 struct iwl_rx_packet *pkt = rxb_addr(rxb);
204 struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw; 236 struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
@@ -231,9 +263,10 @@ void iwlagn_rx_calib_result(struct iwl_priv *priv,
231 default: 263 default:
232 IWL_ERR(priv, "Unknown calibration notification %d\n", 264 IWL_ERR(priv, "Unknown calibration notification %d\n",
233 hdr->op_code); 265 hdr->op_code);
234 return; 266 return -1;
235 } 267 }
236 iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len); 268 iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
269 return 0;
237} 270}
238 271
239int iwlagn_init_alive_start(struct iwl_priv *priv) 272int iwlagn_init_alive_start(struct iwl_priv *priv)
@@ -263,8 +296,12 @@ int iwlagn_init_alive_start(struct iwl_priv *priv)
263 * temperature offset calibration is only needed for runtime ucode, 296 * temperature offset calibration is only needed for runtime ucode,
264 * so prepare the value now. 297 * so prepare the value now.
265 */ 298 */
266 if (priv->cfg->need_temp_offset_calib) 299 if (priv->cfg->need_temp_offset_calib) {
267 return iwlagn_set_temperature_offset_calib(priv); 300 if (priv->cfg->temp_offset_v2)
301 return iwlagn_set_temperature_offset_calib_v2(priv);
302 else
303 return iwlagn_set_temperature_offset_calib(priv);
304 }
268 305
269 return 0; 306 return 0;
270} 307}
@@ -349,6 +386,7 @@ int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
349 386
350static int iwlagn_alive_notify(struct iwl_priv *priv) 387static int iwlagn_alive_notify(struct iwl_priv *priv)
351{ 388{
389 struct iwl_rxon_context *ctx;
352 int ret; 390 int ret;
353 391
354 if (!priv->tx_cmd_pool) 392 if (!priv->tx_cmd_pool)
@@ -361,6 +399,8 @@ static int iwlagn_alive_notify(struct iwl_priv *priv)
361 return -ENOMEM; 399 return -ENOMEM;
362 400
363 iwl_trans_tx_start(trans(priv)); 401 iwl_trans_tx_start(trans(priv));
402 for_each_context(priv, ctx)
403 ctx->last_tx_rejected = false;
364 404
365 ret = iwlagn_send_wimax_coex(priv); 405 ret = iwlagn_send_wimax_coex(priv);
366 if (ret) 406 if (ret)
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 8113fbe770a3..baaf48616cc7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -453,122 +453,6 @@ static void iwl_bg_tx_flush(struct work_struct *work)
453 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL); 453 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
454} 454}
455 455
456/*****************************************************************************
457 *
458 * sysfs attributes
459 *
460 *****************************************************************************/
461
462#ifdef CONFIG_IWLWIFI_DEBUG
463
464/*
465 * The following adds a new attribute to the sysfs representation
466 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
467 * used for controlling the debug level.
468 *
469 * See the level definitions in iwl for details.
470 *
471 * The debug_level being managed using sysfs below is a per device debug
472 * level that is used instead of the global debug level if it (the per
473 * device debug level) is set.
474 */
475static ssize_t show_debug_level(struct device *d,
476 struct device_attribute *attr, char *buf)
477{
478 struct iwl_shared *shrd = dev_get_drvdata(d);
479 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(shrd));
480}
481static ssize_t store_debug_level(struct device *d,
482 struct device_attribute *attr,
483 const char *buf, size_t count)
484{
485 struct iwl_shared *shrd = dev_get_drvdata(d);
486 struct iwl_priv *priv = shrd->priv;
487 unsigned long val;
488 int ret;
489
490 ret = strict_strtoul(buf, 0, &val);
491 if (ret)
492 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
493 else {
494 shrd->dbg_level_dev = val;
495 if (iwl_alloc_traffic_mem(priv))
496 IWL_ERR(shrd->priv,
497 "Not enough memory to generate traffic log\n");
498 }
499 return strnlen(buf, count);
500}
501
502static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
503 show_debug_level, store_debug_level);
504
505
506#endif /* CONFIG_IWLWIFI_DEBUG */
507
508
509static ssize_t show_temperature(struct device *d,
510 struct device_attribute *attr, char *buf)
511{
512 struct iwl_shared *shrd = dev_get_drvdata(d);
513 struct iwl_priv *priv = shrd->priv;
514
515 if (!iwl_is_alive(priv->shrd))
516 return -EAGAIN;
517
518 return sprintf(buf, "%d\n", priv->temperature);
519}
520
521static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
522
523static ssize_t show_tx_power(struct device *d,
524 struct device_attribute *attr, char *buf)
525{
526 struct iwl_priv *priv = dev_get_drvdata(d);
527
528 if (!iwl_is_ready_rf(priv->shrd))
529 return sprintf(buf, "off\n");
530 else
531 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
532}
533
534static ssize_t store_tx_power(struct device *d,
535 struct device_attribute *attr,
536 const char *buf, size_t count)
537{
538 struct iwl_priv *priv = dev_get_drvdata(d);
539 unsigned long val;
540 int ret;
541
542 ret = strict_strtoul(buf, 10, &val);
543 if (ret)
544 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
545 else {
546 ret = iwl_set_tx_power(priv, val, false);
547 if (ret)
548 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
549 ret);
550 else
551 ret = count;
552 }
553 return ret;
554}
555
556static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
557
558static struct attribute *iwl_sysfs_entries[] = {
559 &dev_attr_temperature.attr,
560 &dev_attr_tx_power.attr,
561#ifdef CONFIG_IWLWIFI_DEBUG
562 &dev_attr_debug_level.attr,
563#endif
564 NULL
565};
566
567static struct attribute_group iwl_attribute_group = {
568 .name = NULL, /* put in device directory */
569 .attrs = iwl_sysfs_entries,
570};
571
572/****************************************************************************** 456/******************************************************************************
573 * 457 *
574 * uCode download functions 458 * uCode download functions
@@ -623,9 +507,9 @@ static void iwl_init_context(struct iwl_priv *priv, u32 ucode_flags)
623 * The default context is always valid, 507 * The default context is always valid,
624 * the PAN context depends on uCode. 508 * the PAN context depends on uCode.
625 */ 509 */
626 priv->valid_contexts = BIT(IWL_RXON_CTX_BSS); 510 priv->shrd->valid_contexts = BIT(IWL_RXON_CTX_BSS);
627 if (ucode_flags & IWL_UCODE_TLV_FLAGS_PAN) 511 if (ucode_flags & IWL_UCODE_TLV_FLAGS_PAN)
628 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN); 512 priv->shrd->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
629 513
630 for (i = 0; i < NUM_IWL_RXON_CTX; i++) 514 for (i = 0; i < NUM_IWL_RXON_CTX; i++)
631 priv->contexts[i].ctxid = i; 515 priv->contexts[i].ctxid = i;
@@ -1259,13 +1143,6 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1259 if (err) 1143 if (err)
1260 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err); 1144 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1261 1145
1262 err = sysfs_create_group(&(priv->bus->dev->kobj),
1263 &iwl_attribute_group);
1264 if (err) {
1265 IWL_ERR(priv, "failed to create sysfs device attributes\n");
1266 goto out_unbind;
1267 }
1268
1269 /* We have our copies now, allow OS release its copies */ 1146 /* We have our copies now, allow OS release its copies */
1270 release_firmware(ucode_raw); 1147 release_firmware(ucode_raw);
1271 complete(&priv->firmware_loading_complete); 1148 complete(&priv->firmware_loading_complete);
@@ -1519,9 +1396,11 @@ static void __iwl_down(struct iwl_priv *priv)
1519 if (!exit_pending) 1396 if (!exit_pending)
1520 clear_bit(STATUS_EXIT_PENDING, &priv->shrd->status); 1397 clear_bit(STATUS_EXIT_PENDING, &priv->shrd->status);
1521 1398
1522 if (priv->shrd->mac80211_registered) 1399 if (priv->mac80211_registered)
1523 ieee80211_stop_queues(priv->hw); 1400 ieee80211_stop_queues(priv->hw);
1524 1401
1402 iwl_trans_stop_device(trans(priv));
1403
1525 /* Clear out all status bits but a few that are stable across reset */ 1404 /* Clear out all status bits but a few that are stable across reset */
1526 priv->shrd->status &= 1405 priv->shrd->status &=
1527 test_bit(STATUS_RF_KILL_HW, &priv->shrd->status) << 1406 test_bit(STATUS_RF_KILL_HW, &priv->shrd->status) <<
@@ -1533,8 +1412,6 @@ static void __iwl_down(struct iwl_priv *priv)
1533 test_bit(STATUS_EXIT_PENDING, &priv->shrd->status) << 1412 test_bit(STATUS_EXIT_PENDING, &priv->shrd->status) <<
1534 STATUS_EXIT_PENDING; 1413 STATUS_EXIT_PENDING;
1535 1414
1536 iwl_trans_stop_device(trans(priv));
1537
1538 dev_kfree_skb(priv->beacon_skb); 1415 dev_kfree_skb(priv->beacon_skb);
1539 priv->beacon_skb = NULL; 1416 priv->beacon_skb = NULL;
1540} 1417}
@@ -1780,7 +1657,12 @@ static int iwl_mac_setup_register(struct iwl_priv *priv,
1780 IEEE80211_HW_SPECTRUM_MGMT | 1657 IEEE80211_HW_SPECTRUM_MGMT |
1781 IEEE80211_HW_REPORTS_TX_ACK_STATUS; 1658 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
1782 1659
1660 /*
1661 * Including the following line will crash some AP's. This
1662 * workaround removes the stimulus which causes the crash until
1663 * the AP software can be fixed.
1783 hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF; 1664 hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
1665 */
1784 1666
1785 hw->flags |= IEEE80211_HW_SUPPORTS_PS | 1667 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
1786 IEEE80211_HW_SUPPORTS_DYNAMIC_PS; 1668 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
@@ -1863,7 +1745,7 @@ static int iwl_mac_setup_register(struct iwl_priv *priv,
1863 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret); 1745 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
1864 return ret; 1746 return ret;
1865 } 1747 }
1866 priv->shrd->mac80211_registered = 1; 1748 priv->mac80211_registered = 1;
1867 1749
1868 return 0; 1750 return 0;
1869} 1751}
@@ -1919,7 +1801,7 @@ static void iwlagn_mac_stop(struct ieee80211_hw *hw)
1919 IWL_DEBUG_MAC80211(priv, "leave\n"); 1801 IWL_DEBUG_MAC80211(priv, "leave\n");
1920} 1802}
1921 1803
1922#ifdef CONFIG_PM 1804#ifdef CONFIG_PM_SLEEP
1923static int iwlagn_send_patterns(struct iwl_priv *priv, 1805static int iwlagn_send_patterns(struct iwl_priv *priv,
1924 struct cfg80211_wowlan *wowlan) 1806 struct cfg80211_wowlan *wowlan)
1925{ 1807{
@@ -1994,7 +1876,7 @@ struct wowlan_key_data {
1994 bool error, use_rsc_tsc, use_tkip; 1876 bool error, use_rsc_tsc, use_tkip;
1995}; 1877};
1996 1878
1997#ifdef CONFIG_PM 1879#ifdef CONFIG_PM_SLEEP
1998static void iwlagn_convert_p1k(u16 *p1k, __le16 *out) 1880static void iwlagn_convert_p1k(u16 *p1k, __le16 *out)
1999{ 1881{
2000 int i; 1882 int i;
@@ -2631,7 +2513,7 @@ static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
2631 mutex_lock(&priv->shrd->mutex); 2513 mutex_lock(&priv->shrd->mutex);
2632 IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n", 2514 IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
2633 sta->addr); 2515 sta->addr);
2634 sta_priv->common.sta_id = IWL_INVALID_STATION; 2516 sta_priv->sta_id = IWL_INVALID_STATION;
2635 2517
2636 atomic_set(&sta_priv->pending_frames, 0); 2518 atomic_set(&sta_priv->pending_frames, 0);
2637 if (vif->type == NL80211_IFTYPE_AP) 2519 if (vif->type == NL80211_IFTYPE_AP)
@@ -2647,7 +2529,7 @@ static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
2647 return ret; 2529 return ret;
2648 } 2530 }
2649 2531
2650 sta_priv->common.sta_id = sta_id; 2532 sta_priv->sta_id = sta_id;
2651 2533
2652 /* Initialize rate scaling */ 2534 /* Initialize rate scaling */
2653 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n", 2535 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
@@ -2880,7 +2762,7 @@ static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
2880 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN]; 2762 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
2881 int err = 0; 2763 int err = 0;
2882 2764
2883 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) 2765 if (!(priv->shrd->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
2884 return -EOPNOTSUPP; 2766 return -EOPNOTSUPP;
2885 2767
2886 if (!(ctx->interface_modes & BIT(NL80211_IFTYPE_P2P_CLIENT))) 2768 if (!(ctx->interface_modes & BIT(NL80211_IFTYPE_P2P_CLIENT)))
@@ -2888,15 +2770,6 @@ static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
2888 2770
2889 mutex_lock(&priv->shrd->mutex); 2771 mutex_lock(&priv->shrd->mutex);
2890 2772
2891 /*
2892 * TODO: Remove this hack! Firmware needs to be updated
2893 * to allow longer off-channel periods in scanning for
2894 * this use case, based on a flag (and we'll need an API
2895 * flag in the firmware when it has that).
2896 */
2897 if (iwl_is_associated(priv, IWL_RXON_CTX_BSS) && duration > 80)
2898 duration = 80;
2899
2900 if (test_bit(STATUS_SCAN_HW, &priv->shrd->status)) { 2773 if (test_bit(STATUS_SCAN_HW, &priv->shrd->status)) {
2901 err = -EBUSY; 2774 err = -EBUSY;
2902 goto out; 2775 goto out;
@@ -2905,6 +2778,7 @@ static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
2905 priv->hw_roc_channel = channel; 2778 priv->hw_roc_channel = channel;
2906 priv->hw_roc_chantype = channel_type; 2779 priv->hw_roc_chantype = channel_type;
2907 priv->hw_roc_duration = duration; 2780 priv->hw_roc_duration = duration;
2781 priv->hw_roc_start_notified = false;
2908 cancel_delayed_work(&priv->hw_roc_disable_work); 2782 cancel_delayed_work(&priv->hw_roc_disable_work);
2909 2783
2910 if (!ctx->is_active) { 2784 if (!ctx->is_active) {
@@ -2945,7 +2819,7 @@ static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
2945{ 2819{
2946 struct iwl_priv *priv = hw->priv; 2820 struct iwl_priv *priv = hw->priv;
2947 2821
2948 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) 2822 if (!(priv->shrd->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
2949 return -EOPNOTSUPP; 2823 return -EOPNOTSUPP;
2950 2824
2951 mutex_lock(&priv->shrd->mutex); 2825 mutex_lock(&priv->shrd->mutex);
@@ -3032,7 +2906,7 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3032{ 2906{
3033 priv->shrd->workqueue = create_singlethread_workqueue(DRV_NAME); 2907 priv->shrd->workqueue = create_singlethread_workqueue(DRV_NAME);
3034 2908
3035 init_waitqueue_head(&priv->wait_command_queue); 2909 init_waitqueue_head(&priv->shrd->wait_command_queue);
3036 2910
3037 INIT_WORK(&priv->restart, iwl_bg_restart); 2911 INIT_WORK(&priv->restart, iwl_bg_restart);
3038 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); 2912 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
@@ -3203,7 +3077,7 @@ struct ieee80211_ops iwlagn_hw_ops = {
3203 .tx = iwlagn_mac_tx, 3077 .tx = iwlagn_mac_tx,
3204 .start = iwlagn_mac_start, 3078 .start = iwlagn_mac_start,
3205 .stop = iwlagn_mac_stop, 3079 .stop = iwlagn_mac_stop,
3206#ifdef CONFIG_PM 3080#ifdef CONFIG_PM_SLEEP
3207 .suspend = iwlagn_mac_suspend, 3081 .suspend = iwlagn_mac_suspend,
3208 .resume = iwlagn_mac_resume, 3082 .resume = iwlagn_mac_resume,
3209#endif 3083#endif
@@ -3309,10 +3183,9 @@ int iwl_probe(struct iwl_bus *bus, const struct iwl_trans_ops *trans_ops,
3309 priv = hw->priv; 3183 priv = hw->priv;
3310 priv->bus = bus; 3184 priv->bus = bus;
3311 priv->shrd = &priv->_shrd; 3185 priv->shrd = &priv->_shrd;
3186 bus->shrd = priv->shrd;
3312 priv->shrd->bus = bus; 3187 priv->shrd->bus = bus;
3313 priv->shrd->priv = priv; 3188 priv->shrd->priv = priv;
3314 priv->shrd->hw = hw;
3315 bus_set_drv_data(priv->bus, priv->shrd);
3316 3189
3317 priv->shrd->trans = trans_ops->alloc(priv->shrd); 3190 priv->shrd->trans = trans_ops->alloc(priv->shrd);
3318 if (priv->shrd->trans == NULL) { 3191 if (priv->shrd->trans == NULL) {
@@ -3475,8 +3348,6 @@ void __devexit iwl_remove(struct iwl_priv * priv)
3475 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); 3348 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3476 3349
3477 iwl_dbgfs_unregister(priv); 3350 iwl_dbgfs_unregister(priv);
3478 sysfs_remove_group(&priv->bus->dev->kobj,
3479 &iwl_attribute_group);
3480 3351
3481 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to 3352 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3482 * to be called and iwl_down since we are removing the device 3353 * to be called and iwl_down since we are removing the device
@@ -3487,9 +3358,9 @@ void __devexit iwl_remove(struct iwl_priv * priv)
3487 iwl_testmode_cleanup(priv); 3358 iwl_testmode_cleanup(priv);
3488 iwl_leds_exit(priv); 3359 iwl_leds_exit(priv);
3489 3360
3490 if (priv->shrd->mac80211_registered) { 3361 if (priv->mac80211_registered) {
3491 ieee80211_unregister_hw(priv->hw); 3362 ieee80211_unregister_hw(priv->hw);
3492 priv->shrd->mac80211_registered = 0; 3363 priv->mac80211_registered = 0;
3493 } 3364 }
3494 3365
3495 iwl_tt_exit(priv); 3366 iwl_tt_exit(priv);
@@ -3513,8 +3384,6 @@ void __devexit iwl_remove(struct iwl_priv * priv)
3513 3384
3514 iwl_trans_free(trans(priv)); 3385 iwl_trans_free(trans(priv));
3515 3386
3516 bus_set_drv_data(priv->bus, NULL);
3517
3518 iwl_uninit_drv(priv); 3387 iwl_uninit_drv(priv);
3519 3388
3520 dev_kfree_skb(priv->beacon_skb); 3389 dev_kfree_skb(priv->beacon_skb);
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.h b/drivers/net/wireless/iwlwifi/iwl-agn.h
index a7b4948e43da..2a297d1e6bc7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.h
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.h
@@ -88,8 +88,9 @@ void iwlagn_bss_info_changed(struct ieee80211_hw *hw,
88 u32 changes); 88 u32 changes);
89 89
90/* uCode */ 90/* uCode */
91void iwlagn_rx_calib_result(struct iwl_priv *priv, 91int iwlagn_rx_calib_result(struct iwl_priv *priv,
92 struct iwl_rx_mem_buffer *rxb); 92 struct iwl_rx_mem_buffer *rxb,
93 struct iwl_device_cmd *cmd);
93int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type); 94int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type);
94void iwlagn_send_prio_tbl(struct iwl_priv *priv); 95void iwlagn_send_prio_tbl(struct iwl_priv *priv);
95int iwlagn_run_init_ucode(struct iwl_priv *priv); 96int iwlagn_run_init_ucode(struct iwl_priv *priv);
@@ -98,7 +99,6 @@ int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
98 enum iwlagn_ucode_type ucode_type); 99 enum iwlagn_ucode_type ucode_type);
99 100
100/* lib */ 101/* lib */
101int iwlagn_hw_valid_rtc_data_addr(u32 addr);
102int iwlagn_send_tx_power(struct iwl_priv *priv); 102int iwlagn_send_tx_power(struct iwl_priv *priv);
103void iwlagn_temperature(struct iwl_priv *priv); 103void iwlagn_temperature(struct iwl_priv *priv);
104u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv); 104u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv);
@@ -109,7 +109,6 @@ int iwlagn_send_beacon_cmd(struct iwl_priv *priv);
109/* rx */ 109/* rx */
110int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band); 110int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band);
111void iwl_setup_rx_handlers(struct iwl_priv *priv); 111void iwl_setup_rx_handlers(struct iwl_priv *priv);
112void iwl_rx_dispatch(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
113 112
114 113
115/* tx */ 114/* tx */
@@ -118,9 +117,11 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
118 struct ieee80211_sta *sta, u16 tid, u16 *ssn); 117 struct ieee80211_sta *sta, u16 tid, u16 *ssn);
119int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif, 118int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
120 struct ieee80211_sta *sta, u16 tid); 119 struct ieee80211_sta *sta, u16 tid);
121void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv, 120int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
122 struct iwl_rx_mem_buffer *rxb); 121 struct iwl_rx_mem_buffer *rxb,
123void iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb); 122 struct iwl_device_cmd *cmd);
123int iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
124 struct iwl_device_cmd *cmd);
124 125
125static inline u32 iwl_tx_status_to_mac80211(u32 status) 126static inline u32 iwl_tx_status_to_mac80211(u32 status)
126{ 127{
@@ -148,7 +149,6 @@ static inline bool iwl_is_tx_success(u32 status)
148u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant_idx, u8 valid); 149u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant_idx, u8 valid);
149 150
150/* scan */ 151/* scan */
151int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif);
152void iwlagn_post_scan(struct iwl_priv *priv); 152void iwlagn_post_scan(struct iwl_priv *priv);
153void iwlagn_disable_roc(struct iwl_priv *priv); 153void iwlagn_disable_roc(struct iwl_priv *priv);
154 154
@@ -158,8 +158,9 @@ int iwlagn_manage_ibss_station(struct iwl_priv *priv,
158 158
159/* bt coex */ 159/* bt coex */
160void iwlagn_send_advance_bt_config(struct iwl_priv *priv); 160void iwlagn_send_advance_bt_config(struct iwl_priv *priv);
161void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv, 161int iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
162 struct iwl_rx_mem_buffer *rxb); 162 struct iwl_rx_mem_buffer *rxb,
163 struct iwl_device_cmd *cmd);
163void iwlagn_bt_rx_handler_setup(struct iwl_priv *priv); 164void iwlagn_bt_rx_handler_setup(struct iwl_priv *priv);
164void iwlagn_bt_setup_deferred_work(struct iwl_priv *priv); 165void iwlagn_bt_setup_deferred_work(struct iwl_priv *priv);
165void iwlagn_bt_cancel_deferred_work(struct iwl_priv *priv); 166void iwlagn_bt_cancel_deferred_work(struct iwl_priv *priv);
diff --git a/drivers/net/wireless/iwlwifi/iwl-bus.h b/drivers/net/wireless/iwlwifi/iwl-bus.h
index 83aed46673e1..08b97594e305 100644
--- a/drivers/net/wireless/iwlwifi/iwl-bus.h
+++ b/drivers/net/wireless/iwlwifi/iwl-bus.h
@@ -63,19 +63,65 @@
63#ifndef __iwl_bus_h__ 63#ifndef __iwl_bus_h__
64#define __iwl_bus_h__ 64#define __iwl_bus_h__
65 65
66/*This file includes the declaration that are exported from the bus layer */
67
68#include <linux/types.h> 66#include <linux/types.h>
69#include <linux/spinlock.h> 67#include <linux/spinlock.h>
70 68
69/**
70 * DOC: Bus layer - role and goal
71 *
72 * iwl-bus.h defines the API to the bus layer of the iwlwifi driver.
73 * The bus layer is responsible for doing very basic bus operations that are
74 * listed in the iwl_bus_ops structure.
75 * The bus layer registers to the bus driver, advertises the supported HW and
76 * gets notifications about enumeration, suspend, resume.
77 * For the moment, the bus layer is not a linux kernel module as itself, and
78 * the module_init function of the driver must call the bus specific
79 * registration functions. These functions are listed at the end of this file.
80 * For the moment, there is only one implementation of this interface: PCI-e.
81 * This implementation is iwl-pci.c
82 */
83
84/**
85 * DOC: encapsulation and type safety
86 *
87 * The iwl_bus describes the data that is shared amongst all the bus layer
88 * implementations. This data is visible to other layers. Data in the bus
89 * specific area is not visible outside the bus specific implementation.
90 * iwl_bus holds a pointer to iwl_shared which holds pointer to all the other
91 * layers of the driver (iwl_priv, iwl_trans). In fact, this is the way to go
92 * when the transport layer needs to call a function of another layer.
93 *
94 * In order to achieve encapsulation, iwl_priv cannot be dereferenced from the
95 * bus layer. Type safety is still kept since functions that gets iwl_priv gets
96 * a typed pointer (as opposed to void *).
97 */
98
99/**
100 * DOC: probe flow
101 *
102 * The module_init calls the bus specific registration function. The
103 * registration to the bus layer will trigger an enumeration of the bus which
104 * will call the bus specific probe function.
105 * The first thing this function must do is to allocate the memory needed by
106 * iwl_bus + the bus_specific data.
107 * Once the bus specific probe function has configured the hardware, it
108 * chooses the appropriate transport layer and calls iwl_probe that will run
109 * the bus independent probe flow.
110 *
111 * Note: The bus specific code must set the following data in iwl_bus before it
112 * calls iwl_probe:
113 * * bus->dev
114 * * bus->irq
115 * * bus->ops
116 */
117
71struct iwl_shared; 118struct iwl_shared;
72struct iwl_bus; 119struct iwl_bus;
73 120
74/** 121/**
75 * struct iwl_bus_ops - bus specific operations 122 * struct iwl_bus_ops - bus specific operations
76 * @get_pm_support: must returns true if the bus can go to sleep 123 * @get_pm_support: must returns true if the bus can go to sleep
77 * @apm_config: will be called during the config of the APM configuration 124 * @apm_config: will be called during the config of the APM
78 * @set_drv_data: set the shared data pointer to the bus layer
79 * @get_hw_id: prints the hw_id in the provided buffer 125 * @get_hw_id: prints the hw_id in the provided buffer
80 * @write8: write a byte to register at offset ofs 126 * @write8: write a byte to register at offset ofs
81 * @write32: write a dword to register at offset ofs 127 * @write32: write a dword to register at offset ofs
@@ -84,7 +130,6 @@ struct iwl_bus;
84struct iwl_bus_ops { 130struct iwl_bus_ops {
85 bool (*get_pm_support)(struct iwl_bus *bus); 131 bool (*get_pm_support)(struct iwl_bus *bus);
86 void (*apm_config)(struct iwl_bus *bus); 132 void (*apm_config)(struct iwl_bus *bus);
87 void (*set_drv_data)(struct iwl_bus *bus, struct iwl_shared *shrd);
88 void (*get_hw_id)(struct iwl_bus *bus, char buf[], int buf_len); 133 void (*get_hw_id)(struct iwl_bus *bus, char buf[], int buf_len);
89 void (*write8)(struct iwl_bus *bus, u32 ofs, u8 val); 134 void (*write8)(struct iwl_bus *bus, u32 ofs, u8 val);
90 void (*write32)(struct iwl_bus *bus, u32 ofs, u32 val); 135 void (*write32)(struct iwl_bus *bus, u32 ofs, u32 val);
@@ -93,14 +138,18 @@ struct iwl_bus_ops {
93 138
94/** 139/**
95 * struct iwl_bus - bus common data 140 * struct iwl_bus - bus common data
96 * @dev - pointer to struct device * that represent the device 141 *
142 * This data is common to all bus layer implementations.
143 *
144 * @dev - pointer to struct device * that represents the device
97 * @ops - pointer to iwl_bus_ops 145 * @ops - pointer to iwl_bus_ops
98 * @shrd - pointer to iwl_shared which holds shared data from the upper layer 146 * @shrd - pointer to iwl_shared which holds shared data from the upper layer
147 * NB: for the time being this needs to be set by the upper layer since
148 * it allocates the shared data
99 * @irq - the irq number for the device 149 * @irq - the irq number for the device
100 * @reg_lock - protect hw register access 150 * @reg_lock - protect hw register access
101 */ 151 */
102struct iwl_bus { 152struct iwl_bus {
103 /* Common data to all buses */
104 struct device *dev; 153 struct device *dev;
105 const struct iwl_bus_ops *ops; 154 const struct iwl_bus_ops *ops;
106 struct iwl_shared *shrd; 155 struct iwl_shared *shrd;
@@ -123,12 +172,6 @@ static inline void bus_apm_config(struct iwl_bus *bus)
123 bus->ops->apm_config(bus); 172 bus->ops->apm_config(bus);
124} 173}
125 174
126static inline void bus_set_drv_data(struct iwl_bus *bus,
127 struct iwl_shared *shrd)
128{
129 bus->ops->set_drv_data(bus, shrd);
130}
131
132static inline void bus_get_hw_id(struct iwl_bus *bus, char buf[], int buf_len) 175static inline void bus_get_hw_id(struct iwl_bus *bus, char buf[], int buf_len)
133{ 176{
134 bus->ops->get_hw_id(bus, buf, buf_len); 177 bus->ops->get_hw_id(bus, buf, buf_len);
@@ -149,6 +192,9 @@ static inline u32 bus_read32(struct iwl_bus *bus, u32 ofs)
149 return bus->ops->read32(bus, ofs); 192 return bus->ops->read32(bus, ofs);
150} 193}
151 194
195/*****************************************************
196* Bus layer registration functions
197******************************************************/
152int __must_check iwl_pci_register_driver(void); 198int __must_check iwl_pci_register_driver(void);
153void iwl_pci_unregister_driver(void); 199void iwl_pci_unregister_driver(void);
154 200
diff --git a/drivers/net/wireless/iwlwifi/iwl-pci.h b/drivers/net/wireless/iwlwifi/iwl-cfg.h
index c0aea9e092cb..d4f317cfe8b5 100644
--- a/drivers/net/wireless/iwlwifi/iwl-pci.h
+++ b/drivers/net/wireless/iwlwifi/iwl-cfg.h
@@ -64,11 +64,10 @@
64#define __iwl_pci_h__ 64#define __iwl_pci_h__
65 65
66 66
67/* This file includes the declaration that are internal to the PCI 67/*
68 * implementation of the bus layer 68 * This file declares the config structures for all devices.
69 */ 69 */
70 70
71/* configuration for the _agn devices */
72extern struct iwl_cfg iwl5300_agn_cfg; 71extern struct iwl_cfg iwl5300_agn_cfg;
73extern struct iwl_cfg iwl5100_agn_cfg; 72extern struct iwl_cfg iwl5100_agn_cfg;
74extern struct iwl_cfg iwl5350_agn_cfg; 73extern struct iwl_cfg iwl5350_agn_cfg;
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h
index cb06196e0e80..64593aa03ad6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-commands.h
+++ b/drivers/net/wireless/iwlwifi/iwl-commands.h
@@ -3213,12 +3213,7 @@ enum iwl_ucode_calib_cfg {
3213 IWL_CALIB_CFG_LO_IDX | \ 3213 IWL_CALIB_CFG_LO_IDX | \
3214 IWL_CALIB_CFG_TX_IQ_IDX | \ 3214 IWL_CALIB_CFG_TX_IQ_IDX | \
3215 IWL_CALIB_CFG_RX_IQ_IDX | \ 3215 IWL_CALIB_CFG_RX_IQ_IDX | \
3216 IWL_CALIB_CFG_NOISE_IDX | \ 3216 IWL_CALIB_CFG_CRYSTAL_IDX)
3217 IWL_CALIB_CFG_CRYSTAL_IDX | \
3218 IWL_CALIB_CFG_TEMPERATURE_IDX | \
3219 IWL_CALIB_CFG_PAPD_IDX | \
3220 IWL_CALIB_CFG_SENSITIVITY_IDX | \
3221 IWL_CALIB_CFG_TX_PWR_IDX)
3222 3217
3223#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0)) 3218#define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
3224 3219
@@ -3268,6 +3263,14 @@ struct iwl_calib_temperature_offset_cmd {
3268 __le16 reserved; 3263 __le16 reserved;
3269} __packed; 3264} __packed;
3270 3265
3266struct iwl_calib_temperature_offset_v2_cmd {
3267 struct iwl_calib_hdr hdr;
3268 __le16 radio_sensor_offset_high;
3269 __le16 radio_sensor_offset_low;
3270 __le16 burntVoltageRef;
3271 __le16 reserved;
3272} __packed;
3273
3271/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */ 3274/* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3272struct iwl_calib_chain_noise_reset_cmd { 3275struct iwl_calib_chain_noise_reset_cmd {
3273 struct iwl_calib_hdr hdr; 3276 struct iwl_calib_hdr hdr;
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index 20dd1a5506ed..cea6520fafdb 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -818,8 +818,9 @@ void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
818 818
819#ifdef CONFIG_IWLWIFI_DEBUG 819#ifdef CONFIG_IWLWIFI_DEBUG
820void iwl_print_rx_config_cmd(struct iwl_priv *priv, 820void iwl_print_rx_config_cmd(struct iwl_priv *priv,
821 struct iwl_rxon_context *ctx) 821 enum iwl_rxon_context_id ctxid)
822{ 822{
823 struct iwl_rxon_context *ctx = &priv->contexts[ctxid];
823 struct iwl_rxon_cmd *rxon = &ctx->staging; 824 struct iwl_rxon_cmd *rxon = &ctx->staging;
824 825
825 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n"); 826 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
@@ -868,7 +869,7 @@ void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
868 * commands by clearing the ready bit */ 869 * commands by clearing the ready bit */
869 clear_bit(STATUS_READY, &priv->shrd->status); 870 clear_bit(STATUS_READY, &priv->shrd->status);
870 871
871 wake_up_interruptible(&priv->wait_command_queue); 872 wake_up(&priv->shrd->wait_command_queue);
872 873
873 if (!ondemand) { 874 if (!ondemand) {
874 /* 875 /*
@@ -1327,7 +1328,13 @@ void iwl_mac_remove_interface(struct ieee80211_hw *hw,
1327 1328
1328 mutex_lock(&priv->shrd->mutex); 1329 mutex_lock(&priv->shrd->mutex);
1329 1330
1330 WARN_ON(ctx->vif != vif); 1331 if (WARN_ON(ctx->vif != vif)) {
1332 struct iwl_rxon_context *tmp;
1333 IWL_ERR(priv, "ctx->vif = %p, vif = %p\n", ctx->vif, vif);
1334 for_each_context(priv, tmp)
1335 IWL_ERR(priv, "\tID = %d:\tctx = %p\tctx->vif = %p\n",
1336 tmp->ctxid, tmp, tmp->vif);
1337 }
1331 ctx->vif = NULL; 1338 ctx->vif = NULL;
1332 1339
1333 iwl_teardown_interface(priv, vif, false); 1340 iwl_teardown_interface(priv, vif, false);
@@ -1802,13 +1809,12 @@ u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
1802 return 0; 1809 return 0;
1803 1810
1804 quot = (usec / interval) & 1811 quot = (usec / interval) &
1805 (iwl_beacon_time_mask_high(priv, 1812 (iwl_beacon_time_mask_high(priv, IWLAGN_EXT_BEACON_TIME_POS) >>
1806 hw_params(priv).beacon_time_tsf_bits) >> 1813 IWLAGN_EXT_BEACON_TIME_POS);
1807 hw_params(priv).beacon_time_tsf_bits);
1808 rem = (usec % interval) & iwl_beacon_time_mask_low(priv, 1814 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
1809 hw_params(priv).beacon_time_tsf_bits); 1815 IWLAGN_EXT_BEACON_TIME_POS);
1810 1816
1811 return (quot << hw_params(priv).beacon_time_tsf_bits) + rem; 1817 return (quot << IWLAGN_EXT_BEACON_TIME_POS) + rem;
1812} 1818}
1813 1819
1814/* base is usually what we get from ucode with each received frame, 1820/* base is usually what we get from ucode with each received frame,
@@ -1818,22 +1824,22 @@ __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
1818 u32 addon, u32 beacon_interval) 1824 u32 addon, u32 beacon_interval)
1819{ 1825{
1820 u32 base_low = base & iwl_beacon_time_mask_low(priv, 1826 u32 base_low = base & iwl_beacon_time_mask_low(priv,
1821 hw_params(priv).beacon_time_tsf_bits); 1827 IWLAGN_EXT_BEACON_TIME_POS);
1822 u32 addon_low = addon & iwl_beacon_time_mask_low(priv, 1828 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
1823 hw_params(priv).beacon_time_tsf_bits); 1829 IWLAGN_EXT_BEACON_TIME_POS);
1824 u32 interval = beacon_interval * TIME_UNIT; 1830 u32 interval = beacon_interval * TIME_UNIT;
1825 u32 res = (base & iwl_beacon_time_mask_high(priv, 1831 u32 res = (base & iwl_beacon_time_mask_high(priv,
1826 hw_params(priv).beacon_time_tsf_bits)) + 1832 IWLAGN_EXT_BEACON_TIME_POS)) +
1827 (addon & iwl_beacon_time_mask_high(priv, 1833 (addon & iwl_beacon_time_mask_high(priv,
1828 hw_params(priv).beacon_time_tsf_bits)); 1834 IWLAGN_EXT_BEACON_TIME_POS));
1829 1835
1830 if (base_low > addon_low) 1836 if (base_low > addon_low)
1831 res += base_low - addon_low; 1837 res += base_low - addon_low;
1832 else if (base_low < addon_low) { 1838 else if (base_low < addon_low) {
1833 res += interval + base_low - addon_low; 1839 res += interval + base_low - addon_low;
1834 res += (1 << hw_params(priv).beacon_time_tsf_bits); 1840 res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
1835 } else 1841 } else
1836 res += (1 << hw_params(priv).beacon_time_tsf_bits); 1842 res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
1837 1843
1838 return cpu_to_le32(res); 1844 return cpu_to_le32(res);
1839} 1845}
@@ -1842,7 +1848,7 @@ void iwl_start_tx_ba_trans_ready(struct iwl_priv *priv,
1842 enum iwl_rxon_context_id ctx, 1848 enum iwl_rxon_context_id ctx,
1843 u8 sta_id, u8 tid) 1849 u8 sta_id, u8 tid)
1844{ 1850{
1845 struct ieee80211_vif *vif = priv->contexts[ctx].vif; 1851 struct ieee80211_vif *vif;
1846 u8 *addr = priv->stations[sta_id].sta.sta.addr; 1852 u8 *addr = priv->stations[sta_id].sta.sta.addr;
1847 1853
1848 if (ctx == NUM_IWL_RXON_CTX) 1854 if (ctx == NUM_IWL_RXON_CTX)
@@ -1865,3 +1871,33 @@ void iwl_stop_tx_ba_trans_ready(struct iwl_priv *priv,
1865 1871
1866 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid); 1872 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
1867} 1873}
1874
1875void iwl_set_hw_rfkill_state(struct iwl_priv *priv, bool state)
1876{
1877 wiphy_rfkill_set_hw_state(priv->hw->wiphy, state);
1878}
1879
1880void iwl_nic_config(struct iwl_priv *priv)
1881{
1882 priv->cfg->lib->nic_config(priv);
1883
1884}
1885
1886void iwl_free_skb(struct iwl_priv *priv, struct sk_buff *skb)
1887{
1888 struct ieee80211_tx_info *info;
1889
1890 info = IEEE80211_SKB_CB(skb);
1891 kmem_cache_free(priv->tx_cmd_pool, (info->driver_data[1]));
1892 dev_kfree_skb_any(skb);
1893}
1894
1895void iwl_stop_sw_queue(struct iwl_priv *priv, u8 ac)
1896{
1897 ieee80211_stop_queue(priv->hw, ac);
1898}
1899
1900void iwl_wake_sw_queue(struct iwl_priv *priv, u8 ac)
1901{
1902 ieee80211_wake_queue(priv->hw, ac);
1903}
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index 2ea8a2e0dfbc..74d4cff09fae 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -73,8 +73,6 @@ struct iwl_cmd;
73 73
74#define TIME_UNIT 1024 74#define TIME_UNIT 1024
75 75
76#define IWL_CMD(x) case x: return #x
77
78struct iwl_lib_ops { 76struct iwl_lib_ops {
79 /* set hw dependent parameters */ 77 /* set hw dependent parameters */
80 int (*set_hw_params)(struct iwl_priv *priv); 78 int (*set_hw_params)(struct iwl_priv *priv);
@@ -126,7 +124,6 @@ struct iwl_base_params {
126 const u16 max_ll_items; 124 const u16 max_ll_items;
127 const bool shadow_ram_support; 125 const bool shadow_ram_support;
128 u16 led_compensation; 126 u16 led_compensation;
129 int chain_noise_num_beacons;
130 bool adv_thermal_throttle; 127 bool adv_thermal_throttle;
131 bool support_ct_kill_exit; 128 bool support_ct_kill_exit;
132 const bool support_wimax_coexist; 129 const bool support_wimax_coexist;
@@ -196,6 +193,7 @@ struct iwl_ht_params {
196 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity 193 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
197 * @internal_wimax_coex: internal wifi/wimax combo device 194 * @internal_wimax_coex: internal wifi/wimax combo device
198 * @iq_invert: I/Q inversion 195 * @iq_invert: I/Q inversion
196 * @temp_offset_v2: support v2 of temperature offset calibration
199 * 197 *
200 * We enable the driver to be backward compatible wrt API version. The 198 * We enable the driver to be backward compatible wrt API version. The
201 * driver specifies which APIs it supports (with @ucode_api_max being the 199 * driver specifies which APIs it supports (with @ucode_api_max being the
@@ -233,6 +231,7 @@ struct iwl_cfg {
233 const bool rx_with_siso_diversity; 231 const bool rx_with_siso_diversity;
234 const bool internal_wimax_coex; 232 const bool internal_wimax_coex;
235 const bool iq_invert; 233 const bool iq_invert;
234 const bool temp_offset_v2;
236}; 235};
237 236
238/*************************** 237/***************************
@@ -271,7 +270,6 @@ int iwl_mac_change_interface(struct ieee80211_hw *hw,
271#ifdef CONFIG_IWLWIFI_DEBUGFS 270#ifdef CONFIG_IWLWIFI_DEBUGFS
272int iwl_alloc_traffic_mem(struct iwl_priv *priv); 271int iwl_alloc_traffic_mem(struct iwl_priv *priv);
273void iwl_free_traffic_mem(struct iwl_priv *priv); 272void iwl_free_traffic_mem(struct iwl_priv *priv);
274void iwl_reset_traffic_log(struct iwl_priv *priv);
275void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv, 273void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
276 u16 length, struct ieee80211_hdr *header); 274 u16 length, struct ieee80211_hdr *header);
277void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv, 275void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
@@ -332,12 +330,6 @@ int iwl_force_reset(struct iwl_priv *priv, int mode, bool external);
332u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame, 330u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame,
333 const u8 *ta, const u8 *ie, int ie_len, int left); 331 const u8 *ta, const u8 *ie, int ie_len, int left);
334void iwl_setup_rx_scan_handlers(struct iwl_priv *priv); 332void iwl_setup_rx_scan_handlers(struct iwl_priv *priv);
335u16 iwl_get_active_dwell_time(struct iwl_priv *priv,
336 enum ieee80211_band band,
337 u8 n_probes);
338u16 iwl_get_passive_dwell_time(struct iwl_priv *priv,
339 enum ieee80211_band band,
340 struct ieee80211_vif *vif);
341void iwl_setup_scan_deferred_work(struct iwl_priv *priv); 333void iwl_setup_scan_deferred_work(struct iwl_priv *priv);
342void iwl_cancel_scan_deferred_work(struct iwl_priv *priv); 334void iwl_cancel_scan_deferred_work(struct iwl_priv *priv);
343int __must_check iwl_scan_initiate(struct iwl_priv *priv, 335int __must_check iwl_scan_initiate(struct iwl_priv *priv,
@@ -360,7 +352,6 @@ int __must_check iwl_scan_initiate(struct iwl_priv *priv,
360 * S e n d i n g H o s t C o m m a n d s * 352 * S e n d i n g H o s t C o m m a n d s *
361 *****************************************************/ 353 *****************************************************/
362 354
363const char *get_cmd_string(u8 cmd);
364void iwl_bg_watchdog(unsigned long data); 355void iwl_bg_watchdog(unsigned long data);
365u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval); 356u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval);
366__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base, 357__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
@@ -368,19 +359,6 @@ __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
368 359
369 360
370/***************************************************** 361/*****************************************************
371* Error Handling Debugging
372******************************************************/
373#ifdef CONFIG_IWLWIFI_DEBUG
374void iwl_print_rx_config_cmd(struct iwl_priv *priv,
375 struct iwl_rxon_context *ctx);
376#else
377static inline void iwl_print_rx_config_cmd(struct iwl_priv *priv,
378 struct iwl_rxon_context *ctx)
379{
380}
381#endif
382
383/*****************************************************
384* GEOS 362* GEOS
385******************************************************/ 363******************************************************/
386int iwl_init_geos(struct iwl_priv *priv); 364int iwl_init_geos(struct iwl_priv *priv);
@@ -389,8 +367,6 @@ void iwl_free_geos(struct iwl_priv *priv);
389extern void iwl_send_bt_config(struct iwl_priv *priv); 367extern void iwl_send_bt_config(struct iwl_priv *priv);
390extern int iwl_send_statistics_request(struct iwl_priv *priv, 368extern int iwl_send_statistics_request(struct iwl_priv *priv,
391 u8 flags, bool clear); 369 u8 flags, bool clear);
392void iwl_apm_stop(struct iwl_priv *priv);
393int iwl_apm_init(struct iwl_priv *priv);
394 370
395int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx); 371int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx);
396 372
@@ -408,7 +384,4 @@ static inline bool iwl_advanced_bt_coexist(struct iwl_priv *priv)
408 384
409extern bool bt_siso_mode; 385extern bool bt_siso_mode;
410 386
411
412void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand);
413
414#endif /* __iwl_core_h__ */ 387#endif /* __iwl_core_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index d6dbb0423045..b9f3267e720c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -439,4 +439,22 @@
439 */ 439 */
440#define HBUS_TARG_WRPTR (HBUS_BASE+0x060) 440#define HBUS_TARG_WRPTR (HBUS_BASE+0x060)
441 441
442/**********************************************************
443 * CSR values
444 **********************************************************/
445 /*
446 * host interrupt timeout value
447 * used with setting interrupt coalescing timer
448 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
449 *
450 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
451 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
452 */
453#define IWL_HOST_INT_TIMEOUT_MAX (0xFF)
454#define IWL_HOST_INT_TIMEOUT_DEF (0x40)
455#define IWL_HOST_INT_TIMEOUT_MIN (0x0)
456#define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
457#define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
458#define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
459
442#endif /* !__iwl_csr_h__ */ 460#endif /* !__iwl_csr_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
index e320cc10167e..bf2a678970a9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
@@ -64,6 +64,14 @@
64 goto err; \ 64 goto err; \
65} while (0) 65} while (0)
66 66
67#define DEBUGFS_ADD_U32(name, parent, ptr, mode) do { \
68 struct dentry *__tmp; \
69 __tmp = debugfs_create_u32(#name, mode, \
70 parent, ptr); \
71 if (IS_ERR(__tmp) || !__tmp) \
72 goto err; \
73} while (0)
74
67/* file operation */ 75/* file operation */
68#define DEBUGFS_READ_FUNC(name) \ 76#define DEBUGFS_READ_FUNC(name) \
69static ssize_t iwl_dbgfs_##name##_read(struct file *file, \ 77static ssize_t iwl_dbgfs_##name##_read(struct file *file, \
@@ -804,6 +812,89 @@ DEBUGFS_READ_WRITE_FILE_OPS(disable_ht40);
804DEBUGFS_READ_WRITE_FILE_OPS(sleep_level_override); 812DEBUGFS_READ_WRITE_FILE_OPS(sleep_level_override);
805DEBUGFS_READ_FILE_OPS(current_sleep_command); 813DEBUGFS_READ_FILE_OPS(current_sleep_command);
806 814
815static ssize_t iwl_dbgfs_traffic_log_read(struct file *file,
816 char __user *user_buf,
817 size_t count, loff_t *ppos)
818{
819 struct iwl_priv *priv = file->private_data;
820 int pos = 0, ofs = 0;
821 int cnt = 0, entry;
822
823 char *buf;
824 int bufsz = ((IWL_TRAFFIC_ENTRIES * IWL_TRAFFIC_ENTRY_SIZE * 64) * 2) +
825 (hw_params(priv).max_txq_num * 32 * 8) + 400;
826 const u8 *ptr;
827 ssize_t ret;
828
829 buf = kzalloc(bufsz, GFP_KERNEL);
830 if (!buf) {
831 IWL_ERR(priv, "Can not allocate buffer\n");
832 return -ENOMEM;
833 }
834 if (priv->tx_traffic &&
835 (iwl_get_debug_level(priv->shrd) & IWL_DL_TX)) {
836 ptr = priv->tx_traffic;
837 pos += scnprintf(buf + pos, bufsz - pos,
838 "Tx Traffic idx: %u\n", priv->tx_traffic_idx);
839 for (cnt = 0, ofs = 0; cnt < IWL_TRAFFIC_ENTRIES; cnt++) {
840 for (entry = 0; entry < IWL_TRAFFIC_ENTRY_SIZE / 16;
841 entry++, ofs += 16) {
842 pos += scnprintf(buf + pos, bufsz - pos,
843 "0x%.4x ", ofs);
844 hex_dump_to_buffer(ptr + ofs, 16, 16, 2,
845 buf + pos, bufsz - pos, 0);
846 pos += strlen(buf + pos);
847 if (bufsz - pos > 0)
848 buf[pos++] = '\n';
849 }
850 }
851 }
852
853 if (priv->rx_traffic &&
854 (iwl_get_debug_level(priv->shrd) & IWL_DL_RX)) {
855 ptr = priv->rx_traffic;
856 pos += scnprintf(buf + pos, bufsz - pos,
857 "Rx Traffic idx: %u\n", priv->rx_traffic_idx);
858 for (cnt = 0, ofs = 0; cnt < IWL_TRAFFIC_ENTRIES; cnt++) {
859 for (entry = 0; entry < IWL_TRAFFIC_ENTRY_SIZE / 16;
860 entry++, ofs += 16) {
861 pos += scnprintf(buf + pos, bufsz - pos,
862 "0x%.4x ", ofs);
863 hex_dump_to_buffer(ptr + ofs, 16, 16, 2,
864 buf + pos, bufsz - pos, 0);
865 pos += strlen(buf + pos);
866 if (bufsz - pos > 0)
867 buf[pos++] = '\n';
868 }
869 }
870 }
871
872 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
873 kfree(buf);
874 return ret;
875}
876
877static ssize_t iwl_dbgfs_traffic_log_write(struct file *file,
878 const char __user *user_buf,
879 size_t count, loff_t *ppos)
880{
881 struct iwl_priv *priv = file->private_data;
882 char buf[8];
883 int buf_size;
884 int traffic_log;
885
886 memset(buf, 0, sizeof(buf));
887 buf_size = min(count, sizeof(buf) - 1);
888 if (copy_from_user(buf, user_buf, buf_size))
889 return -EFAULT;
890 if (sscanf(buf, "%d", &traffic_log) != 1)
891 return -EFAULT;
892 if (traffic_log == 0)
893 iwl_reset_traffic_log(priv);
894
895 return count;
896}
897
807static const char *fmt_value = " %-30s %10u\n"; 898static const char *fmt_value = " %-30s %10u\n";
808static const char *fmt_hex = " %-30s 0x%02X\n"; 899static const char *fmt_hex = " %-30s 0x%02X\n";
809static const char *fmt_table = " %-30s %10u %10u %10u %10u\n"; 900static const char *fmt_table = " %-30s %10u %10u %10u %10u\n";
@@ -2146,8 +2237,8 @@ static ssize_t iwl_dbgfs_plcp_delta_write(struct file *file,
2146 2237
2147static ssize_t iwl_dbgfs_force_reset_read(struct file *file, 2238static ssize_t iwl_dbgfs_force_reset_read(struct file *file,
2148 char __user *user_buf, 2239 char __user *user_buf,
2149 size_t count, loff_t *ppos) { 2240 size_t count, loff_t *ppos)
2150 2241{
2151 struct iwl_priv *priv = file->private_data; 2242 struct iwl_priv *priv = file->private_data;
2152 int i, pos = 0; 2243 int i, pos = 0;
2153 char buf[300]; 2244 char buf[300];
@@ -2226,8 +2317,8 @@ static ssize_t iwl_dbgfs_txfifo_flush_write(struct file *file,
2226 2317
2227static ssize_t iwl_dbgfs_wd_timeout_write(struct file *file, 2318static ssize_t iwl_dbgfs_wd_timeout_write(struct file *file,
2228 const char __user *user_buf, 2319 const char __user *user_buf,
2229 size_t count, loff_t *ppos) { 2320 size_t count, loff_t *ppos)
2230 2321{
2231 struct iwl_priv *priv = file->private_data; 2322 struct iwl_priv *priv = file->private_data;
2232 char buf[8]; 2323 char buf[8];
2233 int buf_size; 2324 int buf_size;
@@ -2340,6 +2431,7 @@ static ssize_t iwl_dbgfs_protection_mode_write(struct file *file,
2340 2431
2341DEBUGFS_READ_FILE_OPS(rx_statistics); 2432DEBUGFS_READ_FILE_OPS(rx_statistics);
2342DEBUGFS_READ_FILE_OPS(tx_statistics); 2433DEBUGFS_READ_FILE_OPS(tx_statistics);
2434DEBUGFS_READ_WRITE_FILE_OPS(traffic_log);
2343DEBUGFS_READ_FILE_OPS(ucode_rx_stats); 2435DEBUGFS_READ_FILE_OPS(ucode_rx_stats);
2344DEBUGFS_READ_FILE_OPS(ucode_tx_stats); 2436DEBUGFS_READ_FILE_OPS(ucode_tx_stats);
2345DEBUGFS_READ_FILE_OPS(ucode_general_stats); 2437DEBUGFS_READ_FILE_OPS(ucode_general_stats);
@@ -2361,6 +2453,52 @@ DEBUGFS_READ_FILE_OPS(bt_traffic);
2361DEBUGFS_READ_WRITE_FILE_OPS(protection_mode); 2453DEBUGFS_READ_WRITE_FILE_OPS(protection_mode);
2362DEBUGFS_READ_FILE_OPS(reply_tx_error); 2454DEBUGFS_READ_FILE_OPS(reply_tx_error);
2363 2455
2456#ifdef CONFIG_IWLWIFI_DEBUG
2457static ssize_t iwl_dbgfs_debug_level_read(struct file *file,
2458 char __user *user_buf,
2459 size_t count, loff_t *ppos)
2460{
2461 struct iwl_priv *priv = file->private_data;
2462 struct iwl_shared *shrd = priv->shrd;
2463 char buf[11];
2464 int len;
2465
2466 len = scnprintf(buf, sizeof(buf), "0x%.8x",
2467 iwl_get_debug_level(shrd));
2468
2469 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
2470}
2471
2472static ssize_t iwl_dbgfs_debug_level_write(struct file *file,
2473 const char __user *user_buf,
2474 size_t count, loff_t *ppos)
2475{
2476 struct iwl_priv *priv = file->private_data;
2477 struct iwl_shared *shrd = priv->shrd;
2478 char buf[11];
2479 unsigned long val;
2480 int ret;
2481
2482 if (count > sizeof(buf))
2483 return -EINVAL;
2484
2485 memset(buf, 0, sizeof(buf));
2486 if (copy_from_user(buf, user_buf, count))
2487 return -EFAULT;
2488
2489 ret = strict_strtoul(buf, 0, &val);
2490 if (ret)
2491 return ret;
2492
2493 shrd->dbg_level_dev = val;
2494 if (iwl_alloc_traffic_mem(priv))
2495 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
2496
2497 return count;
2498}
2499DEBUGFS_READ_WRITE_FILE_OPS(debug_level);
2500#endif /* CONFIG_IWLWIFI_DEBUG */
2501
2364/* 2502/*
2365 * Create the debugfs files and directories 2503 * Create the debugfs files and directories
2366 * 2504 *
@@ -2398,8 +2536,11 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
2398 DEBUGFS_ADD_FILE(current_sleep_command, dir_data, S_IRUSR); 2536 DEBUGFS_ADD_FILE(current_sleep_command, dir_data, S_IRUSR);
2399 DEBUGFS_ADD_FILE(thermal_throttling, dir_data, S_IRUSR); 2537 DEBUGFS_ADD_FILE(thermal_throttling, dir_data, S_IRUSR);
2400 DEBUGFS_ADD_FILE(disable_ht40, dir_data, S_IWUSR | S_IRUSR); 2538 DEBUGFS_ADD_FILE(disable_ht40, dir_data, S_IWUSR | S_IRUSR);
2539 DEBUGFS_ADD_U32(temperature, dir_data, &priv->temperature, S_IRUSR);
2540
2401 DEBUGFS_ADD_FILE(rx_statistics, dir_debug, S_IRUSR); 2541 DEBUGFS_ADD_FILE(rx_statistics, dir_debug, S_IRUSR);
2402 DEBUGFS_ADD_FILE(tx_statistics, dir_debug, S_IRUSR); 2542 DEBUGFS_ADD_FILE(tx_statistics, dir_debug, S_IRUSR);
2543 DEBUGFS_ADD_FILE(traffic_log, dir_debug, S_IWUSR | S_IRUSR);
2403 DEBUGFS_ADD_FILE(power_save_status, dir_debug, S_IRUSR); 2544 DEBUGFS_ADD_FILE(power_save_status, dir_debug, S_IRUSR);
2404 DEBUGFS_ADD_FILE(clear_ucode_statistics, dir_debug, S_IWUSR); 2545 DEBUGFS_ADD_FILE(clear_ucode_statistics, dir_debug, S_IWUSR);
2405 DEBUGFS_ADD_FILE(clear_traffic_statistics, dir_debug, S_IWUSR); 2546 DEBUGFS_ADD_FILE(clear_traffic_statistics, dir_debug, S_IWUSR);
@@ -2411,7 +2552,6 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
2411 DEBUGFS_ADD_FILE(ucode_general_stats, dir_debug, S_IRUSR); 2552 DEBUGFS_ADD_FILE(ucode_general_stats, dir_debug, S_IRUSR);
2412 DEBUGFS_ADD_FILE(txfifo_flush, dir_debug, S_IWUSR); 2553 DEBUGFS_ADD_FILE(txfifo_flush, dir_debug, S_IWUSR);
2413 DEBUGFS_ADD_FILE(protection_mode, dir_debug, S_IWUSR | S_IRUSR); 2554 DEBUGFS_ADD_FILE(protection_mode, dir_debug, S_IWUSR | S_IRUSR);
2414
2415 DEBUGFS_ADD_FILE(sensitivity, dir_debug, S_IRUSR); 2555 DEBUGFS_ADD_FILE(sensitivity, dir_debug, S_IRUSR);
2416 DEBUGFS_ADD_FILE(chain_noise, dir_debug, S_IRUSR); 2556 DEBUGFS_ADD_FILE(chain_noise, dir_debug, S_IRUSR);
2417 DEBUGFS_ADD_FILE(ucode_tracing, dir_debug, S_IWUSR | S_IRUSR); 2557 DEBUGFS_ADD_FILE(ucode_tracing, dir_debug, S_IWUSR | S_IRUSR);
@@ -2422,6 +2562,10 @@ int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
2422 DEBUGFS_ADD_FILE(wd_timeout, dir_debug, S_IWUSR); 2562 DEBUGFS_ADD_FILE(wd_timeout, dir_debug, S_IWUSR);
2423 if (iwl_advanced_bt_coexist(priv)) 2563 if (iwl_advanced_bt_coexist(priv))
2424 DEBUGFS_ADD_FILE(bt_traffic, dir_debug, S_IRUSR); 2564 DEBUGFS_ADD_FILE(bt_traffic, dir_debug, S_IRUSR);
2565#ifdef CONFIG_IWLWIFI_DEBUG
2566 DEBUGFS_ADD_FILE(debug_level, dir_debug, S_IRUSR | S_IWUSR);
2567#endif
2568
2425 DEBUGFS_ADD_BOOL(disable_sensitivity, dir_rf, 2569 DEBUGFS_ADD_BOOL(disable_sensitivity, dir_rf,
2426 &priv->disable_sens_cal); 2570 &priv->disable_sens_cal);
2427 DEBUGFS_ADD_BOOL(disable_chain_noise, dir_rf, 2571 DEBUGFS_ADD_BOOL(disable_chain_noise, dir_rf,
@@ -2449,6 +2593,3 @@ void iwl_dbgfs_unregister(struct iwl_priv *priv)
2449 debugfs_remove_recursive(priv->debugfs_dir); 2593 debugfs_remove_recursive(priv->debugfs_dir);
2450 priv->debugfs_dir = NULL; 2594 priv->debugfs_dir = NULL;
2451} 2595}
2452
2453
2454
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index 1e54293532b0..4ddaf2c63f50 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -32,7 +32,6 @@
32#define __iwl_dev_h__ 32#define __iwl_dev_h__
33 33
34#include <linux/interrupt.h> 34#include <linux/interrupt.h>
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h> 35#include <linux/kernel.h>
37#include <linux/wait.h> 36#include <linux/wait.h>
38#include <linux/leds.h> 37#include <linux/leds.h>
@@ -89,100 +88,6 @@ struct iwl_tx_queue;
89#define DEFAULT_SHORT_RETRY_LIMIT 7U 88#define DEFAULT_SHORT_RETRY_LIMIT 7U
90#define DEFAULT_LONG_RETRY_LIMIT 4U 89#define DEFAULT_LONG_RETRY_LIMIT 4U
91 90
92/* defined below */
93struct iwl_device_cmd;
94
95struct iwl_cmd_meta {
96 /* only for SYNC commands, iff the reply skb is wanted */
97 struct iwl_host_cmd *source;
98 /*
99 * only for ASYNC commands
100 * (which is somewhat stupid -- look at iwl-sta.c for instance
101 * which duplicates a bunch of code because the callback isn't
102 * invoked for SYNC commands, if it were and its result passed
103 * through it would be simpler...)
104 */
105 void (*callback)(struct iwl_priv *priv,
106 struct iwl_device_cmd *cmd,
107 struct iwl_rx_packet *pkt);
108
109 u32 flags;
110
111 DEFINE_DMA_UNMAP_ADDR(mapping);
112 DEFINE_DMA_UNMAP_LEN(len);
113};
114
115/*
116 * Generic queue structure
117 *
118 * Contains common data for Rx and Tx queues.
119 *
120 * Note the difference between n_bd and n_window: the hardware
121 * always assumes 256 descriptors, so n_bd is always 256 (unless
122 * there might be HW changes in the future). For the normal TX
123 * queues, n_window, which is the size of the software queue data
124 * is also 256; however, for the command queue, n_window is only
125 * 32 since we don't need so many commands pending. Since the HW
126 * still uses 256 BDs for DMA though, n_bd stays 256. As a result,
127 * the software buffers (in the variables @meta, @txb in struct
128 * iwl_tx_queue) only have 32 entries, while the HW buffers (@tfds
129 * in the same struct) have 256.
130 * This means that we end up with the following:
131 * HW entries: | 0 | ... | N * 32 | ... | N * 32 + 31 | ... | 255 |
132 * SW entries: | 0 | ... | 31 |
133 * where N is a number between 0 and 7. This means that the SW
134 * data is a window overlayed over the HW queue.
135 */
136struct iwl_queue {
137 int n_bd; /* number of BDs in this queue */
138 int write_ptr; /* 1-st empty entry (index) host_w*/
139 int read_ptr; /* last used entry (index) host_r*/
140 /* use for monitoring and recovering the stuck queue */
141 dma_addr_t dma_addr; /* physical addr for BD's */
142 int n_window; /* safe queue window */
143 u32 id;
144 int low_mark; /* low watermark, resume queue if free
145 * space more than this */
146 int high_mark; /* high watermark, stop queue if free
147 * space less than this */
148};
149
150/**
151 * struct iwl_tx_queue - Tx Queue for DMA
152 * @q: generic Rx/Tx queue descriptor
153 * @bd: base of circular buffer of TFDs
154 * @cmd: array of command/TX buffer pointers
155 * @meta: array of meta data for each command/tx buffer
156 * @dma_addr_cmd: physical address of cmd/tx buffer array
157 * @txb: array of per-TFD driver data
158 * @time_stamp: time (in jiffies) of last read_ptr change
159 * @need_update: indicates need to update read/write index
160 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
161 * @sta_id: valid if sched_retry is set
162 * @tid: valid if sched_retry is set
163 *
164 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
165 * descriptors) and required locking structures.
166 */
167#define TFD_TX_CMD_SLOTS 256
168#define TFD_CMD_SLOTS 32
169
170struct iwl_tx_queue {
171 struct iwl_queue q;
172 struct iwl_tfd *tfds;
173 struct iwl_device_cmd **cmd;
174 struct iwl_cmd_meta *meta;
175 struct sk_buff **skbs;
176 unsigned long time_stamp;
177 u8 need_update;
178 u8 sched_retry;
179 u8 active;
180 u8 swq_id;
181
182 u16 sta_id;
183 u16 tid;
184};
185
186#define IWL_NUM_SCAN_RATES (2) 91#define IWL_NUM_SCAN_RATES (2)
187 92
188/* 93/*
@@ -212,21 +117,6 @@ struct iwl_channel_info {
212 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ 117 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
213}; 118};
214 119
215#define IWL_TX_FIFO_BK 0 /* shared */
216#define IWL_TX_FIFO_BE 1
217#define IWL_TX_FIFO_VI 2 /* shared */
218#define IWL_TX_FIFO_VO 3
219#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK
220#define IWL_TX_FIFO_BE_IPAN 4
221#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI
222#define IWL_TX_FIFO_VO_IPAN 5
223/* re-uses the VO FIFO, uCode will properly flush/schedule */
224#define IWL_TX_FIFO_AUX 5
225#define IWL_TX_FIFO_UNUSED -1
226
227/* AUX (TX during scan dwell) queue */
228#define IWL_AUX_QUEUE 10
229
230/* 120/*
231 * Minimum number of queues. MAX_NUM is defined in hw specific files. 121 * Minimum number of queues. MAX_NUM is defined in hw specific files.
232 * Set the minimum to accommodate 122 * Set the minimum to accommodate
@@ -249,70 +139,6 @@ struct iwl_channel_info {
249#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN) 139#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
250#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) 140#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
251 141
252
253#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
254#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
255#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
256
257enum {
258 CMD_SYNC = 0,
259 CMD_ASYNC = BIT(0),
260 CMD_WANT_SKB = BIT(1),
261 CMD_ON_DEMAND = BIT(2),
262};
263
264#define DEF_CMD_PAYLOAD_SIZE 320
265
266/**
267 * struct iwl_device_cmd
268 *
269 * For allocation of the command and tx queues, this establishes the overall
270 * size of the largest command we send to uCode, except for commands that
271 * aren't fully copied and use other TFD space.
272 */
273struct iwl_device_cmd {
274 struct iwl_cmd_header hdr; /* uCode API */
275 union {
276 u32 flags;
277 u8 val8;
278 u16 val16;
279 u32 val32;
280 struct iwl_tx_cmd tx;
281 struct iwl6000_channel_switch_cmd chswitch;
282 u8 payload[DEF_CMD_PAYLOAD_SIZE];
283 } __packed cmd;
284} __packed;
285
286#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
287
288#define IWL_MAX_CMD_TFDS 2
289
290enum iwl_hcmd_dataflag {
291 IWL_HCMD_DFL_NOCOPY = BIT(0),
292};
293
294/**
295 * struct iwl_host_cmd - Host command to the uCode
296 * @data: array of chunks that composes the data of the host command
297 * @reply_page: pointer to the page that holds the response to the host command
298 * @callback:
299 * @flags: can be CMD_* note CMD_WANT_SKB is incompatible withe CMD_ASYNC
300 * @len: array of the lenths of the chunks in data
301 * @dataflags:
302 * @id: id of the host command
303 */
304struct iwl_host_cmd {
305 const void *data[IWL_MAX_CMD_TFDS];
306 unsigned long reply_page;
307 void (*callback)(struct iwl_priv *priv,
308 struct iwl_device_cmd *cmd,
309 struct iwl_rx_packet *pkt);
310 u32 flags;
311 u16 len[IWL_MAX_CMD_TFDS];
312 u8 dataflags[IWL_MAX_CMD_TFDS];
313 u8 id;
314};
315
316#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 142#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
317#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 143#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
318#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 144#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
@@ -376,11 +202,6 @@ struct iwl_station_entry {
376 struct iwl_link_quality_cmd *lq; 202 struct iwl_link_quality_cmd *lq;
377}; 203};
378 204
379struct iwl_station_priv_common {
380 struct iwl_rxon_context *ctx;
381 u8 sta_id;
382};
383
384/* 205/*
385 * iwl_station_priv: Driver's private station information 206 * iwl_station_priv: Driver's private station information
386 * 207 *
@@ -389,12 +210,13 @@ struct iwl_station_priv_common {
389 * space. 210 * space.
390 */ 211 */
391struct iwl_station_priv { 212struct iwl_station_priv {
392 struct iwl_station_priv_common common; 213 struct iwl_rxon_context *ctx;
393 struct iwl_lq_sta lq_sta; 214 struct iwl_lq_sta lq_sta;
394 atomic_t pending_frames; 215 atomic_t pending_frames;
395 bool client; 216 bool client;
396 bool asleep; 217 bool asleep;
397 u8 max_agg_bufsize; 218 u8 max_agg_bufsize;
219 u8 sta_id;
398}; 220};
399 221
400/** 222/**
@@ -580,9 +402,6 @@ extern const u8 iwl_bcast_addr[ETH_ALEN];
580#define IWL_OPERATION_MODE_MIXED 2 402#define IWL_OPERATION_MODE_MIXED 2
581#define IWL_OPERATION_MODE_20MHZ 3 403#define IWL_OPERATION_MODE_20MHZ 3
582 404
583#define IWL_TX_CRC_SIZE 4
584#define IWL_TX_DELIMITER_SIZE 4
585
586#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000 405#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
587 406
588/* Sensitivity and chain noise calibration */ 407/* Sensitivity and chain noise calibration */
@@ -706,9 +525,6 @@ struct iwl_chain_noise_data {
706#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ 525#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
707#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ 526#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
708 527
709#define IWL_TRAFFIC_ENTRIES (256)
710#define IWL_TRAFFIC_ENTRY_SIZE (64)
711
712enum { 528enum {
713 MEASUREMENT_READY = (1 << 0), 529 MEASUREMENT_READY = (1 << 0),
714 MEASUREMENT_ACTIVE = (1 << 1), 530 MEASUREMENT_ACTIVE = (1 << 1),
@@ -850,21 +666,6 @@ struct iwl_event_log {
850}; 666};
851 667
852/* 668/*
853 * host interrupt timeout value
854 * used with setting interrupt coalescing timer
855 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
856 *
857 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
858 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
859 */
860#define IWL_HOST_INT_TIMEOUT_MAX (0xFF)
861#define IWL_HOST_INT_TIMEOUT_DEF (0x40)
862#define IWL_HOST_INT_TIMEOUT_MIN (0x0)
863#define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
864#define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
865#define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
866
867/*
868 * This is the threshold value of plcp error rate per 100mSecs. It is 669 * This is the threshold value of plcp error rate per 100mSecs. It is
869 * used to set and check for the validity of plcp_delta. 670 * used to set and check for the validity of plcp_delta.
870 */ 671 */
@@ -1040,8 +841,9 @@ struct iwl_priv {
1040 841
1041 void (*pre_rx_handler)(struct iwl_priv *priv, 842 void (*pre_rx_handler)(struct iwl_priv *priv,
1042 struct iwl_rx_mem_buffer *rxb); 843 struct iwl_rx_mem_buffer *rxb);
1043 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, 844 int (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
1044 struct iwl_rx_mem_buffer *rxb); 845 struct iwl_rx_mem_buffer *rxb,
846 struct iwl_device_cmd *cmd);
1045 847
1046 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; 848 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
1047 849
@@ -1095,9 +897,6 @@ struct iwl_priv {
1095 /*TODO: remove these pointers - use bus(priv) instead */ 897 /*TODO: remove these pointers - use bus(priv) instead */
1096 struct iwl_bus *bus; /* bus specific data */ 898 struct iwl_bus *bus; /* bus specific data */
1097 899
1098 /* microcode/device supports multiple contexts */
1099 u8 valid_contexts;
1100
1101 /* max number of station keys */ 900 /* max number of station keys */
1102 u8 sta_key_max_num; 901 u8 sta_key_max_num;
1103 902
@@ -1142,8 +941,6 @@ struct iwl_priv {
1142 /* Rate scaling data */ 941 /* Rate scaling data */
1143 u8 retry_rate; 942 u8 retry_rate;
1144 943
1145 wait_queue_head_t wait_command_queue;
1146
1147 int activity_timer_active; 944 int activity_timer_active;
1148 945
1149 /* counts mgmt, ctl, and data packets */ 946 /* counts mgmt, ctl, and data packets */
@@ -1158,6 +955,8 @@ struct iwl_priv {
1158 struct iwl_station_entry stations[IWLAGN_STATION_COUNT]; 955 struct iwl_station_entry stations[IWLAGN_STATION_COUNT];
1159 unsigned long ucode_key_table; 956 unsigned long ucode_key_table;
1160 957
958 u8 mac80211_registered;
959
1161 /* Indication if ieee80211_ops->open has been called */ 960 /* Indication if ieee80211_ops->open has been called */
1162 u8 is_open; 961 u8 is_open;
1163 962
@@ -1231,7 +1030,7 @@ struct iwl_priv {
1231 struct delayed_work hw_roc_disable_work; 1030 struct delayed_work hw_roc_disable_work;
1232 enum nl80211_channel_type hw_roc_chantype; 1031 enum nl80211_channel_type hw_roc_chantype;
1233 int hw_roc_duration; 1032 int hw_roc_duration;
1234 bool hw_roc_setup; 1033 bool hw_roc_setup, hw_roc_start_notified;
1235 1034
1236 /* bt coex */ 1035 /* bt coex */
1237 u8 bt_enable_flag; 1036 u8 bt_enable_flag;
@@ -1327,7 +1126,7 @@ iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif)
1327#define for_each_context(priv, ctx) \ 1126#define for_each_context(priv, ctx) \
1328 for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \ 1127 for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \
1329 ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \ 1128 ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \
1330 if (priv->valid_contexts & BIT(ctx->ctxid)) 1129 if (priv->shrd->valid_contexts & BIT(ctx->ctxid))
1331 1130
1332static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx) 1131static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx)
1333{ 1132{
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 80ee65be9cd1..0b669417b0a6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -72,6 +72,7 @@
72#include "iwl-dev.h" 72#include "iwl-dev.h"
73#include "iwl-core.h" 73#include "iwl-core.h"
74#include "iwl-debug.h" 74#include "iwl-debug.h"
75#include "iwl-agn.h"
75#include "iwl-eeprom.h" 76#include "iwl-eeprom.h"
76#include "iwl-io.h" 77#include "iwl-io.h"
77 78
@@ -138,7 +139,7 @@ static const u8 iwl_eeprom_band_7[] = { /* 5.2 ht40 channel */
138 139
139/****************************************************************************** 140/******************************************************************************
140 * 141 *
141 * EEPROM related functions 142 * generic NVM functions
142 * 143 *
143******************************************************************************/ 144******************************************************************************/
144 145
@@ -214,6 +215,93 @@ static int iwl_eeprom_verify_signature(struct iwl_priv *priv)
214 return ret; 215 return ret;
215} 216}
216 217
218u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
219{
220 if (!priv->eeprom)
221 return 0;
222 return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
223}
224
225int iwl_eeprom_check_version(struct iwl_priv *priv)
226{
227 u16 eeprom_ver;
228 u16 calib_ver;
229
230 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
231 calib_ver = iwlagn_eeprom_calib_version(priv);
232
233 if (eeprom_ver < priv->cfg->eeprom_ver ||
234 calib_ver < priv->cfg->eeprom_calib_ver)
235 goto err;
236
237 IWL_INFO(priv, "device EEPROM VER=0x%x, CALIB=0x%x\n",
238 eeprom_ver, calib_ver);
239
240 return 0;
241err:
242 IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x "
243 "CALIB=0x%x < 0x%x\n",
244 eeprom_ver, priv->cfg->eeprom_ver,
245 calib_ver, priv->cfg->eeprom_calib_ver);
246 return -EINVAL;
247
248}
249
250int iwl_eeprom_check_sku(struct iwl_priv *priv)
251{
252 u16 radio_cfg;
253
254 if (!priv->cfg->sku) {
255 /* not using sku overwrite */
256 priv->cfg->sku = iwl_eeprom_query16(priv, EEPROM_SKU_CAP);
257 if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE &&
258 !priv->cfg->ht_params) {
259 IWL_ERR(priv, "Invalid 11n configuration\n");
260 return -EINVAL;
261 }
262 }
263 if (!priv->cfg->sku) {
264 IWL_ERR(priv, "Invalid device sku\n");
265 return -EINVAL;
266 }
267
268 IWL_INFO(priv, "Device SKU: 0X%x\n", priv->cfg->sku);
269
270 if (!priv->cfg->valid_tx_ant && !priv->cfg->valid_rx_ant) {
271 /* not using .cfg overwrite */
272 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
273 priv->cfg->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
274 priv->cfg->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
275 if (!priv->cfg->valid_tx_ant || !priv->cfg->valid_rx_ant) {
276 IWL_ERR(priv, "Invalid chain (0X%x, 0X%x)\n",
277 priv->cfg->valid_tx_ant,
278 priv->cfg->valid_rx_ant);
279 return -EINVAL;
280 }
281 IWL_INFO(priv, "Valid Tx ant: 0X%x, Valid Rx ant: 0X%x\n",
282 priv->cfg->valid_tx_ant, priv->cfg->valid_rx_ant);
283 }
284 /*
285 * for some special cases,
286 * EEPROM did not reflect the correct antenna setting
287 * so overwrite the valid tx/rx antenna from .cfg
288 */
289 return 0;
290}
291
292void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
293{
294 const u8 *addr = iwl_eeprom_query_addr(priv,
295 EEPROM_MAC_ADDRESS);
296 memcpy(mac, addr, ETH_ALEN);
297}
298
299/******************************************************************************
300 *
301 * OTP related functions
302 *
303******************************************************************************/
304
217static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode) 305static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
218{ 306{
219 iwl_read32(bus(priv), CSR_OTP_GP_REG); 307 iwl_read32(bus(priv), CSR_OTP_GP_REG);
@@ -407,11 +495,152 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
407 return -EINVAL; 495 return -EINVAL;
408} 496}
409 497
410u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset) 498/******************************************************************************
499 *
500 * Tx Power related functions
501 *
502******************************************************************************/
503/**
504 * iwl_get_max_txpower_avg - get the highest tx power from all chains.
505 * find the highest tx power from all chains for the channel
506 */
507static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
508 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
509 int element, s8 *max_txpower_in_half_dbm)
411{ 510{
412 if (!priv->eeprom) 511 s8 max_txpower_avg = 0; /* (dBm) */
413 return 0; 512
414 return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8); 513 /* Take the highest tx power from any valid chains */
514 if ((priv->cfg->valid_tx_ant & ANT_A) &&
515 (enhanced_txpower[element].chain_a_max > max_txpower_avg))
516 max_txpower_avg = enhanced_txpower[element].chain_a_max;
517 if ((priv->cfg->valid_tx_ant & ANT_B) &&
518 (enhanced_txpower[element].chain_b_max > max_txpower_avg))
519 max_txpower_avg = enhanced_txpower[element].chain_b_max;
520 if ((priv->cfg->valid_tx_ant & ANT_C) &&
521 (enhanced_txpower[element].chain_c_max > max_txpower_avg))
522 max_txpower_avg = enhanced_txpower[element].chain_c_max;
523 if (((priv->cfg->valid_tx_ant == ANT_AB) |
524 (priv->cfg->valid_tx_ant == ANT_BC) |
525 (priv->cfg->valid_tx_ant == ANT_AC)) &&
526 (enhanced_txpower[element].mimo2_max > max_txpower_avg))
527 max_txpower_avg = enhanced_txpower[element].mimo2_max;
528 if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
529 (enhanced_txpower[element].mimo3_max > max_txpower_avg))
530 max_txpower_avg = enhanced_txpower[element].mimo3_max;
531
532 /*
533 * max. tx power in EEPROM is in 1/2 dBm format
534 * convert from 1/2 dBm to dBm (round-up convert)
535 * but we also do not want to loss 1/2 dBm resolution which
536 * will impact performance
537 */
538 *max_txpower_in_half_dbm = max_txpower_avg;
539 return (max_txpower_avg & 0x01) + (max_txpower_avg >> 1);
540}
541
542static void
543iwl_eeprom_enh_txp_read_element(struct iwl_priv *priv,
544 struct iwl_eeprom_enhanced_txpwr *txp,
545 s8 max_txpower_avg)
546{
547 int ch_idx;
548 bool is_ht40 = txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ;
549 enum ieee80211_band band;
550
551 band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ?
552 IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
553
554 for (ch_idx = 0; ch_idx < priv->channel_count; ch_idx++) {
555 struct iwl_channel_info *ch_info = &priv->channel_info[ch_idx];
556
557 /* update matching channel or from common data only */
558 if (txp->channel != 0 && ch_info->channel != txp->channel)
559 continue;
560
561 /* update matching band only */
562 if (band != ch_info->band)
563 continue;
564
565 if (ch_info->max_power_avg < max_txpower_avg && !is_ht40) {
566 ch_info->max_power_avg = max_txpower_avg;
567 ch_info->curr_txpow = max_txpower_avg;
568 ch_info->scan_power = max_txpower_avg;
569 }
570
571 if (is_ht40 && ch_info->ht40_max_power_avg < max_txpower_avg)
572 ch_info->ht40_max_power_avg = max_txpower_avg;
573 }
574}
575
576#define EEPROM_TXP_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT)
577#define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
578#define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
579
580#define TXP_CHECK_AND_PRINT(x) ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) \
581 ? # x " " : "")
582
583void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
584{
585 struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
586 int idx, entries;
587 __le16 *txp_len;
588 s8 max_txp_avg, max_txp_avg_halfdbm;
589
590 BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
591
592 /* the length is in 16-bit words, but we want entries */
593 txp_len = (__le16 *) iwl_eeprom_query_addr(priv, EEPROM_TXP_SZ_OFFS);
594 entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
595
596 txp_array = (void *) iwl_eeprom_query_addr(priv, EEPROM_TXP_OFFS);
597
598 for (idx = 0; idx < entries; idx++) {
599 txp = &txp_array[idx];
600 /* skip invalid entries */
601 if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
602 continue;
603
604 IWL_DEBUG_EEPROM(priv, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
605 (txp->channel && (txp->flags &
606 IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
607 "Common " : (txp->channel) ?
608 "Channel" : "Common",
609 (txp->channel),
610 TXP_CHECK_AND_PRINT(VALID),
611 TXP_CHECK_AND_PRINT(BAND_52G),
612 TXP_CHECK_AND_PRINT(OFDM),
613 TXP_CHECK_AND_PRINT(40MHZ),
614 TXP_CHECK_AND_PRINT(HT_AP),
615 TXP_CHECK_AND_PRINT(RES1),
616 TXP_CHECK_AND_PRINT(RES2),
617 TXP_CHECK_AND_PRINT(COMMON_TYPE),
618 txp->flags);
619 IWL_DEBUG_EEPROM(priv, "\t\t chain_A: 0x%02x "
620 "chain_B: 0X%02x chain_C: 0X%02x\n",
621 txp->chain_a_max, txp->chain_b_max,
622 txp->chain_c_max);
623 IWL_DEBUG_EEPROM(priv, "\t\t MIMO2: 0x%02x "
624 "MIMO3: 0x%02x High 20_on_40: 0x%02x "
625 "Low 20_on_40: 0x%02x\n",
626 txp->mimo2_max, txp->mimo3_max,
627 ((txp->delta_20_in_40 & 0xf0) >> 4),
628 (txp->delta_20_in_40 & 0x0f));
629
630 max_txp_avg = iwl_get_max_txpower_avg(priv, txp_array, idx,
631 &max_txp_avg_halfdbm);
632
633 /*
634 * Update the user limit values values to the highest
635 * power supported by any channel
636 */
637 if (max_txp_avg > priv->tx_power_user_lmt)
638 priv->tx_power_user_lmt = max_txp_avg;
639 if (max_txp_avg_halfdbm > priv->tx_power_lmt_in_half_dbm)
640 priv->tx_power_lmt_in_half_dbm = max_txp_avg_halfdbm;
641
642 iwl_eeprom_enh_txp_read_element(priv, txp, max_txp_avg);
643 }
415} 644}
416 645
417/** 646/**
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
index e2b5e0ea5d9c..c94747e7299e 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
@@ -163,11 +163,19 @@ struct iwl_eeprom_enhanced_txpwr {
163} __packed; 163} __packed;
164 164
165/* calibration */ 165/* calibration */
166struct iwl_eeprom_calib_hdr {
167 u8 version;
168 u8 pa_type;
169 __le16 voltage;
170} __packed;
171
166#define EEPROM_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION) 172#define EEPROM_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
167#define EEPROM_XTAL ((2*0x128) | EEPROM_CALIB_ALL) 173#define EEPROM_XTAL ((2*0x128) | EEPROM_CALIB_ALL)
168 174
169/* temperature */ 175/* temperature */
170#define EEPROM_TEMPERATURE ((2*0x12A) | EEPROM_CALIB_ALL) 176#define EEPROM_KELVIN_TEMPERATURE ((2*0x12A) | EEPROM_CALIB_ALL)
177#define EEPROM_RAW_TEMPERATURE ((2*0x12B) | EEPROM_CALIB_ALL)
178
171 179
172/* agn links */ 180/* agn links */
173#define EEPROM_LINK_HOST (2*0x64) 181#define EEPROM_LINK_HOST (2*0x64)
diff --git a/drivers/net/wireless/iwlwifi/iwl-helpers.h b/drivers/net/wireless/iwlwifi/iwl-helpers.h
index d3feac9e45b4..968fc66e3506 100644
--- a/drivers/net/wireless/iwlwifi/iwl-helpers.h
+++ b/drivers/net/wireless/iwlwifi/iwl-helpers.h
@@ -35,35 +35,12 @@
35 35
36#include "iwl-io.h" 36#include "iwl-io.h"
37 37
38#define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
39
40
41static inline struct ieee80211_conf *ieee80211_get_hw_conf( 38static inline struct ieee80211_conf *ieee80211_get_hw_conf(
42 struct ieee80211_hw *hw) 39 struct ieee80211_hw *hw)
43{ 40{
44 return &hw->conf; 41 return &hw->conf;
45} 42}
46 43
47/**
48 * iwl_queue_inc_wrap - increment queue index, wrap back to beginning
49 * @index -- current index
50 * @n_bd -- total number of entries in queue (must be power of 2)
51 */
52static inline int iwl_queue_inc_wrap(int index, int n_bd)
53{
54 return ++index & (n_bd - 1);
55}
56
57/**
58 * iwl_queue_dec_wrap - decrement queue index, wrap back to end
59 * @index -- current index
60 * @n_bd -- total number of entries in queue (must be power of 2)
61 */
62static inline int iwl_queue_dec_wrap(int index, int n_bd)
63{
64 return --index & (n_bd - 1);
65}
66
67static inline void iwl_enable_rfkill_int(struct iwl_priv *priv) 44static inline void iwl_enable_rfkill_int(struct iwl_priv *priv)
68{ 45{
69 IWL_DEBUG_ISR(priv, "Enabling rfkill interrupt\n"); 46 IWL_DEBUG_ISR(priv, "Enabling rfkill interrupt\n");
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c
index 7dffed186f0a..f149165e8010 100644
--- a/drivers/net/wireless/iwlwifi/iwl-led.c
+++ b/drivers/net/wireless/iwlwifi/iwl-led.c
@@ -104,7 +104,6 @@ static int iwl_send_led_cmd(struct iwl_priv *priv, struct iwl_led_cmd *led_cmd)
104 .len = { sizeof(struct iwl_led_cmd), }, 104 .len = { sizeof(struct iwl_led_cmd), },
105 .data = { led_cmd, }, 105 .data = { led_cmd, },
106 .flags = CMD_ASYNC, 106 .flags = CMD_ASYNC,
107 .callback = NULL,
108 }; 107 };
109 u32 reg; 108 u32 reg;
110 109
diff --git a/drivers/net/wireless/iwlwifi/iwl-pci.c b/drivers/net/wireless/iwlwifi/iwl-pci.c
index e41f53e5c307..1d7bb7423f94 100644
--- a/drivers/net/wireless/iwlwifi/iwl-pci.c
+++ b/drivers/net/wireless/iwlwifi/iwl-pci.c
@@ -68,7 +68,7 @@
68#include "iwl-shared.h" 68#include "iwl-shared.h"
69#include "iwl-trans.h" 69#include "iwl-trans.h"
70#include "iwl-csr.h" 70#include "iwl-csr.h"
71#include "iwl-pci.h" 71#include "iwl-cfg.h"
72 72
73/* PCI registers */ 73/* PCI registers */
74#define PCI_CFG_RETRY_TIMEOUT 0x041 74#define PCI_CFG_RETRY_TIMEOUT 0x041
@@ -134,12 +134,6 @@ static void iwl_pci_apm_config(struct iwl_bus *bus)
134 } 134 }
135} 135}
136 136
137static void iwl_pci_set_drv_data(struct iwl_bus *bus, struct iwl_shared *shrd)
138{
139 bus->shrd = shrd;
140 pci_set_drvdata(IWL_BUS_GET_PCI_DEV(bus), shrd);
141}
142
143static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[], 137static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[],
144 int buf_len) 138 int buf_len)
145{ 139{
@@ -168,7 +162,6 @@ static u32 iwl_pci_read32(struct iwl_bus *bus, u32 ofs)
168static const struct iwl_bus_ops bus_ops_pci = { 162static const struct iwl_bus_ops bus_ops_pci = {
169 .get_pm_support = iwl_pci_is_pm_supported, 163 .get_pm_support = iwl_pci_is_pm_supported,
170 .apm_config = iwl_pci_apm_config, 164 .apm_config = iwl_pci_apm_config,
171 .set_drv_data = iwl_pci_set_drv_data,
172 .get_hw_id = iwl_pci_get_hw_id, 165 .get_hw_id = iwl_pci_get_hw_id,
173 .write8 = iwl_pci_write8, 166 .write8 = iwl_pci_write8,
174 .write32 = iwl_pci_write32, 167 .write32 = iwl_pci_write32,
@@ -260,6 +253,7 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
260 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)}, 253 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
261 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)}, 254 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
262 {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)}, 255 {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)},
256 {IWL_PCI_DEVICE(0x0085, 0xC220, iwl6005_2agn_sff_cfg)},
263 257
264/* 6x30 Series */ 258/* 6x30 Series */
265 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)}, 259 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
@@ -392,6 +386,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
392 pci_bus = IWL_BUS_GET_PCI_BUS(bus); 386 pci_bus = IWL_BUS_GET_PCI_BUS(bus);
393 pci_bus->pci_dev = pdev; 387 pci_bus->pci_dev = pdev;
394 388
389 pci_set_drvdata(pdev, bus);
390
395 /* W/A - seems to solve weird behavior. We need to remove this if we 391 /* W/A - seems to solve weird behavior. We need to remove this if we
396 * don't want to stay in L1 all the time. This wastes a lot of power */ 392 * don't want to stay in L1 all the time. This wastes a lot of power */
397 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | 393 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
@@ -483,27 +479,22 @@ out_no_pci:
483 return err; 479 return err;
484} 480}
485 481
486static void iwl_pci_down(struct iwl_bus *bus)
487{
488 struct iwl_pci_bus *pci_bus = (struct iwl_pci_bus *) bus->bus_specific;
489
490 pci_disable_msi(pci_bus->pci_dev);
491 pci_iounmap(pci_bus->pci_dev, pci_bus->hw_base);
492 pci_release_regions(pci_bus->pci_dev);
493 pci_disable_device(pci_bus->pci_dev);
494 pci_set_drvdata(pci_bus->pci_dev, NULL);
495
496 kfree(bus);
497}
498
499static void __devexit iwl_pci_remove(struct pci_dev *pdev) 482static void __devexit iwl_pci_remove(struct pci_dev *pdev)
500{ 483{
501 struct iwl_shared *shrd = pci_get_drvdata(pdev); 484 struct iwl_bus *bus = pci_get_drvdata(pdev);
502 struct iwl_bus *bus = shrd->bus; 485 struct iwl_pci_bus *pci_bus = IWL_BUS_GET_PCI_BUS(bus);
486 struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
487 struct iwl_shared *shrd = bus->shrd;
503 488
504 iwl_remove(shrd->priv); 489 iwl_remove(shrd->priv);
505 490
506 iwl_pci_down(bus); 491 pci_disable_msi(pci_dev);
492 pci_iounmap(pci_dev, pci_bus->hw_base);
493 pci_release_regions(pci_dev);
494 pci_disable_device(pci_dev);
495 pci_set_drvdata(pci_dev, NULL);
496
497 kfree(bus);
507} 498}
508 499
509#ifdef CONFIG_PM_SLEEP 500#ifdef CONFIG_PM_SLEEP
@@ -511,7 +502,8 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
511static int iwl_pci_suspend(struct device *device) 502static int iwl_pci_suspend(struct device *device)
512{ 503{
513 struct pci_dev *pdev = to_pci_dev(device); 504 struct pci_dev *pdev = to_pci_dev(device);
514 struct iwl_shared *shrd = pci_get_drvdata(pdev); 505 struct iwl_bus *bus = pci_get_drvdata(pdev);
506 struct iwl_shared *shrd = bus->shrd;
515 507
516 /* Before you put code here, think about WoWLAN. You cannot check here 508 /* Before you put code here, think about WoWLAN. You cannot check here
517 * whether WoWLAN is enabled or not, and your code will run even if 509 * whether WoWLAN is enabled or not, and your code will run even if
@@ -524,7 +516,8 @@ static int iwl_pci_suspend(struct device *device)
524static int iwl_pci_resume(struct device *device) 516static int iwl_pci_resume(struct device *device)
525{ 517{
526 struct pci_dev *pdev = to_pci_dev(device); 518 struct pci_dev *pdev = to_pci_dev(device);
527 struct iwl_shared *shrd = pci_get_drvdata(pdev); 519 struct iwl_bus *bus = pci_get_drvdata(pdev);
520 struct iwl_shared *shrd = bus->shrd;
528 521
529 /* Before you put code here, think about WoWLAN. You cannot check here 522 /* Before you put code here, think about WoWLAN. You cannot check here
530 * whether WoWLAN is enabled or not, and your code will run even if 523 * whether WoWLAN is enabled or not, and your code will run even if
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c
index 8572548dd4a2..bcd7f64683aa 100644
--- a/drivers/net/wireless/iwlwifi/iwl-rx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-rx.c
@@ -42,6 +42,87 @@
42#include "iwl-agn.h" 42#include "iwl-agn.h"
43#include "iwl-shared.h" 43#include "iwl-shared.h"
44 44
45const char *get_cmd_string(u8 cmd)
46{
47 switch (cmd) {
48 IWL_CMD(REPLY_ALIVE);
49 IWL_CMD(REPLY_ERROR);
50 IWL_CMD(REPLY_RXON);
51 IWL_CMD(REPLY_RXON_ASSOC);
52 IWL_CMD(REPLY_QOS_PARAM);
53 IWL_CMD(REPLY_RXON_TIMING);
54 IWL_CMD(REPLY_ADD_STA);
55 IWL_CMD(REPLY_REMOVE_STA);
56 IWL_CMD(REPLY_REMOVE_ALL_STA);
57 IWL_CMD(REPLY_TXFIFO_FLUSH);
58 IWL_CMD(REPLY_WEPKEY);
59 IWL_CMD(REPLY_TX);
60 IWL_CMD(REPLY_LEDS_CMD);
61 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
62 IWL_CMD(COEX_PRIORITY_TABLE_CMD);
63 IWL_CMD(COEX_MEDIUM_NOTIFICATION);
64 IWL_CMD(COEX_EVENT_CMD);
65 IWL_CMD(REPLY_QUIET_CMD);
66 IWL_CMD(REPLY_CHANNEL_SWITCH);
67 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
68 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
69 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
70 IWL_CMD(POWER_TABLE_CMD);
71 IWL_CMD(PM_SLEEP_NOTIFICATION);
72 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
73 IWL_CMD(REPLY_SCAN_CMD);
74 IWL_CMD(REPLY_SCAN_ABORT_CMD);
75 IWL_CMD(SCAN_START_NOTIFICATION);
76 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
77 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
78 IWL_CMD(BEACON_NOTIFICATION);
79 IWL_CMD(REPLY_TX_BEACON);
80 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
81 IWL_CMD(QUIET_NOTIFICATION);
82 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
83 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
84 IWL_CMD(REPLY_BT_CONFIG);
85 IWL_CMD(REPLY_STATISTICS_CMD);
86 IWL_CMD(STATISTICS_NOTIFICATION);
87 IWL_CMD(REPLY_CARD_STATE_CMD);
88 IWL_CMD(CARD_STATE_NOTIFICATION);
89 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
90 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
91 IWL_CMD(SENSITIVITY_CMD);
92 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
93 IWL_CMD(REPLY_RX_PHY_CMD);
94 IWL_CMD(REPLY_RX_MPDU_CMD);
95 IWL_CMD(REPLY_RX);
96 IWL_CMD(REPLY_COMPRESSED_BA);
97 IWL_CMD(CALIBRATION_CFG_CMD);
98 IWL_CMD(CALIBRATION_RES_NOTIFICATION);
99 IWL_CMD(CALIBRATION_COMPLETE_NOTIFICATION);
100 IWL_CMD(REPLY_TX_POWER_DBM_CMD);
101 IWL_CMD(TEMPERATURE_NOTIFICATION);
102 IWL_CMD(TX_ANT_CONFIGURATION_CMD);
103 IWL_CMD(REPLY_BT_COEX_PROFILE_NOTIF);
104 IWL_CMD(REPLY_BT_COEX_PRIO_TABLE);
105 IWL_CMD(REPLY_BT_COEX_PROT_ENV);
106 IWL_CMD(REPLY_WIPAN_PARAMS);
107 IWL_CMD(REPLY_WIPAN_RXON);
108 IWL_CMD(REPLY_WIPAN_RXON_TIMING);
109 IWL_CMD(REPLY_WIPAN_RXON_ASSOC);
110 IWL_CMD(REPLY_WIPAN_QOS_PARAM);
111 IWL_CMD(REPLY_WIPAN_WEPKEY);
112 IWL_CMD(REPLY_WIPAN_P2P_CHANNEL_SWITCH);
113 IWL_CMD(REPLY_WIPAN_NOA_NOTIFICATION);
114 IWL_CMD(REPLY_WIPAN_DEACTIVATION_COMPLETE);
115 IWL_CMD(REPLY_WOWLAN_PATTERNS);
116 IWL_CMD(REPLY_WOWLAN_WAKEUP_FILTER);
117 IWL_CMD(REPLY_WOWLAN_TSC_RSC_PARAMS);
118 IWL_CMD(REPLY_WOWLAN_TKIP_PARAMS);
119 IWL_CMD(REPLY_WOWLAN_KEK_KCK_MATERIAL);
120 IWL_CMD(REPLY_WOWLAN_GET_STATUS);
121 default:
122 return "UNKNOWN";
123
124 }
125}
45 126
46/****************************************************************************** 127/******************************************************************************
47 * 128 *
@@ -49,8 +130,9 @@
49 * 130 *
50 ******************************************************************************/ 131 ******************************************************************************/
51 132
52static void iwl_rx_reply_error(struct iwl_priv *priv, 133static int iwl_rx_reply_error(struct iwl_priv *priv,
53 struct iwl_rx_mem_buffer *rxb) 134 struct iwl_rx_mem_buffer *rxb,
135 struct iwl_device_cmd *cmd)
54{ 136{
55 struct iwl_rx_packet *pkt = rxb_addr(rxb); 137 struct iwl_rx_packet *pkt = rxb_addr(rxb);
56 138
@@ -61,9 +143,11 @@ static void iwl_rx_reply_error(struct iwl_priv *priv,
61 pkt->u.err_resp.cmd_id, 143 pkt->u.err_resp.cmd_id,
62 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), 144 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
63 le32_to_cpu(pkt->u.err_resp.error_info)); 145 le32_to_cpu(pkt->u.err_resp.error_info));
146 return 0;
64} 147}
65 148
66static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) 149static int iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
150 struct iwl_device_cmd *cmd)
67{ 151{
68 struct iwl_rx_packet *pkt = rxb_addr(rxb); 152 struct iwl_rx_packet *pkt = rxb_addr(rxb);
69 struct iwl_csa_notification *csa = &(pkt->u.csa_notif); 153 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
@@ -75,7 +159,7 @@ static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
75 struct iwl_rxon_cmd *rxon = (void *)&ctx->active; 159 struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
76 160
77 if (!test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->shrd->status)) 161 if (!test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->shrd->status))
78 return; 162 return 0;
79 163
80 if (!le32_to_cpu(csa->status) && csa->channel == priv->switch_channel) { 164 if (!le32_to_cpu(csa->status) && csa->channel == priv->switch_channel) {
81 rxon->channel = csa->channel; 165 rxon->channel = csa->channel;
@@ -88,11 +172,13 @@ static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
88 le16_to_cpu(csa->channel)); 172 le16_to_cpu(csa->channel));
89 iwl_chswitch_done(priv, false); 173 iwl_chswitch_done(priv, false);
90 } 174 }
175 return 0;
91} 176}
92 177
93 178
94static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv, 179static int iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
95 struct iwl_rx_mem_buffer *rxb) 180 struct iwl_rx_mem_buffer *rxb,
181 struct iwl_device_cmd *cmd)
96{ 182{
97 struct iwl_rx_packet *pkt = rxb_addr(rxb); 183 struct iwl_rx_packet *pkt = rxb_addr(rxb);
98 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif); 184 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
@@ -100,15 +186,17 @@ static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
100 if (!report->state) { 186 if (!report->state) {
101 IWL_DEBUG_11H(priv, 187 IWL_DEBUG_11H(priv,
102 "Spectrum Measure Notification: Start\n"); 188 "Spectrum Measure Notification: Start\n");
103 return; 189 return 0;
104 } 190 }
105 191
106 memcpy(&priv->measure_report, report, sizeof(*report)); 192 memcpy(&priv->measure_report, report, sizeof(*report));
107 priv->measurement_status |= MEASUREMENT_READY; 193 priv->measurement_status |= MEASUREMENT_READY;
194 return 0;
108} 195}
109 196
110static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv, 197static int iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
111 struct iwl_rx_mem_buffer *rxb) 198 struct iwl_rx_mem_buffer *rxb,
199 struct iwl_device_cmd *cmd)
112{ 200{
113#ifdef CONFIG_IWLWIFI_DEBUG 201#ifdef CONFIG_IWLWIFI_DEBUG
114 struct iwl_rx_packet *pkt = rxb_addr(rxb); 202 struct iwl_rx_packet *pkt = rxb_addr(rxb);
@@ -116,10 +204,12 @@ static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
116 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n", 204 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
117 sleep->pm_sleep_mode, sleep->pm_wakeup_src); 205 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
118#endif 206#endif
207 return 0;
119} 208}
120 209
121static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv, 210static int iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
122 struct iwl_rx_mem_buffer *rxb) 211 struct iwl_rx_mem_buffer *rxb,
212 struct iwl_device_cmd *cmd)
123{ 213{
124 struct iwl_rx_packet *pkt = rxb_addr(rxb); 214 struct iwl_rx_packet *pkt = rxb_addr(rxb);
125 u32 __maybe_unused len = 215 u32 __maybe_unused len =
@@ -128,10 +218,12 @@ static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
128 "notification for %s:\n", len, 218 "notification for %s:\n", len,
129 get_cmd_string(pkt->hdr.cmd)); 219 get_cmd_string(pkt->hdr.cmd));
130 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len); 220 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
221 return 0;
131} 222}
132 223
133static void iwl_rx_beacon_notif(struct iwl_priv *priv, 224static int iwl_rx_beacon_notif(struct iwl_priv *priv,
134 struct iwl_rx_mem_buffer *rxb) 225 struct iwl_rx_mem_buffer *rxb,
226 struct iwl_device_cmd *cmd)
135{ 227{
136 struct iwl_rx_packet *pkt = rxb_addr(rxb); 228 struct iwl_rx_packet *pkt = rxb_addr(rxb);
137 struct iwlagn_beacon_notif *beacon = (void *)pkt->u.raw; 229 struct iwlagn_beacon_notif *beacon = (void *)pkt->u.raw;
@@ -152,6 +244,7 @@ static void iwl_rx_beacon_notif(struct iwl_priv *priv,
152 244
153 if (!test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) 245 if (!test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
154 queue_work(priv->shrd->workqueue, &priv->beacon_update); 246 queue_work(priv->shrd->workqueue, &priv->beacon_update);
247 return 0;
155} 248}
156 249
157/* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */ 250/* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
@@ -394,8 +487,9 @@ iwl_accumulative_statistics(struct iwl_priv *priv,
394} 487}
395#endif 488#endif
396 489
397static void iwl_rx_statistics(struct iwl_priv *priv, 490static int iwl_rx_statistics(struct iwl_priv *priv,
398 struct iwl_rx_mem_buffer *rxb) 491 struct iwl_rx_mem_buffer *rxb,
492 struct iwl_device_cmd *cmd)
399{ 493{
400 unsigned long stamp = jiffies; 494 unsigned long stamp = jiffies;
401 const int reg_recalib_period = 60; 495 const int reg_recalib_period = 60;
@@ -449,7 +543,7 @@ static void iwl_rx_statistics(struct iwl_priv *priv,
449 WARN_ONCE(1, "len %d doesn't match BT (%zu) or normal (%zu)\n", 543 WARN_ONCE(1, "len %d doesn't match BT (%zu) or normal (%zu)\n",
450 len, sizeof(struct iwl_bt_notif_statistics), 544 len, sizeof(struct iwl_bt_notif_statistics),
451 sizeof(struct iwl_notif_statistics)); 545 sizeof(struct iwl_notif_statistics));
452 return; 546 return 0;
453 } 547 }
454 548
455 change = common->temperature != priv->statistics.common.temperature || 549 change = common->temperature != priv->statistics.common.temperature ||
@@ -492,10 +586,12 @@ static void iwl_rx_statistics(struct iwl_priv *priv,
492 } 586 }
493 if (priv->cfg->lib->temperature && change) 587 if (priv->cfg->lib->temperature && change)
494 priv->cfg->lib->temperature(priv); 588 priv->cfg->lib->temperature(priv);
589 return 0;
495} 590}
496 591
497static void iwl_rx_reply_statistics(struct iwl_priv *priv, 592static int iwl_rx_reply_statistics(struct iwl_priv *priv,
498 struct iwl_rx_mem_buffer *rxb) 593 struct iwl_rx_mem_buffer *rxb,
594 struct iwl_device_cmd *cmd)
499{ 595{
500 struct iwl_rx_packet *pkt = rxb_addr(rxb); 596 struct iwl_rx_packet *pkt = rxb_addr(rxb);
501 597
@@ -510,13 +606,15 @@ static void iwl_rx_reply_statistics(struct iwl_priv *priv,
510#endif 606#endif
511 IWL_DEBUG_RX(priv, "Statistics have been cleared\n"); 607 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
512 } 608 }
513 iwl_rx_statistics(priv, rxb); 609 iwl_rx_statistics(priv, rxb, cmd);
610 return 0;
514} 611}
515 612
516/* Handle notification from uCode that card's power state is changing 613/* Handle notification from uCode that card's power state is changing
517 * due to software, hardware, or critical temperature RFKILL */ 614 * due to software, hardware, or critical temperature RFKILL */
518static void iwl_rx_card_state_notif(struct iwl_priv *priv, 615static int iwl_rx_card_state_notif(struct iwl_priv *priv,
519 struct iwl_rx_mem_buffer *rxb) 616 struct iwl_rx_mem_buffer *rxb,
617 struct iwl_device_cmd *cmd)
520{ 618{
521 struct iwl_rx_packet *pkt = rxb_addr(rxb); 619 struct iwl_rx_packet *pkt = rxb_addr(rxb);
522 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 620 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
@@ -563,11 +661,13 @@ static void iwl_rx_card_state_notif(struct iwl_priv *priv,
563 wiphy_rfkill_set_hw_state(priv->hw->wiphy, 661 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
564 test_bit(STATUS_RF_KILL_HW, &priv->shrd->status)); 662 test_bit(STATUS_RF_KILL_HW, &priv->shrd->status));
565 else 663 else
566 wake_up_interruptible(&priv->wait_command_queue); 664 wake_up(&priv->shrd->wait_command_queue);
665 return 0;
567} 666}
568 667
569static void iwl_rx_missed_beacon_notif(struct iwl_priv *priv, 668static int iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
570 struct iwl_rx_mem_buffer *rxb) 669 struct iwl_rx_mem_buffer *rxb,
670 struct iwl_device_cmd *cmd)
571 671
572{ 672{
573 struct iwl_rx_packet *pkt = rxb_addr(rxb); 673 struct iwl_rx_packet *pkt = rxb_addr(rxb);
@@ -585,18 +685,21 @@ static void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
585 if (!test_bit(STATUS_SCANNING, &priv->shrd->status)) 685 if (!test_bit(STATUS_SCANNING, &priv->shrd->status))
586 iwl_init_sensitivity(priv); 686 iwl_init_sensitivity(priv);
587 } 687 }
688 return 0;
588} 689}
589 690
590/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD). 691/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
591 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */ 692 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
592static void iwl_rx_reply_rx_phy(struct iwl_priv *priv, 693static int iwl_rx_reply_rx_phy(struct iwl_priv *priv,
593 struct iwl_rx_mem_buffer *rxb) 694 struct iwl_rx_mem_buffer *rxb,
695 struct iwl_device_cmd *cmd)
594{ 696{
595 struct iwl_rx_packet *pkt = rxb_addr(rxb); 697 struct iwl_rx_packet *pkt = rxb_addr(rxb);
596 698
597 priv->last_phy_res_valid = true; 699 priv->last_phy_res_valid = true;
598 memcpy(&priv->last_phy_res, pkt->u.raw, 700 memcpy(&priv->last_phy_res, pkt->u.raw,
599 sizeof(struct iwl_rx_phy_res)); 701 sizeof(struct iwl_rx_phy_res));
702 return 0;
600} 703}
601 704
602/* 705/*
@@ -811,8 +914,9 @@ static int iwlagn_calc_rssi(struct iwl_priv *priv,
811 914
812/* Called for REPLY_RX (legacy ABG frames), or 915/* Called for REPLY_RX (legacy ABG frames), or
813 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */ 916 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
814static void iwl_rx_reply_rx(struct iwl_priv *priv, 917static int iwl_rx_reply_rx(struct iwl_priv *priv,
815 struct iwl_rx_mem_buffer *rxb) 918 struct iwl_rx_mem_buffer *rxb,
919 struct iwl_device_cmd *cmd)
816{ 920{
817 struct ieee80211_hdr *header; 921 struct ieee80211_hdr *header;
818 struct ieee80211_rx_status rx_status; 922 struct ieee80211_rx_status rx_status;
@@ -845,7 +949,7 @@ static void iwl_rx_reply_rx(struct iwl_priv *priv,
845 } else { 949 } else {
846 if (!priv->last_phy_res_valid) { 950 if (!priv->last_phy_res_valid) {
847 IWL_ERR(priv, "MPDU frame without cached PHY data\n"); 951 IWL_ERR(priv, "MPDU frame without cached PHY data\n");
848 return; 952 return 0;
849 } 953 }
850 phy_res = &priv->last_phy_res; 954 phy_res = &priv->last_phy_res;
851 amsdu = (struct iwl_rx_mpdu_res_start *)pkt->u.raw; 955 amsdu = (struct iwl_rx_mpdu_res_start *)pkt->u.raw;
@@ -859,14 +963,14 @@ static void iwl_rx_reply_rx(struct iwl_priv *priv,
859 if ((unlikely(phy_res->cfg_phy_cnt > 20))) { 963 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
860 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n", 964 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
861 phy_res->cfg_phy_cnt); 965 phy_res->cfg_phy_cnt);
862 return; 966 return 0;
863 } 967 }
864 968
865 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) || 969 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
866 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) { 970 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
867 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n", 971 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
868 le32_to_cpu(rx_pkt_status)); 972 le32_to_cpu(rx_pkt_status));
869 return; 973 return 0;
870 } 974 }
871 975
872 /* This will be used in several places later */ 976 /* This will be used in several places later */
@@ -927,6 +1031,7 @@ static void iwl_rx_reply_rx(struct iwl_priv *priv,
927 1031
928 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status, 1032 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
929 rxb, &rx_status); 1033 rxb, &rx_status);
1034 return 0;
930} 1035}
931 1036
932/** 1037/**
@@ -937,7 +1042,8 @@ static void iwl_rx_reply_rx(struct iwl_priv *priv,
937 */ 1042 */
938void iwl_setup_rx_handlers(struct iwl_priv *priv) 1043void iwl_setup_rx_handlers(struct iwl_priv *priv)
939{ 1044{
940 void (**handlers)(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb); 1045 int (**handlers)(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
1046 struct iwl_device_cmd *cmd);
941 1047
942 handlers = priv->rx_handlers; 1048 handlers = priv->rx_handlers;
943 1049
@@ -947,6 +1053,7 @@ void iwl_setup_rx_handlers(struct iwl_priv *priv)
947 handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif; 1053 handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
948 handlers[PM_DEBUG_STATISTIC_NOTIFIC] = iwl_rx_pm_debug_statistics_notif; 1054 handlers[PM_DEBUG_STATISTIC_NOTIFIC] = iwl_rx_pm_debug_statistics_notif;
949 handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif; 1055 handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
1056 handlers[REPLY_ADD_STA] = iwl_add_sta_callback;
950 1057
951 /* 1058 /*
952 * The same handler is used for both the REPLY to a discrete 1059 * The same handler is used for both the REPLY to a discrete
@@ -984,9 +1091,11 @@ void iwl_setup_rx_handlers(struct iwl_priv *priv)
984 1091
985} 1092}
986 1093
987void iwl_rx_dispatch(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) 1094int iwl_rx_dispatch(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
1095 struct iwl_device_cmd *cmd)
988{ 1096{
989 struct iwl_rx_packet *pkt = rxb_addr(rxb); 1097 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1098 int err = 0;
990 1099
991 /* 1100 /*
992 * Do the notification wait before RX handlers so 1101 * Do the notification wait before RX handlers so
@@ -1021,11 +1130,12 @@ void iwl_rx_dispatch(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1021 * rx_handlers table. See iwl_setup_rx_handlers() */ 1130 * rx_handlers table. See iwl_setup_rx_handlers() */
1022 if (priv->rx_handlers[pkt->hdr.cmd]) { 1131 if (priv->rx_handlers[pkt->hdr.cmd]) {
1023 priv->rx_handlers_stats[pkt->hdr.cmd]++; 1132 priv->rx_handlers_stats[pkt->hdr.cmd]++;
1024 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); 1133 err = priv->rx_handlers[pkt->hdr.cmd] (priv, rxb, cmd);
1025 } else { 1134 } else {
1026 /* No handling needed */ 1135 /* No handling needed */
1027 IWL_DEBUG_RX(priv, 1136 IWL_DEBUG_RX(priv,
1028 "No handler needed for %s, 0x%02x\n", 1137 "No handler needed for %s, 0x%02x\n",
1029 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1138 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1030 } 1139 }
1140 return err;
1031} 1141}
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c
index fc5af3475392..2b6db24daf70 100644
--- a/drivers/net/wireless/iwlwifi/iwl-scan.c
+++ b/drivers/net/wireless/iwlwifi/iwl-scan.c
@@ -189,8 +189,9 @@ int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
189} 189}
190 190
191/* Service response to REPLY_SCAN_CMD (0x80) */ 191/* Service response to REPLY_SCAN_CMD (0x80) */
192static void iwl_rx_reply_scan(struct iwl_priv *priv, 192static int iwl_rx_reply_scan(struct iwl_priv *priv,
193 struct iwl_rx_mem_buffer *rxb) 193 struct iwl_rx_mem_buffer *rxb,
194 struct iwl_device_cmd *cmd)
194{ 195{
195#ifdef CONFIG_IWLWIFI_DEBUG 196#ifdef CONFIG_IWLWIFI_DEBUG
196 struct iwl_rx_packet *pkt = rxb_addr(rxb); 197 struct iwl_rx_packet *pkt = rxb_addr(rxb);
@@ -199,11 +200,13 @@ static void iwl_rx_reply_scan(struct iwl_priv *priv,
199 200
200 IWL_DEBUG_SCAN(priv, "Scan request status = 0x%x\n", notif->status); 201 IWL_DEBUG_SCAN(priv, "Scan request status = 0x%x\n", notif->status);
201#endif 202#endif
203 return 0;
202} 204}
203 205
204/* Service SCAN_START_NOTIFICATION (0x82) */ 206/* Service SCAN_START_NOTIFICATION (0x82) */
205static void iwl_rx_scan_start_notif(struct iwl_priv *priv, 207static int iwl_rx_scan_start_notif(struct iwl_priv *priv,
206 struct iwl_rx_mem_buffer *rxb) 208 struct iwl_rx_mem_buffer *rxb,
209 struct iwl_device_cmd *cmd)
207{ 210{
208 struct iwl_rx_packet *pkt = rxb_addr(rxb); 211 struct iwl_rx_packet *pkt = rxb_addr(rxb);
209 struct iwl_scanstart_notification *notif = 212 struct iwl_scanstart_notification *notif =
@@ -218,13 +221,19 @@ static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
218 le32_to_cpu(notif->tsf_low), 221 le32_to_cpu(notif->tsf_low),
219 notif->status, notif->beacon_timer); 222 notif->status, notif->beacon_timer);
220 223
221 if (priv->scan_type == IWL_SCAN_ROC) 224 if (priv->scan_type == IWL_SCAN_ROC &&
225 !priv->hw_roc_start_notified) {
222 ieee80211_ready_on_channel(priv->hw); 226 ieee80211_ready_on_channel(priv->hw);
227 priv->hw_roc_start_notified = true;
228 }
229
230 return 0;
223} 231}
224 232
225/* Service SCAN_RESULTS_NOTIFICATION (0x83) */ 233/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
226static void iwl_rx_scan_results_notif(struct iwl_priv *priv, 234static int iwl_rx_scan_results_notif(struct iwl_priv *priv,
227 struct iwl_rx_mem_buffer *rxb) 235 struct iwl_rx_mem_buffer *rxb,
236 struct iwl_device_cmd *cmd)
228{ 237{
229#ifdef CONFIG_IWLWIFI_DEBUG 238#ifdef CONFIG_IWLWIFI_DEBUG
230 struct iwl_rx_packet *pkt = rxb_addr(rxb); 239 struct iwl_rx_packet *pkt = rxb_addr(rxb);
@@ -242,11 +251,13 @@ static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
242 le32_to_cpu(notif->statistics[0]), 251 le32_to_cpu(notif->statistics[0]),
243 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf); 252 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf);
244#endif 253#endif
254 return 0;
245} 255}
246 256
247/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ 257/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
248static void iwl_rx_scan_complete_notif(struct iwl_priv *priv, 258static int iwl_rx_scan_complete_notif(struct iwl_priv *priv,
249 struct iwl_rx_mem_buffer *rxb) 259 struct iwl_rx_mem_buffer *rxb,
260 struct iwl_device_cmd *cmd)
250{ 261{
251 struct iwl_rx_packet *pkt = rxb_addr(rxb); 262 struct iwl_rx_packet *pkt = rxb_addr(rxb);
252 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw; 263 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
@@ -286,6 +297,7 @@ static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
286 queue_work(priv->shrd->workqueue, 297 queue_work(priv->shrd->workqueue,
287 &priv->bt_traffic_change_work); 298 &priv->bt_traffic_change_work);
288 } 299 }
300 return 0;
289} 301}
290 302
291void iwl_setup_rx_scan_handlers(struct iwl_priv *priv) 303void iwl_setup_rx_scan_handlers(struct iwl_priv *priv)
@@ -299,9 +311,8 @@ void iwl_setup_rx_scan_handlers(struct iwl_priv *priv)
299 iwl_rx_scan_complete_notif; 311 iwl_rx_scan_complete_notif;
300} 312}
301 313
302inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, 314static u16 iwl_get_active_dwell_time(struct iwl_priv *priv,
303 enum ieee80211_band band, 315 enum ieee80211_band band, u8 n_probes)
304 u8 n_probes)
305{ 316{
306 if (band == IEEE80211_BAND_5GHZ) 317 if (band == IEEE80211_BAND_5GHZ)
307 return IWL_ACTIVE_DWELL_TIME_52 + 318 return IWL_ACTIVE_DWELL_TIME_52 +
@@ -311,35 +322,481 @@ inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv,
311 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1); 322 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
312} 323}
313 324
314u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, 325static u16 iwl_limit_dwell(struct iwl_priv *priv, u16 dwell_time)
315 enum ieee80211_band band,
316 struct ieee80211_vif *vif)
317{ 326{
318 struct iwl_rxon_context *ctx; 327 struct iwl_rxon_context *ctx;
328
329 /*
330 * If we're associated, we clamp the dwell time 98%
331 * of the smallest beacon interval (minus 2 * channel
332 * tune time)
333 */
334 for_each_context(priv, ctx) {
335 u16 value;
336
337 if (!iwl_is_associated_ctx(ctx))
338 continue;
339 value = ctx->beacon_int;
340 if (!value)
341 value = IWL_PASSIVE_DWELL_BASE;
342 value = (value * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
343 dwell_time = min(value, dwell_time);
344 }
345
346 return dwell_time;
347}
348
349static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv,
350 enum ieee80211_band band)
351{
319 u16 passive = (band == IEEE80211_BAND_2GHZ) ? 352 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
320 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : 353 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
321 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52; 354 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
322 355
323 if (iwl_is_any_associated(priv)) { 356 return iwl_limit_dwell(priv, passive);
357}
358
359static int iwl_get_single_channel_for_scan(struct iwl_priv *priv,
360 struct ieee80211_vif *vif,
361 enum ieee80211_band band,
362 struct iwl_scan_channel *scan_ch)
363{
364 const struct ieee80211_supported_band *sband;
365 u16 passive_dwell = 0;
366 u16 active_dwell = 0;
367 int added = 0;
368 u16 channel = 0;
369
370 sband = iwl_get_hw_mode(priv, band);
371 if (!sband) {
372 IWL_ERR(priv, "invalid band\n");
373 return added;
374 }
375
376 active_dwell = iwl_get_active_dwell_time(priv, band, 0);
377 passive_dwell = iwl_get_passive_dwell_time(priv, band);
378
379 if (passive_dwell <= active_dwell)
380 passive_dwell = active_dwell + 1;
381
382 channel = iwl_get_single_channel_number(priv, band);
383 if (channel) {
384 scan_ch->channel = cpu_to_le16(channel);
385 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
386 scan_ch->active_dwell = cpu_to_le16(active_dwell);
387 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
388 /* Set txpower levels to defaults */
389 scan_ch->dsp_atten = 110;
390 if (band == IEEE80211_BAND_5GHZ)
391 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
392 else
393 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
394 added++;
395 } else
396 IWL_ERR(priv, "no valid channel found\n");
397 return added;
398}
399
400static int iwl_get_channels_for_scan(struct iwl_priv *priv,
401 struct ieee80211_vif *vif,
402 enum ieee80211_band band,
403 u8 is_active, u8 n_probes,
404 struct iwl_scan_channel *scan_ch)
405{
406 struct ieee80211_channel *chan;
407 const struct ieee80211_supported_band *sband;
408 const struct iwl_channel_info *ch_info;
409 u16 passive_dwell = 0;
410 u16 active_dwell = 0;
411 int added, i;
412 u16 channel;
413
414 sband = iwl_get_hw_mode(priv, band);
415 if (!sband)
416 return 0;
417
418 active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
419 passive_dwell = iwl_get_passive_dwell_time(priv, band);
420
421 if (passive_dwell <= active_dwell)
422 passive_dwell = active_dwell + 1;
423
424 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
425 chan = priv->scan_request->channels[i];
426
427 if (chan->band != band)
428 continue;
429
430 channel = chan->hw_value;
431 scan_ch->channel = cpu_to_le16(channel);
432
433 ch_info = iwl_get_channel_info(priv, band, channel);
434 if (!is_channel_valid(ch_info)) {
435 IWL_DEBUG_SCAN(priv,
436 "Channel %d is INVALID for this band.\n",
437 channel);
438 continue;
439 }
440
441 if (!is_active || is_channel_passive(ch_info) ||
442 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
443 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
444 else
445 scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
446
447 if (n_probes)
448 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
449
450 scan_ch->active_dwell = cpu_to_le16(active_dwell);
451 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
452
453 /* Set txpower levels to defaults */
454 scan_ch->dsp_atten = 110;
455
456 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
457 * power level:
458 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
459 */
460 if (band == IEEE80211_BAND_5GHZ)
461 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
462 else
463 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
464
465 IWL_DEBUG_SCAN(priv, "Scanning ch=%d prob=0x%X [%s %d]\n",
466 channel, le32_to_cpu(scan_ch->type),
467 (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
468 "ACTIVE" : "PASSIVE",
469 (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
470 active_dwell : passive_dwell);
471
472 scan_ch++;
473 added++;
474 }
475
476 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
477 return added;
478}
479
480static int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
481{
482 struct iwl_host_cmd cmd = {
483 .id = REPLY_SCAN_CMD,
484 .len = { sizeof(struct iwl_scan_cmd), },
485 .flags = CMD_SYNC,
486 };
487 struct iwl_scan_cmd *scan;
488 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
489 u32 rate_flags = 0;
490 u16 cmd_len;
491 u16 rx_chain = 0;
492 enum ieee80211_band band;
493 u8 n_probes = 0;
494 u8 rx_ant = hw_params(priv).valid_rx_ant;
495 u8 rate;
496 bool is_active = false;
497 int chan_mod;
498 u8 active_chains;
499 u8 scan_tx_antennas = hw_params(priv).valid_tx_ant;
500 int ret;
501
502 lockdep_assert_held(&priv->shrd->mutex);
503
504 if (vif)
505 ctx = iwl_rxon_ctx_from_vif(vif);
506
507 if (!priv->scan_cmd) {
508 priv->scan_cmd = kmalloc(sizeof(struct iwl_scan_cmd) +
509 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
510 if (!priv->scan_cmd) {
511 IWL_DEBUG_SCAN(priv,
512 "fail to allocate memory for scan\n");
513 return -ENOMEM;
514 }
515 }
516 scan = priv->scan_cmd;
517 memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
518
519 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
520 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
521
522 if (priv->scan_type != IWL_SCAN_ROC &&
523 iwl_is_any_associated(priv)) {
524 u16 interval = 0;
525 u32 extra;
526 u32 suspend_time = 100;
527 u32 scan_suspend_time = 100;
528
529 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
530 switch (priv->scan_type) {
531 case IWL_SCAN_ROC:
532 WARN_ON(1);
533 break;
534 case IWL_SCAN_RADIO_RESET:
535 interval = 0;
536 break;
537 case IWL_SCAN_NORMAL:
538 interval = vif->bss_conf.beacon_int;
539 break;
540 }
541
542 scan->suspend_time = 0;
543 scan->max_out_time = cpu_to_le32(200 * 1024);
544 if (!interval)
545 interval = suspend_time;
546
547 extra = (suspend_time / interval) << 22;
548 scan_suspend_time = (extra |
549 ((suspend_time % interval) * 1024));
550 scan->suspend_time = cpu_to_le32(scan_suspend_time);
551 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
552 scan_suspend_time, interval);
553 } else if (priv->scan_type == IWL_SCAN_ROC) {
554 scan->suspend_time = 0;
555 scan->max_out_time = 0;
556 scan->quiet_time = 0;
557 scan->quiet_plcp_th = 0;
558 }
559
560 switch (priv->scan_type) {
561 case IWL_SCAN_RADIO_RESET:
562 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
563 break;
564 case IWL_SCAN_NORMAL:
565 if (priv->scan_request->n_ssids) {
566 int i, p = 0;
567 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
568 for (i = 0; i < priv->scan_request->n_ssids; i++) {
569 /* always does wildcard anyway */
570 if (!priv->scan_request->ssids[i].ssid_len)
571 continue;
572 scan->direct_scan[p].id = WLAN_EID_SSID;
573 scan->direct_scan[p].len =
574 priv->scan_request->ssids[i].ssid_len;
575 memcpy(scan->direct_scan[p].ssid,
576 priv->scan_request->ssids[i].ssid,
577 priv->scan_request->ssids[i].ssid_len);
578 n_probes++;
579 p++;
580 }
581 is_active = true;
582 } else
583 IWL_DEBUG_SCAN(priv, "Start passive scan.\n");
584 break;
585 case IWL_SCAN_ROC:
586 IWL_DEBUG_SCAN(priv, "Start ROC scan.\n");
587 break;
588 }
589
590 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
591 scan->tx_cmd.sta_id = ctx->bcast_sta_id;
592 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
593
594 switch (priv->scan_band) {
595 case IEEE80211_BAND_2GHZ:
596 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
597 chan_mod = le32_to_cpu(
598 priv->contexts[IWL_RXON_CTX_BSS].active.flags &
599 RXON_FLG_CHANNEL_MODE_MSK)
600 >> RXON_FLG_CHANNEL_MODE_POS;
601 if (chan_mod == CHANNEL_MODE_PURE_40) {
602 rate = IWL_RATE_6M_PLCP;
603 } else {
604 rate = IWL_RATE_1M_PLCP;
605 rate_flags = RATE_MCS_CCK_MSK;
606 }
324 /* 607 /*
325 * If we're associated, we clamp the maximum passive 608 * Internal scans are passive, so we can indiscriminately set
326 * dwell time to be 98% of the smallest beacon interval 609 * the BT ignore flag on 2.4 GHz since it applies to TX only.
327 * (minus 2 * channel tune time)
328 */ 610 */
329 for_each_context(priv, ctx) { 611 if (priv->cfg->bt_params &&
330 u16 value; 612 priv->cfg->bt_params->advanced_bt_coexist)
331 613 scan->tx_cmd.tx_flags |= TX_CMD_FLG_IGNORE_BT;
332 if (!iwl_is_associated_ctx(ctx)) 614 break;
333 continue; 615 case IEEE80211_BAND_5GHZ:
334 value = ctx->vif ? ctx->vif->bss_conf.beacon_int : 0; 616 rate = IWL_RATE_6M_PLCP;
335 if ((value > IWL_PASSIVE_DWELL_BASE) || !value) 617 break;
336 value = IWL_PASSIVE_DWELL_BASE; 618 default:
337 value = (value * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2; 619 IWL_WARN(priv, "Invalid scan band\n");
338 passive = min(value, passive); 620 return -EIO;
621 }
622
623 /*
624 * If active scanning is requested but a certain channel is
625 * marked passive, we can do active scanning if we detect
626 * transmissions.
627 *
628 * There is an issue with some firmware versions that triggers
629 * a sysassert on a "good CRC threshold" of zero (== disabled),
630 * on a radar channel even though this means that we should NOT
631 * send probes.
632 *
633 * The "good CRC threshold" is the number of frames that we
634 * need to receive during our dwell time on a channel before
635 * sending out probes -- setting this to a huge value will
636 * mean we never reach it, but at the same time work around
637 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
638 * here instead of IWL_GOOD_CRC_TH_DISABLED.
639 *
640 * This was fixed in later versions along with some other
641 * scan changes, and the threshold behaves as a flag in those
642 * versions.
643 */
644 if (priv->new_scan_threshold_behaviour)
645 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
646 IWL_GOOD_CRC_TH_DISABLED;
647 else
648 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
649 IWL_GOOD_CRC_TH_NEVER;
650
651 band = priv->scan_band;
652
653 if (priv->cfg->scan_rx_antennas[band])
654 rx_ant = priv->cfg->scan_rx_antennas[band];
655
656 if (band == IEEE80211_BAND_2GHZ &&
657 priv->cfg->bt_params &&
658 priv->cfg->bt_params->advanced_bt_coexist) {
659 /* transmit 2.4 GHz probes only on first antenna */
660 scan_tx_antennas = first_antenna(scan_tx_antennas);
661 }
662
663 priv->scan_tx_ant[band] = iwl_toggle_tx_ant(priv,
664 priv->scan_tx_ant[band],
665 scan_tx_antennas);
666 rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]);
667 scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags);
668
669 /* In power save mode use one chain, otherwise use all chains */
670 if (test_bit(STATUS_POWER_PMI, &priv->shrd->status)) {
671 /* rx_ant has been set to all valid chains previously */
672 active_chains = rx_ant &
673 ((u8)(priv->chain_noise_data.active_chains));
674 if (!active_chains)
675 active_chains = rx_ant;
676
677 IWL_DEBUG_SCAN(priv, "chain_noise_data.active_chains: %u\n",
678 priv->chain_noise_data.active_chains);
679
680 rx_ant = first_antenna(active_chains);
681 }
682 if (priv->cfg->bt_params &&
683 priv->cfg->bt_params->advanced_bt_coexist &&
684 priv->bt_full_concurrent) {
685 /* operated as 1x1 in full concurrency mode */
686 rx_ant = first_antenna(rx_ant);
687 }
688
689 /* MIMO is not used here, but value is required */
690 rx_chain |=
691 hw_params(priv).valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
692 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
693 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
694 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
695 scan->rx_chain = cpu_to_le16(rx_chain);
696 switch (priv->scan_type) {
697 case IWL_SCAN_NORMAL:
698 cmd_len = iwl_fill_probe_req(priv,
699 (struct ieee80211_mgmt *)scan->data,
700 vif->addr,
701 priv->scan_request->ie,
702 priv->scan_request->ie_len,
703 IWL_MAX_SCAN_SIZE - sizeof(*scan));
704 break;
705 case IWL_SCAN_RADIO_RESET:
706 case IWL_SCAN_ROC:
707 /* use bcast addr, will not be transmitted but must be valid */
708 cmd_len = iwl_fill_probe_req(priv,
709 (struct ieee80211_mgmt *)scan->data,
710 iwl_bcast_addr, NULL, 0,
711 IWL_MAX_SCAN_SIZE - sizeof(*scan));
712 break;
713 default:
714 BUG();
715 }
716 scan->tx_cmd.len = cpu_to_le16(cmd_len);
717
718 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
719 RXON_FILTER_BCON_AWARE_MSK);
720
721 switch (priv->scan_type) {
722 case IWL_SCAN_RADIO_RESET:
723 scan->channel_count =
724 iwl_get_single_channel_for_scan(priv, vif, band,
725 (void *)&scan->data[cmd_len]);
726 break;
727 case IWL_SCAN_NORMAL:
728 scan->channel_count =
729 iwl_get_channels_for_scan(priv, vif, band,
730 is_active, n_probes,
731 (void *)&scan->data[cmd_len]);
732 break;
733 case IWL_SCAN_ROC: {
734 struct iwl_scan_channel *scan_ch;
735 int n_chan, i;
736 u16 dwell;
737
738 dwell = iwl_limit_dwell(priv, priv->hw_roc_duration);
739 n_chan = DIV_ROUND_UP(priv->hw_roc_duration, dwell);
740
741 scan->channel_count = n_chan;
742
743 scan_ch = (void *)&scan->data[cmd_len];
744
745 for (i = 0; i < n_chan; i++) {
746 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
747 scan_ch->channel =
748 cpu_to_le16(priv->hw_roc_channel->hw_value);
749
750 if (i == n_chan - 1)
751 dwell = priv->hw_roc_duration - i * dwell;
752
753 scan_ch->active_dwell =
754 scan_ch->passive_dwell = cpu_to_le16(dwell);
755
756 /* Set txpower levels to defaults */
757 scan_ch->dsp_atten = 110;
758
759 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
760 * power level:
761 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
762 */
763 if (priv->hw_roc_channel->band == IEEE80211_BAND_5GHZ)
764 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
765 else
766 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
767
768 scan_ch++;
339 } 769 }
770 }
771
772 break;
340 } 773 }
341 774
342 return passive; 775 if (scan->channel_count == 0) {
776 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
777 return -EIO;
778 }
779
780 cmd.len[0] += le16_to_cpu(scan->tx_cmd.len) +
781 scan->channel_count * sizeof(struct iwl_scan_channel);
782 cmd.data[0] = scan;
783 cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
784 scan->len = cpu_to_le16(cmd.len[0]);
785
786 /* set scan bit here for PAN params */
787 set_bit(STATUS_SCAN_HW, &priv->shrd->status);
788
789 ret = iwlagn_set_pan_params(priv);
790 if (ret)
791 return ret;
792
793 ret = iwl_trans_send_cmd(trans(priv), &cmd);
794 if (ret) {
795 clear_bit(STATUS_SCAN_HW, &priv->shrd->status);
796 iwlagn_set_pan_params(priv);
797 }
798
799 return ret;
343} 800}
344 801
345void iwl_init_scan_params(struct iwl_priv *priv) 802void iwl_init_scan_params(struct iwl_priv *priv)
diff --git a/drivers/net/wireless/iwlwifi/iwl-shared.h b/drivers/net/wireless/iwlwifi/iwl-shared.h
index 8b8cd54a32e0..7abafe16de9a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-shared.h
+++ b/drivers/net/wireless/iwlwifi/iwl-shared.h
@@ -67,12 +67,32 @@
67#include <linux/spinlock.h> 67#include <linux/spinlock.h>
68#include <linux/mutex.h> 68#include <linux/mutex.h>
69#include <linux/gfp.h> 69#include <linux/gfp.h>
70#include <linux/mm.h> /* for page_address */
70#include <net/mac80211.h> 71#include <net/mac80211.h>
71 72
72#include "iwl-commands.h" 73#include "iwl-commands.h"
73 74
74/*This files includes all the types / functions that are exported by the 75/**
75 * upper layer to the bus and transport layer */ 76 * DOC: shared area - role and goal
77 *
78 * The shared area contains all the data exported by the upper layer to the
79 * other layers. Since the bus and transport layer shouldn't dereference
80 * iwl_priv, all the data needed by the upper layer and the transport / bus
81 * layer must be here.
82 * The shared area also holds pointer to all the other layers. This allows a
83 * layer to call a function from another layer.
84 *
85 * NOTE: All the layers hold a pointer to the shared area which must be shrd.
86 * A few macros assume that (_m)->shrd points to the shared area no matter
87 * what _m is.
88 *
89 * gets notifications about enumeration, suspend, resume.
90 * For the moment, the bus layer is not a linux kernel module as itself, and
91 * the module_init function of the driver must call the bus specific
92 * registration functions. These functions are listed at the end of this file.
93 * For the moment, there is only one implementation of this interface: PCI-e.
94 * This implementation is iwl-pci.c
95 */
76 96
77struct iwl_cfg; 97struct iwl_cfg;
78struct iwl_bus; 98struct iwl_bus;
@@ -89,6 +109,9 @@ extern struct iwl_mod_params iwlagn_mod_params;
89 109
90/** 110/**
91 * struct iwl_mod_params 111 * struct iwl_mod_params
112 *
113 * Holds the module parameters
114 *
92 * @sw_crypto: using hardware encryption, default = 0 115 * @sw_crypto: using hardware encryption, default = 0
93 * @num_of_queues: number of tx queue, HW dependent 116 * @num_of_queues: number of tx queue, HW dependent
94 * @disable_11n: 11n capabilities enabled, default = 0 117 * @disable_11n: 11n capabilities enabled, default = 0
@@ -133,20 +156,24 @@ struct iwl_mod_params {
133 156
134/** 157/**
135 * struct iwl_hw_params 158 * struct iwl_hw_params
159 *
160 * Holds the module parameters
161 *
136 * @max_txq_num: Max # Tx queues supported 162 * @max_txq_num: Max # Tx queues supported
137 * @num_ampdu_queues: num of ampdu queues 163 * @num_ampdu_queues: num of ampdu queues
138 * @tx/rx_chains_num: Number of TX/RX chains 164 * @tx_chains_num: Number of TX chains
139 * @valid_tx/rx_ant: usable antennas 165 * @rx_chains_num: Number of RX chains
140 * @max_stations: 166 * @valid_tx_ant: usable antennas for TX
141 * @ht40_channel: is 40MHz width possible in band 2.4 167 * @valid_rx_ant: usable antennas for RX
142 * @beacon_time_tsf_bits: number of valid tsf bits for beacon time 168 * @max_stations: the maximal number of stations
143 * @sku: 169 * @ht40_channel: is 40MHz width possible: BIT(IEEE80211_BAND_XXX)
170 * @sku: sku read from EEPROM
144 * @rx_page_order: Rx buffer page order 171 * @rx_page_order: Rx buffer page order
145 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR 172 * @max_inst_size: for ucode use
146 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ) 173 * @max_data_size: for ucode use
147 * @sw_crypto: 0 for hw, 1 for sw 174 * @ct_kill_threshold: temperature threshold - in hw dependent unit
148 * @max_xxx_size: for ucode uses 175 * @ct_kill_exit_threshold: when to reeable the device - in hw dependent unit
149 * @ct_kill_threshold: temperature threshold 176 * relevant for 1000, 6000 and up
150 * @wd_timeout: TX queues watchdog timeout 177 * @wd_timeout: TX queues watchdog timeout
151 * @calib_init_cfg: setup initial calibrations for the hw 178 * @calib_init_cfg: setup initial calibrations for the hw
152 * @calib_rt_cfg: setup runtime calibrations for the hw 179 * @calib_rt_cfg: setup runtime calibrations for the hw
@@ -162,14 +189,12 @@ struct iwl_hw_params {
162 u8 max_stations; 189 u8 max_stations;
163 u8 ht40_channel; 190 u8 ht40_channel;
164 bool shadow_reg_enable; 191 bool shadow_reg_enable;
165 u16 beacon_time_tsf_bits;
166 u16 sku; 192 u16 sku;
167 u32 rx_page_order; 193 u32 rx_page_order;
168 u32 max_inst_size; 194 u32 max_inst_size;
169 u32 max_data_size; 195 u32 max_data_size;
170 u32 ct_kill_threshold; /* value in hw-dependent units */ 196 u32 ct_kill_threshold;
171 u32 ct_kill_exit_threshold; /* value in hw-dependent units */ 197 u32 ct_kill_exit_threshold;
172 /* for 1000, 6000 series and up */
173 unsigned int wd_timeout; 198 unsigned int wd_timeout;
174 199
175 u32 calib_init_cfg; 200 u32 calib_init_cfg;
@@ -178,28 +203,59 @@ struct iwl_hw_params {
178}; 203};
179 204
180/** 205/**
181 * struct iwl_ht_agg - aggregation status while waiting for block-ack 206 * enum iwl_agg_state
182 * @txq_id: Tx queue used for Tx attempt 207 *
183 * @wait_for_ba: Expect block-ack before next Tx reply 208 * The state machine of the BA agreement establishment / tear down.
184 * @rate_n_flags: Rate at which Tx was attempted 209 * These states relate to a specific RA / TID.
185 * 210 *
186 * If REPLY_TX indicates that aggregation was attempted, driver must wait 211 * @IWL_AGG_OFF: aggregation is not used
187 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info 212 * @IWL_AGG_ON: aggregation session is up
188 * until block ack arrives. 213 * @IWL_EMPTYING_HW_QUEUE_ADDBA: establishing a BA session - waiting for the
214 * HW queue to be empty from packets for this RA /TID.
215 * @IWL_EMPTYING_HW_QUEUE_DELBA: tearing down a BA session - waiting for the
216 * HW queue to be empty from packets for this RA /TID.
217 */
218enum iwl_agg_state {
219 IWL_AGG_OFF = 0,
220 IWL_AGG_ON,
221 IWL_EMPTYING_HW_QUEUE_ADDBA,
222 IWL_EMPTYING_HW_QUEUE_DELBA,
223};
224
225/**
226 * struct iwl_ht_agg - aggregation state machine
227
228 * This structs holds the states for the BA agreement establishment and tear
229 * down. It also holds the state during the BA session itself. This struct is
230 * duplicated for each RA / TID.
231
232 * @rate_n_flags: Rate at which Tx was attempted. Holds the data between the
233 * Tx response (REPLY_TX), and the block ack notification
234 * (REPLY_COMPRESSED_BA).
235 * @state: state of the BA agreement establishment / tear down.
236 * @txq_id: Tx queue used by the BA session - used by the transport layer.
237 * Needed by the upper layer for debugfs only.
238 * @wait_for_ba: Expect block-ack before next Tx reply
189 */ 239 */
190struct iwl_ht_agg { 240struct iwl_ht_agg {
191 u16 txq_id;
192 u16 wait_for_ba;
193 u32 rate_n_flags; 241 u32 rate_n_flags;
194#define IWL_AGG_OFF 0 242 enum iwl_agg_state state;
195#define IWL_AGG_ON 1 243 u16 txq_id;
196#define IWL_EMPTYING_HW_QUEUE_ADDBA 2 244 bool wait_for_ba;
197#define IWL_EMPTYING_HW_QUEUE_DELBA 3
198 u8 state;
199}; 245};
200 246
247/**
248 * struct iwl_tid_data - one for each RA / TID
249
250 * This structs holds the states for each RA / TID.
251
252 * @seq_number: the next WiFi sequence number to use
253 * @tfds_in_queue: number of packets sent to the HW queues.
254 * Exported for debugfs only
255 * @agg: aggregation state machine
256 */
201struct iwl_tid_data { 257struct iwl_tid_data {
202 u16 seq_number; /* agn only */ 258 u16 seq_number;
203 u16 tfds_in_queue; 259 u16 tfds_in_queue;
204 struct iwl_ht_agg agg; 260 struct iwl_ht_agg agg;
205}; 261};
@@ -212,6 +268,7 @@ struct iwl_tid_data {
212 * @ucode_owner: IWL_OWNERSHIP_* 268 * @ucode_owner: IWL_OWNERSHIP_*
213 * @cmd_queue: command queue number 269 * @cmd_queue: command queue number
214 * @status: STATUS_* 270 * @status: STATUS_*
271 * @valid_contexts: microcode/device supports multiple contexts
215 * @bus: pointer to the bus layer data 272 * @bus: pointer to the bus layer data
216 * @priv: pointer to the upper layer data 273 * @priv: pointer to the upper layer data
217 * @hw_params: see struct iwl_hw_params 274 * @hw_params: see struct iwl_hw_params
@@ -232,6 +289,7 @@ struct iwl_shared {
232 u8 cmd_queue; 289 u8 cmd_queue;
233 unsigned long status; 290 unsigned long status;
234 bool wowlan; 291 bool wowlan;
292 u8 valid_contexts;
235 293
236 struct iwl_bus *bus; 294 struct iwl_bus *bus;
237 struct iwl_priv *priv; 295 struct iwl_priv *priv;
@@ -243,13 +301,9 @@ struct iwl_shared {
243 spinlock_t sta_lock; 301 spinlock_t sta_lock;
244 struct mutex mutex; 302 struct mutex mutex;
245 303
246 /*these 2 shouldn't really be here, but they are needed for
247 * iwl_queue_stop, which is called from the upper layer too
248 */
249 u8 mac80211_registered;
250 struct ieee80211_hw *hw;
251
252 struct iwl_tid_data tid_data[IWLAGN_STATION_COUNT][IWL_MAX_TID_COUNT]; 304 struct iwl_tid_data tid_data[IWLAGN_STATION_COUNT][IWL_MAX_TID_COUNT];
305
306 wait_queue_head_t wait_command_queue;
253}; 307};
254 308
255/*Whatever _m is (iwl_trans, iwl_priv, iwl_bus, these macros will work */ 309/*Whatever _m is (iwl_trans, iwl_priv, iwl_bus, these macros will work */
@@ -285,6 +339,26 @@ static inline void iwl_free_pages(struct iwl_shared *shrd, unsigned long page)
285 free_pages(page, shrd->hw_params.rx_page_order); 339 free_pages(page, shrd->hw_params.rx_page_order);
286} 340}
287 341
342/**
343 * iwl_queue_inc_wrap - increment queue index, wrap back to beginning
344 * @index -- current index
345 * @n_bd -- total number of entries in queue (must be power of 2)
346 */
347static inline int iwl_queue_inc_wrap(int index, int n_bd)
348{
349 return ++index & (n_bd - 1);
350}
351
352/**
353 * iwl_queue_dec_wrap - decrement queue index, wrap back to end
354 * @index -- current index
355 * @n_bd -- total number of entries in queue (must be power of 2)
356 */
357static inline int iwl_queue_dec_wrap(int index, int n_bd)
358{
359 return --index & (n_bd - 1);
360}
361
288struct iwl_rx_mem_buffer { 362struct iwl_rx_mem_buffer {
289 dma_addr_t page_dma; 363 dma_addr_t page_dma;
290 struct page *page; 364 struct page *page;
@@ -346,21 +420,52 @@ enum iwl_rxon_context_id {
346 NUM_IWL_RXON_CTX 420 NUM_IWL_RXON_CTX
347}; 421};
348 422
349#ifdef CONFIG_PM
350int iwl_suspend(struct iwl_priv *priv);
351int iwl_resume(struct iwl_priv *priv);
352#endif /* !CONFIG_PM */
353
354int iwl_probe(struct iwl_bus *bus, const struct iwl_trans_ops *trans_ops, 423int iwl_probe(struct iwl_bus *bus, const struct iwl_trans_ops *trans_ops,
355 struct iwl_cfg *cfg); 424 struct iwl_cfg *cfg);
356void __devexit iwl_remove(struct iwl_priv * priv); 425void __devexit iwl_remove(struct iwl_priv * priv);
426struct iwl_device_cmd;
427int __must_check iwl_rx_dispatch(struct iwl_priv *priv,
428 struct iwl_rx_mem_buffer *rxb,
429 struct iwl_device_cmd *cmd);
357 430
431int iwlagn_hw_valid_rtc_data_addr(u32 addr);
358void iwl_start_tx_ba_trans_ready(struct iwl_priv *priv, 432void iwl_start_tx_ba_trans_ready(struct iwl_priv *priv,
359 enum iwl_rxon_context_id ctx, 433 enum iwl_rxon_context_id ctx,
360 u8 sta_id, u8 tid); 434 u8 sta_id, u8 tid);
361void iwl_stop_tx_ba_trans_ready(struct iwl_priv *priv, 435void iwl_stop_tx_ba_trans_ready(struct iwl_priv *priv,
362 enum iwl_rxon_context_id ctx, 436 enum iwl_rxon_context_id ctx,
363 u8 sta_id, u8 tid); 437 u8 sta_id, u8 tid);
438void iwl_set_hw_rfkill_state(struct iwl_priv *priv, bool state);
439void iwl_nic_config(struct iwl_priv *priv);
440void iwl_free_skb(struct iwl_priv *priv, struct sk_buff *skb);
441void iwl_apm_stop(struct iwl_priv *priv);
442int iwl_apm_init(struct iwl_priv *priv);
443void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand);
444const char *get_cmd_string(u8 cmd);
445bool iwl_check_for_ct_kill(struct iwl_priv *priv);
446
447void iwl_stop_sw_queue(struct iwl_priv *priv, u8 ac);
448void iwl_wake_sw_queue(struct iwl_priv *priv, u8 ac);
449
450#ifdef CONFIG_IWLWIFI_DEBUGFS
451void iwl_reset_traffic_log(struct iwl_priv *priv);
452#endif /* CONFIG_IWLWIFI_DEBUGFS */
453
454#ifdef CONFIG_IWLWIFI_DEBUG
455void iwl_print_rx_config_cmd(struct iwl_priv *priv,
456 enum iwl_rxon_context_id ctxid);
457#else
458static inline void iwl_print_rx_config_cmd(struct iwl_priv *priv,
459 enum iwl_rxon_context_id ctxid)
460{
461}
462#endif
463
464#define IWL_CMD(x) case x: return #x
465#define IWL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
466
467#define IWL_TRAFFIC_ENTRIES (256)
468#define IWL_TRAFFIC_ENTRY_SIZE (64)
364 469
365/***************************************************** 470/*****************************************************
366* DRIVER STATUS FUNCTIONS 471* DRIVER STATUS FUNCTIONS
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index 26b2bd4db6b4..580a4d702ff3 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -59,8 +59,7 @@ static void iwl_sta_ucode_activate(struct iwl_priv *priv, u8 sta_id)
59 59
60static int iwl_process_add_sta_resp(struct iwl_priv *priv, 60static int iwl_process_add_sta_resp(struct iwl_priv *priv,
61 struct iwl_addsta_cmd *addsta, 61 struct iwl_addsta_cmd *addsta,
62 struct iwl_rx_packet *pkt, 62 struct iwl_rx_packet *pkt)
63 bool sync)
64{ 63{
65 u8 sta_id = addsta->sta.sta_id; 64 u8 sta_id = addsta->sta.sta_id;
66 unsigned long flags; 65 unsigned long flags;
@@ -123,15 +122,14 @@ static int iwl_process_add_sta_resp(struct iwl_priv *priv,
123 return ret; 122 return ret;
124} 123}
125 124
126static void iwl_add_sta_callback(struct iwl_priv *priv, 125int iwl_add_sta_callback(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
127 struct iwl_device_cmd *cmd, 126 struct iwl_device_cmd *cmd)
128 struct iwl_rx_packet *pkt)
129{ 127{
128 struct iwl_rx_packet *pkt = rxb_addr(rxb);
130 struct iwl_addsta_cmd *addsta = 129 struct iwl_addsta_cmd *addsta =
131 (struct iwl_addsta_cmd *)cmd->cmd.payload; 130 (struct iwl_addsta_cmd *) cmd->payload;
132
133 iwl_process_add_sta_resp(priv, addsta, pkt, false);
134 131
132 return iwl_process_add_sta_resp(priv, addsta, pkt);
135} 133}
136 134
137static u16 iwlagn_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data) 135static u16 iwlagn_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
@@ -147,7 +145,6 @@ static u16 iwlagn_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
147int iwl_send_add_sta(struct iwl_priv *priv, 145int iwl_send_add_sta(struct iwl_priv *priv,
148 struct iwl_addsta_cmd *sta, u8 flags) 146 struct iwl_addsta_cmd *sta, u8 flags)
149{ 147{
150 struct iwl_rx_packet *pkt = NULL;
151 int ret = 0; 148 int ret = 0;
152 u8 data[sizeof(*sta)]; 149 u8 data[sizeof(*sta)];
153 struct iwl_host_cmd cmd = { 150 struct iwl_host_cmd cmd = {
@@ -160,9 +157,7 @@ int iwl_send_add_sta(struct iwl_priv *priv,
160 IWL_DEBUG_INFO(priv, "Adding sta %u (%pM) %ssynchronously\n", 157 IWL_DEBUG_INFO(priv, "Adding sta %u (%pM) %ssynchronously\n",
161 sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : ""); 158 sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : "");
162 159
163 if (flags & CMD_ASYNC) 160 if (!(flags & CMD_ASYNC)) {
164 cmd.callback = iwl_add_sta_callback;
165 else {
166 cmd.flags |= CMD_WANT_SKB; 161 cmd.flags |= CMD_WANT_SKB;
167 might_sleep(); 162 might_sleep();
168 } 163 }
@@ -172,14 +167,16 @@ int iwl_send_add_sta(struct iwl_priv *priv,
172 167
173 if (ret || (flags & CMD_ASYNC)) 168 if (ret || (flags & CMD_ASYNC))
174 return ret; 169 return ret;
170 /*else the command was successfully sent in SYNC mode, need to free
171 * the reply page */
175 172
176 if (ret == 0) {
177 pkt = (struct iwl_rx_packet *)cmd.reply_page;
178 ret = iwl_process_add_sta_resp(priv, sta, pkt, true);
179 }
180 iwl_free_pages(priv->shrd, cmd.reply_page); 173 iwl_free_pages(priv->shrd, cmd.reply_page);
181 174
182 return ret; 175 if (cmd.handler_status)
176 IWL_ERR(priv, "%s - error in the CMD response %d", __func__,
177 cmd.handler_status);
178
179 return cmd.handler_status;
183} 180}
184 181
185static void iwl_set_ht_add_station(struct iwl_priv *priv, u8 index, 182static void iwl_set_ht_add_station(struct iwl_priv *priv, u8 index,
@@ -305,7 +302,7 @@ u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
305 station->ctxid = ctx->ctxid; 302 station->ctxid = ctx->ctxid;
306 303
307 if (sta) { 304 if (sta) {
308 struct iwl_station_priv_common *sta_priv; 305 struct iwl_station_priv *sta_priv;
309 306
310 sta_priv = (void *)sta->drv_priv; 307 sta_priv = (void *)sta->drv_priv;
311 sta_priv->ctx = ctx; 308 sta_priv->ctx = ctx;
@@ -821,7 +818,7 @@ int iwl_mac_sta_remove(struct ieee80211_hw *hw,
821 struct ieee80211_sta *sta) 818 struct ieee80211_sta *sta)
822{ 819{
823 struct iwl_priv *priv = hw->priv; 820 struct iwl_priv *priv = hw->priv;
824 struct iwl_station_priv_common *sta_common = (void *)sta->drv_priv; 821 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
825 int ret; 822 int ret;
826 823
827 IWL_DEBUG_INFO(priv, "received request to remove station %pM\n", 824 IWL_DEBUG_INFO(priv, "received request to remove station %pM\n",
@@ -829,7 +826,7 @@ int iwl_mac_sta_remove(struct ieee80211_hw *hw,
829 mutex_lock(&priv->shrd->mutex); 826 mutex_lock(&priv->shrd->mutex);
830 IWL_DEBUG_INFO(priv, "proceeding to remove station %pM\n", 827 IWL_DEBUG_INFO(priv, "proceeding to remove station %pM\n",
831 sta->addr); 828 sta->addr);
832 ret = iwl_remove_station(priv, sta_common->sta_id, sta->addr); 829 ret = iwl_remove_station(priv, sta_priv->sta_id, sta->addr);
833 if (ret) 830 if (ret)
834 IWL_ERR(priv, "Error removing station %pM\n", 831 IWL_ERR(priv, "Error removing station %pM\n",
835 sta->addr); 832 sta->addr);
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h
index 9641eb6b1d0a..1bca0dabde8d 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.h
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.h
@@ -61,6 +61,9 @@ u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
61int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx, 61int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
62 struct iwl_link_quality_cmd *lq, u8 flags, bool init); 62 struct iwl_link_quality_cmd *lq, u8 flags, bool init);
63void iwl_reprogram_ap_sta(struct iwl_priv *priv, struct iwl_rxon_context *ctx); 63void iwl_reprogram_ap_sta(struct iwl_priv *priv, struct iwl_rxon_context *ctx);
64int iwl_add_sta_callback(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
65 struct iwl_device_cmd *cmd);
66
64 67
65/** 68/**
66 * iwl_clear_driver_stations - clear knowledge of all stations from driver 69 * iwl_clear_driver_stations - clear knowledge of all stations from driver
@@ -102,7 +105,7 @@ static inline int iwl_sta_id(struct ieee80211_sta *sta)
102 if (WARN_ON(!sta)) 105 if (WARN_ON(!sta))
103 return IWL_INVALID_STATION; 106 return IWL_INVALID_STATION;
104 107
105 return ((struct iwl_station_priv_common *)sta->drv_priv)->sta_id; 108 return ((struct iwl_station_priv *)sta->drv_priv)->sta_id;
106} 109}
107 110
108/** 111/**
diff --git a/drivers/net/wireless/iwlwifi/iwl-sv-open.c b/drivers/net/wireless/iwlwifi/iwl-sv-open.c
index 848fc18befc2..3335d31daf89 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sv-open.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sv-open.c
@@ -63,6 +63,7 @@
63#include <linux/init.h> 63#include <linux/init.h>
64#include <linux/kernel.h> 64#include <linux/kernel.h>
65#include <linux/module.h> 65#include <linux/module.h>
66#include <linux/dma-mapping.h>
66#include <net/net_namespace.h> 67#include <net/net_namespace.h>
67#include <linux/netdevice.h> 68#include <linux/netdevice.h>
68#include <net/cfg80211.h> 69#include <net/cfg80211.h>
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-int-pcie.h b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h
index ec4e73737681..2b6756e8b8f9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans-int-pcie.h
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-int.h
@@ -32,6 +32,7 @@
32#include <linux/spinlock.h> 32#include <linux/spinlock.h>
33#include <linux/interrupt.h> 33#include <linux/interrupt.h>
34#include <linux/skbuff.h> 34#include <linux/skbuff.h>
35#include <linux/pci.h>
35 36
36#include "iwl-fh.h" 37#include "iwl-fh.h"
37#include "iwl-csr.h" 38#include "iwl-csr.h"
@@ -114,6 +115,87 @@ struct iwl_dma_ptr {
114 */ 115 */
115#define IWL_IPAN_MCAST_QUEUE 8 116#define IWL_IPAN_MCAST_QUEUE 8
116 117
118struct iwl_cmd_meta {
119 /* only for SYNC commands, iff the reply skb is wanted */
120 struct iwl_host_cmd *source;
121
122 u32 flags;
123
124 DEFINE_DMA_UNMAP_ADDR(mapping);
125 DEFINE_DMA_UNMAP_LEN(len);
126};
127
128/*
129 * Generic queue structure
130 *
131 * Contains common data for Rx and Tx queues.
132 *
133 * Note the difference between n_bd and n_window: the hardware
134 * always assumes 256 descriptors, so n_bd is always 256 (unless
135 * there might be HW changes in the future). For the normal TX
136 * queues, n_window, which is the size of the software queue data
137 * is also 256; however, for the command queue, n_window is only
138 * 32 since we don't need so many commands pending. Since the HW
139 * still uses 256 BDs for DMA though, n_bd stays 256. As a result,
140 * the software buffers (in the variables @meta, @txb in struct
141 * iwl_tx_queue) only have 32 entries, while the HW buffers (@tfds
142 * in the same struct) have 256.
143 * This means that we end up with the following:
144 * HW entries: | 0 | ... | N * 32 | ... | N * 32 + 31 | ... | 255 |
145 * SW entries: | 0 | ... | 31 |
146 * where N is a number between 0 and 7. This means that the SW
147 * data is a window overlayed over the HW queue.
148 */
149struct iwl_queue {
150 int n_bd; /* number of BDs in this queue */
151 int write_ptr; /* 1-st empty entry (index) host_w*/
152 int read_ptr; /* last used entry (index) host_r*/
153 /* use for monitoring and recovering the stuck queue */
154 dma_addr_t dma_addr; /* physical addr for BD's */
155 int n_window; /* safe queue window */
156 u32 id;
157 int low_mark; /* low watermark, resume queue if free
158 * space more than this */
159 int high_mark; /* high watermark, stop queue if free
160 * space less than this */
161};
162
163/**
164 * struct iwl_tx_queue - Tx Queue for DMA
165 * @q: generic Rx/Tx queue descriptor
166 * @bd: base of circular buffer of TFDs
167 * @cmd: array of command/TX buffer pointers
168 * @meta: array of meta data for each command/tx buffer
169 * @dma_addr_cmd: physical address of cmd/tx buffer array
170 * @txb: array of per-TFD driver data
171 * @time_stamp: time (in jiffies) of last read_ptr change
172 * @need_update: indicates need to update read/write index
173 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
174 * @sta_id: valid if sched_retry is set
175 * @tid: valid if sched_retry is set
176 *
177 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
178 * descriptors) and required locking structures.
179 */
180#define TFD_TX_CMD_SLOTS 256
181#define TFD_CMD_SLOTS 32
182
183struct iwl_tx_queue {
184 struct iwl_queue q;
185 struct iwl_tfd *tfds;
186 struct iwl_device_cmd **cmd;
187 struct iwl_cmd_meta *meta;
188 struct sk_buff **skbs;
189 unsigned long time_stamp;
190 u8 need_update;
191 u8 sched_retry;
192 u8 active;
193 u8 swq_id;
194
195 u16 sta_id;
196 u16 tid;
197};
198
117/** 199/**
118 * struct iwl_trans_pcie - PCIe transport specific data 200 * struct iwl_trans_pcie - PCIe transport specific data
119 * @rxq: all the RX queue data 201 * @rxq: all the RX queue data
@@ -193,9 +275,8 @@ int iwlagn_txq_attach_buf_to_tfd(struct iwl_trans *trans,
193 dma_addr_t addr, u16 len, u8 reset); 275 dma_addr_t addr, u16 len, u8 reset);
194int iwl_queue_init(struct iwl_queue *q, int count, int slots_num, u32 id); 276int iwl_queue_init(struct iwl_queue *q, int count, int slots_num, u32 id);
195int iwl_trans_pcie_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 277int iwl_trans_pcie_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
196int __must_check iwl_trans_pcie_send_cmd_pdu(struct iwl_trans *trans, u8 id, 278void iwl_tx_cmd_complete(struct iwl_trans *trans,
197 u32 flags, u16 len, const void *data); 279 struct iwl_rx_mem_buffer *rxb, int handler_status);
198void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
199void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans, 280void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans,
200 struct iwl_tx_queue *txq, 281 struct iwl_tx_queue *txq,
201 u16 byte_cnt); 282 u16 byte_cnt);
@@ -214,7 +295,7 @@ void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans,
214 enum iwl_rxon_context_id ctx, 295 enum iwl_rxon_context_id ctx,
215 int sta_id, int tid, int frame_limit); 296 int sta_id, int tid, int frame_limit);
216void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq, 297void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq,
217 int index); 298 int index, enum dma_data_direction dma_dir);
218int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index, 299int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index,
219 struct sk_buff_head *skbs); 300 struct sk_buff_head *skbs);
220int iwl_queue_space(const struct iwl_queue *q); 301int iwl_queue_space(const struct iwl_queue *q);
@@ -282,12 +363,9 @@ static inline void iwl_wake_queue(struct iwl_trans *trans,
282 struct iwl_trans_pcie *trans_pcie = 363 struct iwl_trans_pcie *trans_pcie =
283 IWL_TRANS_GET_PCIE_TRANS(trans); 364 IWL_TRANS_GET_PCIE_TRANS(trans);
284 365
285 if (unlikely(!trans->shrd->mac80211_registered))
286 return;
287
288 if (test_and_clear_bit(hwq, trans_pcie->queue_stopped)) 366 if (test_and_clear_bit(hwq, trans_pcie->queue_stopped))
289 if (atomic_dec_return(&trans_pcie->queue_stop_count[ac]) <= 0) 367 if (atomic_dec_return(&trans_pcie->queue_stop_count[ac]) <= 0)
290 ieee80211_wake_queue(trans->shrd->hw, ac); 368 iwl_wake_sw_queue(priv(trans), ac);
291} 369}
292 370
293static inline void iwl_stop_queue(struct iwl_trans *trans, 371static inline void iwl_stop_queue(struct iwl_trans *trans,
@@ -299,12 +377,9 @@ static inline void iwl_stop_queue(struct iwl_trans *trans,
299 struct iwl_trans_pcie *trans_pcie = 377 struct iwl_trans_pcie *trans_pcie =
300 IWL_TRANS_GET_PCIE_TRANS(trans); 378 IWL_TRANS_GET_PCIE_TRANS(trans);
301 379
302 if (unlikely(!trans->shrd->mac80211_registered))
303 return;
304
305 if (!test_and_set_bit(hwq, trans_pcie->queue_stopped)) 380 if (!test_and_set_bit(hwq, trans_pcie->queue_stopped))
306 if (atomic_inc_return(&trans_pcie->queue_stop_count[ac]) > 0) 381 if (atomic_inc_return(&trans_pcie->queue_stop_count[ac]) > 0)
307 ieee80211_stop_queue(trans->shrd->hw, ac); 382 iwl_stop_sw_queue(priv(trans), ac);
308} 383}
309 384
310#ifdef ieee80211_stop_queue 385#ifdef ieee80211_stop_queue
@@ -343,4 +418,19 @@ static inline u8 get_cmd_index(struct iwl_queue *q, u32 index)
343 return index & (q->n_window - 1); 418 return index & (q->n_window - 1);
344} 419}
345 420
421#define IWL_TX_FIFO_BK 0 /* shared */
422#define IWL_TX_FIFO_BE 1
423#define IWL_TX_FIFO_VI 2 /* shared */
424#define IWL_TX_FIFO_VO 3
425#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK
426#define IWL_TX_FIFO_BE_IPAN 4
427#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI
428#define IWL_TX_FIFO_VO_IPAN 5
429/* re-uses the VO FIFO, uCode will properly flush/schedule */
430#define IWL_TX_FIFO_AUX 5
431#define IWL_TX_FIFO_UNUSED -1
432
433/* AUX (TX during scan dwell) queue */
434#define IWL_AUX_QUEUE 10
435
346#endif /* __iwl_trans_int_pcie_h__ */ 436#endif /* __iwl_trans_int_pcie_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c
index 2d0ddb8d422d..3ef9eac02ff4 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans-rx-pcie.c
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-rx.c
@@ -30,12 +30,11 @@
30#include <linux/wait.h> 30#include <linux/wait.h>
31#include <linux/gfp.h> 31#include <linux/gfp.h>
32 32
33#include "iwl-dev.h" 33/*TODO: Remove include to iwl-core.h*/
34#include "iwl-agn.h"
35#include "iwl-core.h" 34#include "iwl-core.h"
36#include "iwl-io.h" 35#include "iwl-io.h"
37#include "iwl-helpers.h" 36#include "iwl-helpers.h"
38#include "iwl-trans-int-pcie.h" 37#include "iwl-trans-pcie-int.h"
39 38
40/****************************************************************************** 39/******************************************************************************
41 * 40 *
@@ -373,12 +372,15 @@ static void iwl_rx_handle(struct iwl_trans *trans)
373 struct iwl_trans_pcie *trans_pcie = 372 struct iwl_trans_pcie *trans_pcie =
374 IWL_TRANS_GET_PCIE_TRANS(trans); 373 IWL_TRANS_GET_PCIE_TRANS(trans);
375 struct iwl_rx_queue *rxq = &trans_pcie->rxq; 374 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
375 struct iwl_tx_queue *txq = &trans_pcie->txq[trans->shrd->cmd_queue];
376 struct iwl_device_cmd *cmd;
376 u32 r, i; 377 u32 r, i;
377 int reclaim; 378 int reclaim;
378 unsigned long flags; 379 unsigned long flags;
379 u8 fill_rx = 0; 380 u8 fill_rx = 0;
380 u32 count = 8; 381 u32 count = 8;
381 int total_empty; 382 int total_empty;
383 int index, cmd_index;
382 384
383 /* uCode's read index (stored in shared DRAM) indicates the last Rx 385 /* uCode's read index (stored in shared DRAM) indicates the last Rx
384 * buffer that the driver may process (last buffer filled by ucode). */ 386 * buffer that the driver may process (last buffer filled by ucode). */
@@ -398,7 +400,8 @@ static void iwl_rx_handle(struct iwl_trans *trans)
398 fill_rx = 1; 400 fill_rx = 1;
399 401
400 while (i != r) { 402 while (i != r) {
401 int len; 403 int len, err;
404 u16 txq_id, sequence;
402 405
403 rxb = rxq->queue[i]; 406 rxb = rxq->queue[i];
404 407
@@ -438,7 +441,24 @@ static void iwl_rx_handle(struct iwl_trans *trans)
438 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && 441 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
439 (pkt->hdr.cmd != REPLY_TX); 442 (pkt->hdr.cmd != REPLY_TX);
440 443
441 iwl_rx_dispatch(priv(trans), rxb); 444 sequence = le16_to_cpu(pkt->hdr.sequence);
445 index = SEQ_TO_INDEX(sequence);
446 cmd_index = get_cmd_index(&txq->q, index);
447
448 if (reclaim)
449 cmd = txq->cmd[cmd_index];
450 else
451 cmd = NULL;
452
453 /* warn if this is cmd response / notification and the uCode
454 * didn't set the SEQ_RX_FRAME for a frame that is
455 * uCode-originated*/
456 WARN(txq_id == trans->shrd->cmd_queue && reclaim == false &&
457 (!(pkt->hdr.sequence & SEQ_RX_FRAME)),
458 "reclaim is false, SEQ_RX_FRAME unset: %s\n",
459 get_cmd_string(pkt->hdr.cmd));
460
461 err = iwl_rx_dispatch(priv(trans), rxb, cmd);
442 462
443 /* 463 /*
444 * XXX: After here, we should always check rxb->page 464 * XXX: After here, we should always check rxb->page
@@ -453,7 +473,7 @@ static void iwl_rx_handle(struct iwl_trans *trans)
453 * iwl_trans_send_cmd() 473 * iwl_trans_send_cmd()
454 * as we reclaim the driver command queue */ 474 * as we reclaim the driver command queue */
455 if (rxb->page) 475 if (rxb->page)
456 iwl_tx_cmd_complete(priv(trans), rxb); 476 iwl_tx_cmd_complete(trans, rxb, err);
457 else 477 else
458 IWL_WARN(trans, "Claim null rxb?\n"); 478 IWL_WARN(trans, "Claim null rxb?\n");
459 } 479 }
@@ -646,7 +666,7 @@ static void iwl_irq_handle_error(struct iwl_trans *trans)
646 */ 666 */
647 clear_bit(STATUS_READY, &trans->shrd->status); 667 clear_bit(STATUS_READY, &trans->shrd->status);
648 clear_bit(STATUS_HCMD_ACTIVE, &trans->shrd->status); 668 clear_bit(STATUS_HCMD_ACTIVE, &trans->shrd->status);
649 wake_up_interruptible(&priv->wait_command_queue); 669 wake_up(&priv->shrd->wait_command_queue);
650 IWL_ERR(trans, "RF is used by WiMAX\n"); 670 IWL_ERR(trans, "RF is used by WiMAX\n");
651 return; 671 return;
652 } 672 }
@@ -660,8 +680,7 @@ static void iwl_irq_handle_error(struct iwl_trans *trans)
660 iwl_dump_nic_event_log(trans, false, NULL, false); 680 iwl_dump_nic_event_log(trans, false, NULL, false);
661#ifdef CONFIG_IWLWIFI_DEBUG 681#ifdef CONFIG_IWLWIFI_DEBUG
662 if (iwl_get_debug_level(trans->shrd) & IWL_DL_FW_ERRORS) 682 if (iwl_get_debug_level(trans->shrd) & IWL_DL_FW_ERRORS)
663 iwl_print_rx_config_cmd(priv, 683 iwl_print_rx_config_cmd(priv(trans), IWL_RXON_CTX_BSS);
664 &priv->contexts[IWL_RXON_CTX_BSS]);
665#endif 684#endif
666 685
667 iwlagn_fw_error(priv, false); 686 iwlagn_fw_error(priv, false);
@@ -705,18 +724,18 @@ static int iwl_print_event_log(struct iwl_trans *trans, u32 start_idx,
705 ptr = base + EVENT_START_OFFSET + (start_idx * event_size); 724 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
706 725
707 /* Make sure device is powered up for SRAM reads */ 726 /* Make sure device is powered up for SRAM reads */
708 spin_lock_irqsave(&bus(priv)->reg_lock, reg_flags); 727 spin_lock_irqsave(&bus(trans)->reg_lock, reg_flags);
709 iwl_grab_nic_access(bus(priv)); 728 iwl_grab_nic_access(bus(trans));
710 729
711 /* Set starting address; reads will auto-increment */ 730 /* Set starting address; reads will auto-increment */
712 iwl_write32(bus(priv), HBUS_TARG_MEM_RADDR, ptr); 731 iwl_write32(bus(trans), HBUS_TARG_MEM_RADDR, ptr);
713 rmb(); 732 rmb();
714 733
715 /* "time" is actually "data" for mode 0 (no timestamp). 734 /* "time" is actually "data" for mode 0 (no timestamp).
716 * place event id # at far right for easier visual parsing. */ 735 * place event id # at far right for easier visual parsing. */
717 for (i = 0; i < num_events; i++) { 736 for (i = 0; i < num_events; i++) {
718 ev = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); 737 ev = iwl_read32(bus(trans), HBUS_TARG_MEM_RDAT);
719 time = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); 738 time = iwl_read32(bus(trans), HBUS_TARG_MEM_RDAT);
720 if (mode == 0) { 739 if (mode == 0) {
721 /* data, ev */ 740 /* data, ev */
722 if (bufsz) { 741 if (bufsz) {
@@ -730,7 +749,7 @@ static int iwl_print_event_log(struct iwl_trans *trans, u32 start_idx,
730 time, ev); 749 time, ev);
731 } 750 }
732 } else { 751 } else {
733 data = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT); 752 data = iwl_read32(bus(trans), HBUS_TARG_MEM_RDAT);
734 if (bufsz) { 753 if (bufsz) {
735 pos += scnprintf(*buf + pos, bufsz - pos, 754 pos += scnprintf(*buf + pos, bufsz - pos,
736 "EVT_LOGT:%010u:0x%08x:%04u\n", 755 "EVT_LOGT:%010u:0x%08x:%04u\n",
@@ -745,8 +764,8 @@ static int iwl_print_event_log(struct iwl_trans *trans, u32 start_idx,
745 } 764 }
746 765
747 /* Allow device to power down */ 766 /* Allow device to power down */
748 iwl_release_nic_access(bus(priv)); 767 iwl_release_nic_access(bus(trans));
749 spin_unlock_irqrestore(&bus(priv)->reg_lock, reg_flags); 768 spin_unlock_irqrestore(&bus(trans)->reg_lock, reg_flags);
750 return pos; 769 return pos;
751} 770}
752 771
@@ -823,10 +842,10 @@ int iwl_dump_nic_event_log(struct iwl_trans *trans, bool full_log,
823 } 842 }
824 843
825 /* event log header */ 844 /* event log header */
826 capacity = iwl_read_targ_mem(bus(priv), base); 845 capacity = iwl_read_targ_mem(bus(trans), base);
827 mode = iwl_read_targ_mem(bus(priv), base + (1 * sizeof(u32))); 846 mode = iwl_read_targ_mem(bus(trans), base + (1 * sizeof(u32)));
828 num_wraps = iwl_read_targ_mem(bus(priv), base + (2 * sizeof(u32))); 847 num_wraps = iwl_read_targ_mem(bus(trans), base + (2 * sizeof(u32)));
829 next_entry = iwl_read_targ_mem(bus(priv), base + (3 * sizeof(u32))); 848 next_entry = iwl_read_targ_mem(bus(trans), base + (3 * sizeof(u32)));
830 849
831 if (capacity > logsize) { 850 if (capacity > logsize) {
832 IWL_ERR(trans, "Log capacity %d is bogus, limit to %d " 851 IWL_ERR(trans, "Log capacity %d is bogus, limit to %d "
@@ -848,9 +867,6 @@ int iwl_dump_nic_event_log(struct iwl_trans *trans, bool full_log,
848 return pos; 867 return pos;
849 } 868 }
850 869
851 /* enable/disable bt channel inhibition */
852 priv->bt_ch_announce = iwlagn_mod_params.bt_ch_announce;
853
854#ifdef CONFIG_IWLWIFI_DEBUG 870#ifdef CONFIG_IWLWIFI_DEBUG
855 if (!(iwl_get_debug_level(trans->shrd) & IWL_DL_FW_ERRORS) && !full_log) 871 if (!(iwl_get_debug_level(trans->shrd) & IWL_DL_FW_ERRORS) && !full_log)
856 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES) 872 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
@@ -908,8 +924,7 @@ void iwl_irq_tasklet(struct iwl_trans *trans)
908 u32 inta_mask; 924 u32 inta_mask;
909#endif 925#endif
910 926
911 struct iwl_trans_pcie *trans_pcie = 927 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
912 IWL_TRANS_GET_PCIE_TRANS(trans);
913 struct isr_statistics *isr_stats = &trans_pcie->isr_stats; 928 struct isr_statistics *isr_stats = &trans_pcie->isr_stats;
914 929
915 930
@@ -1003,8 +1018,7 @@ void iwl_irq_tasklet(struct iwl_trans *trans)
1003 else 1018 else
1004 clear_bit(STATUS_RF_KILL_HW, 1019 clear_bit(STATUS_RF_KILL_HW,
1005 &trans->shrd->status); 1020 &trans->shrd->status);
1006 wiphy_rfkill_set_hw_state(priv(trans)->hw->wiphy, 1021 iwl_set_hw_rfkill_state(priv(trans), hw_rf_kill);
1007 hw_rf_kill);
1008 } 1022 }
1009 1023
1010 handled |= CSR_INT_BIT_RF_KILL; 1024 handled |= CSR_INT_BIT_RF_KILL;
@@ -1093,7 +1107,7 @@ void iwl_irq_tasklet(struct iwl_trans *trans)
1093 handled |= CSR_INT_BIT_FH_TX; 1107 handled |= CSR_INT_BIT_FH_TX;
1094 /* Wake up uCode load routine, now that load is complete */ 1108 /* Wake up uCode load routine, now that load is complete */
1095 priv(trans)->ucode_write_complete = 1; 1109 priv(trans)->ucode_write_complete = 1;
1096 wake_up_interruptible(&priv(trans)->wait_command_queue); 1110 wake_up(&trans->shrd->wait_command_queue);
1097 } 1111 }
1098 1112
1099 if (inta & ~handled) { 1113 if (inta & ~handled) {
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c
index 5dd6a6d1dfd7..ee7059dcbbcb 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans-tx-pcie.c
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie-tx.c
@@ -30,12 +30,18 @@
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include <linux/sched.h> 31#include <linux/sched.h>
32 32
33#include "iwl-agn.h" 33/* TODO: remove include to iwl-dev.h */
34#include "iwl-dev.h" 34#include "iwl-dev.h"
35#include "iwl-core.h" 35#include "iwl-debug.h"
36#include "iwl-csr.h"
37#include "iwl-prph.h"
36#include "iwl-io.h" 38#include "iwl-io.h"
39#include "iwl-agn-hw.h"
37#include "iwl-helpers.h" 40#include "iwl-helpers.h"
38#include "iwl-trans-int-pcie.h" 41#include "iwl-trans-pcie-int.h"
42
43#define IWL_TX_CRC_SIZE 4
44#define IWL_TX_DELIMITER_SIZE 4
39 45
40/** 46/**
41 * iwl_trans_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array 47 * iwl_trans_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
@@ -53,13 +59,15 @@ void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_trans *trans,
53 u8 sta_id = 0; 59 u8 sta_id = 0;
54 u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE; 60 u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
55 __le16 bc_ent; 61 __le16 bc_ent;
62 struct iwl_tx_cmd *tx_cmd =
63 (struct iwl_tx_cmd *) txq->cmd[txq->q.write_ptr]->payload;
56 64
57 scd_bc_tbl = trans_pcie->scd_bc_tbls.addr; 65 scd_bc_tbl = trans_pcie->scd_bc_tbls.addr;
58 66
59 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX); 67 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
60 68
61 sta_id = txq->cmd[txq->q.write_ptr]->cmd.tx.sta_id; 69 sta_id = tx_cmd->sta_id;
62 sec_ctl = txq->cmd[txq->q.write_ptr]->cmd.tx.sec_ctl; 70 sec_ctl = tx_cmd->sec_ctl;
63 71
64 switch (sec_ctl & TX_CMD_SEC_MSK) { 72 switch (sec_ctl & TX_CMD_SEC_MSK) {
65 case TX_CMD_SEC_CCM: 73 case TX_CMD_SEC_CCM:
@@ -201,17 +209,17 @@ static void iwlagn_unmap_tfd(struct iwl_trans *trans, struct iwl_cmd_meta *meta,
201 * @trans - transport private data 209 * @trans - transport private data
202 * @txq - tx queue 210 * @txq - tx queue
203 * @index - the index of the TFD to be freed 211 * @index - the index of the TFD to be freed
212 *@dma_dir - the direction of the DMA mapping
204 * 213 *
205 * Does NOT advance any TFD circular buffer read/write indexes 214 * Does NOT advance any TFD circular buffer read/write indexes
206 * Does NOT free the TFD itself (which is within circular buffer) 215 * Does NOT free the TFD itself (which is within circular buffer)
207 */ 216 */
208void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq, 217void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq,
209 int index) 218 int index, enum dma_data_direction dma_dir)
210{ 219{
211 struct iwl_tfd *tfd_tmp = txq->tfds; 220 struct iwl_tfd *tfd_tmp = txq->tfds;
212 221
213 iwlagn_unmap_tfd(trans, &txq->meta[index], &tfd_tmp[index], 222 iwlagn_unmap_tfd(trans, &txq->meta[index], &tfd_tmp[index], dma_dir);
214 DMA_TO_DEVICE);
215 223
216 /* free SKB */ 224 /* free SKB */
217 if (txq->skbs) { 225 if (txq->skbs) {
@@ -219,9 +227,12 @@ void iwlagn_txq_free_tfd(struct iwl_trans *trans, struct iwl_tx_queue *txq,
219 227
220 skb = txq->skbs[index]; 228 skb = txq->skbs[index];
221 229
222 /* can be called from irqs-disabled context */ 230 /* Can be called from irqs-disabled context
231 * If skb is not NULL, it means that the whole queue is being
232 * freed and that the queue is not empty - free the skb
233 */
223 if (skb) { 234 if (skb) {
224 dev_kfree_skb_any(skb); 235 iwl_free_skb(priv(trans), skb);
225 txq->skbs[index] = NULL; 236 txq->skbs[index] = NULL;
226 } 237 }
227 } 238 }
@@ -344,11 +355,13 @@ static void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_trans *trans,
344 int read_ptr = txq->q.read_ptr; 355 int read_ptr = txq->q.read_ptr;
345 u8 sta_id = 0; 356 u8 sta_id = 0;
346 __le16 bc_ent; 357 __le16 bc_ent;
358 struct iwl_tx_cmd *tx_cmd =
359 (struct iwl_tx_cmd *) txq->cmd[txq->q.read_ptr]->payload;
347 360
348 WARN_ON(read_ptr >= TFD_QUEUE_SIZE_MAX); 361 WARN_ON(read_ptr >= TFD_QUEUE_SIZE_MAX);
349 362
350 if (txq_id != trans->shrd->cmd_queue) 363 if (txq_id != trans->shrd->cmd_queue)
351 sta_id = txq->cmd[read_ptr]->cmd.tx.sta_id; 364 sta_id = tx_cmd->sta_id;
352 365
353 bc_ent = cpu_to_le16(1 | (sta_id << 12)); 366 bc_ent = cpu_to_le16(1 | (sta_id << 12));
354 scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent; 367 scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent;
@@ -535,8 +548,7 @@ int iwl_trans_pcie_tx_agg_alloc(struct iwl_trans *trans,
535 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); 548 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
536 struct iwl_tid_data *tid_data; 549 struct iwl_tid_data *tid_data;
537 unsigned long flags; 550 unsigned long flags;
538 u16 txq_id; 551 int txq_id;
539 struct iwl_priv *priv = priv(trans);
540 552
541 txq_id = iwlagn_txq_ctx_activate_free(trans); 553 txq_id = iwlagn_txq_ctx_activate_free(trans);
542 if (txq_id == -1) { 554 if (txq_id == -1) {
@@ -560,7 +572,7 @@ int iwl_trans_pcie_tx_agg_alloc(struct iwl_trans *trans,
560 "queue\n", tid_data->tfds_in_queue); 572 "queue\n", tid_data->tfds_in_queue);
561 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA; 573 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
562 } 574 }
563 spin_unlock_irqrestore(&priv->shrd->sta_lock, flags); 575 spin_unlock_irqrestore(&trans->shrd->sta_lock, flags);
564 576
565 return 0; 577 return 0;
566} 578}
@@ -754,8 +766,6 @@ static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
754 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */ 766 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
755 if (cmd->flags & CMD_WANT_SKB) 767 if (cmd->flags & CMD_WANT_SKB)
756 out_meta->source = cmd; 768 out_meta->source = cmd;
757 if (cmd->flags & CMD_ASYNC)
758 out_meta->callback = cmd->callback;
759 769
760 /* set up the header */ 770 /* set up the header */
761 771
@@ -767,7 +777,7 @@ static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
767 777
768 /* and copy the data that needs to be copied */ 778 /* and copy the data that needs to be copied */
769 779
770 cmd_dest = &out_cmd->cmd.payload[0]; 780 cmd_dest = out_cmd->payload;
771 for (i = 0; i < IWL_MAX_CMD_TFDS; i++) { 781 for (i = 0; i < IWL_MAX_CMD_TFDS; i++) {
772 if (!cmd->len[i]) 782 if (!cmd->len[i])
773 continue; 783 continue;
@@ -856,16 +866,16 @@ static int iwl_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
856 * need to be reclaimed. As result, some free space forms. If there is 866 * need to be reclaimed. As result, some free space forms. If there is
857 * enough free space (> low mark), wake the stack that feeds us. 867 * enough free space (> low mark), wake the stack that feeds us.
858 */ 868 */
859static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, int idx) 869static void iwl_hcmd_queue_reclaim(struct iwl_trans *trans, int txq_id,
870 int idx)
860{ 871{
861 struct iwl_trans_pcie *trans_pcie = 872 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
862 IWL_TRANS_GET_PCIE_TRANS(trans(priv));
863 struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id]; 873 struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id];
864 struct iwl_queue *q = &txq->q; 874 struct iwl_queue *q = &txq->q;
865 int nfreed = 0; 875 int nfreed = 0;
866 876
867 if ((idx >= q->n_bd) || (iwl_queue_used(q, idx) == 0)) { 877 if ((idx >= q->n_bd) || (iwl_queue_used(q, idx) == 0)) {
868 IWL_ERR(priv, "%s: Read index for DMA queue txq id (%d), " 878 IWL_ERR(trans, "%s: Read index for DMA queue txq id (%d), "
869 "index %d is out of range [0-%d] %d %d.\n", __func__, 879 "index %d is out of range [0-%d] %d %d.\n", __func__,
870 txq_id, idx, q->n_bd, q->write_ptr, q->read_ptr); 880 txq_id, idx, q->n_bd, q->write_ptr, q->read_ptr);
871 return; 881 return;
@@ -875,9 +885,9 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, int idx)
875 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { 885 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
876 886
877 if (nfreed++ > 0) { 887 if (nfreed++ > 0) {
878 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", idx, 888 IWL_ERR(trans, "HCMD skipped: index (%d) %d %d\n", idx,
879 q->write_ptr, q->read_ptr); 889 q->write_ptr, q->read_ptr);
880 iwlagn_fw_error(priv, false); 890 iwlagn_fw_error(priv(trans), false);
881 } 891 }
882 892
883 } 893 }
@@ -886,12 +896,15 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id, int idx)
886/** 896/**
887 * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them 897 * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
888 * @rxb: Rx buffer to reclaim 898 * @rxb: Rx buffer to reclaim
899 * @handler_status: return value of the handler of the command
900 * (put in setup_rx_handlers)
889 * 901 *
890 * If an Rx buffer has an async callback associated with it the callback 902 * If an Rx buffer has an async callback associated with it the callback
891 * will be executed. The attached skb (if present) will only be freed 903 * will be executed. The attached skb (if present) will only be freed
892 * if the callback returns 1 904 * if the callback returns 1
893 */ 905 */
894void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) 906void iwl_tx_cmd_complete(struct iwl_trans *trans, struct iwl_rx_mem_buffer *rxb,
907 int handler_status)
895{ 908{
896 struct iwl_rx_packet *pkt = rxb_addr(rxb); 909 struct iwl_rx_packet *pkt = rxb_addr(rxb);
897 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 910 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
@@ -900,7 +913,6 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
900 int cmd_index; 913 int cmd_index;
901 struct iwl_device_cmd *cmd; 914 struct iwl_device_cmd *cmd;
902 struct iwl_cmd_meta *meta; 915 struct iwl_cmd_meta *meta;
903 struct iwl_trans *trans = trans(priv);
904 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); 916 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
905 struct iwl_tx_queue *txq = &trans_pcie->txq[trans->shrd->cmd_queue]; 917 struct iwl_tx_queue *txq = &trans_pcie->txq[trans->shrd->cmd_queue];
906 unsigned long flags; 918 unsigned long flags;
@@ -913,7 +925,7 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
913 txq_id, trans->shrd->cmd_queue, sequence, 925 txq_id, trans->shrd->cmd_queue, sequence,
914 trans_pcie->txq[trans->shrd->cmd_queue].q.read_ptr, 926 trans_pcie->txq[trans->shrd->cmd_queue].q.read_ptr,
915 trans_pcie->txq[trans->shrd->cmd_queue].q.write_ptr)) { 927 trans_pcie->txq[trans->shrd->cmd_queue].q.write_ptr)) {
916 iwl_print_hex_error(priv, pkt, 32); 928 iwl_print_hex_error(trans, pkt, 32);
917 return; 929 return;
918 } 930 }
919 931
@@ -921,25 +933,27 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
921 cmd = txq->cmd[cmd_index]; 933 cmd = txq->cmd[cmd_index];
922 meta = &txq->meta[cmd_index]; 934 meta = &txq->meta[cmd_index];
923 935
936 txq->time_stamp = jiffies;
937
924 iwlagn_unmap_tfd(trans, meta, &txq->tfds[index], 938 iwlagn_unmap_tfd(trans, meta, &txq->tfds[index],
925 DMA_BIDIRECTIONAL); 939 DMA_BIDIRECTIONAL);
926 940
927 /* Input error checking is done when commands are added to queue. */ 941 /* Input error checking is done when commands are added to queue. */
928 if (meta->flags & CMD_WANT_SKB) { 942 if (meta->flags & CMD_WANT_SKB) {
929 meta->source->reply_page = (unsigned long)rxb_addr(rxb); 943 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
944 meta->source->handler_status = handler_status;
930 rxb->page = NULL; 945 rxb->page = NULL;
931 } else if (meta->callback) 946 }
932 meta->callback(priv, cmd, pkt);
933 947
934 spin_lock_irqsave(&trans->hcmd_lock, flags); 948 spin_lock_irqsave(&trans->hcmd_lock, flags);
935 949
936 iwl_hcmd_queue_reclaim(priv, txq_id, index); 950 iwl_hcmd_queue_reclaim(trans, txq_id, index);
937 951
938 if (!(meta->flags & CMD_ASYNC)) { 952 if (!(meta->flags & CMD_ASYNC)) {
939 clear_bit(STATUS_HCMD_ACTIVE, &trans->shrd->status); 953 clear_bit(STATUS_HCMD_ACTIVE, &trans->shrd->status);
940 IWL_DEBUG_INFO(trans, "Clearing HCMD_ACTIVE for command %s\n", 954 IWL_DEBUG_INFO(trans, "Clearing HCMD_ACTIVE for command %s\n",
941 get_cmd_string(cmd->hdr.cmd)); 955 get_cmd_string(cmd->hdr.cmd));
942 wake_up_interruptible(&priv->wait_command_queue); 956 wake_up(&trans->shrd->wait_command_queue);
943 } 957 }
944 958
945 meta->flags = 0; 959 meta->flags = 0;
@@ -947,114 +961,8 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
947 spin_unlock_irqrestore(&trans->hcmd_lock, flags); 961 spin_unlock_irqrestore(&trans->hcmd_lock, flags);
948} 962}
949 963
950const char *get_cmd_string(u8 cmd)
951{
952 switch (cmd) {
953 IWL_CMD(REPLY_ALIVE);
954 IWL_CMD(REPLY_ERROR);
955 IWL_CMD(REPLY_RXON);
956 IWL_CMD(REPLY_RXON_ASSOC);
957 IWL_CMD(REPLY_QOS_PARAM);
958 IWL_CMD(REPLY_RXON_TIMING);
959 IWL_CMD(REPLY_ADD_STA);
960 IWL_CMD(REPLY_REMOVE_STA);
961 IWL_CMD(REPLY_REMOVE_ALL_STA);
962 IWL_CMD(REPLY_TXFIFO_FLUSH);
963 IWL_CMD(REPLY_WEPKEY);
964 IWL_CMD(REPLY_TX);
965 IWL_CMD(REPLY_LEDS_CMD);
966 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
967 IWL_CMD(COEX_PRIORITY_TABLE_CMD);
968 IWL_CMD(COEX_MEDIUM_NOTIFICATION);
969 IWL_CMD(COEX_EVENT_CMD);
970 IWL_CMD(REPLY_QUIET_CMD);
971 IWL_CMD(REPLY_CHANNEL_SWITCH);
972 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
973 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
974 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
975 IWL_CMD(POWER_TABLE_CMD);
976 IWL_CMD(PM_SLEEP_NOTIFICATION);
977 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
978 IWL_CMD(REPLY_SCAN_CMD);
979 IWL_CMD(REPLY_SCAN_ABORT_CMD);
980 IWL_CMD(SCAN_START_NOTIFICATION);
981 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
982 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
983 IWL_CMD(BEACON_NOTIFICATION);
984 IWL_CMD(REPLY_TX_BEACON);
985 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
986 IWL_CMD(QUIET_NOTIFICATION);
987 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
988 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
989 IWL_CMD(REPLY_BT_CONFIG);
990 IWL_CMD(REPLY_STATISTICS_CMD);
991 IWL_CMD(STATISTICS_NOTIFICATION);
992 IWL_CMD(REPLY_CARD_STATE_CMD);
993 IWL_CMD(CARD_STATE_NOTIFICATION);
994 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
995 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
996 IWL_CMD(SENSITIVITY_CMD);
997 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
998 IWL_CMD(REPLY_RX_PHY_CMD);
999 IWL_CMD(REPLY_RX_MPDU_CMD);
1000 IWL_CMD(REPLY_RX);
1001 IWL_CMD(REPLY_COMPRESSED_BA);
1002 IWL_CMD(CALIBRATION_CFG_CMD);
1003 IWL_CMD(CALIBRATION_RES_NOTIFICATION);
1004 IWL_CMD(CALIBRATION_COMPLETE_NOTIFICATION);
1005 IWL_CMD(REPLY_TX_POWER_DBM_CMD);
1006 IWL_CMD(TEMPERATURE_NOTIFICATION);
1007 IWL_CMD(TX_ANT_CONFIGURATION_CMD);
1008 IWL_CMD(REPLY_BT_COEX_PROFILE_NOTIF);
1009 IWL_CMD(REPLY_BT_COEX_PRIO_TABLE);
1010 IWL_CMD(REPLY_BT_COEX_PROT_ENV);
1011 IWL_CMD(REPLY_WIPAN_PARAMS);
1012 IWL_CMD(REPLY_WIPAN_RXON);
1013 IWL_CMD(REPLY_WIPAN_RXON_TIMING);
1014 IWL_CMD(REPLY_WIPAN_RXON_ASSOC);
1015 IWL_CMD(REPLY_WIPAN_QOS_PARAM);
1016 IWL_CMD(REPLY_WIPAN_WEPKEY);
1017 IWL_CMD(REPLY_WIPAN_P2P_CHANNEL_SWITCH);
1018 IWL_CMD(REPLY_WIPAN_NOA_NOTIFICATION);
1019 IWL_CMD(REPLY_WIPAN_DEACTIVATION_COMPLETE);
1020 IWL_CMD(REPLY_WOWLAN_PATTERNS);
1021 IWL_CMD(REPLY_WOWLAN_WAKEUP_FILTER);
1022 IWL_CMD(REPLY_WOWLAN_TSC_RSC_PARAMS);
1023 IWL_CMD(REPLY_WOWLAN_TKIP_PARAMS);
1024 IWL_CMD(REPLY_WOWLAN_KEK_KCK_MATERIAL);
1025 IWL_CMD(REPLY_WOWLAN_GET_STATUS);
1026 default:
1027 return "UNKNOWN";
1028
1029 }
1030}
1031
1032#define HOST_COMPLETE_TIMEOUT (2 * HZ) 964#define HOST_COMPLETE_TIMEOUT (2 * HZ)
1033 965
1034static void iwl_generic_cmd_callback(struct iwl_priv *priv,
1035 struct iwl_device_cmd *cmd,
1036 struct iwl_rx_packet *pkt)
1037{
1038 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
1039 IWL_ERR(priv, "Bad return from %s (0x%08X)\n",
1040 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
1041 return;
1042 }
1043
1044#ifdef CONFIG_IWLWIFI_DEBUG
1045 switch (cmd->hdr.cmd) {
1046 case REPLY_TX_LINK_QUALITY_CMD:
1047 case SENSITIVITY_CMD:
1048 IWL_DEBUG_HC_DUMP(priv, "back from %s (0x%08X)\n",
1049 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
1050 break;
1051 default:
1052 IWL_DEBUG_HC(priv, "back from %s (0x%08X)\n",
1053 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
1054 }
1055#endif
1056}
1057
1058static int iwl_send_cmd_async(struct iwl_trans *trans, struct iwl_host_cmd *cmd) 966static int iwl_send_cmd_async(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
1059{ 967{
1060 int ret; 968 int ret;
@@ -1063,9 +971,6 @@ static int iwl_send_cmd_async(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
1063 if (WARN_ON(cmd->flags & CMD_WANT_SKB)) 971 if (WARN_ON(cmd->flags & CMD_WANT_SKB))
1064 return -EINVAL; 972 return -EINVAL;
1065 973
1066 /* Assign a generic callback if one is not provided */
1067 if (!cmd->callback)
1068 cmd->callback = iwl_generic_cmd_callback;
1069 974
1070 if (test_bit(STATUS_EXIT_PENDING, &trans->shrd->status)) 975 if (test_bit(STATUS_EXIT_PENDING, &trans->shrd->status))
1071 return -EBUSY; 976 return -EBUSY;
@@ -1087,10 +992,6 @@ static int iwl_send_cmd_sync(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
1087 992
1088 lockdep_assert_held(&trans->shrd->mutex); 993 lockdep_assert_held(&trans->shrd->mutex);
1089 994
1090 /* A synchronous command can not have a callback set. */
1091 if (WARN_ON(cmd->callback))
1092 return -EINVAL;
1093
1094 IWL_DEBUG_INFO(trans, "Attempting to send sync command %s\n", 995 IWL_DEBUG_INFO(trans, "Attempting to send sync command %s\n",
1095 get_cmd_string(cmd->id)); 996 get_cmd_string(cmd->id));
1096 997
@@ -1107,7 +1008,7 @@ static int iwl_send_cmd_sync(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
1107 return ret; 1008 return ret;
1108 } 1009 }
1109 1010
1110 ret = wait_event_interruptible_timeout(priv(trans)->wait_command_queue, 1011 ret = wait_event_timeout(trans->shrd->wait_command_queue,
1111 !test_bit(STATUS_HCMD_ACTIVE, &trans->shrd->status), 1012 !test_bit(STATUS_HCMD_ACTIVE, &trans->shrd->status),
1112 HOST_COMPLETE_TIMEOUT); 1013 HOST_COMPLETE_TIMEOUT);
1113 if (!ret) { 1014 if (!ret) {
@@ -1174,19 +1075,6 @@ int iwl_trans_pcie_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
1174 return iwl_send_cmd_sync(trans, cmd); 1075 return iwl_send_cmd_sync(trans, cmd);
1175} 1076}
1176 1077
1177int iwl_trans_pcie_send_cmd_pdu(struct iwl_trans *trans, u8 id, u32 flags,
1178 u16 len, const void *data)
1179{
1180 struct iwl_host_cmd cmd = {
1181 .id = id,
1182 .len = { len, },
1183 .data = { data, },
1184 .flags = flags,
1185 };
1186
1187 return iwl_trans_pcie_send_cmd(trans, &cmd);
1188}
1189
1190/* Frees buffers until index _not_ inclusive */ 1078/* Frees buffers until index _not_ inclusive */
1191int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index, 1079int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index,
1192 struct sk_buff_head *skbs) 1080 struct sk_buff_head *skbs)
@@ -1197,6 +1085,10 @@ int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index,
1197 int last_to_free; 1085 int last_to_free;
1198 int freed = 0; 1086 int freed = 0;
1199 1087
1088 /* This function is not meant to release cmd queue*/
1089 if (WARN_ON(txq_id == trans->shrd->cmd_queue))
1090 return 0;
1091
1200 /*Since we free until index _not_ inclusive, the one before index is 1092 /*Since we free until index _not_ inclusive, the one before index is
1201 * the last we will free. This one must be used */ 1093 * the last we will free. This one must be used */
1202 last_to_free = iwl_queue_dec_wrap(index, q->n_bd); 1094 last_to_free = iwl_queue_dec_wrap(index, q->n_bd);
@@ -1229,7 +1121,7 @@ int iwl_tx_queue_reclaim(struct iwl_trans *trans, int txq_id, int index,
1229 1121
1230 iwlagn_txq_inval_byte_cnt_tbl(trans, txq); 1122 iwlagn_txq_inval_byte_cnt_tbl(trans, txq);
1231 1123
1232 iwlagn_txq_free_tfd(trans, txq, txq->q.read_ptr); 1124 iwlagn_txq_free_tfd(trans, txq, txq->q.read_ptr, DMA_TO_DEVICE);
1233 freed++; 1125 freed++;
1234 } 1126 }
1235 return freed; 1127 return freed;
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c
new file mode 100644
index 000000000000..b78ac65b2779
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-trans-pcie.c
@@ -0,0 +1,1986 @@
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63#include <linux/interrupt.h>
64#include <linux/debugfs.h>
65#include <linux/bitops.h>
66#include <linux/gfp.h>
67
68#include "iwl-trans.h"
69#include "iwl-trans-pcie-int.h"
70#include "iwl-csr.h"
71#include "iwl-prph.h"
72#include "iwl-shared.h"
73#include "iwl-eeprom.h"
74#include "iwl-agn-hw.h"
75
76static int iwl_trans_rx_alloc(struct iwl_trans *trans)
77{
78 struct iwl_trans_pcie *trans_pcie =
79 IWL_TRANS_GET_PCIE_TRANS(trans);
80 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
81 struct device *dev = bus(trans)->dev;
82
83 memset(&trans_pcie->rxq, 0, sizeof(trans_pcie->rxq));
84
85 spin_lock_init(&rxq->lock);
86
87 if (WARN_ON(rxq->bd || rxq->rb_stts))
88 return -EINVAL;
89
90 /* Allocate the circular buffer of Read Buffer Descriptors (RBDs) */
91 rxq->bd = dma_alloc_coherent(dev, sizeof(__le32) * RX_QUEUE_SIZE,
92 &rxq->bd_dma, GFP_KERNEL);
93 if (!rxq->bd)
94 goto err_bd;
95 memset(rxq->bd, 0, sizeof(__le32) * RX_QUEUE_SIZE);
96
97 /*Allocate the driver's pointer to receive buffer status */
98 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(*rxq->rb_stts),
99 &rxq->rb_stts_dma, GFP_KERNEL);
100 if (!rxq->rb_stts)
101 goto err_rb_stts;
102 memset(rxq->rb_stts, 0, sizeof(*rxq->rb_stts));
103
104 return 0;
105
106err_rb_stts:
107 dma_free_coherent(dev, sizeof(__le32) * RX_QUEUE_SIZE,
108 rxq->bd, rxq->bd_dma);
109 memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma));
110 rxq->bd = NULL;
111err_bd:
112 return -ENOMEM;
113}
114
115static void iwl_trans_rxq_free_rx_bufs(struct iwl_trans *trans)
116{
117 struct iwl_trans_pcie *trans_pcie =
118 IWL_TRANS_GET_PCIE_TRANS(trans);
119 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
120 int i;
121
122 /* Fill the rx_used queue with _all_ of the Rx buffers */
123 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
124 /* In the reset function, these buffers may have been allocated
125 * to an SKB, so we need to unmap and free potential storage */
126 if (rxq->pool[i].page != NULL) {
127 dma_unmap_page(bus(trans)->dev, rxq->pool[i].page_dma,
128 PAGE_SIZE << hw_params(trans).rx_page_order,
129 DMA_FROM_DEVICE);
130 __free_pages(rxq->pool[i].page,
131 hw_params(trans).rx_page_order);
132 rxq->pool[i].page = NULL;
133 }
134 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
135 }
136}
137
138static void iwl_trans_rx_hw_init(struct iwl_trans *trans,
139 struct iwl_rx_queue *rxq)
140{
141 u32 rb_size;
142 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
143 u32 rb_timeout = RX_RB_TIMEOUT; /* FIXME: RX_RB_TIMEOUT for all devices? */
144
145 if (iwlagn_mod_params.amsdu_size_8K)
146 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
147 else
148 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
149
150 /* Stop Rx DMA */
151 iwl_write_direct32(bus(trans), FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
152
153 /* Reset driver's Rx queue write index */
154 iwl_write_direct32(bus(trans), FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
155
156 /* Tell device where to find RBD circular buffer in DRAM */
157 iwl_write_direct32(bus(trans), FH_RSCSR_CHNL0_RBDCB_BASE_REG,
158 (u32)(rxq->bd_dma >> 8));
159
160 /* Tell device where in DRAM to update its Rx status */
161 iwl_write_direct32(bus(trans), FH_RSCSR_CHNL0_STTS_WPTR_REG,
162 rxq->rb_stts_dma >> 4);
163
164 /* Enable Rx DMA
165 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
166 * the credit mechanism in 5000 HW RX FIFO
167 * Direct rx interrupts to hosts
168 * Rx buffer size 4 or 8k
169 * RB timeout 0x10
170 * 256 RBDs
171 */
172 iwl_write_direct32(bus(trans), FH_MEM_RCSR_CHNL0_CONFIG_REG,
173 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
174 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
175 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
176 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
177 rb_size|
178 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
179 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
180
181 /* Set interrupt coalescing timer to default (2048 usecs) */
182 iwl_write8(bus(trans), CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
183}
184
185static int iwl_rx_init(struct iwl_trans *trans)
186{
187 struct iwl_trans_pcie *trans_pcie =
188 IWL_TRANS_GET_PCIE_TRANS(trans);
189 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
190
191 int i, err;
192 unsigned long flags;
193
194 if (!rxq->bd) {
195 err = iwl_trans_rx_alloc(trans);
196 if (err)
197 return err;
198 }
199
200 spin_lock_irqsave(&rxq->lock, flags);
201 INIT_LIST_HEAD(&rxq->rx_free);
202 INIT_LIST_HEAD(&rxq->rx_used);
203
204 iwl_trans_rxq_free_rx_bufs(trans);
205
206 for (i = 0; i < RX_QUEUE_SIZE; i++)
207 rxq->queue[i] = NULL;
208
209 /* Set us so that we have processed and used all buffers, but have
210 * not restocked the Rx queue with fresh buffers */
211 rxq->read = rxq->write = 0;
212 rxq->write_actual = 0;
213 rxq->free_count = 0;
214 spin_unlock_irqrestore(&rxq->lock, flags);
215
216 iwlagn_rx_replenish(trans);
217
218 iwl_trans_rx_hw_init(trans, rxq);
219
220 spin_lock_irqsave(&trans->shrd->lock, flags);
221 rxq->need_update = 1;
222 iwl_rx_queue_update_write_ptr(trans, rxq);
223 spin_unlock_irqrestore(&trans->shrd->lock, flags);
224
225 return 0;
226}
227
228static void iwl_trans_pcie_rx_free(struct iwl_trans *trans)
229{
230 struct iwl_trans_pcie *trans_pcie =
231 IWL_TRANS_GET_PCIE_TRANS(trans);
232 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
233
234 unsigned long flags;
235
236 /*if rxq->bd is NULL, it means that nothing has been allocated,
237 * exit now */
238 if (!rxq->bd) {
239 IWL_DEBUG_INFO(trans, "Free NULL rx context\n");
240 return;
241 }
242
243 spin_lock_irqsave(&rxq->lock, flags);
244 iwl_trans_rxq_free_rx_bufs(trans);
245 spin_unlock_irqrestore(&rxq->lock, flags);
246
247 dma_free_coherent(bus(trans)->dev, sizeof(__le32) * RX_QUEUE_SIZE,
248 rxq->bd, rxq->bd_dma);
249 memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma));
250 rxq->bd = NULL;
251
252 if (rxq->rb_stts)
253 dma_free_coherent(bus(trans)->dev,
254 sizeof(struct iwl_rb_status),
255 rxq->rb_stts, rxq->rb_stts_dma);
256 else
257 IWL_DEBUG_INFO(trans, "Free rxq->rb_stts which is NULL\n");
258 memset(&rxq->rb_stts_dma, 0, sizeof(rxq->rb_stts_dma));
259 rxq->rb_stts = NULL;
260}
261
262static int iwl_trans_rx_stop(struct iwl_trans *trans)
263{
264
265 /* stop Rx DMA */
266 iwl_write_direct32(bus(trans), FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
267 return iwl_poll_direct_bit(bus(trans), FH_MEM_RSSR_RX_STATUS_REG,
268 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
269}
270
271static inline int iwlagn_alloc_dma_ptr(struct iwl_trans *trans,
272 struct iwl_dma_ptr *ptr, size_t size)
273{
274 if (WARN_ON(ptr->addr))
275 return -EINVAL;
276
277 ptr->addr = dma_alloc_coherent(bus(trans)->dev, size,
278 &ptr->dma, GFP_KERNEL);
279 if (!ptr->addr)
280 return -ENOMEM;
281 ptr->size = size;
282 return 0;
283}
284
285static inline void iwlagn_free_dma_ptr(struct iwl_trans *trans,
286 struct iwl_dma_ptr *ptr)
287{
288 if (unlikely(!ptr->addr))
289 return;
290
291 dma_free_coherent(bus(trans)->dev, ptr->size, ptr->addr, ptr->dma);
292 memset(ptr, 0, sizeof(*ptr));
293}
294
295static int iwl_trans_txq_alloc(struct iwl_trans *trans,
296 struct iwl_tx_queue *txq, int slots_num,
297 u32 txq_id)
298{
299 size_t tfd_sz = sizeof(struct iwl_tfd) * TFD_QUEUE_SIZE_MAX;
300 int i;
301
302 if (WARN_ON(txq->meta || txq->cmd || txq->skbs || txq->tfds))
303 return -EINVAL;
304
305 txq->q.n_window = slots_num;
306
307 txq->meta = kzalloc(sizeof(txq->meta[0]) * slots_num, GFP_KERNEL);
308 txq->cmd = kzalloc(sizeof(txq->cmd[0]) * slots_num, GFP_KERNEL);
309
310 if (!txq->meta || !txq->cmd)
311 goto error;
312
313 if (txq_id == trans->shrd->cmd_queue)
314 for (i = 0; i < slots_num; i++) {
315 txq->cmd[i] = kmalloc(sizeof(struct iwl_device_cmd),
316 GFP_KERNEL);
317 if (!txq->cmd[i])
318 goto error;
319 }
320
321 /* Alloc driver data array and TFD circular buffer */
322 /* Driver private data, only for Tx (not command) queues,
323 * not shared with device. */
324 if (txq_id != trans->shrd->cmd_queue) {
325 txq->skbs = kzalloc(sizeof(txq->skbs[0]) *
326 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
327 if (!txq->skbs) {
328 IWL_ERR(trans, "kmalloc for auxiliary BD "
329 "structures failed\n");
330 goto error;
331 }
332 } else {
333 txq->skbs = NULL;
334 }
335
336 /* Circular buffer of transmit frame descriptors (TFDs),
337 * shared with device */
338 txq->tfds = dma_alloc_coherent(bus(trans)->dev, tfd_sz,
339 &txq->q.dma_addr, GFP_KERNEL);
340 if (!txq->tfds) {
341 IWL_ERR(trans, "dma_alloc_coherent(%zd) failed\n", tfd_sz);
342 goto error;
343 }
344 txq->q.id = txq_id;
345
346 return 0;
347error:
348 kfree(txq->skbs);
349 txq->skbs = NULL;
350 /* since txq->cmd has been zeroed,
351 * all non allocated cmd[i] will be NULL */
352 if (txq->cmd && txq_id == trans->shrd->cmd_queue)
353 for (i = 0; i < slots_num; i++)
354 kfree(txq->cmd[i]);
355 kfree(txq->meta);
356 kfree(txq->cmd);
357 txq->meta = NULL;
358 txq->cmd = NULL;
359
360 return -ENOMEM;
361
362}
363
364static int iwl_trans_txq_init(struct iwl_trans *trans, struct iwl_tx_queue *txq,
365 int slots_num, u32 txq_id)
366{
367 int ret;
368
369 txq->need_update = 0;
370 memset(txq->meta, 0, sizeof(txq->meta[0]) * slots_num);
371
372 /*
373 * For the default queues 0-3, set up the swq_id
374 * already -- all others need to get one later
375 * (if they need one at all).
376 */
377 if (txq_id < 4)
378 iwl_set_swq_id(txq, txq_id, txq_id);
379
380 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
381 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
382 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
383
384 /* Initialize queue's high/low-water marks, and head/tail indexes */
385 ret = iwl_queue_init(&txq->q, TFD_QUEUE_SIZE_MAX, slots_num,
386 txq_id);
387 if (ret)
388 return ret;
389
390 /*
391 * Tell nic where to find circular buffer of Tx Frame Descriptors for
392 * given Tx queue, and enable the DMA channel used for that queue.
393 * Circular buffer (TFD queue in DRAM) physical base address */
394 iwl_write_direct32(bus(trans), FH_MEM_CBBC_QUEUE(txq_id),
395 txq->q.dma_addr >> 8);
396
397 return 0;
398}
399
400/**
401 * iwl_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
402 */
403static void iwl_tx_queue_unmap(struct iwl_trans *trans, int txq_id)
404{
405 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
406 struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id];
407 struct iwl_queue *q = &txq->q;
408 enum dma_data_direction dma_dir;
409
410 if (!q->n_bd)
411 return;
412
413 /* In the command queue, all the TBs are mapped as BIDI
414 * so unmap them as such.
415 */
416 if (txq_id == trans->shrd->cmd_queue)
417 dma_dir = DMA_BIDIRECTIONAL;
418 else
419 dma_dir = DMA_TO_DEVICE;
420
421 while (q->write_ptr != q->read_ptr) {
422 /* The read_ptr needs to bound by q->n_window */
423 iwlagn_txq_free_tfd(trans, txq, get_cmd_index(q, q->read_ptr),
424 dma_dir);
425 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd);
426 }
427}
428
429/**
430 * iwl_tx_queue_free - Deallocate DMA queue.
431 * @txq: Transmit queue to deallocate.
432 *
433 * Empty queue by removing and destroying all BD's.
434 * Free all buffers.
435 * 0-fill, but do not free "txq" descriptor structure.
436 */
437static void iwl_tx_queue_free(struct iwl_trans *trans, int txq_id)
438{
439 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
440 struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id];
441 struct device *dev = bus(trans)->dev;
442 int i;
443 if (WARN_ON(!txq))
444 return;
445
446 iwl_tx_queue_unmap(trans, txq_id);
447
448 /* De-alloc array of command/tx buffers */
449
450 if (txq_id == trans->shrd->cmd_queue)
451 for (i = 0; i < txq->q.n_window; i++)
452 kfree(txq->cmd[i]);
453
454 /* De-alloc circular buffer of TFDs */
455 if (txq->q.n_bd) {
456 dma_free_coherent(dev, sizeof(struct iwl_tfd) *
457 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
458 memset(&txq->q.dma_addr, 0, sizeof(txq->q.dma_addr));
459 }
460
461 /* De-alloc array of per-TFD driver data */
462 kfree(txq->skbs);
463 txq->skbs = NULL;
464
465 /* deallocate arrays */
466 kfree(txq->cmd);
467 kfree(txq->meta);
468 txq->cmd = NULL;
469 txq->meta = NULL;
470
471 /* 0-fill queue descriptor structure */
472 memset(txq, 0, sizeof(*txq));
473}
474
475/**
476 * iwl_trans_tx_free - Free TXQ Context
477 *
478 * Destroy all TX DMA queues and structures
479 */
480static void iwl_trans_pcie_tx_free(struct iwl_trans *trans)
481{
482 int txq_id;
483 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
484
485 /* Tx queues */
486 if (trans_pcie->txq) {
487 for (txq_id = 0;
488 txq_id < hw_params(trans).max_txq_num; txq_id++)
489 iwl_tx_queue_free(trans, txq_id);
490 }
491
492 kfree(trans_pcie->txq);
493 trans_pcie->txq = NULL;
494
495 iwlagn_free_dma_ptr(trans, &trans_pcie->kw);
496
497 iwlagn_free_dma_ptr(trans, &trans_pcie->scd_bc_tbls);
498}
499
500/**
501 * iwl_trans_tx_alloc - allocate TX context
502 * Allocate all Tx DMA structures and initialize them
503 *
504 * @param priv
505 * @return error code
506 */
507static int iwl_trans_tx_alloc(struct iwl_trans *trans)
508{
509 int ret;
510 int txq_id, slots_num;
511 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
512
513 u16 scd_bc_tbls_size = hw_params(trans).max_txq_num *
514 sizeof(struct iwlagn_scd_bc_tbl);
515
516 /*It is not allowed to alloc twice, so warn when this happens.
517 * We cannot rely on the previous allocation, so free and fail */
518 if (WARN_ON(trans_pcie->txq)) {
519 ret = -EINVAL;
520 goto error;
521 }
522
523 ret = iwlagn_alloc_dma_ptr(trans, &trans_pcie->scd_bc_tbls,
524 scd_bc_tbls_size);
525 if (ret) {
526 IWL_ERR(trans, "Scheduler BC Table allocation failed\n");
527 goto error;
528 }
529
530 /* Alloc keep-warm buffer */
531 ret = iwlagn_alloc_dma_ptr(trans, &trans_pcie->kw, IWL_KW_SIZE);
532 if (ret) {
533 IWL_ERR(trans, "Keep Warm allocation failed\n");
534 goto error;
535 }
536
537 trans_pcie->txq = kzalloc(sizeof(struct iwl_tx_queue) *
538 hw_params(trans).max_txq_num, GFP_KERNEL);
539 if (!trans_pcie->txq) {
540 IWL_ERR(trans, "Not enough memory for txq\n");
541 ret = ENOMEM;
542 goto error;
543 }
544
545 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
546 for (txq_id = 0; txq_id < hw_params(trans).max_txq_num; txq_id++) {
547 slots_num = (txq_id == trans->shrd->cmd_queue) ?
548 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
549 ret = iwl_trans_txq_alloc(trans, &trans_pcie->txq[txq_id],
550 slots_num, txq_id);
551 if (ret) {
552 IWL_ERR(trans, "Tx %d queue alloc failed\n", txq_id);
553 goto error;
554 }
555 }
556
557 return 0;
558
559error:
560 iwl_trans_pcie_tx_free(trans);
561
562 return ret;
563}
564static int iwl_tx_init(struct iwl_trans *trans)
565{
566 int ret;
567 int txq_id, slots_num;
568 unsigned long flags;
569 bool alloc = false;
570 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
571
572 if (!trans_pcie->txq) {
573 ret = iwl_trans_tx_alloc(trans);
574 if (ret)
575 goto error;
576 alloc = true;
577 }
578
579 spin_lock_irqsave(&trans->shrd->lock, flags);
580
581 /* Turn off all Tx DMA fifos */
582 iwl_write_prph(bus(trans), SCD_TXFACT, 0);
583
584 /* Tell NIC where to find the "keep warm" buffer */
585 iwl_write_direct32(bus(trans), FH_KW_MEM_ADDR_REG,
586 trans_pcie->kw.dma >> 4);
587
588 spin_unlock_irqrestore(&trans->shrd->lock, flags);
589
590 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
591 for (txq_id = 0; txq_id < hw_params(trans).max_txq_num; txq_id++) {
592 slots_num = (txq_id == trans->shrd->cmd_queue) ?
593 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
594 ret = iwl_trans_txq_init(trans, &trans_pcie->txq[txq_id],
595 slots_num, txq_id);
596 if (ret) {
597 IWL_ERR(trans, "Tx %d queue init failed\n", txq_id);
598 goto error;
599 }
600 }
601
602 return 0;
603error:
604 /*Upon error, free only if we allocated something */
605 if (alloc)
606 iwl_trans_pcie_tx_free(trans);
607 return ret;
608}
609
610static void iwl_set_pwr_vmain(struct iwl_trans *trans)
611{
612/*
613 * (for documentation purposes)
614 * to set power to V_AUX, do:
615
616 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
617 iwl_set_bits_mask_prph(bus(trans), APMG_PS_CTRL_REG,
618 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
619 ~APMG_PS_CTRL_MSK_PWR_SRC);
620 */
621
622 iwl_set_bits_mask_prph(bus(trans), APMG_PS_CTRL_REG,
623 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
624 ~APMG_PS_CTRL_MSK_PWR_SRC);
625}
626
627static int iwl_nic_init(struct iwl_trans *trans)
628{
629 unsigned long flags;
630
631 /* nic_init */
632 spin_lock_irqsave(&trans->shrd->lock, flags);
633 iwl_apm_init(priv(trans));
634
635 /* Set interrupt coalescing calibration timer to default (512 usecs) */
636 iwl_write8(bus(trans), CSR_INT_COALESCING,
637 IWL_HOST_INT_CALIB_TIMEOUT_DEF);
638
639 spin_unlock_irqrestore(&trans->shrd->lock, flags);
640
641 iwl_set_pwr_vmain(trans);
642
643 iwl_nic_config(priv(trans));
644
645 /* Allocate the RX queue, or reset if it is already allocated */
646 iwl_rx_init(trans);
647
648 /* Allocate or reset and init all Tx and Command queues */
649 if (iwl_tx_init(trans))
650 return -ENOMEM;
651
652 if (hw_params(trans).shadow_reg_enable) {
653 /* enable shadow regs in HW */
654 iwl_set_bit(bus(trans), CSR_MAC_SHADOW_REG_CTRL,
655 0x800FFFFF);
656 }
657
658 set_bit(STATUS_INIT, &trans->shrd->status);
659
660 return 0;
661}
662
663#define HW_READY_TIMEOUT (50)
664
665/* Note: returns poll_bit return value, which is >= 0 if success */
666static int iwl_set_hw_ready(struct iwl_trans *trans)
667{
668 int ret;
669
670 iwl_set_bit(bus(trans), CSR_HW_IF_CONFIG_REG,
671 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
672
673 /* See if we got it */
674 ret = iwl_poll_bit(bus(trans), CSR_HW_IF_CONFIG_REG,
675 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
676 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
677 HW_READY_TIMEOUT);
678
679 IWL_DEBUG_INFO(trans, "hardware%s ready\n", ret < 0 ? " not" : "");
680 return ret;
681}
682
683/* Note: returns standard 0/-ERROR code */
684static int iwl_trans_pcie_prepare_card_hw(struct iwl_trans *trans)
685{
686 int ret;
687
688 IWL_DEBUG_INFO(trans, "iwl_trans_prepare_card_hw enter\n");
689
690 ret = iwl_set_hw_ready(trans);
691 if (ret >= 0)
692 return 0;
693
694 /* If HW is not ready, prepare the conditions to check again */
695 iwl_set_bit(bus(trans), CSR_HW_IF_CONFIG_REG,
696 CSR_HW_IF_CONFIG_REG_PREPARE);
697
698 ret = iwl_poll_bit(bus(trans), CSR_HW_IF_CONFIG_REG,
699 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
700 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
701
702 if (ret < 0)
703 return ret;
704
705 /* HW should be ready by now, check again. */
706 ret = iwl_set_hw_ready(trans);
707 if (ret >= 0)
708 return 0;
709 return ret;
710}
711
712#define IWL_AC_UNSET -1
713
714struct queue_to_fifo_ac {
715 s8 fifo, ac;
716};
717
718static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = {
719 { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
720 { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
721 { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
722 { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
723 { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
724 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
725 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
726 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
727 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
728 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
729 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
730};
731
732static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = {
733 { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
734 { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
735 { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
736 { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
737 { IWL_TX_FIFO_BK_IPAN, IEEE80211_AC_BK, },
738 { IWL_TX_FIFO_BE_IPAN, IEEE80211_AC_BE, },
739 { IWL_TX_FIFO_VI_IPAN, IEEE80211_AC_VI, },
740 { IWL_TX_FIFO_VO_IPAN, IEEE80211_AC_VO, },
741 { IWL_TX_FIFO_BE_IPAN, 2, },
742 { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
743 { IWL_TX_FIFO_AUX, IWL_AC_UNSET, },
744};
745
746static const u8 iwlagn_bss_ac_to_fifo[] = {
747 IWL_TX_FIFO_VO,
748 IWL_TX_FIFO_VI,
749 IWL_TX_FIFO_BE,
750 IWL_TX_FIFO_BK,
751};
752static const u8 iwlagn_bss_ac_to_queue[] = {
753 0, 1, 2, 3,
754};
755static const u8 iwlagn_pan_ac_to_fifo[] = {
756 IWL_TX_FIFO_VO_IPAN,
757 IWL_TX_FIFO_VI_IPAN,
758 IWL_TX_FIFO_BE_IPAN,
759 IWL_TX_FIFO_BK_IPAN,
760};
761static const u8 iwlagn_pan_ac_to_queue[] = {
762 7, 6, 5, 4,
763};
764
765static int iwl_trans_pcie_start_device(struct iwl_trans *trans)
766{
767 int ret;
768 struct iwl_trans_pcie *trans_pcie =
769 IWL_TRANS_GET_PCIE_TRANS(trans);
770
771 trans->shrd->ucode_owner = IWL_OWNERSHIP_DRIVER;
772 trans_pcie->ac_to_queue[IWL_RXON_CTX_BSS] = iwlagn_bss_ac_to_queue;
773 trans_pcie->ac_to_queue[IWL_RXON_CTX_PAN] = iwlagn_pan_ac_to_queue;
774
775 trans_pcie->ac_to_fifo[IWL_RXON_CTX_BSS] = iwlagn_bss_ac_to_fifo;
776 trans_pcie->ac_to_fifo[IWL_RXON_CTX_PAN] = iwlagn_pan_ac_to_fifo;
777
778 trans_pcie->mcast_queue[IWL_RXON_CTX_BSS] = 0;
779 trans_pcie->mcast_queue[IWL_RXON_CTX_PAN] = IWL_IPAN_MCAST_QUEUE;
780
781 if ((hw_params(trans).sku & EEPROM_SKU_CAP_AMT_ENABLE) &&
782 iwl_trans_pcie_prepare_card_hw(trans)) {
783 IWL_WARN(trans, "Exit HW not ready\n");
784 return -EIO;
785 }
786
787 /* If platform's RF_KILL switch is NOT set to KILL */
788 if (iwl_read32(bus(trans), CSR_GP_CNTRL) &
789 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
790 clear_bit(STATUS_RF_KILL_HW, &trans->shrd->status);
791 else
792 set_bit(STATUS_RF_KILL_HW, &trans->shrd->status);
793
794 if (iwl_is_rfkill(trans->shrd)) {
795 iwl_set_hw_rfkill_state(priv(trans), true);
796 iwl_enable_interrupts(trans);
797 return -ERFKILL;
798 }
799
800 iwl_write32(bus(trans), CSR_INT, 0xFFFFFFFF);
801
802 ret = iwl_nic_init(trans);
803 if (ret) {
804 IWL_ERR(trans, "Unable to init nic\n");
805 return ret;
806 }
807
808 /* make sure rfkill handshake bits are cleared */
809 iwl_write32(bus(trans), CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
810 iwl_write32(bus(trans), CSR_UCODE_DRV_GP1_CLR,
811 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
812
813 /* clear (again), then enable host interrupts */
814 iwl_write32(bus(trans), CSR_INT, 0xFFFFFFFF);
815 iwl_enable_interrupts(trans);
816
817 /* really make sure rfkill handshake bits are cleared */
818 iwl_write32(bus(trans), CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
819 iwl_write32(bus(trans), CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
820
821 return 0;
822}
823
824/*
825 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
826 * must be called under priv->shrd->lock and mac access
827 */
828static void iwl_trans_txq_set_sched(struct iwl_trans *trans, u32 mask)
829{
830 iwl_write_prph(bus(trans), SCD_TXFACT, mask);
831}
832
833static void iwl_trans_pcie_tx_start(struct iwl_trans *trans)
834{
835 const struct queue_to_fifo_ac *queue_to_fifo;
836 struct iwl_trans_pcie *trans_pcie =
837 IWL_TRANS_GET_PCIE_TRANS(trans);
838 u32 a;
839 unsigned long flags;
840 int i, chan;
841 u32 reg_val;
842
843 spin_lock_irqsave(&trans->shrd->lock, flags);
844
845 trans_pcie->scd_base_addr =
846 iwl_read_prph(bus(trans), SCD_SRAM_BASE_ADDR);
847 a = trans_pcie->scd_base_addr + SCD_CONTEXT_MEM_LOWER_BOUND;
848 /* reset conext data memory */
849 for (; a < trans_pcie->scd_base_addr + SCD_CONTEXT_MEM_UPPER_BOUND;
850 a += 4)
851 iwl_write_targ_mem(bus(trans), a, 0);
852 /* reset tx status memory */
853 for (; a < trans_pcie->scd_base_addr + SCD_TX_STTS_MEM_UPPER_BOUND;
854 a += 4)
855 iwl_write_targ_mem(bus(trans), a, 0);
856 for (; a < trans_pcie->scd_base_addr +
857 SCD_TRANS_TBL_OFFSET_QUEUE(hw_params(trans).max_txq_num);
858 a += 4)
859 iwl_write_targ_mem(bus(trans), a, 0);
860
861 iwl_write_prph(bus(trans), SCD_DRAM_BASE_ADDR,
862 trans_pcie->scd_bc_tbls.dma >> 10);
863
864 /* Enable DMA channel */
865 for (chan = 0; chan < FH_TCSR_CHNL_NUM ; chan++)
866 iwl_write_direct32(bus(trans), FH_TCSR_CHNL_TX_CONFIG_REG(chan),
867 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
868 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
869
870 /* Update FH chicken bits */
871 reg_val = iwl_read_direct32(bus(trans), FH_TX_CHICKEN_BITS_REG);
872 iwl_write_direct32(bus(trans), FH_TX_CHICKEN_BITS_REG,
873 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
874
875 iwl_write_prph(bus(trans), SCD_QUEUECHAIN_SEL,
876 SCD_QUEUECHAIN_SEL_ALL(trans));
877 iwl_write_prph(bus(trans), SCD_AGGR_SEL, 0);
878
879 /* initiate the queues */
880 for (i = 0; i < hw_params(trans).max_txq_num; i++) {
881 iwl_write_prph(bus(trans), SCD_QUEUE_RDPTR(i), 0);
882 iwl_write_direct32(bus(trans), HBUS_TARG_WRPTR, 0 | (i << 8));
883 iwl_write_targ_mem(bus(trans), trans_pcie->scd_base_addr +
884 SCD_CONTEXT_QUEUE_OFFSET(i), 0);
885 iwl_write_targ_mem(bus(trans), trans_pcie->scd_base_addr +
886 SCD_CONTEXT_QUEUE_OFFSET(i) +
887 sizeof(u32),
888 ((SCD_WIN_SIZE <<
889 SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
890 SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
891 ((SCD_FRAME_LIMIT <<
892 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
893 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
894 }
895
896 iwl_write_prph(bus(trans), SCD_INTERRUPT_MASK,
897 IWL_MASK(0, hw_params(trans).max_txq_num));
898
899 /* Activate all Tx DMA/FIFO channels */
900 iwl_trans_txq_set_sched(trans, IWL_MASK(0, 7));
901
902 /* map queues to FIFOs */
903 if (trans->shrd->valid_contexts != BIT(IWL_RXON_CTX_BSS))
904 queue_to_fifo = iwlagn_ipan_queue_to_tx_fifo;
905 else
906 queue_to_fifo = iwlagn_default_queue_to_tx_fifo;
907
908 iwl_trans_set_wr_ptrs(trans, trans->shrd->cmd_queue, 0);
909
910 /* make sure all queue are not stopped */
911 memset(&trans_pcie->queue_stopped[0], 0,
912 sizeof(trans_pcie->queue_stopped));
913 for (i = 0; i < 4; i++)
914 atomic_set(&trans_pcie->queue_stop_count[i], 0);
915
916 /* reset to 0 to enable all the queue first */
917 trans_pcie->txq_ctx_active_msk = 0;
918
919 BUILD_BUG_ON(ARRAY_SIZE(iwlagn_default_queue_to_tx_fifo) <
920 IWLAGN_FIRST_AMPDU_QUEUE);
921 BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) <
922 IWLAGN_FIRST_AMPDU_QUEUE);
923
924 for (i = 0; i < IWLAGN_FIRST_AMPDU_QUEUE; i++) {
925 int fifo = queue_to_fifo[i].fifo;
926 int ac = queue_to_fifo[i].ac;
927
928 iwl_txq_ctx_activate(trans_pcie, i);
929
930 if (fifo == IWL_TX_FIFO_UNUSED)
931 continue;
932
933 if (ac != IWL_AC_UNSET)
934 iwl_set_swq_id(&trans_pcie->txq[i], ac, i);
935 iwl_trans_tx_queue_set_status(trans, &trans_pcie->txq[i],
936 fifo, 0);
937 }
938
939 spin_unlock_irqrestore(&trans->shrd->lock, flags);
940
941 /* Enable L1-Active */
942 iwl_clear_bits_prph(bus(trans), APMG_PCIDEV_STT_REG,
943 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
944}
945
946/**
947 * iwlagn_txq_ctx_stop - Stop all Tx DMA channels
948 */
949static int iwl_trans_tx_stop(struct iwl_trans *trans)
950{
951 int ch, txq_id;
952 unsigned long flags;
953 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
954
955 /* Turn off all Tx DMA fifos */
956 spin_lock_irqsave(&trans->shrd->lock, flags);
957
958 iwl_trans_txq_set_sched(trans, 0);
959
960 /* Stop each Tx DMA channel, and wait for it to be idle */
961 for (ch = 0; ch < FH_TCSR_CHNL_NUM; ch++) {
962 iwl_write_direct32(bus(trans),
963 FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
964 if (iwl_poll_direct_bit(bus(trans), FH_TSSR_TX_STATUS_REG,
965 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
966 1000))
967 IWL_ERR(trans, "Failing on timeout while stopping"
968 " DMA channel %d [0x%08x]", ch,
969 iwl_read_direct32(bus(trans),
970 FH_TSSR_TX_STATUS_REG));
971 }
972 spin_unlock_irqrestore(&trans->shrd->lock, flags);
973
974 if (!trans_pcie->txq) {
975 IWL_WARN(trans, "Stopping tx queues that aren't allocated...");
976 return 0;
977 }
978
979 /* Unmap DMA from host system and free skb's */
980 for (txq_id = 0; txq_id < hw_params(trans).max_txq_num; txq_id++)
981 iwl_tx_queue_unmap(trans, txq_id);
982
983 return 0;
984}
985
986static void iwl_trans_pcie_disable_sync_irq(struct iwl_trans *trans)
987{
988 unsigned long flags;
989 struct iwl_trans_pcie *trans_pcie =
990 IWL_TRANS_GET_PCIE_TRANS(trans);
991
992 spin_lock_irqsave(&trans->shrd->lock, flags);
993 iwl_disable_interrupts(trans);
994 spin_unlock_irqrestore(&trans->shrd->lock, flags);
995
996 /* wait to make sure we flush pending tasklet*/
997 synchronize_irq(bus(trans)->irq);
998 tasklet_kill(&trans_pcie->irq_tasklet);
999}
1000
1001static void iwl_trans_pcie_stop_device(struct iwl_trans *trans)
1002{
1003 /* stop and reset the on-board processor */
1004 iwl_write32(bus(trans), CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1005
1006 /* tell the device to stop sending interrupts */
1007 iwl_trans_pcie_disable_sync_irq(trans);
1008
1009 /* device going down, Stop using ICT table */
1010 iwl_disable_ict(trans);
1011
1012 /*
1013 * If a HW restart happens during firmware loading,
1014 * then the firmware loading might call this function
1015 * and later it might be called again due to the
1016 * restart. So don't process again if the device is
1017 * already dead.
1018 */
1019 if (test_bit(STATUS_DEVICE_ENABLED, &trans->shrd->status)) {
1020 iwl_trans_tx_stop(trans);
1021 iwl_trans_rx_stop(trans);
1022
1023 /* Power-down device's busmaster DMA clocks */
1024 iwl_write_prph(bus(trans), APMG_CLK_DIS_REG,
1025 APMG_CLK_VAL_DMA_CLK_RQT);
1026 udelay(5);
1027 }
1028
1029 /* Make sure (redundant) we've released our request to stay awake */
1030 iwl_clear_bit(bus(trans), CSR_GP_CNTRL,
1031 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1032
1033 /* Stop the device, and put it in low power state */
1034 iwl_apm_stop(priv(trans));
1035}
1036
1037static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
1038 struct iwl_device_cmd *dev_cmd, enum iwl_rxon_context_id ctx,
1039 u8 sta_id)
1040{
1041 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1042 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1043 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1044 struct iwl_tx_cmd *tx_cmd = (struct iwl_tx_cmd *) dev_cmd->payload;
1045 struct iwl_cmd_meta *out_meta;
1046 struct iwl_tx_queue *txq;
1047 struct iwl_queue *q;
1048
1049 dma_addr_t phys_addr = 0;
1050 dma_addr_t txcmd_phys;
1051 dma_addr_t scratch_phys;
1052 u16 len, firstlen, secondlen;
1053 u16 seq_number = 0;
1054 u8 wait_write_ptr = 0;
1055 u8 txq_id;
1056 u8 tid = 0;
1057 bool is_agg = false;
1058 __le16 fc = hdr->frame_control;
1059 u8 hdr_len = ieee80211_hdrlen(fc);
1060
1061 /*
1062 * Send this frame after DTIM -- there's a special queue
1063 * reserved for this for contexts that support AP mode.
1064 */
1065 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
1066 txq_id = trans_pcie->mcast_queue[ctx];
1067
1068 /*
1069 * The microcode will clear the more data
1070 * bit in the last frame it transmits.
1071 */
1072 hdr->frame_control |=
1073 cpu_to_le16(IEEE80211_FCTL_MOREDATA);
1074 } else if (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)
1075 txq_id = IWL_AUX_QUEUE;
1076 else
1077 txq_id =
1078 trans_pcie->ac_to_queue[ctx][skb_get_queue_mapping(skb)];
1079
1080 if (ieee80211_is_data_qos(fc)) {
1081 u8 *qc = NULL;
1082 struct iwl_tid_data *tid_data;
1083 qc = ieee80211_get_qos_ctl(hdr);
1084 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
1085 tid_data = &trans->shrd->tid_data[sta_id][tid];
1086
1087 if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT))
1088 return -1;
1089
1090 seq_number = tid_data->seq_number;
1091 seq_number &= IEEE80211_SCTL_SEQ;
1092 hdr->seq_ctrl = hdr->seq_ctrl &
1093 cpu_to_le16(IEEE80211_SCTL_FRAG);
1094 hdr->seq_ctrl |= cpu_to_le16(seq_number);
1095 seq_number += 0x10;
1096 /* aggregation is on for this <sta,tid> */
1097 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
1098 WARN_ON(tid_data->agg.state != IWL_AGG_ON);
1099 txq_id = tid_data->agg.txq_id;
1100 is_agg = true;
1101 }
1102 }
1103
1104 txq = &trans_pcie->txq[txq_id];
1105 q = &txq->q;
1106
1107 /* Set up driver data for this TFD */
1108 txq->skbs[q->write_ptr] = skb;
1109 txq->cmd[q->write_ptr] = dev_cmd;
1110
1111 dev_cmd->hdr.cmd = REPLY_TX;
1112 dev_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
1113 INDEX_TO_SEQ(q->write_ptr)));
1114
1115 /* Set up first empty entry in queue's array of Tx/cmd buffers */
1116 out_meta = &txq->meta[q->write_ptr];
1117
1118 /*
1119 * Use the first empty entry in this queue's command buffer array
1120 * to contain the Tx command and MAC header concatenated together
1121 * (payload data will be in another buffer).
1122 * Size of this varies, due to varying MAC header length.
1123 * If end is not dword aligned, we'll have 2 extra bytes at the end
1124 * of the MAC header (device reads on dword boundaries).
1125 * We'll tell device about this padding later.
1126 */
1127 len = sizeof(struct iwl_tx_cmd) +
1128 sizeof(struct iwl_cmd_header) + hdr_len;
1129 firstlen = (len + 3) & ~3;
1130
1131 /* Tell NIC about any 2-byte padding after MAC header */
1132 if (firstlen != len)
1133 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
1134
1135 /* Physical address of this Tx command's header (not MAC header!),
1136 * within command buffer array. */
1137 txcmd_phys = dma_map_single(bus(trans)->dev,
1138 &dev_cmd->hdr, firstlen,
1139 DMA_BIDIRECTIONAL);
1140 if (unlikely(dma_mapping_error(bus(trans)->dev, txcmd_phys)))
1141 return -1;
1142 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
1143 dma_unmap_len_set(out_meta, len, firstlen);
1144
1145 if (!ieee80211_has_morefrags(fc)) {
1146 txq->need_update = 1;
1147 } else {
1148 wait_write_ptr = 1;
1149 txq->need_update = 0;
1150 }
1151
1152 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1153 * if any (802.11 null frames have no payload). */
1154 secondlen = skb->len - hdr_len;
1155 if (secondlen > 0) {
1156 phys_addr = dma_map_single(bus(trans)->dev, skb->data + hdr_len,
1157 secondlen, DMA_TO_DEVICE);
1158 if (unlikely(dma_mapping_error(bus(trans)->dev, phys_addr))) {
1159 dma_unmap_single(bus(trans)->dev,
1160 dma_unmap_addr(out_meta, mapping),
1161 dma_unmap_len(out_meta, len),
1162 DMA_BIDIRECTIONAL);
1163 return -1;
1164 }
1165 }
1166
1167 /* Attach buffers to TFD */
1168 iwlagn_txq_attach_buf_to_tfd(trans, txq, txcmd_phys, firstlen, 1);
1169 if (secondlen > 0)
1170 iwlagn_txq_attach_buf_to_tfd(trans, txq, phys_addr,
1171 secondlen, 0);
1172
1173 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
1174 offsetof(struct iwl_tx_cmd, scratch);
1175
1176 /* take back ownership of DMA buffer to enable update */
1177 dma_sync_single_for_cpu(bus(trans)->dev, txcmd_phys, firstlen,
1178 DMA_BIDIRECTIONAL);
1179 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
1180 tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
1181
1182 IWL_DEBUG_TX(trans, "sequence nr = 0X%x\n",
1183 le16_to_cpu(dev_cmd->hdr.sequence));
1184 IWL_DEBUG_TX(trans, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
1185 iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
1186 iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
1187
1188 /* Set up entry for this TFD in Tx byte-count array */
1189 if (is_agg)
1190 iwl_trans_txq_update_byte_cnt_tbl(trans, txq,
1191 le16_to_cpu(tx_cmd->len));
1192
1193 dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen,
1194 DMA_BIDIRECTIONAL);
1195
1196 trace_iwlwifi_dev_tx(priv(trans),
1197 &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
1198 sizeof(struct iwl_tfd),
1199 &dev_cmd->hdr, firstlen,
1200 skb->data + hdr_len, secondlen);
1201
1202 /* Tell device the write index *just past* this latest filled TFD */
1203 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
1204 iwl_txq_update_write_ptr(trans, txq);
1205
1206 if (ieee80211_is_data_qos(fc)) {
1207 trans->shrd->tid_data[sta_id][tid].tfds_in_queue++;
1208 if (!ieee80211_has_morefrags(fc))
1209 trans->shrd->tid_data[sta_id][tid].seq_number =
1210 seq_number;
1211 }
1212
1213 /*
1214 * At this point the frame is "transmitted" successfully
1215 * and we will get a TX status notification eventually,
1216 * regardless of the value of ret. "ret" only indicates
1217 * whether or not we should update the write pointer.
1218 */
1219 if (iwl_queue_space(q) < q->high_mark) {
1220 if (wait_write_ptr) {
1221 txq->need_update = 1;
1222 iwl_txq_update_write_ptr(trans, txq);
1223 } else {
1224 iwl_stop_queue(trans, txq);
1225 }
1226 }
1227 return 0;
1228}
1229
1230static void iwl_trans_pcie_kick_nic(struct iwl_trans *trans)
1231{
1232 /* Remove all resets to allow NIC to operate */
1233 iwl_write32(bus(trans), CSR_RESET, 0);
1234}
1235
1236static int iwl_trans_pcie_request_irq(struct iwl_trans *trans)
1237{
1238 struct iwl_trans_pcie *trans_pcie =
1239 IWL_TRANS_GET_PCIE_TRANS(trans);
1240 int err;
1241
1242 trans_pcie->inta_mask = CSR_INI_SET_MASK;
1243
1244 tasklet_init(&trans_pcie->irq_tasklet, (void (*)(unsigned long))
1245 iwl_irq_tasklet, (unsigned long)trans);
1246
1247 iwl_alloc_isr_ict(trans);
1248
1249 err = request_irq(bus(trans)->irq, iwl_isr_ict, IRQF_SHARED,
1250 DRV_NAME, trans);
1251 if (err) {
1252 IWL_ERR(trans, "Error allocating IRQ %d\n", bus(trans)->irq);
1253 iwl_free_isr_ict(trans);
1254 return err;
1255 }
1256
1257 INIT_WORK(&trans_pcie->rx_replenish, iwl_bg_rx_replenish);
1258 return 0;
1259}
1260
1261static int iwlagn_txq_check_empty(struct iwl_trans *trans,
1262 int sta_id, u8 tid, int txq_id)
1263{
1264 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1265 struct iwl_queue *q = &trans_pcie->txq[txq_id].q;
1266 struct iwl_tid_data *tid_data = &trans->shrd->tid_data[sta_id][tid];
1267
1268 lockdep_assert_held(&trans->shrd->sta_lock);
1269
1270 switch (trans->shrd->tid_data[sta_id][tid].agg.state) {
1271 case IWL_EMPTYING_HW_QUEUE_DELBA:
1272 /* We are reclaiming the last packet of the */
1273 /* aggregated HW queue */
1274 if ((txq_id == tid_data->agg.txq_id) &&
1275 (q->read_ptr == q->write_ptr)) {
1276 IWL_DEBUG_HT(trans,
1277 "HW queue empty: continue DELBA flow\n");
1278 iwl_trans_pcie_txq_agg_disable(trans, txq_id);
1279 tid_data->agg.state = IWL_AGG_OFF;
1280 iwl_stop_tx_ba_trans_ready(priv(trans),
1281 NUM_IWL_RXON_CTX,
1282 sta_id, tid);
1283 iwl_wake_queue(trans, &trans_pcie->txq[txq_id]);
1284 }
1285 break;
1286 case IWL_EMPTYING_HW_QUEUE_ADDBA:
1287 /* We are reclaiming the last packet of the queue */
1288 if (tid_data->tfds_in_queue == 0) {
1289 IWL_DEBUG_HT(trans,
1290 "HW queue empty: continue ADDBA flow\n");
1291 tid_data->agg.state = IWL_AGG_ON;
1292 iwl_start_tx_ba_trans_ready(priv(trans),
1293 NUM_IWL_RXON_CTX,
1294 sta_id, tid);
1295 }
1296 break;
1297 default:
1298 break;
1299 }
1300
1301 return 0;
1302}
1303
1304static void iwl_free_tfds_in_queue(struct iwl_trans *trans,
1305 int sta_id, int tid, int freed)
1306{
1307 lockdep_assert_held(&trans->shrd->sta_lock);
1308
1309 if (trans->shrd->tid_data[sta_id][tid].tfds_in_queue >= freed)
1310 trans->shrd->tid_data[sta_id][tid].tfds_in_queue -= freed;
1311 else {
1312 IWL_DEBUG_TX(trans, "free more than tfds_in_queue (%u:%d)\n",
1313 trans->shrd->tid_data[sta_id][tid].tfds_in_queue,
1314 freed);
1315 trans->shrd->tid_data[sta_id][tid].tfds_in_queue = 0;
1316 }
1317}
1318
1319static void iwl_trans_pcie_reclaim(struct iwl_trans *trans, int sta_id, int tid,
1320 int txq_id, int ssn, u32 status,
1321 struct sk_buff_head *skbs)
1322{
1323 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1324 struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id];
1325 enum iwl_agg_state agg_state;
1326 /* n_bd is usually 256 => n_bd - 1 = 0xff */
1327 int tfd_num = ssn & (txq->q.n_bd - 1);
1328 int freed = 0;
1329 bool cond;
1330
1331 txq->time_stamp = jiffies;
1332
1333 if (txq->sched_retry) {
1334 agg_state =
1335 trans->shrd->tid_data[txq->sta_id][txq->tid].agg.state;
1336 cond = (agg_state != IWL_EMPTYING_HW_QUEUE_DELBA);
1337 } else {
1338 cond = (status != TX_STATUS_FAIL_PASSIVE_NO_RX);
1339 }
1340
1341 if (txq->q.read_ptr != tfd_num) {
1342 IWL_DEBUG_TX_REPLY(trans, "Retry scheduler reclaim "
1343 "scd_ssn=%d idx=%d txq=%d swq=%d\n",
1344 ssn , tfd_num, txq_id, txq->swq_id);
1345 freed = iwl_tx_queue_reclaim(trans, txq_id, tfd_num, skbs);
1346 if (iwl_queue_space(&txq->q) > txq->q.low_mark && cond)
1347 iwl_wake_queue(trans, txq);
1348 }
1349
1350 iwl_free_tfds_in_queue(trans, sta_id, tid, freed);
1351 iwlagn_txq_check_empty(trans, sta_id, tid, txq_id);
1352}
1353
1354static void iwl_trans_pcie_free(struct iwl_trans *trans)
1355{
1356 iwl_trans_pcie_tx_free(trans);
1357 iwl_trans_pcie_rx_free(trans);
1358 free_irq(bus(trans)->irq, trans);
1359 iwl_free_isr_ict(trans);
1360 trans->shrd->trans = NULL;
1361 kfree(trans);
1362}
1363
1364#ifdef CONFIG_PM_SLEEP
1365static int iwl_trans_pcie_suspend(struct iwl_trans *trans)
1366{
1367 /*
1368 * This function is called when system goes into suspend state
1369 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
1370 * first but since iwl_mac_stop() has no knowledge of who the caller is,
1371 * it will not call apm_ops.stop() to stop the DMA operation.
1372 * Calling apm_ops.stop here to make sure we stop the DMA.
1373 *
1374 * But of course ... if we have configured WoWLAN then we did other
1375 * things already :-)
1376 */
1377 if (!trans->shrd->wowlan)
1378 iwl_apm_stop(priv(trans));
1379
1380 return 0;
1381}
1382
1383static int iwl_trans_pcie_resume(struct iwl_trans *trans)
1384{
1385 bool hw_rfkill = false;
1386
1387 iwl_enable_interrupts(trans);
1388
1389 if (!(iwl_read32(bus(trans), CSR_GP_CNTRL) &
1390 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1391 hw_rfkill = true;
1392
1393 if (hw_rfkill)
1394 set_bit(STATUS_RF_KILL_HW, &trans->shrd->status);
1395 else
1396 clear_bit(STATUS_RF_KILL_HW, &trans->shrd->status);
1397
1398 iwl_set_hw_rfkill_state(priv(trans), hw_rfkill);
1399
1400 return 0;
1401}
1402#endif /* CONFIG_PM_SLEEP */
1403
1404static void iwl_trans_pcie_wake_any_queue(struct iwl_trans *trans,
1405 enum iwl_rxon_context_id ctx)
1406{
1407 u8 ac, txq_id;
1408 struct iwl_trans_pcie *trans_pcie =
1409 IWL_TRANS_GET_PCIE_TRANS(trans);
1410
1411 for (ac = 0; ac < AC_NUM; ac++) {
1412 txq_id = trans_pcie->ac_to_queue[ctx][ac];
1413 IWL_DEBUG_INFO(trans, "Queue Status: Q[%d] %s\n",
1414 ac,
1415 (atomic_read(&trans_pcie->queue_stop_count[ac]) > 0)
1416 ? "stopped" : "awake");
1417 iwl_wake_queue(trans, &trans_pcie->txq[txq_id]);
1418 }
1419}
1420
1421const struct iwl_trans_ops trans_ops_pcie;
1422
1423static struct iwl_trans *iwl_trans_pcie_alloc(struct iwl_shared *shrd)
1424{
1425 struct iwl_trans *iwl_trans = kzalloc(sizeof(struct iwl_trans) +
1426 sizeof(struct iwl_trans_pcie),
1427 GFP_KERNEL);
1428 if (iwl_trans) {
1429 struct iwl_trans_pcie *trans_pcie =
1430 IWL_TRANS_GET_PCIE_TRANS(iwl_trans);
1431 iwl_trans->ops = &trans_ops_pcie;
1432 iwl_trans->shrd = shrd;
1433 trans_pcie->trans = iwl_trans;
1434 spin_lock_init(&iwl_trans->hcmd_lock);
1435 }
1436
1437 return iwl_trans;
1438}
1439
1440static void iwl_trans_pcie_stop_queue(struct iwl_trans *trans, int txq_id)
1441{
1442 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1443
1444 iwl_stop_queue(trans, &trans_pcie->txq[txq_id]);
1445}
1446
1447#define IWL_FLUSH_WAIT_MS 2000
1448
1449static int iwl_trans_pcie_wait_tx_queue_empty(struct iwl_trans *trans)
1450{
1451 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1452 struct iwl_tx_queue *txq;
1453 struct iwl_queue *q;
1454 int cnt;
1455 unsigned long now = jiffies;
1456 int ret = 0;
1457
1458 /* waiting for all the tx frames complete might take a while */
1459 for (cnt = 0; cnt < hw_params(trans).max_txq_num; cnt++) {
1460 if (cnt == trans->shrd->cmd_queue)
1461 continue;
1462 txq = &trans_pcie->txq[cnt];
1463 q = &txq->q;
1464 while (q->read_ptr != q->write_ptr && !time_after(jiffies,
1465 now + msecs_to_jiffies(IWL_FLUSH_WAIT_MS)))
1466 msleep(1);
1467
1468 if (q->read_ptr != q->write_ptr) {
1469 IWL_ERR(trans, "fail to flush all tx fifo queues\n");
1470 ret = -ETIMEDOUT;
1471 break;
1472 }
1473 }
1474 return ret;
1475}
1476
1477/*
1478 * On every watchdog tick we check (latest) time stamp. If it does not
1479 * change during timeout period and queue is not empty we reset firmware.
1480 */
1481static int iwl_trans_pcie_check_stuck_queue(struct iwl_trans *trans, int cnt)
1482{
1483 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1484 struct iwl_tx_queue *txq = &trans_pcie->txq[cnt];
1485 struct iwl_queue *q = &txq->q;
1486 unsigned long timeout;
1487
1488 if (q->read_ptr == q->write_ptr) {
1489 txq->time_stamp = jiffies;
1490 return 0;
1491 }
1492
1493 timeout = txq->time_stamp +
1494 msecs_to_jiffies(hw_params(trans).wd_timeout);
1495
1496 if (time_after(jiffies, timeout)) {
1497 IWL_ERR(trans, "Queue %d stuck for %u ms.\n", q->id,
1498 hw_params(trans).wd_timeout);
1499 IWL_ERR(trans, "Current read_ptr %d write_ptr %d\n",
1500 q->read_ptr, q->write_ptr);
1501 return 1;
1502 }
1503
1504 return 0;
1505}
1506
1507static const char *get_fh_string(int cmd)
1508{
1509 switch (cmd) {
1510 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
1511 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
1512 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
1513 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
1514 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
1515 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
1516 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
1517 IWL_CMD(FH_TSSR_TX_STATUS_REG);
1518 IWL_CMD(FH_TSSR_TX_ERROR_REG);
1519 default:
1520 return "UNKNOWN";
1521 }
1522}
1523
1524int iwl_dump_fh(struct iwl_trans *trans, char **buf, bool display)
1525{
1526 int i;
1527#ifdef CONFIG_IWLWIFI_DEBUG
1528 int pos = 0;
1529 size_t bufsz = 0;
1530#endif
1531 static const u32 fh_tbl[] = {
1532 FH_RSCSR_CHNL0_STTS_WPTR_REG,
1533 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
1534 FH_RSCSR_CHNL0_WPTR,
1535 FH_MEM_RCSR_CHNL0_CONFIG_REG,
1536 FH_MEM_RSSR_SHARED_CTRL_REG,
1537 FH_MEM_RSSR_RX_STATUS_REG,
1538 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
1539 FH_TSSR_TX_STATUS_REG,
1540 FH_TSSR_TX_ERROR_REG
1541 };
1542#ifdef CONFIG_IWLWIFI_DEBUG
1543 if (display) {
1544 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
1545 *buf = kmalloc(bufsz, GFP_KERNEL);
1546 if (!*buf)
1547 return -ENOMEM;
1548 pos += scnprintf(*buf + pos, bufsz - pos,
1549 "FH register values:\n");
1550 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1551 pos += scnprintf(*buf + pos, bufsz - pos,
1552 " %34s: 0X%08x\n",
1553 get_fh_string(fh_tbl[i]),
1554 iwl_read_direct32(bus(trans), fh_tbl[i]));
1555 }
1556 return pos;
1557 }
1558#endif
1559 IWL_ERR(trans, "FH register values:\n");
1560 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1561 IWL_ERR(trans, " %34s: 0X%08x\n",
1562 get_fh_string(fh_tbl[i]),
1563 iwl_read_direct32(bus(trans), fh_tbl[i]));
1564 }
1565 return 0;
1566}
1567
1568static const char *get_csr_string(int cmd)
1569{
1570 switch (cmd) {
1571 IWL_CMD(CSR_HW_IF_CONFIG_REG);
1572 IWL_CMD(CSR_INT_COALESCING);
1573 IWL_CMD(CSR_INT);
1574 IWL_CMD(CSR_INT_MASK);
1575 IWL_CMD(CSR_FH_INT_STATUS);
1576 IWL_CMD(CSR_GPIO_IN);
1577 IWL_CMD(CSR_RESET);
1578 IWL_CMD(CSR_GP_CNTRL);
1579 IWL_CMD(CSR_HW_REV);
1580 IWL_CMD(CSR_EEPROM_REG);
1581 IWL_CMD(CSR_EEPROM_GP);
1582 IWL_CMD(CSR_OTP_GP_REG);
1583 IWL_CMD(CSR_GIO_REG);
1584 IWL_CMD(CSR_GP_UCODE_REG);
1585 IWL_CMD(CSR_GP_DRIVER_REG);
1586 IWL_CMD(CSR_UCODE_DRV_GP1);
1587 IWL_CMD(CSR_UCODE_DRV_GP2);
1588 IWL_CMD(CSR_LED_REG);
1589 IWL_CMD(CSR_DRAM_INT_TBL_REG);
1590 IWL_CMD(CSR_GIO_CHICKEN_BITS);
1591 IWL_CMD(CSR_ANA_PLL_CFG);
1592 IWL_CMD(CSR_HW_REV_WA_REG);
1593 IWL_CMD(CSR_DBG_HPET_MEM_REG);
1594 default:
1595 return "UNKNOWN";
1596 }
1597}
1598
1599void iwl_dump_csr(struct iwl_trans *trans)
1600{
1601 int i;
1602 static const u32 csr_tbl[] = {
1603 CSR_HW_IF_CONFIG_REG,
1604 CSR_INT_COALESCING,
1605 CSR_INT,
1606 CSR_INT_MASK,
1607 CSR_FH_INT_STATUS,
1608 CSR_GPIO_IN,
1609 CSR_RESET,
1610 CSR_GP_CNTRL,
1611 CSR_HW_REV,
1612 CSR_EEPROM_REG,
1613 CSR_EEPROM_GP,
1614 CSR_OTP_GP_REG,
1615 CSR_GIO_REG,
1616 CSR_GP_UCODE_REG,
1617 CSR_GP_DRIVER_REG,
1618 CSR_UCODE_DRV_GP1,
1619 CSR_UCODE_DRV_GP2,
1620 CSR_LED_REG,
1621 CSR_DRAM_INT_TBL_REG,
1622 CSR_GIO_CHICKEN_BITS,
1623 CSR_ANA_PLL_CFG,
1624 CSR_HW_REV_WA_REG,
1625 CSR_DBG_HPET_MEM_REG
1626 };
1627 IWL_ERR(trans, "CSR values:\n");
1628 IWL_ERR(trans, "(2nd byte of CSR_INT_COALESCING is "
1629 "CSR_INT_PERIODIC_REG)\n");
1630 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
1631 IWL_ERR(trans, " %25s: 0X%08x\n",
1632 get_csr_string(csr_tbl[i]),
1633 iwl_read32(bus(trans), csr_tbl[i]));
1634 }
1635}
1636
1637#ifdef CONFIG_IWLWIFI_DEBUGFS
1638/* create and remove of files */
1639#define DEBUGFS_ADD_FILE(name, parent, mode) do { \
1640 if (!debugfs_create_file(#name, mode, parent, trans, \
1641 &iwl_dbgfs_##name##_ops)) \
1642 return -ENOMEM; \
1643} while (0)
1644
1645/* file operation */
1646#define DEBUGFS_READ_FUNC(name) \
1647static ssize_t iwl_dbgfs_##name##_read(struct file *file, \
1648 char __user *user_buf, \
1649 size_t count, loff_t *ppos);
1650
1651#define DEBUGFS_WRITE_FUNC(name) \
1652static ssize_t iwl_dbgfs_##name##_write(struct file *file, \
1653 const char __user *user_buf, \
1654 size_t count, loff_t *ppos);
1655
1656
1657static int iwl_dbgfs_open_file_generic(struct inode *inode, struct file *file)
1658{
1659 file->private_data = inode->i_private;
1660 return 0;
1661}
1662
1663#define DEBUGFS_READ_FILE_OPS(name) \
1664 DEBUGFS_READ_FUNC(name); \
1665static const struct file_operations iwl_dbgfs_##name##_ops = { \
1666 .read = iwl_dbgfs_##name##_read, \
1667 .open = iwl_dbgfs_open_file_generic, \
1668 .llseek = generic_file_llseek, \
1669};
1670
1671#define DEBUGFS_WRITE_FILE_OPS(name) \
1672 DEBUGFS_WRITE_FUNC(name); \
1673static const struct file_operations iwl_dbgfs_##name##_ops = { \
1674 .write = iwl_dbgfs_##name##_write, \
1675 .open = iwl_dbgfs_open_file_generic, \
1676 .llseek = generic_file_llseek, \
1677};
1678
1679#define DEBUGFS_READ_WRITE_FILE_OPS(name) \
1680 DEBUGFS_READ_FUNC(name); \
1681 DEBUGFS_WRITE_FUNC(name); \
1682static const struct file_operations iwl_dbgfs_##name##_ops = { \
1683 .write = iwl_dbgfs_##name##_write, \
1684 .read = iwl_dbgfs_##name##_read, \
1685 .open = iwl_dbgfs_open_file_generic, \
1686 .llseek = generic_file_llseek, \
1687};
1688
1689static ssize_t iwl_dbgfs_tx_queue_read(struct file *file,
1690 char __user *user_buf,
1691 size_t count, loff_t *ppos)
1692{
1693 struct iwl_trans *trans = file->private_data;
1694 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1695 struct iwl_tx_queue *txq;
1696 struct iwl_queue *q;
1697 char *buf;
1698 int pos = 0;
1699 int cnt;
1700 int ret;
1701 const size_t bufsz = sizeof(char) * 64 * hw_params(trans).max_txq_num;
1702
1703 if (!trans_pcie->txq) {
1704 IWL_ERR(trans, "txq not ready\n");
1705 return -EAGAIN;
1706 }
1707 buf = kzalloc(bufsz, GFP_KERNEL);
1708 if (!buf)
1709 return -ENOMEM;
1710
1711 for (cnt = 0; cnt < hw_params(trans).max_txq_num; cnt++) {
1712 txq = &trans_pcie->txq[cnt];
1713 q = &txq->q;
1714 pos += scnprintf(buf + pos, bufsz - pos,
1715 "hwq %.2d: read=%u write=%u stop=%d"
1716 " swq_id=%#.2x (ac %d/hwq %d)\n",
1717 cnt, q->read_ptr, q->write_ptr,
1718 !!test_bit(cnt, trans_pcie->queue_stopped),
1719 txq->swq_id, txq->swq_id & 3,
1720 (txq->swq_id >> 2) & 0x1f);
1721 if (cnt >= 4)
1722 continue;
1723 /* for the ACs, display the stop count too */
1724 pos += scnprintf(buf + pos, bufsz - pos,
1725 " stop-count: %d\n",
1726 atomic_read(&trans_pcie->queue_stop_count[cnt]));
1727 }
1728 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1729 kfree(buf);
1730 return ret;
1731}
1732
1733static ssize_t iwl_dbgfs_rx_queue_read(struct file *file,
1734 char __user *user_buf,
1735 size_t count, loff_t *ppos) {
1736 struct iwl_trans *trans = file->private_data;
1737 struct iwl_trans_pcie *trans_pcie =
1738 IWL_TRANS_GET_PCIE_TRANS(trans);
1739 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
1740 char buf[256];
1741 int pos = 0;
1742 const size_t bufsz = sizeof(buf);
1743
1744 pos += scnprintf(buf + pos, bufsz - pos, "read: %u\n",
1745 rxq->read);
1746 pos += scnprintf(buf + pos, bufsz - pos, "write: %u\n",
1747 rxq->write);
1748 pos += scnprintf(buf + pos, bufsz - pos, "free_count: %u\n",
1749 rxq->free_count);
1750 if (rxq->rb_stts) {
1751 pos += scnprintf(buf + pos, bufsz - pos, "closed_rb_num: %u\n",
1752 le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF);
1753 } else {
1754 pos += scnprintf(buf + pos, bufsz - pos,
1755 "closed_rb_num: Not Allocated\n");
1756 }
1757 return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1758}
1759
1760static ssize_t iwl_dbgfs_log_event_read(struct file *file,
1761 char __user *user_buf,
1762 size_t count, loff_t *ppos)
1763{
1764 struct iwl_trans *trans = file->private_data;
1765 char *buf;
1766 int pos = 0;
1767 ssize_t ret = -ENOMEM;
1768
1769 ret = pos = iwl_dump_nic_event_log(trans, true, &buf, true);
1770 if (buf) {
1771 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1772 kfree(buf);
1773 }
1774 return ret;
1775}
1776
1777static ssize_t iwl_dbgfs_log_event_write(struct file *file,
1778 const char __user *user_buf,
1779 size_t count, loff_t *ppos)
1780{
1781 struct iwl_trans *trans = file->private_data;
1782 u32 event_log_flag;
1783 char buf[8];
1784 int buf_size;
1785
1786 memset(buf, 0, sizeof(buf));
1787 buf_size = min(count, sizeof(buf) - 1);
1788 if (copy_from_user(buf, user_buf, buf_size))
1789 return -EFAULT;
1790 if (sscanf(buf, "%d", &event_log_flag) != 1)
1791 return -EFAULT;
1792 if (event_log_flag == 1)
1793 iwl_dump_nic_event_log(trans, true, NULL, false);
1794
1795 return count;
1796}
1797
1798static ssize_t iwl_dbgfs_interrupt_read(struct file *file,
1799 char __user *user_buf,
1800 size_t count, loff_t *ppos) {
1801
1802 struct iwl_trans *trans = file->private_data;
1803 struct iwl_trans_pcie *trans_pcie =
1804 IWL_TRANS_GET_PCIE_TRANS(trans);
1805 struct isr_statistics *isr_stats = &trans_pcie->isr_stats;
1806
1807 int pos = 0;
1808 char *buf;
1809 int bufsz = 24 * 64; /* 24 items * 64 char per item */
1810 ssize_t ret;
1811
1812 buf = kzalloc(bufsz, GFP_KERNEL);
1813 if (!buf) {
1814 IWL_ERR(trans, "Can not allocate Buffer\n");
1815 return -ENOMEM;
1816 }
1817
1818 pos += scnprintf(buf + pos, bufsz - pos,
1819 "Interrupt Statistics Report:\n");
1820
1821 pos += scnprintf(buf + pos, bufsz - pos, "HW Error:\t\t\t %u\n",
1822 isr_stats->hw);
1823 pos += scnprintf(buf + pos, bufsz - pos, "SW Error:\t\t\t %u\n",
1824 isr_stats->sw);
1825 if (isr_stats->sw || isr_stats->hw) {
1826 pos += scnprintf(buf + pos, bufsz - pos,
1827 "\tLast Restarting Code: 0x%X\n",
1828 isr_stats->err_code);
1829 }
1830#ifdef CONFIG_IWLWIFI_DEBUG
1831 pos += scnprintf(buf + pos, bufsz - pos, "Frame transmitted:\t\t %u\n",
1832 isr_stats->sch);
1833 pos += scnprintf(buf + pos, bufsz - pos, "Alive interrupt:\t\t %u\n",
1834 isr_stats->alive);
1835#endif
1836 pos += scnprintf(buf + pos, bufsz - pos,
1837 "HW RF KILL switch toggled:\t %u\n", isr_stats->rfkill);
1838
1839 pos += scnprintf(buf + pos, bufsz - pos, "CT KILL:\t\t\t %u\n",
1840 isr_stats->ctkill);
1841
1842 pos += scnprintf(buf + pos, bufsz - pos, "Wakeup Interrupt:\t\t %u\n",
1843 isr_stats->wakeup);
1844
1845 pos += scnprintf(buf + pos, bufsz - pos,
1846 "Rx command responses:\t\t %u\n", isr_stats->rx);
1847
1848 pos += scnprintf(buf + pos, bufsz - pos, "Tx/FH interrupt:\t\t %u\n",
1849 isr_stats->tx);
1850
1851 pos += scnprintf(buf + pos, bufsz - pos, "Unexpected INTA:\t\t %u\n",
1852 isr_stats->unhandled);
1853
1854 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1855 kfree(buf);
1856 return ret;
1857}
1858
1859static ssize_t iwl_dbgfs_interrupt_write(struct file *file,
1860 const char __user *user_buf,
1861 size_t count, loff_t *ppos)
1862{
1863 struct iwl_trans *trans = file->private_data;
1864 struct iwl_trans_pcie *trans_pcie =
1865 IWL_TRANS_GET_PCIE_TRANS(trans);
1866 struct isr_statistics *isr_stats = &trans_pcie->isr_stats;
1867
1868 char buf[8];
1869 int buf_size;
1870 u32 reset_flag;
1871
1872 memset(buf, 0, sizeof(buf));
1873 buf_size = min(count, sizeof(buf) - 1);
1874 if (copy_from_user(buf, user_buf, buf_size))
1875 return -EFAULT;
1876 if (sscanf(buf, "%x", &reset_flag) != 1)
1877 return -EFAULT;
1878 if (reset_flag == 0)
1879 memset(isr_stats, 0, sizeof(*isr_stats));
1880
1881 return count;
1882}
1883
1884static ssize_t iwl_dbgfs_csr_write(struct file *file,
1885 const char __user *user_buf,
1886 size_t count, loff_t *ppos)
1887{
1888 struct iwl_trans *trans = file->private_data;
1889 char buf[8];
1890 int buf_size;
1891 int csr;
1892
1893 memset(buf, 0, sizeof(buf));
1894 buf_size = min(count, sizeof(buf) - 1);
1895 if (copy_from_user(buf, user_buf, buf_size))
1896 return -EFAULT;
1897 if (sscanf(buf, "%d", &csr) != 1)
1898 return -EFAULT;
1899
1900 iwl_dump_csr(trans);
1901
1902 return count;
1903}
1904
1905static ssize_t iwl_dbgfs_fh_reg_read(struct file *file,
1906 char __user *user_buf,
1907 size_t count, loff_t *ppos)
1908{
1909 struct iwl_trans *trans = file->private_data;
1910 char *buf;
1911 int pos = 0;
1912 ssize_t ret = -EFAULT;
1913
1914 ret = pos = iwl_dump_fh(trans, &buf, true);
1915 if (buf) {
1916 ret = simple_read_from_buffer(user_buf,
1917 count, ppos, buf, pos);
1918 kfree(buf);
1919 }
1920
1921 return ret;
1922}
1923
1924DEBUGFS_READ_WRITE_FILE_OPS(log_event);
1925DEBUGFS_READ_WRITE_FILE_OPS(interrupt);
1926DEBUGFS_READ_FILE_OPS(fh_reg);
1927DEBUGFS_READ_FILE_OPS(rx_queue);
1928DEBUGFS_READ_FILE_OPS(tx_queue);
1929DEBUGFS_WRITE_FILE_OPS(csr);
1930
1931/*
1932 * Create the debugfs files and directories
1933 *
1934 */
1935static int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans,
1936 struct dentry *dir)
1937{
1938 DEBUGFS_ADD_FILE(rx_queue, dir, S_IRUSR);
1939 DEBUGFS_ADD_FILE(tx_queue, dir, S_IRUSR);
1940 DEBUGFS_ADD_FILE(log_event, dir, S_IWUSR | S_IRUSR);
1941 DEBUGFS_ADD_FILE(interrupt, dir, S_IWUSR | S_IRUSR);
1942 DEBUGFS_ADD_FILE(csr, dir, S_IWUSR);
1943 DEBUGFS_ADD_FILE(fh_reg, dir, S_IRUSR);
1944 return 0;
1945}
1946#else
1947static int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans,
1948 struct dentry *dir)
1949{ return 0; }
1950
1951#endif /*CONFIG_IWLWIFI_DEBUGFS */
1952
1953const struct iwl_trans_ops trans_ops_pcie = {
1954 .alloc = iwl_trans_pcie_alloc,
1955 .request_irq = iwl_trans_pcie_request_irq,
1956 .start_device = iwl_trans_pcie_start_device,
1957 .prepare_card_hw = iwl_trans_pcie_prepare_card_hw,
1958 .stop_device = iwl_trans_pcie_stop_device,
1959
1960 .tx_start = iwl_trans_pcie_tx_start,
1961 .wake_any_queue = iwl_trans_pcie_wake_any_queue,
1962
1963 .send_cmd = iwl_trans_pcie_send_cmd,
1964
1965 .tx = iwl_trans_pcie_tx,
1966 .reclaim = iwl_trans_pcie_reclaim,
1967
1968 .tx_agg_disable = iwl_trans_pcie_tx_agg_disable,
1969 .tx_agg_alloc = iwl_trans_pcie_tx_agg_alloc,
1970 .tx_agg_setup = iwl_trans_pcie_tx_agg_setup,
1971
1972 .kick_nic = iwl_trans_pcie_kick_nic,
1973
1974 .free = iwl_trans_pcie_free,
1975 .stop_queue = iwl_trans_pcie_stop_queue,
1976
1977 .dbgfs_register = iwl_trans_pcie_dbgfs_register,
1978
1979 .wait_tx_queue_empty = iwl_trans_pcie_wait_tx_queue_empty,
1980 .check_stuck_queue = iwl_trans_pcie_check_stuck_queue,
1981
1982#ifdef CONFIG_PM_SLEEP
1983 .suspend = iwl_trans_pcie_suspend,
1984 .resume = iwl_trans_pcie_resume,
1985#endif
1986};
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans.c b/drivers/net/wireless/iwlwifi/iwl-trans.c
index cec13adb018e..1b20c4fb791b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans.c
+++ b/drivers/net/wireless/iwlwifi/iwl-trans.c
@@ -60,2042 +60,18 @@
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 * 61 *
62 *****************************************************************************/ 62 *****************************************************************************/
63#include <linux/interrupt.h>
64#include <linux/debugfs.h>
65#include <linux/bitops.h>
66#include <linux/gfp.h>
67 63
68#include "iwl-dev.h"
69#include "iwl-trans.h" 64#include "iwl-trans.h"
70#include "iwl-core.h"
71#include "iwl-helpers.h"
72#include "iwl-trans-int-pcie.h"
73/*TODO remove uneeded includes when the transport layer tx_free will be here */
74#include "iwl-agn.h"
75#include "iwl-shared.h"
76 65
77static int iwl_trans_rx_alloc(struct iwl_trans *trans) 66int iwl_trans_send_cmd_pdu(struct iwl_trans *trans, u8 id,
67 u32 flags, u16 len, const void *data)
78{ 68{
79 struct iwl_trans_pcie *trans_pcie = 69 struct iwl_host_cmd cmd = {
80 IWL_TRANS_GET_PCIE_TRANS(trans); 70 .id = id,
81 struct iwl_rx_queue *rxq = &trans_pcie->rxq; 71 .len = { len, },
82 struct device *dev = bus(trans)->dev; 72 .data = { data, },
83 73 .flags = flags,
84 memset(&trans_pcie->rxq, 0, sizeof(trans_pcie->rxq));
85
86 spin_lock_init(&rxq->lock);
87 INIT_LIST_HEAD(&rxq->rx_free);
88 INIT_LIST_HEAD(&rxq->rx_used);
89
90 if (WARN_ON(rxq->bd || rxq->rb_stts))
91 return -EINVAL;
92
93 /* Allocate the circular buffer of Read Buffer Descriptors (RBDs) */
94 rxq->bd = dma_alloc_coherent(dev, sizeof(__le32) * RX_QUEUE_SIZE,
95 &rxq->bd_dma, GFP_KERNEL);
96 if (!rxq->bd)
97 goto err_bd;
98 memset(rxq->bd, 0, sizeof(__le32) * RX_QUEUE_SIZE);
99
100 /*Allocate the driver's pointer to receive buffer status */
101 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(*rxq->rb_stts),
102 &rxq->rb_stts_dma, GFP_KERNEL);
103 if (!rxq->rb_stts)
104 goto err_rb_stts;
105 memset(rxq->rb_stts, 0, sizeof(*rxq->rb_stts));
106
107 return 0;
108
109err_rb_stts:
110 dma_free_coherent(dev, sizeof(__le32) * RX_QUEUE_SIZE,
111 rxq->bd, rxq->bd_dma);
112 memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma));
113 rxq->bd = NULL;
114err_bd:
115 return -ENOMEM;
116}
117
118static void iwl_trans_rxq_free_rx_bufs(struct iwl_trans *trans)
119{
120 struct iwl_trans_pcie *trans_pcie =
121 IWL_TRANS_GET_PCIE_TRANS(trans);
122 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
123 int i;
124
125 /* Fill the rx_used queue with _all_ of the Rx buffers */
126 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
127 /* In the reset function, these buffers may have been allocated
128 * to an SKB, so we need to unmap and free potential storage */
129 if (rxq->pool[i].page != NULL) {
130 dma_unmap_page(bus(trans)->dev, rxq->pool[i].page_dma,
131 PAGE_SIZE << hw_params(trans).rx_page_order,
132 DMA_FROM_DEVICE);
133 __free_pages(rxq->pool[i].page,
134 hw_params(trans).rx_page_order);
135 rxq->pool[i].page = NULL;
136 }
137 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
138 }
139}
140
141static void iwl_trans_rx_hw_init(struct iwl_trans *trans,
142 struct iwl_rx_queue *rxq)
143{
144 u32 rb_size;
145 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
146 u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
147
148 rb_timeout = RX_RB_TIMEOUT;
149
150 if (iwlagn_mod_params.amsdu_size_8K)
151 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
152 else
153 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
154
155 /* Stop Rx DMA */
156 iwl_write_direct32(bus(trans), FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
157
158 /* Reset driver's Rx queue write index */
159 iwl_write_direct32(bus(trans), FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
160
161 /* Tell device where to find RBD circular buffer in DRAM */
162 iwl_write_direct32(bus(trans), FH_RSCSR_CHNL0_RBDCB_BASE_REG,
163 (u32)(rxq->bd_dma >> 8));
164
165 /* Tell device where in DRAM to update its Rx status */
166 iwl_write_direct32(bus(trans), FH_RSCSR_CHNL0_STTS_WPTR_REG,
167 rxq->rb_stts_dma >> 4);
168
169 /* Enable Rx DMA
170 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
171 * the credit mechanism in 5000 HW RX FIFO
172 * Direct rx interrupts to hosts
173 * Rx buffer size 4 or 8k
174 * RB timeout 0x10
175 * 256 RBDs
176 */
177 iwl_write_direct32(bus(trans), FH_MEM_RCSR_CHNL0_CONFIG_REG,
178 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
179 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
180 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
181 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
182 rb_size|
183 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
184 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
185
186 /* Set interrupt coalescing timer to default (2048 usecs) */
187 iwl_write8(bus(trans), CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
188}
189
190static int iwl_rx_init(struct iwl_trans *trans)
191{
192 struct iwl_trans_pcie *trans_pcie =
193 IWL_TRANS_GET_PCIE_TRANS(trans);
194 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
195
196 int i, err;
197 unsigned long flags;
198
199 if (!rxq->bd) {
200 err = iwl_trans_rx_alloc(trans);
201 if (err)
202 return err;
203 }
204
205 spin_lock_irqsave(&rxq->lock, flags);
206 INIT_LIST_HEAD(&rxq->rx_free);
207 INIT_LIST_HEAD(&rxq->rx_used);
208
209 iwl_trans_rxq_free_rx_bufs(trans);
210
211 for (i = 0; i < RX_QUEUE_SIZE; i++)
212 rxq->queue[i] = NULL;
213
214 /* Set us so that we have processed and used all buffers, but have
215 * not restocked the Rx queue with fresh buffers */
216 rxq->read = rxq->write = 0;
217 rxq->write_actual = 0;
218 rxq->free_count = 0;
219 spin_unlock_irqrestore(&rxq->lock, flags);
220
221 iwlagn_rx_replenish(trans);
222
223 iwl_trans_rx_hw_init(trans, rxq);
224
225 spin_lock_irqsave(&trans->shrd->lock, flags);
226 rxq->need_update = 1;
227 iwl_rx_queue_update_write_ptr(trans, rxq);
228 spin_unlock_irqrestore(&trans->shrd->lock, flags);
229
230 return 0;
231}
232
233static void iwl_trans_pcie_rx_free(struct iwl_trans *trans)
234{
235 struct iwl_trans_pcie *trans_pcie =
236 IWL_TRANS_GET_PCIE_TRANS(trans);
237 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
238
239 unsigned long flags;
240
241 /*if rxq->bd is NULL, it means that nothing has been allocated,
242 * exit now */
243 if (!rxq->bd) {
244 IWL_DEBUG_INFO(trans, "Free NULL rx context\n");
245 return;
246 }
247
248 spin_lock_irqsave(&rxq->lock, flags);
249 iwl_trans_rxq_free_rx_bufs(trans);
250 spin_unlock_irqrestore(&rxq->lock, flags);
251
252 dma_free_coherent(bus(trans)->dev, sizeof(__le32) * RX_QUEUE_SIZE,
253 rxq->bd, rxq->bd_dma);
254 memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma));
255 rxq->bd = NULL;
256
257 if (rxq->rb_stts)
258 dma_free_coherent(bus(trans)->dev,
259 sizeof(struct iwl_rb_status),
260 rxq->rb_stts, rxq->rb_stts_dma);
261 else
262 IWL_DEBUG_INFO(trans, "Free rxq->rb_stts which is NULL\n");
263 memset(&rxq->rb_stts_dma, 0, sizeof(rxq->rb_stts_dma));
264 rxq->rb_stts = NULL;
265}
266
267static int iwl_trans_rx_stop(struct iwl_trans *trans)
268{
269
270 /* stop Rx DMA */
271 iwl_write_direct32(bus(trans), FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
272 return iwl_poll_direct_bit(bus(trans), FH_MEM_RSSR_RX_STATUS_REG,
273 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
274}
275
276static inline int iwlagn_alloc_dma_ptr(struct iwl_trans *trans,
277 struct iwl_dma_ptr *ptr, size_t size)
278{
279 if (WARN_ON(ptr->addr))
280 return -EINVAL;
281
282 ptr->addr = dma_alloc_coherent(bus(trans)->dev, size,
283 &ptr->dma, GFP_KERNEL);
284 if (!ptr->addr)
285 return -ENOMEM;
286 ptr->size = size;
287 return 0;
288}
289
290static inline void iwlagn_free_dma_ptr(struct iwl_trans *trans,
291 struct iwl_dma_ptr *ptr)
292{
293 if (unlikely(!ptr->addr))
294 return;
295
296 dma_free_coherent(bus(trans)->dev, ptr->size, ptr->addr, ptr->dma);
297 memset(ptr, 0, sizeof(*ptr));
298}
299
300static int iwl_trans_txq_alloc(struct iwl_trans *trans,
301 struct iwl_tx_queue *txq, int slots_num,
302 u32 txq_id)
303{
304 size_t tfd_sz = sizeof(struct iwl_tfd) * TFD_QUEUE_SIZE_MAX;
305 int i;
306
307 if (WARN_ON(txq->meta || txq->cmd || txq->skbs || txq->tfds))
308 return -EINVAL;
309
310 txq->q.n_window = slots_num;
311
312 txq->meta = kzalloc(sizeof(txq->meta[0]) * slots_num,
313 GFP_KERNEL);
314 txq->cmd = kzalloc(sizeof(txq->cmd[0]) * slots_num,
315 GFP_KERNEL);
316
317 if (!txq->meta || !txq->cmd)
318 goto error;
319
320 if (txq_id == trans->shrd->cmd_queue)
321 for (i = 0; i < slots_num; i++) {
322 txq->cmd[i] = kmalloc(sizeof(struct iwl_device_cmd),
323 GFP_KERNEL);
324 if (!txq->cmd[i])
325 goto error;
326 }
327
328 /* Alloc driver data array and TFD circular buffer */
329 /* Driver private data, only for Tx (not command) queues,
330 * not shared with device. */
331 if (txq_id != trans->shrd->cmd_queue) {
332 txq->skbs = kzalloc(sizeof(txq->skbs[0]) *
333 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
334 if (!txq->skbs) {
335 IWL_ERR(trans, "kmalloc for auxiliary BD "
336 "structures failed\n");
337 goto error;
338 }
339 } else {
340 txq->skbs = NULL;
341 }
342
343 /* Circular buffer of transmit frame descriptors (TFDs),
344 * shared with device */
345 txq->tfds = dma_alloc_coherent(bus(trans)->dev, tfd_sz,
346 &txq->q.dma_addr, GFP_KERNEL);
347 if (!txq->tfds) {
348 IWL_ERR(trans, "dma_alloc_coherent(%zd) failed\n", tfd_sz);
349 goto error;
350 }
351 txq->q.id = txq_id;
352
353 return 0;
354error:
355 kfree(txq->skbs);
356 txq->skbs = NULL;
357 /* since txq->cmd has been zeroed,
358 * all non allocated cmd[i] will be NULL */
359 if (txq->cmd && txq_id == trans->shrd->cmd_queue)
360 for (i = 0; i < slots_num; i++)
361 kfree(txq->cmd[i]);
362 kfree(txq->meta);
363 kfree(txq->cmd);
364 txq->meta = NULL;
365 txq->cmd = NULL;
366
367 return -ENOMEM;
368
369}
370
371static int iwl_trans_txq_init(struct iwl_trans *trans, struct iwl_tx_queue *txq,
372 int slots_num, u32 txq_id)
373{
374 int ret;
375
376 txq->need_update = 0;
377 memset(txq->meta, 0, sizeof(txq->meta[0]) * slots_num);
378
379 /*
380 * For the default queues 0-3, set up the swq_id
381 * already -- all others need to get one later
382 * (if they need one at all).
383 */
384 if (txq_id < 4)
385 iwl_set_swq_id(txq, txq_id, txq_id);
386
387 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
388 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
389 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
390
391 /* Initialize queue's high/low-water marks, and head/tail indexes */
392 ret = iwl_queue_init(&txq->q, TFD_QUEUE_SIZE_MAX, slots_num,
393 txq_id);
394 if (ret)
395 return ret;
396
397 /*
398 * Tell nic where to find circular buffer of Tx Frame Descriptors for
399 * given Tx queue, and enable the DMA channel used for that queue.
400 * Circular buffer (TFD queue in DRAM) physical base address */
401 iwl_write_direct32(bus(trans), FH_MEM_CBBC_QUEUE(txq_id),
402 txq->q.dma_addr >> 8);
403
404 return 0;
405}
406
407/**
408 * iwl_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
409 */
410static void iwl_tx_queue_unmap(struct iwl_trans *trans, int txq_id)
411{
412 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
413 struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id];
414 struct iwl_queue *q = &txq->q;
415
416 if (!q->n_bd)
417 return;
418
419 while (q->write_ptr != q->read_ptr) {
420 /* The read_ptr needs to bound by q->n_window */
421 iwlagn_txq_free_tfd(trans, txq, get_cmd_index(q, q->read_ptr));
422 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd);
423 }
424}
425
426/**
427 * iwl_tx_queue_free - Deallocate DMA queue.
428 * @txq: Transmit queue to deallocate.
429 *
430 * Empty queue by removing and destroying all BD's.
431 * Free all buffers.
432 * 0-fill, but do not free "txq" descriptor structure.
433 */
434static void iwl_tx_queue_free(struct iwl_trans *trans, int txq_id)
435{
436 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
437 struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id];
438 struct device *dev = bus(trans)->dev;
439 int i;
440 if (WARN_ON(!txq))
441 return;
442
443 iwl_tx_queue_unmap(trans, txq_id);
444
445 /* De-alloc array of command/tx buffers */
446
447 if (txq_id == trans->shrd->cmd_queue)
448 for (i = 0; i < txq->q.n_window; i++)
449 kfree(txq->cmd[i]);
450
451 /* De-alloc circular buffer of TFDs */
452 if (txq->q.n_bd) {
453 dma_free_coherent(dev, sizeof(struct iwl_tfd) *
454 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
455 memset(&txq->q.dma_addr, 0, sizeof(txq->q.dma_addr));
456 }
457
458 /* De-alloc array of per-TFD driver data */
459 kfree(txq->skbs);
460 txq->skbs = NULL;
461
462 /* deallocate arrays */
463 kfree(txq->cmd);
464 kfree(txq->meta);
465 txq->cmd = NULL;
466 txq->meta = NULL;
467
468 /* 0-fill queue descriptor structure */
469 memset(txq, 0, sizeof(*txq));
470}
471
472/**
473 * iwl_trans_tx_free - Free TXQ Context
474 *
475 * Destroy all TX DMA queues and structures
476 */
477static void iwl_trans_pcie_tx_free(struct iwl_trans *trans)
478{
479 int txq_id;
480 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
481
482 /* Tx queues */
483 if (trans_pcie->txq) {
484 for (txq_id = 0;
485 txq_id < hw_params(trans).max_txq_num; txq_id++)
486 iwl_tx_queue_free(trans, txq_id);
487 }
488
489 kfree(trans_pcie->txq);
490 trans_pcie->txq = NULL;
491
492 iwlagn_free_dma_ptr(trans, &trans_pcie->kw);
493
494 iwlagn_free_dma_ptr(trans, &trans_pcie->scd_bc_tbls);
495}
496
497/**
498 * iwl_trans_tx_alloc - allocate TX context
499 * Allocate all Tx DMA structures and initialize them
500 *
501 * @param priv
502 * @return error code
503 */
504static int iwl_trans_tx_alloc(struct iwl_trans *trans)
505{
506 int ret;
507 int txq_id, slots_num;
508 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
509
510 u16 scd_bc_tbls_size = hw_params(trans).max_txq_num *
511 sizeof(struct iwlagn_scd_bc_tbl);
512
513 /*It is not allowed to alloc twice, so warn when this happens.
514 * We cannot rely on the previous allocation, so free and fail */
515 if (WARN_ON(trans_pcie->txq)) {
516 ret = -EINVAL;
517 goto error;
518 }
519
520 ret = iwlagn_alloc_dma_ptr(trans, &trans_pcie->scd_bc_tbls,
521 scd_bc_tbls_size);
522 if (ret) {
523 IWL_ERR(trans, "Scheduler BC Table allocation failed\n");
524 goto error;
525 }
526
527 /* Alloc keep-warm buffer */
528 ret = iwlagn_alloc_dma_ptr(trans, &trans_pcie->kw, IWL_KW_SIZE);
529 if (ret) {
530 IWL_ERR(trans, "Keep Warm allocation failed\n");
531 goto error;
532 }
533
534 trans_pcie->txq = kzalloc(sizeof(struct iwl_tx_queue) *
535 hw_params(trans).max_txq_num, GFP_KERNEL);
536 if (!trans_pcie->txq) {
537 IWL_ERR(trans, "Not enough memory for txq\n");
538 ret = ENOMEM;
539 goto error;
540 }
541
542 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
543 for (txq_id = 0; txq_id < hw_params(trans).max_txq_num; txq_id++) {
544 slots_num = (txq_id == trans->shrd->cmd_queue) ?
545 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
546 ret = iwl_trans_txq_alloc(trans, &trans_pcie->txq[txq_id],
547 slots_num, txq_id);
548 if (ret) {
549 IWL_ERR(trans, "Tx %d queue alloc failed\n", txq_id);
550 goto error;
551 }
552 }
553
554 return 0;
555
556error:
557 iwl_trans_pcie_tx_free(trans);
558
559 return ret;
560}
561static int iwl_tx_init(struct iwl_trans *trans)
562{
563 int ret;
564 int txq_id, slots_num;
565 unsigned long flags;
566 bool alloc = false;
567 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
568
569 if (!trans_pcie->txq) {
570 ret = iwl_trans_tx_alloc(trans);
571 if (ret)
572 goto error;
573 alloc = true;
574 }
575
576 spin_lock_irqsave(&trans->shrd->lock, flags);
577
578 /* Turn off all Tx DMA fifos */
579 iwl_write_prph(bus(trans), SCD_TXFACT, 0);
580
581 /* Tell NIC where to find the "keep warm" buffer */
582 iwl_write_direct32(bus(trans), FH_KW_MEM_ADDR_REG,
583 trans_pcie->kw.dma >> 4);
584
585 spin_unlock_irqrestore(&trans->shrd->lock, flags);
586
587 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
588 for (txq_id = 0; txq_id < hw_params(trans).max_txq_num; txq_id++) {
589 slots_num = (txq_id == trans->shrd->cmd_queue) ?
590 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
591 ret = iwl_trans_txq_init(trans, &trans_pcie->txq[txq_id],
592 slots_num, txq_id);
593 if (ret) {
594 IWL_ERR(trans, "Tx %d queue init failed\n", txq_id);
595 goto error;
596 }
597 }
598
599 return 0;
600error:
601 /*Upon error, free only if we allocated something */
602 if (alloc)
603 iwl_trans_pcie_tx_free(trans);
604 return ret;
605}
606
607static void iwl_set_pwr_vmain(struct iwl_priv *priv)
608{
609 struct iwl_trans *trans = trans(priv);
610/*
611 * (for documentation purposes)
612 * to set power to V_AUX, do:
613
614 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
615 iwl_set_bits_mask_prph(bus(trans), APMG_PS_CTRL_REG,
616 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
617 ~APMG_PS_CTRL_MSK_PWR_SRC);
618 */
619
620 iwl_set_bits_mask_prph(bus(trans), APMG_PS_CTRL_REG,
621 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
622 ~APMG_PS_CTRL_MSK_PWR_SRC);
623}
624
625static int iwl_nic_init(struct iwl_trans *trans)
626{
627 unsigned long flags;
628 struct iwl_priv *priv = priv(trans);
629
630 /* nic_init */
631 spin_lock_irqsave(&trans->shrd->lock, flags);
632 iwl_apm_init(priv);
633
634 /* Set interrupt coalescing calibration timer to default (512 usecs) */
635 iwl_write8(bus(trans), CSR_INT_COALESCING,
636 IWL_HOST_INT_CALIB_TIMEOUT_DEF);
637
638 spin_unlock_irqrestore(&trans->shrd->lock, flags);
639
640 iwl_set_pwr_vmain(priv);
641
642 priv->cfg->lib->nic_config(priv);
643
644 /* Allocate the RX queue, or reset if it is already allocated */
645 iwl_rx_init(trans);
646
647 /* Allocate or reset and init all Tx and Command queues */
648 if (iwl_tx_init(trans))
649 return -ENOMEM;
650
651 if (hw_params(trans).shadow_reg_enable) {
652 /* enable shadow regs in HW */
653 iwl_set_bit(bus(trans), CSR_MAC_SHADOW_REG_CTRL,
654 0x800FFFFF);
655 }
656
657 set_bit(STATUS_INIT, &trans->shrd->status);
658
659 return 0;
660}
661
662#define HW_READY_TIMEOUT (50)
663
664/* Note: returns poll_bit return value, which is >= 0 if success */
665static int iwl_set_hw_ready(struct iwl_trans *trans)
666{
667 int ret;
668
669 iwl_set_bit(bus(trans), CSR_HW_IF_CONFIG_REG,
670 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
671
672 /* See if we got it */
673 ret = iwl_poll_bit(bus(trans), CSR_HW_IF_CONFIG_REG,
674 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
675 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
676 HW_READY_TIMEOUT);
677
678 IWL_DEBUG_INFO(trans, "hardware%s ready\n", ret < 0 ? " not" : "");
679 return ret;
680}
681
682/* Note: returns standard 0/-ERROR code */
683static int iwl_trans_pcie_prepare_card_hw(struct iwl_trans *trans)
684{
685 int ret;
686
687 IWL_DEBUG_INFO(trans, "iwl_trans_prepare_card_hw enter\n");
688
689 ret = iwl_set_hw_ready(trans);
690 if (ret >= 0)
691 return 0;
692
693 /* If HW is not ready, prepare the conditions to check again */
694 iwl_set_bit(bus(trans), CSR_HW_IF_CONFIG_REG,
695 CSR_HW_IF_CONFIG_REG_PREPARE);
696
697 ret = iwl_poll_bit(bus(trans), CSR_HW_IF_CONFIG_REG,
698 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
699 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
700
701 if (ret < 0)
702 return ret;
703
704 /* HW should be ready by now, check again. */
705 ret = iwl_set_hw_ready(trans);
706 if (ret >= 0)
707 return 0;
708 return ret;
709}
710
711#define IWL_AC_UNSET -1
712
713struct queue_to_fifo_ac {
714 s8 fifo, ac;
715};
716
717static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = {
718 { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
719 { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
720 { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
721 { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
722 { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
723 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
724 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
725 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
726 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
727 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
728 { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
729};
730
731static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = {
732 { IWL_TX_FIFO_VO, IEEE80211_AC_VO, },
733 { IWL_TX_FIFO_VI, IEEE80211_AC_VI, },
734 { IWL_TX_FIFO_BE, IEEE80211_AC_BE, },
735 { IWL_TX_FIFO_BK, IEEE80211_AC_BK, },
736 { IWL_TX_FIFO_BK_IPAN, IEEE80211_AC_BK, },
737 { IWL_TX_FIFO_BE_IPAN, IEEE80211_AC_BE, },
738 { IWL_TX_FIFO_VI_IPAN, IEEE80211_AC_VI, },
739 { IWL_TX_FIFO_VO_IPAN, IEEE80211_AC_VO, },
740 { IWL_TX_FIFO_BE_IPAN, 2, },
741 { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
742 { IWL_TX_FIFO_AUX, IWL_AC_UNSET, },
743};
744
745static const u8 iwlagn_bss_ac_to_fifo[] = {
746 IWL_TX_FIFO_VO,
747 IWL_TX_FIFO_VI,
748 IWL_TX_FIFO_BE,
749 IWL_TX_FIFO_BK,
750};
751static const u8 iwlagn_bss_ac_to_queue[] = {
752 0, 1, 2, 3,
753};
754static const u8 iwlagn_pan_ac_to_fifo[] = {
755 IWL_TX_FIFO_VO_IPAN,
756 IWL_TX_FIFO_VI_IPAN,
757 IWL_TX_FIFO_BE_IPAN,
758 IWL_TX_FIFO_BK_IPAN,
759};
760static const u8 iwlagn_pan_ac_to_queue[] = {
761 7, 6, 5, 4,
762};
763
764static int iwl_trans_pcie_start_device(struct iwl_trans *trans)
765{
766 int ret;
767 struct iwl_priv *priv = priv(trans);
768 struct iwl_trans_pcie *trans_pcie =
769 IWL_TRANS_GET_PCIE_TRANS(trans);
770
771 trans->shrd->ucode_owner = IWL_OWNERSHIP_DRIVER;
772 trans_pcie->ac_to_queue[IWL_RXON_CTX_BSS] = iwlagn_bss_ac_to_queue;
773 trans_pcie->ac_to_queue[IWL_RXON_CTX_PAN] = iwlagn_pan_ac_to_queue;
774
775 trans_pcie->ac_to_fifo[IWL_RXON_CTX_BSS] = iwlagn_bss_ac_to_fifo;
776 trans_pcie->ac_to_fifo[IWL_RXON_CTX_PAN] = iwlagn_pan_ac_to_fifo;
777
778 trans_pcie->mcast_queue[IWL_RXON_CTX_BSS] = 0;
779 trans_pcie->mcast_queue[IWL_RXON_CTX_PAN] = IWL_IPAN_MCAST_QUEUE;
780
781 if ((hw_params(trans).sku & EEPROM_SKU_CAP_AMT_ENABLE) &&
782 iwl_trans_pcie_prepare_card_hw(trans)) {
783 IWL_WARN(trans, "Exit HW not ready\n");
784 return -EIO;
785 }
786
787 /* If platform's RF_KILL switch is NOT set to KILL */
788 if (iwl_read32(bus(trans), CSR_GP_CNTRL) &
789 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
790 clear_bit(STATUS_RF_KILL_HW, &trans->shrd->status);
791 else
792 set_bit(STATUS_RF_KILL_HW, &trans->shrd->status);
793
794 if (iwl_is_rfkill(trans->shrd)) {
795 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
796 iwl_enable_interrupts(trans);
797 return -ERFKILL;
798 }
799
800 iwl_write32(bus(trans), CSR_INT, 0xFFFFFFFF);
801
802 ret = iwl_nic_init(trans);
803 if (ret) {
804 IWL_ERR(trans, "Unable to init nic\n");
805 return ret;
806 }
807
808 /* make sure rfkill handshake bits are cleared */
809 iwl_write32(bus(trans), CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
810 iwl_write32(bus(trans), CSR_UCODE_DRV_GP1_CLR,
811 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
812
813 /* clear (again), then enable host interrupts */
814 iwl_write32(bus(trans), CSR_INT, 0xFFFFFFFF);
815 iwl_enable_interrupts(trans);
816
817 /* really make sure rfkill handshake bits are cleared */
818 iwl_write32(bus(trans), CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
819 iwl_write32(bus(trans), CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
820
821 return 0;
822}
823
824/*
825 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
826 * must be called under priv->shrd->lock and mac access
827 */
828static void iwl_trans_txq_set_sched(struct iwl_trans *trans, u32 mask)
829{
830 iwl_write_prph(bus(trans), SCD_TXFACT, mask);
831}
832
833static void iwl_trans_pcie_tx_start(struct iwl_trans *trans)
834{
835 const struct queue_to_fifo_ac *queue_to_fifo;
836 struct iwl_rxon_context *ctx;
837 struct iwl_priv *priv = priv(trans);
838 struct iwl_trans_pcie *trans_pcie =
839 IWL_TRANS_GET_PCIE_TRANS(trans);
840 u32 a;
841 unsigned long flags;
842 int i, chan;
843 u32 reg_val;
844
845 spin_lock_irqsave(&trans->shrd->lock, flags);
846
847 trans_pcie->scd_base_addr =
848 iwl_read_prph(bus(trans), SCD_SRAM_BASE_ADDR);
849 a = trans_pcie->scd_base_addr + SCD_CONTEXT_MEM_LOWER_BOUND;
850 /* reset conext data memory */
851 for (; a < trans_pcie->scd_base_addr + SCD_CONTEXT_MEM_UPPER_BOUND;
852 a += 4)
853 iwl_write_targ_mem(bus(trans), a, 0);
854 /* reset tx status memory */
855 for (; a < trans_pcie->scd_base_addr + SCD_TX_STTS_MEM_UPPER_BOUND;
856 a += 4)
857 iwl_write_targ_mem(bus(trans), a, 0);
858 for (; a < trans_pcie->scd_base_addr +
859 SCD_TRANS_TBL_OFFSET_QUEUE(hw_params(trans).max_txq_num);
860 a += 4)
861 iwl_write_targ_mem(bus(trans), a, 0);
862
863 iwl_write_prph(bus(trans), SCD_DRAM_BASE_ADDR,
864 trans_pcie->scd_bc_tbls.dma >> 10);
865
866 /* Enable DMA channel */
867 for (chan = 0; chan < FH_TCSR_CHNL_NUM ; chan++)
868 iwl_write_direct32(bus(trans), FH_TCSR_CHNL_TX_CONFIG_REG(chan),
869 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
870 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
871
872 /* Update FH chicken bits */
873 reg_val = iwl_read_direct32(bus(trans), FH_TX_CHICKEN_BITS_REG);
874 iwl_write_direct32(bus(trans), FH_TX_CHICKEN_BITS_REG,
875 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
876
877 iwl_write_prph(bus(trans), SCD_QUEUECHAIN_SEL,
878 SCD_QUEUECHAIN_SEL_ALL(trans));
879 iwl_write_prph(bus(trans), SCD_AGGR_SEL, 0);
880
881 /* initiate the queues */
882 for (i = 0; i < hw_params(trans).max_txq_num; i++) {
883 iwl_write_prph(bus(trans), SCD_QUEUE_RDPTR(i), 0);
884 iwl_write_direct32(bus(trans), HBUS_TARG_WRPTR, 0 | (i << 8));
885 iwl_write_targ_mem(bus(trans), trans_pcie->scd_base_addr +
886 SCD_CONTEXT_QUEUE_OFFSET(i), 0);
887 iwl_write_targ_mem(bus(trans), trans_pcie->scd_base_addr +
888 SCD_CONTEXT_QUEUE_OFFSET(i) +
889 sizeof(u32),
890 ((SCD_WIN_SIZE <<
891 SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
892 SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
893 ((SCD_FRAME_LIMIT <<
894 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
895 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
896 }
897
898 iwl_write_prph(bus(trans), SCD_INTERRUPT_MASK,
899 IWL_MASK(0, hw_params(trans).max_txq_num));
900
901 /* Activate all Tx DMA/FIFO channels */
902 iwl_trans_txq_set_sched(trans, IWL_MASK(0, 7));
903
904 /* map queues to FIFOs */
905 if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
906 queue_to_fifo = iwlagn_ipan_queue_to_tx_fifo;
907 else
908 queue_to_fifo = iwlagn_default_queue_to_tx_fifo;
909
910 iwl_trans_set_wr_ptrs(trans, trans->shrd->cmd_queue, 0);
911
912 /* make sure all queue are not stopped */
913 memset(&trans_pcie->queue_stopped[0], 0,
914 sizeof(trans_pcie->queue_stopped));
915 for (i = 0; i < 4; i++)
916 atomic_set(&trans_pcie->queue_stop_count[i], 0);
917 for_each_context(priv, ctx)
918 ctx->last_tx_rejected = false;
919
920 /* reset to 0 to enable all the queue first */
921 trans_pcie->txq_ctx_active_msk = 0;
922
923 BUILD_BUG_ON(ARRAY_SIZE(iwlagn_default_queue_to_tx_fifo) <
924 IWLAGN_FIRST_AMPDU_QUEUE);
925 BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) <
926 IWLAGN_FIRST_AMPDU_QUEUE);
927
928 for (i = 0; i < IWLAGN_FIRST_AMPDU_QUEUE; i++) {
929 int fifo = queue_to_fifo[i].fifo;
930 int ac = queue_to_fifo[i].ac;
931
932 iwl_txq_ctx_activate(trans_pcie, i);
933
934 if (fifo == IWL_TX_FIFO_UNUSED)
935 continue;
936
937 if (ac != IWL_AC_UNSET)
938 iwl_set_swq_id(&trans_pcie->txq[i], ac, i);
939 iwl_trans_tx_queue_set_status(trans, &trans_pcie->txq[i],
940 fifo, 0);
941 }
942
943 spin_unlock_irqrestore(&trans->shrd->lock, flags);
944
945 /* Enable L1-Active */
946 iwl_clear_bits_prph(bus(trans), APMG_PCIDEV_STT_REG,
947 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
948}
949
950/**
951 * iwlagn_txq_ctx_stop - Stop all Tx DMA channels
952 */
953static int iwl_trans_tx_stop(struct iwl_trans *trans)
954{
955 int ch, txq_id;
956 unsigned long flags;
957 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
958
959 /* Turn off all Tx DMA fifos */
960 spin_lock_irqsave(&trans->shrd->lock, flags);
961
962 iwl_trans_txq_set_sched(trans, 0);
963
964 /* Stop each Tx DMA channel, and wait for it to be idle */
965 for (ch = 0; ch < FH_TCSR_CHNL_NUM; ch++) {
966 iwl_write_direct32(bus(trans),
967 FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
968 if (iwl_poll_direct_bit(bus(trans), FH_TSSR_TX_STATUS_REG,
969 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
970 1000))
971 IWL_ERR(trans, "Failing on timeout while stopping"
972 " DMA channel %d [0x%08x]", ch,
973 iwl_read_direct32(bus(trans),
974 FH_TSSR_TX_STATUS_REG));
975 }
976 spin_unlock_irqrestore(&trans->shrd->lock, flags);
977
978 if (!trans_pcie->txq) {
979 IWL_WARN(trans, "Stopping tx queues that aren't allocated...");
980 return 0;
981 }
982
983 /* Unmap DMA from host system and free skb's */
984 for (txq_id = 0; txq_id < hw_params(trans).max_txq_num; txq_id++)
985 iwl_tx_queue_unmap(trans, txq_id);
986
987 return 0;
988}
989
990static void iwl_trans_pcie_disable_sync_irq(struct iwl_trans *trans)
991{
992 unsigned long flags;
993 struct iwl_trans_pcie *trans_pcie =
994 IWL_TRANS_GET_PCIE_TRANS(trans);
995
996 spin_lock_irqsave(&trans->shrd->lock, flags);
997 iwl_disable_interrupts(trans);
998 spin_unlock_irqrestore(&trans->shrd->lock, flags);
999
1000 /* wait to make sure we flush pending tasklet*/
1001 synchronize_irq(bus(trans)->irq);
1002 tasklet_kill(&trans_pcie->irq_tasklet);
1003}
1004
1005static void iwl_trans_pcie_stop_device(struct iwl_trans *trans)
1006{
1007 /* stop and reset the on-board processor */
1008 iwl_write32(bus(trans), CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1009
1010 /* tell the device to stop sending interrupts */
1011 iwl_trans_pcie_disable_sync_irq(trans);
1012
1013 /* device going down, Stop using ICT table */
1014 iwl_disable_ict(trans);
1015
1016 /*
1017 * If a HW restart happens during firmware loading,
1018 * then the firmware loading might call this function
1019 * and later it might be called again due to the
1020 * restart. So don't process again if the device is
1021 * already dead.
1022 */
1023 if (test_bit(STATUS_DEVICE_ENABLED, &trans->shrd->status)) {
1024 iwl_trans_tx_stop(trans);
1025 iwl_trans_rx_stop(trans);
1026
1027 /* Power-down device's busmaster DMA clocks */
1028 iwl_write_prph(bus(trans), APMG_CLK_DIS_REG,
1029 APMG_CLK_VAL_DMA_CLK_RQT);
1030 udelay(5);
1031 }
1032
1033 /* Make sure (redundant) we've released our request to stay awake */
1034 iwl_clear_bit(bus(trans), CSR_GP_CNTRL,
1035 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1036
1037 /* Stop the device, and put it in low power state */
1038 iwl_apm_stop(priv(trans));
1039}
1040
1041static int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb,
1042 struct iwl_device_cmd *dev_cmd, u8 ctx, u8 sta_id)
1043{
1044 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1045 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1046 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1047 struct iwl_tx_cmd *tx_cmd = &dev_cmd->cmd.tx;
1048 struct iwl_cmd_meta *out_meta;
1049 struct iwl_tx_queue *txq;
1050 struct iwl_queue *q;
1051
1052 dma_addr_t phys_addr = 0;
1053 dma_addr_t txcmd_phys;
1054 dma_addr_t scratch_phys;
1055 u16 len, firstlen, secondlen;
1056 u16 seq_number = 0;
1057 u8 wait_write_ptr = 0;
1058 u8 txq_id;
1059 u8 tid = 0;
1060 bool is_agg = false;
1061 __le16 fc = hdr->frame_control;
1062 u8 hdr_len = ieee80211_hdrlen(fc);
1063
1064 /*
1065 * Send this frame after DTIM -- there's a special queue
1066 * reserved for this for contexts that support AP mode.
1067 */
1068 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
1069 txq_id = trans_pcie->mcast_queue[ctx];
1070
1071 /*
1072 * The microcode will clear the more data
1073 * bit in the last frame it transmits.
1074 */
1075 hdr->frame_control |=
1076 cpu_to_le16(IEEE80211_FCTL_MOREDATA);
1077 } else if (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)
1078 txq_id = IWL_AUX_QUEUE;
1079 else
1080 txq_id =
1081 trans_pcie->ac_to_queue[ctx][skb_get_queue_mapping(skb)];
1082
1083 if (ieee80211_is_data_qos(fc)) {
1084 u8 *qc = NULL;
1085 struct iwl_tid_data *tid_data;
1086 qc = ieee80211_get_qos_ctl(hdr);
1087 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
1088 tid_data = &trans->shrd->tid_data[sta_id][tid];
1089
1090 if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT))
1091 return -1;
1092
1093 seq_number = tid_data->seq_number;
1094 seq_number &= IEEE80211_SCTL_SEQ;
1095 hdr->seq_ctrl = hdr->seq_ctrl &
1096 cpu_to_le16(IEEE80211_SCTL_FRAG);
1097 hdr->seq_ctrl |= cpu_to_le16(seq_number);
1098 seq_number += 0x10;
1099 /* aggregation is on for this <sta,tid> */
1100 if (info->flags & IEEE80211_TX_CTL_AMPDU &&
1101 tid_data->agg.state == IWL_AGG_ON) {
1102 txq_id = tid_data->agg.txq_id;
1103 is_agg = true;
1104 }
1105 }
1106
1107 txq = &trans_pcie->txq[txq_id];
1108 q = &txq->q;
1109
1110 /* Set up driver data for this TFD */
1111 txq->skbs[q->write_ptr] = skb;
1112 txq->cmd[q->write_ptr] = dev_cmd;
1113
1114 dev_cmd->hdr.cmd = REPLY_TX;
1115 dev_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
1116 INDEX_TO_SEQ(q->write_ptr)));
1117
1118 /* Set up first empty entry in queue's array of Tx/cmd buffers */
1119 out_meta = &txq->meta[q->write_ptr];
1120
1121 /*
1122 * Use the first empty entry in this queue's command buffer array
1123 * to contain the Tx command and MAC header concatenated together
1124 * (payload data will be in another buffer).
1125 * Size of this varies, due to varying MAC header length.
1126 * If end is not dword aligned, we'll have 2 extra bytes at the end
1127 * of the MAC header (device reads on dword boundaries).
1128 * We'll tell device about this padding later.
1129 */
1130 len = sizeof(struct iwl_tx_cmd) +
1131 sizeof(struct iwl_cmd_header) + hdr_len;
1132 firstlen = (len + 3) & ~3;
1133
1134 /* Tell NIC about any 2-byte padding after MAC header */
1135 if (firstlen != len)
1136 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
1137
1138 /* Physical address of this Tx command's header (not MAC header!),
1139 * within command buffer array. */
1140 txcmd_phys = dma_map_single(bus(trans)->dev,
1141 &dev_cmd->hdr, firstlen,
1142 DMA_BIDIRECTIONAL);
1143 if (unlikely(dma_mapping_error(bus(trans)->dev, txcmd_phys)))
1144 return -1;
1145 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
1146 dma_unmap_len_set(out_meta, len, firstlen);
1147
1148 if (!ieee80211_has_morefrags(fc)) {
1149 txq->need_update = 1;
1150 } else {
1151 wait_write_ptr = 1;
1152 txq->need_update = 0;
1153 }
1154
1155 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1156 * if any (802.11 null frames have no payload). */
1157 secondlen = skb->len - hdr_len;
1158 if (secondlen > 0) {
1159 phys_addr = dma_map_single(bus(trans)->dev, skb->data + hdr_len,
1160 secondlen, DMA_TO_DEVICE);
1161 if (unlikely(dma_mapping_error(bus(trans)->dev, phys_addr))) {
1162 dma_unmap_single(bus(trans)->dev,
1163 dma_unmap_addr(out_meta, mapping),
1164 dma_unmap_len(out_meta, len),
1165 DMA_BIDIRECTIONAL);
1166 return -1;
1167 }
1168 }
1169
1170 /* Attach buffers to TFD */
1171 iwlagn_txq_attach_buf_to_tfd(trans, txq, txcmd_phys, firstlen, 1);
1172 if (secondlen > 0)
1173 iwlagn_txq_attach_buf_to_tfd(trans, txq, phys_addr,
1174 secondlen, 0);
1175
1176 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
1177 offsetof(struct iwl_tx_cmd, scratch);
1178
1179 /* take back ownership of DMA buffer to enable update */
1180 dma_sync_single_for_cpu(bus(trans)->dev, txcmd_phys, firstlen,
1181 DMA_BIDIRECTIONAL);
1182 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
1183 tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
1184
1185 IWL_DEBUG_TX(trans, "sequence nr = 0X%x\n",
1186 le16_to_cpu(dev_cmd->hdr.sequence));
1187 IWL_DEBUG_TX(trans, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
1188 iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
1189 iwl_print_hex_dump(trans, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
1190
1191 /* Set up entry for this TFD in Tx byte-count array */
1192 if (is_agg)
1193 iwl_trans_txq_update_byte_cnt_tbl(trans, txq,
1194 le16_to_cpu(tx_cmd->len));
1195
1196 dma_sync_single_for_device(bus(trans)->dev, txcmd_phys, firstlen,
1197 DMA_BIDIRECTIONAL);
1198
1199 trace_iwlwifi_dev_tx(priv(trans),
1200 &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
1201 sizeof(struct iwl_tfd),
1202 &dev_cmd->hdr, firstlen,
1203 skb->data + hdr_len, secondlen);
1204
1205 /* Tell device the write index *just past* this latest filled TFD */
1206 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
1207 iwl_txq_update_write_ptr(trans, txq);
1208
1209 if (ieee80211_is_data_qos(fc)) {
1210 trans->shrd->tid_data[sta_id][tid].tfds_in_queue++;
1211 if (!ieee80211_has_morefrags(fc))
1212 trans->shrd->tid_data[sta_id][tid].seq_number =
1213 seq_number;
1214 }
1215
1216 /*
1217 * At this point the frame is "transmitted" successfully
1218 * and we will get a TX status notification eventually,
1219 * regardless of the value of ret. "ret" only indicates
1220 * whether or not we should update the write pointer.
1221 */
1222 if (iwl_queue_space(q) < q->high_mark) {
1223 if (wait_write_ptr) {
1224 txq->need_update = 1;
1225 iwl_txq_update_write_ptr(trans, txq);
1226 } else {
1227 iwl_stop_queue(trans, txq);
1228 }
1229 }
1230 return 0;
1231}
1232
1233static void iwl_trans_pcie_kick_nic(struct iwl_trans *trans)
1234{
1235 /* Remove all resets to allow NIC to operate */
1236 iwl_write32(bus(trans), CSR_RESET, 0);
1237}
1238
1239static int iwl_trans_pcie_request_irq(struct iwl_trans *trans)
1240{
1241 struct iwl_trans_pcie *trans_pcie =
1242 IWL_TRANS_GET_PCIE_TRANS(trans);
1243 int err;
1244
1245 trans_pcie->inta_mask = CSR_INI_SET_MASK;
1246
1247 tasklet_init(&trans_pcie->irq_tasklet, (void (*)(unsigned long))
1248 iwl_irq_tasklet, (unsigned long)trans);
1249
1250 iwl_alloc_isr_ict(trans);
1251
1252 err = request_irq(bus(trans)->irq, iwl_isr_ict, IRQF_SHARED,
1253 DRV_NAME, trans);
1254 if (err) {
1255 IWL_ERR(trans, "Error allocating IRQ %d\n", bus(trans)->irq);
1256 iwl_free_isr_ict(trans);
1257 return err;
1258 }
1259
1260 INIT_WORK(&trans_pcie->rx_replenish, iwl_bg_rx_replenish);
1261 return 0;
1262}
1263
1264static int iwlagn_txq_check_empty(struct iwl_trans *trans,
1265 int sta_id, u8 tid, int txq_id)
1266{
1267 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1268 struct iwl_queue *q = &trans_pcie->txq[txq_id].q;
1269 struct iwl_tid_data *tid_data = &trans->shrd->tid_data[sta_id][tid];
1270
1271 lockdep_assert_held(&trans->shrd->sta_lock);
1272
1273 switch (trans->shrd->tid_data[sta_id][tid].agg.state) {
1274 case IWL_EMPTYING_HW_QUEUE_DELBA:
1275 /* We are reclaiming the last packet of the */
1276 /* aggregated HW queue */
1277 if ((txq_id == tid_data->agg.txq_id) &&
1278 (q->read_ptr == q->write_ptr)) {
1279 IWL_DEBUG_HT(trans,
1280 "HW queue empty: continue DELBA flow\n");
1281 iwl_trans_pcie_txq_agg_disable(trans, txq_id);
1282 tid_data->agg.state = IWL_AGG_OFF;
1283 iwl_stop_tx_ba_trans_ready(priv(trans),
1284 NUM_IWL_RXON_CTX,
1285 sta_id, tid);
1286 iwl_wake_queue(trans, &trans_pcie->txq[txq_id]);
1287 }
1288 break;
1289 case IWL_EMPTYING_HW_QUEUE_ADDBA:
1290 /* We are reclaiming the last packet of the queue */
1291 if (tid_data->tfds_in_queue == 0) {
1292 IWL_DEBUG_HT(trans,
1293 "HW queue empty: continue ADDBA flow\n");
1294 tid_data->agg.state = IWL_AGG_ON;
1295 iwl_start_tx_ba_trans_ready(priv(trans),
1296 NUM_IWL_RXON_CTX,
1297 sta_id, tid);
1298 }
1299 break;
1300 }
1301
1302 return 0;
1303}
1304
1305static void iwl_free_tfds_in_queue(struct iwl_trans *trans,
1306 int sta_id, int tid, int freed)
1307{
1308 lockdep_assert_held(&trans->shrd->sta_lock);
1309
1310 if (trans->shrd->tid_data[sta_id][tid].tfds_in_queue >= freed)
1311 trans->shrd->tid_data[sta_id][tid].tfds_in_queue -= freed;
1312 else {
1313 IWL_DEBUG_TX(trans, "free more than tfds_in_queue (%u:%d)\n",
1314 trans->shrd->tid_data[sta_id][tid].tfds_in_queue,
1315 freed);
1316 trans->shrd->tid_data[sta_id][tid].tfds_in_queue = 0;
1317 }
1318}
1319
1320static void iwl_trans_pcie_reclaim(struct iwl_trans *trans, int sta_id, int tid,
1321 int txq_id, int ssn, u32 status,
1322 struct sk_buff_head *skbs)
1323{
1324 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1325 struct iwl_tx_queue *txq = &trans_pcie->txq[txq_id];
1326 /* n_bd is usually 256 => n_bd - 1 = 0xff */
1327 int tfd_num = ssn & (txq->q.n_bd - 1);
1328 int freed = 0;
1329 u8 agg_state;
1330 bool cond;
1331
1332 txq->time_stamp = jiffies;
1333
1334 if (txq->sched_retry) {
1335 agg_state =
1336 trans->shrd->tid_data[txq->sta_id][txq->tid].agg.state;
1337 cond = (agg_state != IWL_EMPTYING_HW_QUEUE_DELBA);
1338 } else {
1339 cond = (status != TX_STATUS_FAIL_PASSIVE_NO_RX);
1340 }
1341
1342 if (txq->q.read_ptr != tfd_num) {
1343 IWL_DEBUG_TX_REPLY(trans, "Retry scheduler reclaim "
1344 "scd_ssn=%d idx=%d txq=%d swq=%d\n",
1345 ssn , tfd_num, txq_id, txq->swq_id);
1346 freed = iwl_tx_queue_reclaim(trans, txq_id, tfd_num, skbs);
1347 if (iwl_queue_space(&txq->q) > txq->q.low_mark && cond)
1348 iwl_wake_queue(trans, txq);
1349 }
1350
1351 iwl_free_tfds_in_queue(trans, sta_id, tid, freed);
1352 iwlagn_txq_check_empty(trans, sta_id, tid, txq_id);
1353}
1354
1355static void iwl_trans_pcie_free(struct iwl_trans *trans)
1356{
1357 iwl_trans_pcie_tx_free(trans);
1358 iwl_trans_pcie_rx_free(trans);
1359 free_irq(bus(trans)->irq, trans);
1360 iwl_free_isr_ict(trans);
1361 trans->shrd->trans = NULL;
1362 kfree(trans);
1363}
1364
1365#ifdef CONFIG_PM
1366
1367static int iwl_trans_pcie_suspend(struct iwl_trans *trans)
1368{
1369 /*
1370 * This function is called when system goes into suspend state
1371 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
1372 * first but since iwl_mac_stop() has no knowledge of who the caller is,
1373 * it will not call apm_ops.stop() to stop the DMA operation.
1374 * Calling apm_ops.stop here to make sure we stop the DMA.
1375 *
1376 * But of course ... if we have configured WoWLAN then we did other
1377 * things already :-)
1378 */
1379 if (!trans->shrd->wowlan)
1380 iwl_apm_stop(priv(trans));
1381
1382 return 0;
1383}
1384
1385static int iwl_trans_pcie_resume(struct iwl_trans *trans)
1386{
1387 bool hw_rfkill = false;
1388
1389 iwl_enable_interrupts(trans);
1390
1391 if (!(iwl_read32(bus(trans), CSR_GP_CNTRL) &
1392 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1393 hw_rfkill = true;
1394
1395 if (hw_rfkill)
1396 set_bit(STATUS_RF_KILL_HW, &trans->shrd->status);
1397 else
1398 clear_bit(STATUS_RF_KILL_HW, &trans->shrd->status);
1399
1400 wiphy_rfkill_set_hw_state(priv(trans)->hw->wiphy, hw_rfkill);
1401
1402 return 0;
1403}
1404#else /* CONFIG_PM */
1405static int iwl_trans_pcie_suspend(struct iwl_trans *trans)
1406{ return 0; }
1407
1408static int iwl_trans_pcie_resume(struct iwl_trans *trans)
1409{ return 0; }
1410
1411#endif /* CONFIG_PM */
1412
1413static void iwl_trans_pcie_wake_any_queue(struct iwl_trans *trans,
1414 u8 ctx)
1415{
1416 u8 ac, txq_id;
1417 struct iwl_trans_pcie *trans_pcie =
1418 IWL_TRANS_GET_PCIE_TRANS(trans);
1419
1420 for (ac = 0; ac < AC_NUM; ac++) {
1421 txq_id = trans_pcie->ac_to_queue[ctx][ac];
1422 IWL_DEBUG_INFO(trans, "Queue Status: Q[%d] %s\n",
1423 ac,
1424 (atomic_read(&trans_pcie->queue_stop_count[ac]) > 0)
1425 ? "stopped" : "awake");
1426 iwl_wake_queue(trans, &trans_pcie->txq[txq_id]);
1427 }
1428}
1429
1430const struct iwl_trans_ops trans_ops_pcie;
1431
1432static struct iwl_trans *iwl_trans_pcie_alloc(struct iwl_shared *shrd)
1433{
1434 struct iwl_trans *iwl_trans = kzalloc(sizeof(struct iwl_trans) +
1435 sizeof(struct iwl_trans_pcie),
1436 GFP_KERNEL);
1437 if (iwl_trans) {
1438 struct iwl_trans_pcie *trans_pcie =
1439 IWL_TRANS_GET_PCIE_TRANS(iwl_trans);
1440 iwl_trans->ops = &trans_ops_pcie;
1441 iwl_trans->shrd = shrd;
1442 trans_pcie->trans = iwl_trans;
1443 spin_lock_init(&iwl_trans->hcmd_lock);
1444 }
1445
1446 return iwl_trans;
1447}
1448
1449static void iwl_trans_pcie_stop_queue(struct iwl_trans *trans, int txq_id)
1450{
1451 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1452
1453 iwl_stop_queue(trans, &trans_pcie->txq[txq_id]);
1454}
1455
1456#define IWL_FLUSH_WAIT_MS 2000
1457
1458static int iwl_trans_pcie_wait_tx_queue_empty(struct iwl_trans *trans)
1459{
1460 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1461 struct iwl_tx_queue *txq;
1462 struct iwl_queue *q;
1463 int cnt;
1464 unsigned long now = jiffies;
1465 int ret = 0;
1466
1467 /* waiting for all the tx frames complete might take a while */
1468 for (cnt = 0; cnt < hw_params(trans).max_txq_num; cnt++) {
1469 if (cnt == trans->shrd->cmd_queue)
1470 continue;
1471 txq = &trans_pcie->txq[cnt];
1472 q = &txq->q;
1473 while (q->read_ptr != q->write_ptr && !time_after(jiffies,
1474 now + msecs_to_jiffies(IWL_FLUSH_WAIT_MS)))
1475 msleep(1);
1476
1477 if (q->read_ptr != q->write_ptr) {
1478 IWL_ERR(trans, "fail to flush all tx fifo queues\n");
1479 ret = -ETIMEDOUT;
1480 break;
1481 }
1482 }
1483 return ret;
1484}
1485
1486/*
1487 * On every watchdog tick we check (latest) time stamp. If it does not
1488 * change during timeout period and queue is not empty we reset firmware.
1489 */
1490static int iwl_trans_pcie_check_stuck_queue(struct iwl_trans *trans, int cnt)
1491{
1492 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1493 struct iwl_tx_queue *txq = &trans_pcie->txq[cnt];
1494 struct iwl_queue *q = &txq->q;
1495 unsigned long timeout;
1496
1497 if (q->read_ptr == q->write_ptr) {
1498 txq->time_stamp = jiffies;
1499 return 0;
1500 }
1501
1502 timeout = txq->time_stamp +
1503 msecs_to_jiffies(hw_params(trans).wd_timeout);
1504
1505 if (time_after(jiffies, timeout)) {
1506 IWL_ERR(trans, "Queue %d stuck for %u ms.\n", q->id,
1507 hw_params(trans).wd_timeout);
1508 return 1;
1509 }
1510
1511 return 0;
1512}
1513
1514#ifdef CONFIG_IWLWIFI_DEBUGFS
1515/* create and remove of files */
1516#define DEBUGFS_ADD_FILE(name, parent, mode) do { \
1517 if (!debugfs_create_file(#name, mode, parent, trans, \
1518 &iwl_dbgfs_##name##_ops)) \
1519 return -ENOMEM; \
1520} while (0)
1521
1522/* file operation */
1523#define DEBUGFS_READ_FUNC(name) \
1524static ssize_t iwl_dbgfs_##name##_read(struct file *file, \
1525 char __user *user_buf, \
1526 size_t count, loff_t *ppos);
1527
1528#define DEBUGFS_WRITE_FUNC(name) \
1529static ssize_t iwl_dbgfs_##name##_write(struct file *file, \
1530 const char __user *user_buf, \
1531 size_t count, loff_t *ppos);
1532
1533
1534static int iwl_dbgfs_open_file_generic(struct inode *inode, struct file *file)
1535{
1536 file->private_data = inode->i_private;
1537 return 0;
1538}
1539
1540#define DEBUGFS_READ_FILE_OPS(name) \
1541 DEBUGFS_READ_FUNC(name); \
1542static const struct file_operations iwl_dbgfs_##name##_ops = { \
1543 .read = iwl_dbgfs_##name##_read, \
1544 .open = iwl_dbgfs_open_file_generic, \
1545 .llseek = generic_file_llseek, \
1546};
1547
1548#define DEBUGFS_WRITE_FILE_OPS(name) \
1549 DEBUGFS_WRITE_FUNC(name); \
1550static const struct file_operations iwl_dbgfs_##name##_ops = { \
1551 .write = iwl_dbgfs_##name##_write, \
1552 .open = iwl_dbgfs_open_file_generic, \
1553 .llseek = generic_file_llseek, \
1554};
1555
1556#define DEBUGFS_READ_WRITE_FILE_OPS(name) \
1557 DEBUGFS_READ_FUNC(name); \
1558 DEBUGFS_WRITE_FUNC(name); \
1559static const struct file_operations iwl_dbgfs_##name##_ops = { \
1560 .write = iwl_dbgfs_##name##_write, \
1561 .read = iwl_dbgfs_##name##_read, \
1562 .open = iwl_dbgfs_open_file_generic, \
1563 .llseek = generic_file_llseek, \
1564};
1565
1566static ssize_t iwl_dbgfs_traffic_log_read(struct file *file,
1567 char __user *user_buf,
1568 size_t count, loff_t *ppos)
1569{
1570 struct iwl_trans *trans = file->private_data;
1571 struct iwl_priv *priv = priv(trans);
1572 int pos = 0, ofs = 0;
1573 int cnt = 0, entry;
1574 struct iwl_trans_pcie *trans_pcie =
1575 IWL_TRANS_GET_PCIE_TRANS(trans);
1576 struct iwl_tx_queue *txq;
1577 struct iwl_queue *q;
1578 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
1579 char *buf;
1580 int bufsz = ((IWL_TRAFFIC_ENTRIES * IWL_TRAFFIC_ENTRY_SIZE * 64) * 2) +
1581 (hw_params(trans).max_txq_num * 32 * 8) + 400;
1582 const u8 *ptr;
1583 ssize_t ret;
1584
1585 if (!trans_pcie->txq) {
1586 IWL_ERR(trans, "txq not ready\n");
1587 return -EAGAIN;
1588 }
1589 buf = kzalloc(bufsz, GFP_KERNEL);
1590 if (!buf) {
1591 IWL_ERR(trans, "Can not allocate buffer\n");
1592 return -ENOMEM;
1593 }
1594 pos += scnprintf(buf + pos, bufsz - pos, "Tx Queue\n");
1595 for (cnt = 0; cnt < hw_params(trans).max_txq_num; cnt++) {
1596 txq = &trans_pcie->txq[cnt];
1597 q = &txq->q;
1598 pos += scnprintf(buf + pos, bufsz - pos,
1599 "q[%d]: read_ptr: %u, write_ptr: %u\n",
1600 cnt, q->read_ptr, q->write_ptr);
1601 }
1602 if (priv->tx_traffic &&
1603 (iwl_get_debug_level(trans->shrd) & IWL_DL_TX)) {
1604 ptr = priv->tx_traffic;
1605 pos += scnprintf(buf + pos, bufsz - pos,
1606 "Tx Traffic idx: %u\n", priv->tx_traffic_idx);
1607 for (cnt = 0, ofs = 0; cnt < IWL_TRAFFIC_ENTRIES; cnt++) {
1608 for (entry = 0; entry < IWL_TRAFFIC_ENTRY_SIZE / 16;
1609 entry++, ofs += 16) {
1610 pos += scnprintf(buf + pos, bufsz - pos,
1611 "0x%.4x ", ofs);
1612 hex_dump_to_buffer(ptr + ofs, 16, 16, 2,
1613 buf + pos, bufsz - pos, 0);
1614 pos += strlen(buf + pos);
1615 if (bufsz - pos > 0)
1616 buf[pos++] = '\n';
1617 }
1618 }
1619 }
1620
1621 pos += scnprintf(buf + pos, bufsz - pos, "Rx Queue\n");
1622 pos += scnprintf(buf + pos, bufsz - pos,
1623 "read: %u, write: %u\n",
1624 rxq->read, rxq->write);
1625
1626 if (priv->rx_traffic &&
1627 (iwl_get_debug_level(trans->shrd) & IWL_DL_RX)) {
1628 ptr = priv->rx_traffic;
1629 pos += scnprintf(buf + pos, bufsz - pos,
1630 "Rx Traffic idx: %u\n", priv->rx_traffic_idx);
1631 for (cnt = 0, ofs = 0; cnt < IWL_TRAFFIC_ENTRIES; cnt++) {
1632 for (entry = 0; entry < IWL_TRAFFIC_ENTRY_SIZE / 16;
1633 entry++, ofs += 16) {
1634 pos += scnprintf(buf + pos, bufsz - pos,
1635 "0x%.4x ", ofs);
1636 hex_dump_to_buffer(ptr + ofs, 16, 16, 2,
1637 buf + pos, bufsz - pos, 0);
1638 pos += strlen(buf + pos);
1639 if (bufsz - pos > 0)
1640 buf[pos++] = '\n';
1641 }
1642 }
1643 }
1644
1645 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1646 kfree(buf);
1647 return ret;
1648}
1649
1650static ssize_t iwl_dbgfs_traffic_log_write(struct file *file,
1651 const char __user *user_buf,
1652 size_t count, loff_t *ppos)
1653{
1654 struct iwl_trans *trans = file->private_data;
1655 char buf[8];
1656 int buf_size;
1657 int traffic_log;
1658
1659 memset(buf, 0, sizeof(buf));
1660 buf_size = min(count, sizeof(buf) - 1);
1661 if (copy_from_user(buf, user_buf, buf_size))
1662 return -EFAULT;
1663 if (sscanf(buf, "%d", &traffic_log) != 1)
1664 return -EFAULT;
1665 if (traffic_log == 0)
1666 iwl_reset_traffic_log(priv(trans));
1667
1668 return count;
1669}
1670
1671static ssize_t iwl_dbgfs_tx_queue_read(struct file *file,
1672 char __user *user_buf,
1673 size_t count, loff_t *ppos)
1674{
1675 struct iwl_trans *trans = file->private_data;
1676 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1677 struct iwl_priv *priv = priv(trans);
1678 struct iwl_tx_queue *txq;
1679 struct iwl_queue *q;
1680 char *buf;
1681 int pos = 0;
1682 int cnt;
1683 int ret;
1684 const size_t bufsz = sizeof(char) * 64 * hw_params(trans).max_txq_num;
1685
1686 if (!trans_pcie->txq) {
1687 IWL_ERR(priv, "txq not ready\n");
1688 return -EAGAIN;
1689 }
1690 buf = kzalloc(bufsz, GFP_KERNEL);
1691 if (!buf)
1692 return -ENOMEM;
1693
1694 for (cnt = 0; cnt < hw_params(trans).max_txq_num; cnt++) {
1695 txq = &trans_pcie->txq[cnt];
1696 q = &txq->q;
1697 pos += scnprintf(buf + pos, bufsz - pos,
1698 "hwq %.2d: read=%u write=%u stop=%d"
1699 " swq_id=%#.2x (ac %d/hwq %d)\n",
1700 cnt, q->read_ptr, q->write_ptr,
1701 !!test_bit(cnt, trans_pcie->queue_stopped),
1702 txq->swq_id, txq->swq_id & 3,
1703 (txq->swq_id >> 2) & 0x1f);
1704 if (cnt >= 4)
1705 continue;
1706 /* for the ACs, display the stop count too */
1707 pos += scnprintf(buf + pos, bufsz - pos,
1708 " stop-count: %d\n",
1709 atomic_read(&trans_pcie->queue_stop_count[cnt]));
1710 }
1711 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1712 kfree(buf);
1713 return ret;
1714}
1715
1716static ssize_t iwl_dbgfs_rx_queue_read(struct file *file,
1717 char __user *user_buf,
1718 size_t count, loff_t *ppos) {
1719 struct iwl_trans *trans = file->private_data;
1720 struct iwl_trans_pcie *trans_pcie =
1721 IWL_TRANS_GET_PCIE_TRANS(trans);
1722 struct iwl_rx_queue *rxq = &trans_pcie->rxq;
1723 char buf[256];
1724 int pos = 0;
1725 const size_t bufsz = sizeof(buf);
1726
1727 pos += scnprintf(buf + pos, bufsz - pos, "read: %u\n",
1728 rxq->read);
1729 pos += scnprintf(buf + pos, bufsz - pos, "write: %u\n",
1730 rxq->write);
1731 pos += scnprintf(buf + pos, bufsz - pos, "free_count: %u\n",
1732 rxq->free_count);
1733 if (rxq->rb_stts) {
1734 pos += scnprintf(buf + pos, bufsz - pos, "closed_rb_num: %u\n",
1735 le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF);
1736 } else {
1737 pos += scnprintf(buf + pos, bufsz - pos,
1738 "closed_rb_num: Not Allocated\n");
1739 }
1740 return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1741}
1742
1743static ssize_t iwl_dbgfs_log_event_read(struct file *file,
1744 char __user *user_buf,
1745 size_t count, loff_t *ppos)
1746{
1747 struct iwl_trans *trans = file->private_data;
1748 char *buf;
1749 int pos = 0;
1750 ssize_t ret = -ENOMEM;
1751
1752 ret = pos = iwl_dump_nic_event_log(trans, true, &buf, true);
1753 if (buf) {
1754 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1755 kfree(buf);
1756 }
1757 return ret;
1758}
1759
1760static ssize_t iwl_dbgfs_log_event_write(struct file *file,
1761 const char __user *user_buf,
1762 size_t count, loff_t *ppos)
1763{
1764 struct iwl_trans *trans = file->private_data;
1765 u32 event_log_flag;
1766 char buf[8];
1767 int buf_size;
1768
1769 memset(buf, 0, sizeof(buf));
1770 buf_size = min(count, sizeof(buf) - 1);
1771 if (copy_from_user(buf, user_buf, buf_size))
1772 return -EFAULT;
1773 if (sscanf(buf, "%d", &event_log_flag) != 1)
1774 return -EFAULT;
1775 if (event_log_flag == 1)
1776 iwl_dump_nic_event_log(trans, true, NULL, false);
1777
1778 return count;
1779}
1780
1781static ssize_t iwl_dbgfs_interrupt_read(struct file *file,
1782 char __user *user_buf,
1783 size_t count, loff_t *ppos) {
1784
1785 struct iwl_trans *trans = file->private_data;
1786 struct iwl_trans_pcie *trans_pcie =
1787 IWL_TRANS_GET_PCIE_TRANS(trans);
1788 struct isr_statistics *isr_stats = &trans_pcie->isr_stats;
1789
1790 int pos = 0;
1791 char *buf;
1792 int bufsz = 24 * 64; /* 24 items * 64 char per item */
1793 ssize_t ret;
1794
1795 buf = kzalloc(bufsz, GFP_KERNEL);
1796 if (!buf) {
1797 IWL_ERR(trans, "Can not allocate Buffer\n");
1798 return -ENOMEM;
1799 }
1800
1801 pos += scnprintf(buf + pos, bufsz - pos,
1802 "Interrupt Statistics Report:\n");
1803
1804 pos += scnprintf(buf + pos, bufsz - pos, "HW Error:\t\t\t %u\n",
1805 isr_stats->hw);
1806 pos += scnprintf(buf + pos, bufsz - pos, "SW Error:\t\t\t %u\n",
1807 isr_stats->sw);
1808 if (isr_stats->sw || isr_stats->hw) {
1809 pos += scnprintf(buf + pos, bufsz - pos,
1810 "\tLast Restarting Code: 0x%X\n",
1811 isr_stats->err_code);
1812 }
1813#ifdef CONFIG_IWLWIFI_DEBUG
1814 pos += scnprintf(buf + pos, bufsz - pos, "Frame transmitted:\t\t %u\n",
1815 isr_stats->sch);
1816 pos += scnprintf(buf + pos, bufsz - pos, "Alive interrupt:\t\t %u\n",
1817 isr_stats->alive);
1818#endif
1819 pos += scnprintf(buf + pos, bufsz - pos,
1820 "HW RF KILL switch toggled:\t %u\n", isr_stats->rfkill);
1821
1822 pos += scnprintf(buf + pos, bufsz - pos, "CT KILL:\t\t\t %u\n",
1823 isr_stats->ctkill);
1824
1825 pos += scnprintf(buf + pos, bufsz - pos, "Wakeup Interrupt:\t\t %u\n",
1826 isr_stats->wakeup);
1827
1828 pos += scnprintf(buf + pos, bufsz - pos,
1829 "Rx command responses:\t\t %u\n", isr_stats->rx);
1830
1831 pos += scnprintf(buf + pos, bufsz - pos, "Tx/FH interrupt:\t\t %u\n",
1832 isr_stats->tx);
1833
1834 pos += scnprintf(buf + pos, bufsz - pos, "Unexpected INTA:\t\t %u\n",
1835 isr_stats->unhandled);
1836
1837 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1838 kfree(buf);
1839 return ret;
1840}
1841
1842static ssize_t iwl_dbgfs_interrupt_write(struct file *file,
1843 const char __user *user_buf,
1844 size_t count, loff_t *ppos)
1845{
1846 struct iwl_trans *trans = file->private_data;
1847 struct iwl_trans_pcie *trans_pcie =
1848 IWL_TRANS_GET_PCIE_TRANS(trans);
1849 struct isr_statistics *isr_stats = &trans_pcie->isr_stats;
1850
1851 char buf[8];
1852 int buf_size;
1853 u32 reset_flag;
1854
1855 memset(buf, 0, sizeof(buf));
1856 buf_size = min(count, sizeof(buf) - 1);
1857 if (copy_from_user(buf, user_buf, buf_size))
1858 return -EFAULT;
1859 if (sscanf(buf, "%x", &reset_flag) != 1)
1860 return -EFAULT;
1861 if (reset_flag == 0)
1862 memset(isr_stats, 0, sizeof(*isr_stats));
1863
1864 return count;
1865}
1866
1867static const char *get_csr_string(int cmd)
1868{
1869 switch (cmd) {
1870 IWL_CMD(CSR_HW_IF_CONFIG_REG);
1871 IWL_CMD(CSR_INT_COALESCING);
1872 IWL_CMD(CSR_INT);
1873 IWL_CMD(CSR_INT_MASK);
1874 IWL_CMD(CSR_FH_INT_STATUS);
1875 IWL_CMD(CSR_GPIO_IN);
1876 IWL_CMD(CSR_RESET);
1877 IWL_CMD(CSR_GP_CNTRL);
1878 IWL_CMD(CSR_HW_REV);
1879 IWL_CMD(CSR_EEPROM_REG);
1880 IWL_CMD(CSR_EEPROM_GP);
1881 IWL_CMD(CSR_OTP_GP_REG);
1882 IWL_CMD(CSR_GIO_REG);
1883 IWL_CMD(CSR_GP_UCODE_REG);
1884 IWL_CMD(CSR_GP_DRIVER_REG);
1885 IWL_CMD(CSR_UCODE_DRV_GP1);
1886 IWL_CMD(CSR_UCODE_DRV_GP2);
1887 IWL_CMD(CSR_LED_REG);
1888 IWL_CMD(CSR_DRAM_INT_TBL_REG);
1889 IWL_CMD(CSR_GIO_CHICKEN_BITS);
1890 IWL_CMD(CSR_ANA_PLL_CFG);
1891 IWL_CMD(CSR_HW_REV_WA_REG);
1892 IWL_CMD(CSR_DBG_HPET_MEM_REG);
1893 default:
1894 return "UNKNOWN";
1895 }
1896}
1897
1898void iwl_dump_csr(struct iwl_trans *trans)
1899{
1900 int i;
1901 static const u32 csr_tbl[] = {
1902 CSR_HW_IF_CONFIG_REG,
1903 CSR_INT_COALESCING,
1904 CSR_INT,
1905 CSR_INT_MASK,
1906 CSR_FH_INT_STATUS,
1907 CSR_GPIO_IN,
1908 CSR_RESET,
1909 CSR_GP_CNTRL,
1910 CSR_HW_REV,
1911 CSR_EEPROM_REG,
1912 CSR_EEPROM_GP,
1913 CSR_OTP_GP_REG,
1914 CSR_GIO_REG,
1915 CSR_GP_UCODE_REG,
1916 CSR_GP_DRIVER_REG,
1917 CSR_UCODE_DRV_GP1,
1918 CSR_UCODE_DRV_GP2,
1919 CSR_LED_REG,
1920 CSR_DRAM_INT_TBL_REG,
1921 CSR_GIO_CHICKEN_BITS,
1922 CSR_ANA_PLL_CFG,
1923 CSR_HW_REV_WA_REG,
1924 CSR_DBG_HPET_MEM_REG
1925 }; 74 };
1926 IWL_ERR(trans, "CSR values:\n");
1927 IWL_ERR(trans, "(2nd byte of CSR_INT_COALESCING is "
1928 "CSR_INT_PERIODIC_REG)\n");
1929 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
1930 IWL_ERR(trans, " %25s: 0X%08x\n",
1931 get_csr_string(csr_tbl[i]),
1932 iwl_read32(bus(trans), csr_tbl[i]));
1933 }
1934}
1935 75
1936static ssize_t iwl_dbgfs_csr_write(struct file *file, 76 return iwl_trans_send_cmd(trans, &cmd);
1937 const char __user *user_buf,
1938 size_t count, loff_t *ppos)
1939{
1940 struct iwl_trans *trans = file->private_data;
1941 char buf[8];
1942 int buf_size;
1943 int csr;
1944
1945 memset(buf, 0, sizeof(buf));
1946 buf_size = min(count, sizeof(buf) - 1);
1947 if (copy_from_user(buf, user_buf, buf_size))
1948 return -EFAULT;
1949 if (sscanf(buf, "%d", &csr) != 1)
1950 return -EFAULT;
1951
1952 iwl_dump_csr(trans);
1953
1954 return count;
1955}
1956
1957static const char *get_fh_string(int cmd)
1958{
1959 switch (cmd) {
1960 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
1961 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
1962 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
1963 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
1964 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
1965 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
1966 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
1967 IWL_CMD(FH_TSSR_TX_STATUS_REG);
1968 IWL_CMD(FH_TSSR_TX_ERROR_REG);
1969 default:
1970 return "UNKNOWN";
1971 }
1972} 77}
1973
1974int iwl_dump_fh(struct iwl_trans *trans, char **buf, bool display)
1975{
1976 int i;
1977#ifdef CONFIG_IWLWIFI_DEBUG
1978 int pos = 0;
1979 size_t bufsz = 0;
1980#endif
1981 static const u32 fh_tbl[] = {
1982 FH_RSCSR_CHNL0_STTS_WPTR_REG,
1983 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
1984 FH_RSCSR_CHNL0_WPTR,
1985 FH_MEM_RCSR_CHNL0_CONFIG_REG,
1986 FH_MEM_RSSR_SHARED_CTRL_REG,
1987 FH_MEM_RSSR_RX_STATUS_REG,
1988 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
1989 FH_TSSR_TX_STATUS_REG,
1990 FH_TSSR_TX_ERROR_REG
1991 };
1992#ifdef CONFIG_IWLWIFI_DEBUG
1993 if (display) {
1994 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
1995 *buf = kmalloc(bufsz, GFP_KERNEL);
1996 if (!*buf)
1997 return -ENOMEM;
1998 pos += scnprintf(*buf + pos, bufsz - pos,
1999 "FH register values:\n");
2000 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2001 pos += scnprintf(*buf + pos, bufsz - pos,
2002 " %34s: 0X%08x\n",
2003 get_fh_string(fh_tbl[i]),
2004 iwl_read_direct32(bus(trans), fh_tbl[i]));
2005 }
2006 return pos;
2007 }
2008#endif
2009 IWL_ERR(trans, "FH register values:\n");
2010 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2011 IWL_ERR(trans, " %34s: 0X%08x\n",
2012 get_fh_string(fh_tbl[i]),
2013 iwl_read_direct32(bus(trans), fh_tbl[i]));
2014 }
2015 return 0;
2016}
2017
2018static ssize_t iwl_dbgfs_fh_reg_read(struct file *file,
2019 char __user *user_buf,
2020 size_t count, loff_t *ppos)
2021{
2022 struct iwl_trans *trans = file->private_data;
2023 char *buf;
2024 int pos = 0;
2025 ssize_t ret = -EFAULT;
2026
2027 ret = pos = iwl_dump_fh(trans, &buf, true);
2028 if (buf) {
2029 ret = simple_read_from_buffer(user_buf,
2030 count, ppos, buf, pos);
2031 kfree(buf);
2032 }
2033
2034 return ret;
2035}
2036
2037DEBUGFS_READ_WRITE_FILE_OPS(traffic_log);
2038DEBUGFS_READ_WRITE_FILE_OPS(log_event);
2039DEBUGFS_READ_WRITE_FILE_OPS(interrupt);
2040DEBUGFS_READ_FILE_OPS(fh_reg);
2041DEBUGFS_READ_FILE_OPS(rx_queue);
2042DEBUGFS_READ_FILE_OPS(tx_queue);
2043DEBUGFS_WRITE_FILE_OPS(csr);
2044
2045/*
2046 * Create the debugfs files and directories
2047 *
2048 */
2049static int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans,
2050 struct dentry *dir)
2051{
2052 DEBUGFS_ADD_FILE(traffic_log, dir, S_IWUSR | S_IRUSR);
2053 DEBUGFS_ADD_FILE(rx_queue, dir, S_IRUSR);
2054 DEBUGFS_ADD_FILE(tx_queue, dir, S_IRUSR);
2055 DEBUGFS_ADD_FILE(log_event, dir, S_IWUSR | S_IRUSR);
2056 DEBUGFS_ADD_FILE(interrupt, dir, S_IWUSR | S_IRUSR);
2057 DEBUGFS_ADD_FILE(csr, dir, S_IWUSR);
2058 DEBUGFS_ADD_FILE(fh_reg, dir, S_IRUSR);
2059 return 0;
2060}
2061#else
2062static int iwl_trans_pcie_dbgfs_register(struct iwl_trans *trans,
2063 struct dentry *dir)
2064{ return 0; }
2065
2066#endif /*CONFIG_IWLWIFI_DEBUGFS */
2067
2068const struct iwl_trans_ops trans_ops_pcie = {
2069 .alloc = iwl_trans_pcie_alloc,
2070 .request_irq = iwl_trans_pcie_request_irq,
2071 .start_device = iwl_trans_pcie_start_device,
2072 .prepare_card_hw = iwl_trans_pcie_prepare_card_hw,
2073 .stop_device = iwl_trans_pcie_stop_device,
2074
2075 .tx_start = iwl_trans_pcie_tx_start,
2076 .wake_any_queue = iwl_trans_pcie_wake_any_queue,
2077
2078 .send_cmd = iwl_trans_pcie_send_cmd,
2079 .send_cmd_pdu = iwl_trans_pcie_send_cmd_pdu,
2080
2081 .tx = iwl_trans_pcie_tx,
2082 .reclaim = iwl_trans_pcie_reclaim,
2083
2084 .tx_agg_disable = iwl_trans_pcie_tx_agg_disable,
2085 .tx_agg_alloc = iwl_trans_pcie_tx_agg_alloc,
2086 .tx_agg_setup = iwl_trans_pcie_tx_agg_setup,
2087
2088 .kick_nic = iwl_trans_pcie_kick_nic,
2089
2090 .free = iwl_trans_pcie_free,
2091 .stop_queue = iwl_trans_pcie_stop_queue,
2092
2093 .dbgfs_register = iwl_trans_pcie_dbgfs_register,
2094
2095 .wait_tx_queue_empty = iwl_trans_pcie_wait_tx_queue_empty,
2096 .check_stuck_queue = iwl_trans_pcie_check_stuck_queue,
2097
2098 .suspend = iwl_trans_pcie_suspend,
2099 .resume = iwl_trans_pcie_resume,
2100};
2101
diff --git a/drivers/net/wireless/iwlwifi/iwl-trans.h b/drivers/net/wireless/iwlwifi/iwl-trans.h
index 7a2daa886dfd..c5923125c3f9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-trans.h
+++ b/drivers/net/wireless/iwlwifi/iwl-trans.h
@@ -73,10 +73,63 @@
73 * layer */ 73 * layer */
74 74
75struct iwl_priv; 75struct iwl_priv;
76struct iwl_rxon_context;
77struct iwl_host_cmd;
78struct iwl_shared; 76struct iwl_shared;
79struct iwl_device_cmd; 77
78#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
79#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
80#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
81
82enum {
83 CMD_SYNC = 0,
84 CMD_ASYNC = BIT(0),
85 CMD_WANT_SKB = BIT(1),
86 CMD_ON_DEMAND = BIT(2),
87};
88
89#define DEF_CMD_PAYLOAD_SIZE 320
90
91/**
92 * struct iwl_device_cmd
93 *
94 * For allocation of the command and tx queues, this establishes the overall
95 * size of the largest command we send to uCode, except for commands that
96 * aren't fully copied and use other TFD space.
97 */
98struct iwl_device_cmd {
99 struct iwl_cmd_header hdr; /* uCode API */
100 u8 payload[DEF_CMD_PAYLOAD_SIZE];
101} __packed;
102
103#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
104
105#define IWL_MAX_CMD_TFDS 2
106
107enum iwl_hcmd_dataflag {
108 IWL_HCMD_DFL_NOCOPY = BIT(0),
109};
110
111/**
112 * struct iwl_host_cmd - Host command to the uCode
113 * @data: array of chunks that composes the data of the host command
114 * @reply_page: pointer to the page that holds the response to the host command
115 * @handler_status: return value of the handler of the command
116 * (put in setup_rx_handlers) - valid for SYNC mode only
117 * @callback:
118 * @flags: can be CMD_* note CMD_WANT_SKB is incompatible withe CMD_ASYNC
119 * @len: array of the lenths of the chunks in data
120 * @dataflags:
121 * @id: id of the host command
122 */
123struct iwl_host_cmd {
124 const void *data[IWL_MAX_CMD_TFDS];
125 unsigned long reply_page;
126 int handler_status;
127
128 u32 flags;
129 u16 len[IWL_MAX_CMD_TFDS];
130 u8 dataflags[IWL_MAX_CMD_TFDS];
131 u8 id;
132};
80 133
81/** 134/**
82 * struct iwl_trans_ops - transport specific operations 135 * struct iwl_trans_ops - transport specific operations
@@ -91,7 +144,6 @@ struct iwl_device_cmd;
91 * @wake_any_queue: wake all the queues of a specfic context IWL_RXON_CTX_* 144 * @wake_any_queue: wake all the queues of a specfic context IWL_RXON_CTX_*
92 * @stop_device:stops the whole device (embedded CPU put to reset) 145 * @stop_device:stops the whole device (embedded CPU put to reset)
93 * @send_cmd:send a host command 146 * @send_cmd:send a host command
94 * @send_cmd_pdu:send a host command: flags can be CMD_*
95 * @tx: send an skb 147 * @tx: send an skb
96 * @reclaim: free packet until ssn. Returns a list of freed packets. 148 * @reclaim: free packet until ssn. Returns a list of freed packets.
97 * @tx_agg_alloc: allocate resources for a TX BA session 149 * @tx_agg_alloc: allocate resources for a TX BA session
@@ -118,14 +170,14 @@ struct iwl_trans_ops {
118 void (*stop_device)(struct iwl_trans *trans); 170 void (*stop_device)(struct iwl_trans *trans);
119 void (*tx_start)(struct iwl_trans *trans); 171 void (*tx_start)(struct iwl_trans *trans);
120 172
121 void (*wake_any_queue)(struct iwl_trans *trans, u8 ctx); 173 void (*wake_any_queue)(struct iwl_trans *trans,
174 enum iwl_rxon_context_id ctx);
122 175
123 int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd); 176 int (*send_cmd)(struct iwl_trans *trans, struct iwl_host_cmd *cmd);
124 177
125 int (*send_cmd_pdu)(struct iwl_trans *trans, u8 id, u32 flags, u16 len,
126 const void *data);
127 int (*tx)(struct iwl_trans *trans, struct sk_buff *skb, 178 int (*tx)(struct iwl_trans *trans, struct sk_buff *skb,
128 struct iwl_device_cmd *dev_cmd, u8 ctx, u8 sta_id); 179 struct iwl_device_cmd *dev_cmd, enum iwl_rxon_context_id ctx,
180 u8 sta_id);
129 void (*reclaim)(struct iwl_trans *trans, int sta_id, int tid, 181 void (*reclaim)(struct iwl_trans *trans, int sta_id, int tid,
130 int txq_id, int ssn, u32 status, 182 int txq_id, int ssn, u32 status,
131 struct sk_buff_head *skbs); 183 struct sk_buff_head *skbs);
@@ -149,9 +201,10 @@ struct iwl_trans_ops {
149 int (*dbgfs_register)(struct iwl_trans *trans, struct dentry* dir); 201 int (*dbgfs_register)(struct iwl_trans *trans, struct dentry* dir);
150 int (*check_stuck_queue)(struct iwl_trans *trans, int q); 202 int (*check_stuck_queue)(struct iwl_trans *trans, int q);
151 int (*wait_tx_queue_empty)(struct iwl_trans *trans); 203 int (*wait_tx_queue_empty)(struct iwl_trans *trans);
152 204#ifdef CONFIG_PM_SLEEP
153 int (*suspend)(struct iwl_trans *trans); 205 int (*suspend)(struct iwl_trans *trans);
154 int (*resume)(struct iwl_trans *trans); 206 int (*resume)(struct iwl_trans *trans);
207#endif
155}; 208};
156 209
157/** 210/**
@@ -195,7 +248,8 @@ static inline void iwl_trans_tx_start(struct iwl_trans *trans)
195 trans->ops->tx_start(trans); 248 trans->ops->tx_start(trans);
196} 249}
197 250
198static inline void iwl_trans_wake_any_queue(struct iwl_trans *trans, u8 ctx) 251static inline void iwl_trans_wake_any_queue(struct iwl_trans *trans,
252 enum iwl_rxon_context_id ctx)
199{ 253{
200 trans->ops->wake_any_queue(trans, ctx); 254 trans->ops->wake_any_queue(trans, ctx);
201} 255}
@@ -207,14 +261,12 @@ static inline int iwl_trans_send_cmd(struct iwl_trans *trans,
207 return trans->ops->send_cmd(trans, cmd); 261 return trans->ops->send_cmd(trans, cmd);
208} 262}
209 263
210static inline int iwl_trans_send_cmd_pdu(struct iwl_trans *trans, u8 id, 264int iwl_trans_send_cmd_pdu(struct iwl_trans *trans, u8 id,
211 u32 flags, u16 len, const void *data) 265 u32 flags, u16 len, const void *data);
212{
213 return trans->ops->send_cmd_pdu(trans, id, flags, len, data);
214}
215 266
216static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb, 267static inline int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb,
217 struct iwl_device_cmd *dev_cmd, u8 ctx, u8 sta_id) 268 struct iwl_device_cmd *dev_cmd, enum iwl_rxon_context_id ctx,
269 u8 sta_id)
218{ 270{
219 return trans->ops->tx(trans, skb, dev_cmd, ctx, sta_id); 271 return trans->ops->tx(trans, skb, dev_cmd, ctx, sta_id);
220} 272}
@@ -279,6 +331,7 @@ static inline int iwl_trans_dbgfs_register(struct iwl_trans *trans,
279 return trans->ops->dbgfs_register(trans, dir); 331 return trans->ops->dbgfs_register(trans, dir);
280} 332}
281 333
334#ifdef CONFIG_PM_SLEEP
282static inline int iwl_trans_suspend(struct iwl_trans *trans) 335static inline int iwl_trans_suspend(struct iwl_trans *trans)
283{ 336{
284 return trans->ops->suspend(trans); 337 return trans->ops->suspend(trans);
@@ -288,6 +341,7 @@ static inline int iwl_trans_resume(struct iwl_trans *trans)
288{ 341{
289 return trans->ops->resume(trans); 342 return trans->ops->resume(trans);
290} 343}
344#endif
291 345
292/***************************************************** 346/*****************************************************
293* Transport layers implementations 347* Transport layers implementations
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c
index 0c846f5a646a..8147f1e2a0b0 100644
--- a/drivers/net/wireless/libertas/if_usb.c
+++ b/drivers/net/wireless/libertas/if_usb.c
@@ -973,6 +973,23 @@ static const struct {
973 { MODEL_8682, "libertas/usb8682.bin" } 973 { MODEL_8682, "libertas/usb8682.bin" }
974}; 974};
975 975
976#ifdef CONFIG_OLPC
977
978static int try_olpc_fw(struct if_usb_card *cardp)
979{
980 int retval = -ENOENT;
981
982 /* try the OLPC firmware first; fall back to fw_table list */
983 if (machine_is_olpc() && cardp->model == MODEL_8388)
984 retval = request_firmware(&cardp->fw,
985 "libertas/usb8388_olpc.bin", &cardp->udev->dev);
986 return retval;
987}
988
989#else
990static int try_olpc_fw(struct if_usb_card *cardp) { return -ENOENT; }
991#endif /* !CONFIG_OLPC */
992
976static int get_fw(struct if_usb_card *cardp, const char *fwname) 993static int get_fw(struct if_usb_card *cardp, const char *fwname)
977{ 994{
978 int i; 995 int i;
@@ -981,6 +998,10 @@ static int get_fw(struct if_usb_card *cardp, const char *fwname)
981 if (fwname) 998 if (fwname)
982 return request_firmware(&cardp->fw, fwname, &cardp->udev->dev); 999 return request_firmware(&cardp->fw, fwname, &cardp->udev->dev);
983 1000
1001 /* Handle OLPC firmware */
1002 if (try_olpc_fw(cardp) == 0)
1003 return 0;
1004
984 /* Otherwise search for firmware to use */ 1005 /* Otherwise search for firmware to use */
985 for (i = 0; i < ARRAY_SIZE(fw_table); i++) { 1006 for (i = 0; i < ARRAY_SIZE(fw_table); i++) {
986 if (fw_table[i].model != cardp->model) 1007 if (fw_table[i].model != cardp->model)
diff --git a/drivers/net/wireless/mwifiex/join.c b/drivers/net/wireless/mwifiex/join.c
index 5cdad92277fa..62b4c2938608 100644
--- a/drivers/net/wireless/mwifiex/join.c
+++ b/drivers/net/wireless/mwifiex/join.c
@@ -147,13 +147,12 @@ static int mwifiex_get_common_rates(struct mwifiex_private *priv, u8 *rate1,
147 u8 *ptr = rate1, *tmp; 147 u8 *ptr = rate1, *tmp;
148 u32 i, j; 148 u32 i, j;
149 149
150 tmp = kmalloc(rate1_size, GFP_KERNEL); 150 tmp = kmemdup(rate1, rate1_size, GFP_KERNEL);
151 if (!tmp) { 151 if (!tmp) {
152 dev_err(priv->adapter->dev, "failed to alloc tmp buf\n"); 152 dev_err(priv->adapter->dev, "failed to alloc tmp buf\n");
153 return -ENOMEM; 153 return -ENOMEM;
154 } 154 }
155 155
156 memcpy(tmp, rate1, rate1_size);
157 memset(rate1, 0, rate1_size); 156 memset(rate1, 0, rate1_size);
158 157
159 for (i = 0; rate2[i] && i < rate2_size; i++) { 158 for (i = 0; rate2[i] && i < rate2_size; i++) {
diff --git a/drivers/net/wireless/mwifiex/scan.c b/drivers/net/wireless/mwifiex/scan.c
index 37ca2f90ad63..8d8588db1cd9 100644
--- a/drivers/net/wireless/mwifiex/scan.c
+++ b/drivers/net/wireless/mwifiex/scan.c
@@ -1479,12 +1479,12 @@ mwifiex_update_curr_bss_params(struct mwifiex_private *priv,
1479 dev_err(priv->adapter->dev, " failed to alloc bss_desc\n"); 1479 dev_err(priv->adapter->dev, " failed to alloc bss_desc\n");
1480 return -ENOMEM; 1480 return -ENOMEM;
1481 } 1481 }
1482 beacon_ie = kzalloc(ie_len, GFP_KERNEL); 1482
1483 beacon_ie = kmemdup(ie_buf, ie_len, GFP_KERNEL);
1483 if (!beacon_ie) { 1484 if (!beacon_ie) {
1484 dev_err(priv->adapter->dev, " failed to alloc beacon_ie\n"); 1485 dev_err(priv->adapter->dev, " failed to alloc beacon_ie\n");
1485 return -ENOMEM; 1486 return -ENOMEM;
1486 } 1487 }
1487 memcpy(beacon_ie, ie_buf, ie_len);
1488 1488
1489 ret = mwifiex_fill_new_bss_desc(priv, bssid, rssi, beacon_ie, 1489 ret = mwifiex_fill_new_bss_desc(priv, bssid, rssi, beacon_ie,
1490 ie_len, beacon_period, 1490 ie_len, beacon_period,
@@ -1986,7 +1986,7 @@ mwifiex_save_curr_bcn(struct mwifiex_private *priv)
1986 priv->curr_bcn_size = curr_bss->beacon_buf_size; 1986 priv->curr_bcn_size = curr_bss->beacon_buf_size;
1987 1987
1988 kfree(priv->curr_bcn_buf); 1988 kfree(priv->curr_bcn_buf);
1989 priv->curr_bcn_buf = kzalloc(curr_bss->beacon_buf_size, 1989 priv->curr_bcn_buf = kmalloc(curr_bss->beacon_buf_size,
1990 GFP_KERNEL); 1990 GFP_KERNEL);
1991 if (!priv->curr_bcn_buf) { 1991 if (!priv->curr_bcn_buf) {
1992 dev_err(priv->adapter->dev, 1992 dev_err(priv->adapter->dev,
diff --git a/drivers/net/wireless/mwifiex/sta_ioctl.c b/drivers/net/wireless/mwifiex/sta_ioctl.c
index 3fca219bcfb6..1df5ef6b4953 100644
--- a/drivers/net/wireless/mwifiex/sta_ioctl.c
+++ b/drivers/net/wireless/mwifiex/sta_ioctl.c
@@ -199,13 +199,15 @@ int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss,
199 dev_err(priv->adapter->dev, " failed to alloc bss_desc\n"); 199 dev_err(priv->adapter->dev, " failed to alloc bss_desc\n");
200 return -ENOMEM; 200 return -ENOMEM;
201 } 201 }
202 beacon_ie = kzalloc(bss->len_beacon_ies, GFP_KERNEL); 202
203 beacon_ie = kmemdup(bss->information_elements,
204 bss->len_beacon_ies, GFP_KERNEL);
203 if (!beacon_ie) { 205 if (!beacon_ie) {
204 dev_err(priv->adapter->dev, " failed to alloc bss_desc\n"); 206 kfree(bss_desc);
207 dev_err(priv->adapter->dev, " failed to alloc beacon_ie\n");
205 return -ENOMEM; 208 return -ENOMEM;
206 } 209 }
207 memcpy(beacon_ie, bss->information_elements, 210
208 bss->len_beacon_ies);
209 ret = mwifiex_fill_new_bss_desc(priv, bss->bssid, bss->signal, 211 ret = mwifiex_fill_new_bss_desc(priv, bss->bssid, bss->signal,
210 beacon_ie, bss->len_beacon_ies, 212 beacon_ie, bss->len_beacon_ies,
211 bss->beacon_interval, 213 bss->beacon_interval,
@@ -866,10 +868,10 @@ int mwifiex_drv_get_data_rate(struct mwifiex_private *priv,
866 ret = mwifiex_rate_ioctl_cfg(priv, rate); 868 ret = mwifiex_rate_ioctl_cfg(priv, rate);
867 869
868 if (!ret) { 870 if (!ret) {
869 if (rate && rate->is_rate_auto) 871 if (rate->is_rate_auto)
870 rate->rate = mwifiex_index_to_data_rate(priv->tx_rate, 872 rate->rate = mwifiex_index_to_data_rate(priv->tx_rate,
871 priv->tx_htinfo); 873 priv->tx_htinfo);
872 else if (rate) 874 else
873 rate->rate = priv->data_rate; 875 rate->rate = priv->data_rate;
874 } else { 876 } else {
875 ret = -1; 877 ret = -1;
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c
index 771280a47ea7..ea1395aafa39 100644
--- a/drivers/net/wireless/mwl8k.c
+++ b/drivers/net/wireless/mwl8k.c
@@ -5501,6 +5501,14 @@ static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5501 5501
5502 /* Set rssi values to dBm */ 5502 /* Set rssi values to dBm */
5503 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL; 5503 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
5504
5505 /*
5506 * Ask mac80211 to not to trigger PS mode
5507 * based on PM bit of incoming frames.
5508 */
5509 if (priv->ap_fw)
5510 hw->flags |= IEEE80211_HW_AP_LINK_PS;
5511
5504 hw->vif_data_size = sizeof(struct mwl8k_vif); 5512 hw->vif_data_size = sizeof(struct mwl8k_vif);
5505 hw->sta_data_size = sizeof(struct mwl8k_sta); 5513 hw->sta_data_size = sizeof(struct mwl8k_sta);
5506 5514
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index c69a7d71f4ca..4778620347c4 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -664,6 +664,9 @@
664 664
665/* 665/*
666 * LED_CFG: LED control 666 * LED_CFG: LED control
667 * ON_PERIOD: LED active time (ms) during TX (only used for LED mode 1)
668 * OFF_PERIOD: LED inactive time (ms) during TX (only used for LED mode 1)
669 * SLOW_BLINK_PERIOD: LED blink interval in seconds (only used for LED mode 2)
667 * color LED's: 670 * color LED's:
668 * 0: off 671 * 0: off
669 * 1: blinking upon TX2 672 * 1: blinking upon TX2
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index ef67f6786a84..31c98509f7e6 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -493,7 +493,7 @@ void rt2800_write_tx_data(struct queue_entry *entry,
493 rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->u.ht.ba_size); 493 rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->u.ht.ba_size);
494 rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID, 494 rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID,
495 test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ? 495 test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ?
496 txdesc->key_idx : 0xff); 496 txdesc->key_idx : txdesc->u.ht.wcid);
497 rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT, 497 rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
498 txdesc->length); 498 txdesc->length);
499 rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE, entry->queue->qid); 499 rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE, entry->queue->qid);
@@ -601,7 +601,7 @@ void rt2800_process_rxwi(struct queue_entry *entry,
601} 601}
602EXPORT_SYMBOL_GPL(rt2800_process_rxwi); 602EXPORT_SYMBOL_GPL(rt2800_process_rxwi);
603 603
604void rt2800_txdone_entry(struct queue_entry *entry, u32 status) 604void rt2800_txdone_entry(struct queue_entry *entry, u32 status, __le32 *txwi)
605{ 605{
606 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 606 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
607 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 607 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
@@ -609,13 +609,11 @@ void rt2800_txdone_entry(struct queue_entry *entry, u32 status)
609 u32 word; 609 u32 word;
610 u16 mcs, real_mcs; 610 u16 mcs, real_mcs;
611 int aggr, ampdu; 611 int aggr, ampdu;
612 __le32 *txwi;
613 612
614 /* 613 /*
615 * Obtain the status about this packet. 614 * Obtain the status about this packet.
616 */ 615 */
617 txdesc.flags = 0; 616 txdesc.flags = 0;
618 txwi = rt2800_drv_get_txwi(entry);
619 rt2x00_desc_read(txwi, 0, &word); 617 rt2x00_desc_read(txwi, 0, &word);
620 618
621 mcs = rt2x00_get_field32(word, TXWI_W0_MCS); 619 mcs = rt2x00_get_field32(word, TXWI_W0_MCS);
@@ -899,28 +897,12 @@ static void rt2800_brightness_set(struct led_classdev *led_cdev,
899 } 897 }
900} 898}
901 899
902static int rt2800_blink_set(struct led_classdev *led_cdev,
903 unsigned long *delay_on, unsigned long *delay_off)
904{
905 struct rt2x00_led *led =
906 container_of(led_cdev, struct rt2x00_led, led_dev);
907 u32 reg;
908
909 rt2800_register_read(led->rt2x00dev, LED_CFG, &reg);
910 rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
911 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
912 rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
913
914 return 0;
915}
916
917static void rt2800_init_led(struct rt2x00_dev *rt2x00dev, 900static void rt2800_init_led(struct rt2x00_dev *rt2x00dev,
918 struct rt2x00_led *led, enum led_type type) 901 struct rt2x00_led *led, enum led_type type)
919{ 902{
920 led->rt2x00dev = rt2x00dev; 903 led->rt2x00dev = rt2x00dev;
921 led->type = type; 904 led->type = type;
922 led->led_dev.brightness_set = rt2800_brightness_set; 905 led->led_dev.brightness_set = rt2800_brightness_set;
923 led->led_dev.blink_set = rt2800_blink_set;
924 led->flags = LED_INITIALIZED; 906 led->flags = LED_INITIALIZED;
925} 907}
926#endif /* CONFIG_RT2X00_LIB_LEDS */ 908#endif /* CONFIG_RT2X00_LIB_LEDS */
@@ -928,11 +910,51 @@ static void rt2800_init_led(struct rt2x00_dev *rt2x00dev,
928/* 910/*
929 * Configuration handlers. 911 * Configuration handlers.
930 */ 912 */
931static void rt2800_config_wcid_attr(struct rt2x00_dev *rt2x00dev, 913static void rt2800_config_wcid(struct rt2x00_dev *rt2x00dev,
932 struct rt2x00lib_crypto *crypto, 914 const u8 *address,
933 struct ieee80211_key_conf *key) 915 int wcid)
934{ 916{
935 struct mac_wcid_entry wcid_entry; 917 struct mac_wcid_entry wcid_entry;
918 u32 offset;
919
920 offset = MAC_WCID_ENTRY(wcid);
921
922 memset(&wcid_entry, 0xff, sizeof(wcid_entry));
923 if (address)
924 memcpy(wcid_entry.mac, address, ETH_ALEN);
925
926 rt2800_register_multiwrite(rt2x00dev, offset,
927 &wcid_entry, sizeof(wcid_entry));
928}
929
930static void rt2800_delete_wcid_attr(struct rt2x00_dev *rt2x00dev, int wcid)
931{
932 u32 offset;
933 offset = MAC_WCID_ATTR_ENTRY(wcid);
934 rt2800_register_write(rt2x00dev, offset, 0);
935}
936
937static void rt2800_config_wcid_attr_bssidx(struct rt2x00_dev *rt2x00dev,
938 int wcid, u32 bssidx)
939{
940 u32 offset = MAC_WCID_ATTR_ENTRY(wcid);
941 u32 reg;
942
943 /*
944 * The BSS Idx numbers is split in a main value of 3 bits,
945 * and a extended field for adding one additional bit to the value.
946 */
947 rt2800_register_read(rt2x00dev, offset, &reg);
948 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX, (bssidx & 0x7));
949 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX_EXT,
950 (bssidx & 0x8) >> 3);
951 rt2800_register_write(rt2x00dev, offset, reg);
952}
953
954static void rt2800_config_wcid_attr_cipher(struct rt2x00_dev *rt2x00dev,
955 struct rt2x00lib_crypto *crypto,
956 struct ieee80211_key_conf *key)
957{
936 struct mac_iveiv_entry iveiv_entry; 958 struct mac_iveiv_entry iveiv_entry;
937 u32 offset; 959 u32 offset;
938 u32 reg; 960 u32 reg;
@@ -952,14 +974,16 @@ static void rt2800_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
952 (crypto->cipher & 0x7)); 974 (crypto->cipher & 0x7));
953 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER_EXT, 975 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER_EXT,
954 (crypto->cipher & 0x8) >> 3); 976 (crypto->cipher & 0x8) >> 3);
955 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX,
956 (crypto->bssidx & 0x7));
957 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX_EXT,
958 (crypto->bssidx & 0x8) >> 3);
959 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher); 977 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
960 rt2800_register_write(rt2x00dev, offset, reg); 978 rt2800_register_write(rt2x00dev, offset, reg);
961 } else { 979 } else {
962 rt2800_register_write(rt2x00dev, offset, 0); 980 /* Delete the cipher without touching the bssidx */
981 rt2800_register_read(rt2x00dev, offset, &reg);
982 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB, 0);
983 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER, 0);
984 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER_EXT, 0);
985 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, 0);
986 rt2800_register_write(rt2x00dev, offset, reg);
963 } 987 }
964 988
965 offset = MAC_IVEIV_ENTRY(key->hw_key_idx); 989 offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
@@ -972,14 +996,6 @@ static void rt2800_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
972 iveiv_entry.iv[3] |= key->keyidx << 6; 996 iveiv_entry.iv[3] |= key->keyidx << 6;
973 rt2800_register_multiwrite(rt2x00dev, offset, 997 rt2800_register_multiwrite(rt2x00dev, offset,
974 &iveiv_entry, sizeof(iveiv_entry)); 998 &iveiv_entry, sizeof(iveiv_entry));
975
976 offset = MAC_WCID_ENTRY(key->hw_key_idx);
977
978 memset(&wcid_entry, 0, sizeof(wcid_entry));
979 if (crypto->cmd == SET_KEY)
980 memcpy(wcid_entry.mac, crypto->address, ETH_ALEN);
981 rt2800_register_multiwrite(rt2x00dev, offset,
982 &wcid_entry, sizeof(wcid_entry));
983} 999}
984 1000
985int rt2800_config_shared_key(struct rt2x00_dev *rt2x00dev, 1001int rt2800_config_shared_key(struct rt2x00_dev *rt2x00dev,
@@ -1026,20 +1042,24 @@ int rt2800_config_shared_key(struct rt2x00_dev *rt2x00dev,
1026 /* 1042 /*
1027 * Update WCID information 1043 * Update WCID information
1028 */ 1044 */
1029 rt2800_config_wcid_attr(rt2x00dev, crypto, key); 1045 rt2800_config_wcid(rt2x00dev, crypto->address, key->hw_key_idx);
1046 rt2800_config_wcid_attr_bssidx(rt2x00dev, key->hw_key_idx,
1047 crypto->bssidx);
1048 rt2800_config_wcid_attr_cipher(rt2x00dev, crypto, key);
1030 1049
1031 return 0; 1050 return 0;
1032} 1051}
1033EXPORT_SYMBOL_GPL(rt2800_config_shared_key); 1052EXPORT_SYMBOL_GPL(rt2800_config_shared_key);
1034 1053
1035static inline int rt2800_find_pairwise_keyslot(struct rt2x00_dev *rt2x00dev) 1054static inline int rt2800_find_wcid(struct rt2x00_dev *rt2x00dev)
1036{ 1055{
1056 struct mac_wcid_entry wcid_entry;
1037 int idx; 1057 int idx;
1038 u32 offset, reg; 1058 u32 offset;
1039 1059
1040 /* 1060 /*
1041 * Search for the first free pairwise key entry and return the 1061 * Search for the first free WCID entry and return the corresponding
1042 * corresponding index. 1062 * index.
1043 * 1063 *
1044 * Make sure the WCID starts _after_ the last possible shared key 1064 * Make sure the WCID starts _after_ the last possible shared key
1045 * entry (>32). 1065 * entry (>32).
@@ -1049,11 +1069,17 @@ static inline int rt2800_find_pairwise_keyslot(struct rt2x00_dev *rt2x00dev)
1049 * first 222 entries. 1069 * first 222 entries.
1050 */ 1070 */
1051 for (idx = 33; idx <= 222; idx++) { 1071 for (idx = 33; idx <= 222; idx++) {
1052 offset = MAC_WCID_ATTR_ENTRY(idx); 1072 offset = MAC_WCID_ENTRY(idx);
1053 rt2800_register_read(rt2x00dev, offset, &reg); 1073 rt2800_register_multiread(rt2x00dev, offset, &wcid_entry,
1054 if (!reg) 1074 sizeof(wcid_entry));
1075 if (is_broadcast_ether_addr(wcid_entry.mac))
1055 return idx; 1076 return idx;
1056 } 1077 }
1078
1079 /*
1080 * Use -1 to indicate that we don't have any more space in the WCID
1081 * table.
1082 */
1057 return -1; 1083 return -1;
1058} 1084}
1059 1085
@@ -1063,13 +1089,15 @@ int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
1063{ 1089{
1064 struct hw_key_entry key_entry; 1090 struct hw_key_entry key_entry;
1065 u32 offset; 1091 u32 offset;
1066 int idx;
1067 1092
1068 if (crypto->cmd == SET_KEY) { 1093 if (crypto->cmd == SET_KEY) {
1069 idx = rt2800_find_pairwise_keyslot(rt2x00dev); 1094 /*
1070 if (idx < 0) 1095 * Allow key configuration only for STAs that are
1096 * known by the hw.
1097 */
1098 if (crypto->wcid < 0)
1071 return -ENOSPC; 1099 return -ENOSPC;
1072 key->hw_key_idx = idx; 1100 key->hw_key_idx = crypto->wcid;
1073 1101
1074 memcpy(key_entry.key, crypto->key, 1102 memcpy(key_entry.key, crypto->key,
1075 sizeof(key_entry.key)); 1103 sizeof(key_entry.key));
@@ -1086,12 +1114,59 @@ int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
1086 /* 1114 /*
1087 * Update WCID information 1115 * Update WCID information
1088 */ 1116 */
1089 rt2800_config_wcid_attr(rt2x00dev, crypto, key); 1117 rt2800_config_wcid_attr_cipher(rt2x00dev, crypto, key);
1090 1118
1091 return 0; 1119 return 0;
1092} 1120}
1093EXPORT_SYMBOL_GPL(rt2800_config_pairwise_key); 1121EXPORT_SYMBOL_GPL(rt2800_config_pairwise_key);
1094 1122
1123int rt2800_sta_add(struct rt2x00_dev *rt2x00dev, struct ieee80211_vif *vif,
1124 struct ieee80211_sta *sta)
1125{
1126 int wcid;
1127 struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta);
1128
1129 /*
1130 * Find next free WCID.
1131 */
1132 wcid = rt2800_find_wcid(rt2x00dev);
1133
1134 /*
1135 * Store selected wcid even if it is invalid so that we can
1136 * later decide if the STA is uploaded into the hw.
1137 */
1138 sta_priv->wcid = wcid;
1139
1140 /*
1141 * No space left in the device, however, we can still communicate
1142 * with the STA -> No error.
1143 */
1144 if (wcid < 0)
1145 return 0;
1146
1147 /*
1148 * Clean up WCID attributes and write STA address to the device.
1149 */
1150 rt2800_delete_wcid_attr(rt2x00dev, wcid);
1151 rt2800_config_wcid(rt2x00dev, sta->addr, wcid);
1152 rt2800_config_wcid_attr_bssidx(rt2x00dev, wcid,
1153 rt2x00lib_get_bssidx(rt2x00dev, vif));
1154 return 0;
1155}
1156EXPORT_SYMBOL_GPL(rt2800_sta_add);
1157
1158int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, int wcid)
1159{
1160 /*
1161 * Remove WCID entry, no need to clean the attributes as they will
1162 * get renewed when the WCID is reused.
1163 */
1164 rt2800_config_wcid(rt2x00dev, NULL, wcid);
1165
1166 return 0;
1167}
1168EXPORT_SYMBOL_GPL(rt2800_sta_remove);
1169
1095void rt2800_config_filter(struct rt2x00_dev *rt2x00dev, 1170void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
1096 const unsigned int filter_flags) 1171 const unsigned int filter_flags)
1097{ 1172{
@@ -2771,11 +2846,8 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
2771 SHARED_KEY_MODE_ENTRY(i), 0); 2846 SHARED_KEY_MODE_ENTRY(i), 0);
2772 2847
2773 for (i = 0; i < 256; i++) { 2848 for (i = 0; i < 256; i++) {
2774 static const u32 wcid[2] = { 0xffffffff, 0x00ffffff }; 2849 rt2800_config_wcid(rt2x00dev, NULL, i);
2775 rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i), 2850 rt2800_delete_wcid_attr(rt2x00dev, i);
2776 wcid, sizeof(wcid));
2777
2778 rt2800_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 0);
2779 rt2800_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0); 2851 rt2800_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
2780 } 2852 }
2781 2853
@@ -3697,14 +3769,15 @@ static void rt2800_efuse_read(struct rt2x00_dev *rt2x00dev, unsigned int i)
3697 rt2800_regbusy_read(rt2x00dev, EFUSE_CTRL, EFUSE_CTRL_KICK, &reg); 3769 rt2800_regbusy_read(rt2x00dev, EFUSE_CTRL, EFUSE_CTRL_KICK, &reg);
3698 3770
3699 /* Apparently the data is read from end to start */ 3771 /* Apparently the data is read from end to start */
3700 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA3, 3772 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA3, &reg);
3701 (u32 *)&rt2x00dev->eeprom[i]); 3773 /* The returned value is in CPU order, but eeprom is le */
3702 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA2, 3774 rt2x00dev->eeprom[i] = cpu_to_le32(reg);
3703 (u32 *)&rt2x00dev->eeprom[i + 2]); 3775 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA2, &reg);
3704 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA1, 3776 *(u32 *)&rt2x00dev->eeprom[i + 2] = cpu_to_le32(reg);
3705 (u32 *)&rt2x00dev->eeprom[i + 4]); 3777 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA1, &reg);
3706 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA0, 3778 *(u32 *)&rt2x00dev->eeprom[i + 4] = cpu_to_le32(reg);
3707 (u32 *)&rt2x00dev->eeprom[i + 6]); 3779 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA0, &reg);
3780 *(u32 *)&rt2x00dev->eeprom[i + 6] = cpu_to_le32(reg);
3708 3781
3709 mutex_unlock(&rt2x00dev->csr_mutex); 3782 mutex_unlock(&rt2x00dev->csr_mutex);
3710} 3783}
@@ -3870,19 +3943,23 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
3870 return -ENODEV; 3943 return -ENODEV;
3871 } 3944 }
3872 3945
3873 if (!rt2x00_rf(rt2x00dev, RF2820) && 3946 switch (rt2x00dev->chip.rf) {
3874 !rt2x00_rf(rt2x00dev, RF2850) && 3947 case RF2820:
3875 !rt2x00_rf(rt2x00dev, RF2720) && 3948 case RF2850:
3876 !rt2x00_rf(rt2x00dev, RF2750) && 3949 case RF2720:
3877 !rt2x00_rf(rt2x00dev, RF3020) && 3950 case RF2750:
3878 !rt2x00_rf(rt2x00dev, RF2020) && 3951 case RF3020:
3879 !rt2x00_rf(rt2x00dev, RF3021) && 3952 case RF2020:
3880 !rt2x00_rf(rt2x00dev, RF3022) && 3953 case RF3021:
3881 !rt2x00_rf(rt2x00dev, RF3052) && 3954 case RF3022:
3882 !rt2x00_rf(rt2x00dev, RF3320) && 3955 case RF3052:
3883 !rt2x00_rf(rt2x00dev, RF5370) && 3956 case RF3320:
3884 !rt2x00_rf(rt2x00dev, RF5390)) { 3957 case RF5370:
3885 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 3958 case RF5390:
3959 break;
3960 default:
3961 ERROR(rt2x00dev, "Invalid RF chipset 0x%x detected.\n",
3962 rt2x00dev->chip.rf);
3886 return -ENODEV; 3963 return -ENODEV;
3887 } 3964 }
3888 3965
@@ -4409,8 +4486,19 @@ int rt2800_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4409 struct ieee80211_sta *sta, u16 tid, u16 *ssn, 4486 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
4410 u8 buf_size) 4487 u8 buf_size)
4411{ 4488{
4489 struct rt2x00_sta *sta_priv = (struct rt2x00_sta *)sta->drv_priv;
4412 int ret = 0; 4490 int ret = 0;
4413 4491
4492 /*
4493 * Don't allow aggregation for stations the hardware isn't aware
4494 * of because tx status reports for frames to an unknown station
4495 * always contain wcid=255 and thus we can't distinguish between
4496 * multiple stations which leads to unwanted situations when the
4497 * hw reorders frames due to aggregation.
4498 */
4499 if (sta_priv->wcid < 0)
4500 return 1;
4501
4414 switch (action) { 4502 switch (action) {
4415 case IEEE80211_AMPDU_RX_START: 4503 case IEEE80211_AMPDU_RX_START:
4416 case IEEE80211_AMPDU_RX_STOP: 4504 case IEEE80211_AMPDU_RX_STOP:
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.h b/drivers/net/wireless/rt2x00/rt2800lib.h
index 69deb3148ae7..7a2511f6785c 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.h
+++ b/drivers/net/wireless/rt2x00/rt2800lib.h
@@ -152,7 +152,7 @@ void rt2800_write_tx_data(struct queue_entry *entry,
152 struct txentry_desc *txdesc); 152 struct txentry_desc *txdesc);
153void rt2800_process_rxwi(struct queue_entry *entry, struct rxdone_entry_desc *txdesc); 153void rt2800_process_rxwi(struct queue_entry *entry, struct rxdone_entry_desc *txdesc);
154 154
155void rt2800_txdone_entry(struct queue_entry *entry, u32 status); 155void rt2800_txdone_entry(struct queue_entry *entry, u32 status, __le32* txwi);
156 156
157void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc); 157void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc);
158void rt2800_clear_beacon(struct queue_entry *entry); 158void rt2800_clear_beacon(struct queue_entry *entry);
@@ -166,6 +166,9 @@ int rt2800_config_shared_key(struct rt2x00_dev *rt2x00dev,
166int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev, 166int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
167 struct rt2x00lib_crypto *crypto, 167 struct rt2x00lib_crypto *crypto,
168 struct ieee80211_key_conf *key); 168 struct ieee80211_key_conf *key);
169int rt2800_sta_add(struct rt2x00_dev *rt2x00dev, struct ieee80211_vif *vif,
170 struct ieee80211_sta *sta);
171int rt2800_sta_remove(struct rt2x00_dev *rt2x00dev, int wcid);
169void rt2800_config_filter(struct rt2x00_dev *rt2x00dev, 172void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
170 const unsigned int filter_flags); 173 const unsigned int filter_flags);
171void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf, 174void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf,
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index cabf249aa55b..da48c8ac27bd 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -619,11 +619,11 @@ static void rt2800pci_write_tx_desc(struct queue_entry *entry,
619 /* 619 /*
620 * Initialize TX descriptor 620 * Initialize TX descriptor
621 */ 621 */
622 rt2x00_desc_read(txd, 0, &word); 622 word = 0;
623 rt2x00_set_field32(&word, TXD_W0_SD_PTR0, skbdesc->skb_dma); 623 rt2x00_set_field32(&word, TXD_W0_SD_PTR0, skbdesc->skb_dma);
624 rt2x00_desc_write(txd, 0, word); 624 rt2x00_desc_write(txd, 0, word);
625 625
626 rt2x00_desc_read(txd, 1, &word); 626 word = 0;
627 rt2x00_set_field32(&word, TXD_W1_SD_LEN1, entry->skb->len); 627 rt2x00_set_field32(&word, TXD_W1_SD_LEN1, entry->skb->len);
628 rt2x00_set_field32(&word, TXD_W1_LAST_SEC1, 628 rt2x00_set_field32(&word, TXD_W1_LAST_SEC1,
629 !test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); 629 !test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
@@ -634,12 +634,12 @@ static void rt2800pci_write_tx_desc(struct queue_entry *entry,
634 rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 0); 634 rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 0);
635 rt2x00_desc_write(txd, 1, word); 635 rt2x00_desc_write(txd, 1, word);
636 636
637 rt2x00_desc_read(txd, 2, &word); 637 word = 0;
638 rt2x00_set_field32(&word, TXD_W2_SD_PTR1, 638 rt2x00_set_field32(&word, TXD_W2_SD_PTR1,
639 skbdesc->skb_dma + TXWI_DESC_SIZE); 639 skbdesc->skb_dma + TXWI_DESC_SIZE);
640 rt2x00_desc_write(txd, 2, word); 640 rt2x00_desc_write(txd, 2, word);
641 641
642 rt2x00_desc_read(txd, 3, &word); 642 word = 0;
643 rt2x00_set_field32(&word, TXD_W3_WIV, 643 rt2x00_set_field32(&word, TXD_W3_WIV,
644 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags)); 644 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));
645 rt2x00_set_field32(&word, TXD_W3_QSEL, 2); 645 rt2x00_set_field32(&word, TXD_W3_QSEL, 2);
@@ -760,7 +760,7 @@ static bool rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
760 } 760 }
761 761
762 entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); 762 entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
763 rt2800_txdone_entry(entry, status); 763 rt2800_txdone_entry(entry, status, rt2800pci_get_txwi(entry));
764 764
765 if (--max_tx_done == 0) 765 if (--max_tx_done == 0)
766 break; 766 break;
@@ -1015,6 +1015,8 @@ static const struct ieee80211_ops rt2800pci_mac80211_ops = {
1015 .get_stats = rt2x00mac_get_stats, 1015 .get_stats = rt2x00mac_get_stats,
1016 .get_tkip_seq = rt2800_get_tkip_seq, 1016 .get_tkip_seq = rt2800_get_tkip_seq,
1017 .set_rts_threshold = rt2800_set_rts_threshold, 1017 .set_rts_threshold = rt2800_set_rts_threshold,
1018 .sta_add = rt2x00mac_sta_add,
1019 .sta_remove = rt2x00mac_sta_remove,
1018 .bss_info_changed = rt2x00mac_bss_info_changed, 1020 .bss_info_changed = rt2x00mac_bss_info_changed,
1019 .conf_tx = rt2800_conf_tx, 1021 .conf_tx = rt2800_conf_tx,
1020 .get_tsf = rt2800_get_tsf, 1022 .get_tsf = rt2800_get_tsf,
@@ -1076,6 +1078,8 @@ static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
1076 .config_erp = rt2800_config_erp, 1078 .config_erp = rt2800_config_erp,
1077 .config_ant = rt2800_config_ant, 1079 .config_ant = rt2800_config_ant,
1078 .config = rt2800_config, 1080 .config = rt2800_config,
1081 .sta_add = rt2800_sta_add,
1082 .sta_remove = rt2800_sta_remove,
1079}; 1083};
1080 1084
1081static const struct data_queue_desc rt2800pci_queue_rx = { 1085static const struct data_queue_desc rt2800pci_queue_rx = {
@@ -1153,6 +1157,7 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
1153#endif 1157#endif
1154#ifdef CONFIG_RT2800PCI_RT53XX 1158#ifdef CONFIG_RT2800PCI_RT53XX
1155 { PCI_DEVICE(0x1814, 0x5390) }, 1159 { PCI_DEVICE(0x1814, 0x5390) },
1160 { PCI_DEVICE(0x1814, 0x539a) },
1156 { PCI_DEVICE(0x1814, 0x539f) }, 1161 { PCI_DEVICE(0x1814, 0x539f) },
1157#endif 1162#endif
1158 { 0, } 1163 { 0, }
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index 507559361d87..f1565792f270 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -464,6 +464,15 @@ static bool rt2800usb_txdone_entry_check(struct queue_entry *entry, u32 reg)
464 int wcid, ack, pid; 464 int wcid, ack, pid;
465 int tx_wcid, tx_ack, tx_pid; 465 int tx_wcid, tx_ack, tx_pid;
466 466
467 if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags) ||
468 !test_bit(ENTRY_DATA_STATUS_PENDING, &entry->flags)) {
469 WARNING(entry->queue->rt2x00dev,
470 "Data pending for entry %u in queue %u\n",
471 entry->entry_idx, entry->queue->qid);
472 cond_resched();
473 return false;
474 }
475
467 wcid = rt2x00_get_field32(reg, TX_STA_FIFO_WCID); 476 wcid = rt2x00_get_field32(reg, TX_STA_FIFO_WCID);
468 ack = rt2x00_get_field32(reg, TX_STA_FIFO_TX_ACK_REQUIRED); 477 ack = rt2x00_get_field32(reg, TX_STA_FIFO_TX_ACK_REQUIRED);
469 pid = rt2x00_get_field32(reg, TX_STA_FIFO_PID_TYPE); 478 pid = rt2x00_get_field32(reg, TX_STA_FIFO_PID_TYPE);
@@ -529,12 +538,12 @@ static void rt2800usb_txdone(struct rt2x00_dev *rt2x00dev)
529 entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); 538 entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
530 if (rt2800usb_txdone_entry_check(entry, reg)) 539 if (rt2800usb_txdone_entry_check(entry, reg))
531 break; 540 break;
541 entry = NULL;
532 } 542 }
533 543
534 if (!entry || rt2x00queue_empty(queue)) 544 if (entry)
535 break; 545 rt2800_txdone_entry(entry, reg,
536 546 rt2800usb_get_txwi(entry));
537 rt2800_txdone_entry(entry, reg);
538 } 547 }
539} 548}
540 549
@@ -558,8 +567,10 @@ static void rt2800usb_work_txdone(struct work_struct *work)
558 while (!rt2x00queue_empty(queue)) { 567 while (!rt2x00queue_empty(queue)) {
559 entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); 568 entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
560 569
561 if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) 570 if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags) ||
571 !test_bit(ENTRY_DATA_STATUS_PENDING, &entry->flags))
562 break; 572 break;
573
563 if (test_bit(ENTRY_DATA_IO_FAILED, &entry->flags)) 574 if (test_bit(ENTRY_DATA_IO_FAILED, &entry->flags))
564 rt2x00lib_txdone_noinfo(entry, TXDONE_FAILURE); 575 rt2x00lib_txdone_noinfo(entry, TXDONE_FAILURE);
565 else if (rt2x00queue_status_timeout(entry)) 576 else if (rt2x00queue_status_timeout(entry))
@@ -749,6 +760,8 @@ static const struct ieee80211_ops rt2800usb_mac80211_ops = {
749 .get_stats = rt2x00mac_get_stats, 760 .get_stats = rt2x00mac_get_stats,
750 .get_tkip_seq = rt2800_get_tkip_seq, 761 .get_tkip_seq = rt2800_get_tkip_seq,
751 .set_rts_threshold = rt2800_set_rts_threshold, 762 .set_rts_threshold = rt2800_set_rts_threshold,
763 .sta_add = rt2x00mac_sta_add,
764 .sta_remove = rt2x00mac_sta_remove,
752 .bss_info_changed = rt2x00mac_bss_info_changed, 765 .bss_info_changed = rt2x00mac_bss_info_changed,
753 .conf_tx = rt2800_conf_tx, 766 .conf_tx = rt2800_conf_tx,
754 .get_tsf = rt2800_get_tsf, 767 .get_tsf = rt2800_get_tsf,
@@ -806,6 +819,8 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
806 .config_erp = rt2800_config_erp, 819 .config_erp = rt2800_config_erp,
807 .config_ant = rt2800_config_ant, 820 .config_ant = rt2800_config_ant,
808 .config = rt2800_config, 821 .config = rt2800_config,
822 .sta_add = rt2800_sta_add,
823 .sta_remove = rt2800_sta_remove,
809}; 824};
810 825
811static const struct data_queue_desc rt2800usb_queue_rx = { 826static const struct data_queue_desc rt2800usb_queue_rx = {
@@ -921,6 +936,8 @@ static struct usb_device_id rt2800usb_device_table[] = {
921 { USB_DEVICE(0x07d1, 0x3c16) }, 936 { USB_DEVICE(0x07d1, 0x3c16) },
922 /* Draytek */ 937 /* Draytek */
923 { USB_DEVICE(0x07fa, 0x7712) }, 938 { USB_DEVICE(0x07fa, 0x7712) },
939 /* DVICO */
940 { USB_DEVICE(0x0fe9, 0xb307) },
924 /* Edimax */ 941 /* Edimax */
925 { USB_DEVICE(0x7392, 0x7711) }, 942 { USB_DEVICE(0x7392, 0x7711) },
926 { USB_DEVICE(0x7392, 0x7717) }, 943 { USB_DEVICE(0x7392, 0x7717) },
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index f82bfeb79ebb..cbf8eb334e96 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -478,6 +478,8 @@ struct rt2x00lib_crypto {
478 u8 key[16]; 478 u8 key[16];
479 u8 tx_mic[8]; 479 u8 tx_mic[8];
480 u8 rx_mic[8]; 480 u8 rx_mic[8];
481
482 int wcid;
481}; 483};
482 484
483/* 485/*
@@ -512,6 +514,19 @@ struct rt2x00intf_conf {
512}; 514};
513 515
514/* 516/*
517 * Private structure for storing STA details
518 * wcid: Wireless Client ID
519 */
520struct rt2x00_sta {
521 int wcid;
522};
523
524static inline struct rt2x00_sta* sta_to_rt2x00_sta(struct ieee80211_sta *sta)
525{
526 return (struct rt2x00_sta *)sta->drv_priv;
527}
528
529/*
515 * rt2x00lib callback functions. 530 * rt2x00lib callback functions.
516 */ 531 */
517struct rt2x00lib_ops { 532struct rt2x00lib_ops {
@@ -620,6 +635,11 @@ struct rt2x00lib_ops {
620 void (*config) (struct rt2x00_dev *rt2x00dev, 635 void (*config) (struct rt2x00_dev *rt2x00dev,
621 struct rt2x00lib_conf *libconf, 636 struct rt2x00lib_conf *libconf,
622 const unsigned int changed_flags); 637 const unsigned int changed_flags);
638 int (*sta_add) (struct rt2x00_dev *rt2x00dev,
639 struct ieee80211_vif *vif,
640 struct ieee80211_sta *sta);
641 int (*sta_remove) (struct rt2x00_dev *rt2x00dev,
642 int wcid);
623}; 643};
624 644
625/* 645/*
@@ -1226,6 +1246,12 @@ static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
1226#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 1246#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1227 1247
1228/* 1248/*
1249 * Utility functions.
1250 */
1251u32 rt2x00lib_get_bssidx(struct rt2x00_dev *rt2x00dev,
1252 struct ieee80211_vif *vif);
1253
1254/*
1229 * Interrupt context handlers. 1255 * Interrupt context handlers.
1230 */ 1256 */
1231void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); 1257void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev);
@@ -1261,6 +1287,10 @@ int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1261#else 1287#else
1262#define rt2x00mac_set_key NULL 1288#define rt2x00mac_set_key NULL
1263#endif /* CONFIG_RT2X00_LIB_CRYPTO */ 1289#endif /* CONFIG_RT2X00_LIB_CRYPTO */
1290int rt2x00mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1291 struct ieee80211_sta *sta);
1292int rt2x00mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1293 struct ieee80211_sta *sta);
1264void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw); 1294void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw);
1265void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw); 1295void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw);
1266int rt2x00mac_get_stats(struct ieee80211_hw *hw, 1296int rt2x00mac_get_stats(struct ieee80211_hw *hw,
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 92ff6a72a2bb..e1fb2a8569be 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -33,6 +33,22 @@
33#include "rt2x00lib.h" 33#include "rt2x00lib.h"
34 34
35/* 35/*
36 * Utility functions.
37 */
38u32 rt2x00lib_get_bssidx(struct rt2x00_dev *rt2x00dev,
39 struct ieee80211_vif *vif)
40{
41 /*
42 * When in STA mode, bssidx is always 0 otherwise local_address[5]
43 * contains the bss number, see BSS_ID_MASK comments for details.
44 */
45 if (rt2x00dev->intf_sta_count)
46 return 0;
47 return vif->addr[5] & (rt2x00dev->ops->max_ap_intf - 1);
48}
49EXPORT_SYMBOL_GPL(rt2x00lib_get_bssidx);
50
51/*
36 * Radio control handlers. 52 * Radio control handlers.
37 */ 53 */
38int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev) 54int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev)
@@ -915,6 +931,11 @@ static int rt2x00lib_probe_hw(struct rt2x00_dev *rt2x00dev)
915 rt2x00dev->hw->extra_tx_headroom += RT2X00_ALIGN_SIZE; 931 rt2x00dev->hw->extra_tx_headroom += RT2X00_ALIGN_SIZE;
916 932
917 /* 933 /*
934 * Tell mac80211 about the size of our private STA structure.
935 */
936 rt2x00dev->hw->sta_data_size = sizeof(struct rt2x00_sta);
937
938 /*
918 * Allocate tx status FIFO for driver use. 939 * Allocate tx status FIFO for driver use.
919 */ 940 */
920 if (test_bit(REQUIRE_TXSTATUS_FIFO, &rt2x00dev->cap_flags)) { 941 if (test_bit(REQUIRE_TXSTATUS_FIFO, &rt2x00dev->cap_flags)) {
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index 4ccf23805973..cef1c878c37e 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -494,6 +494,7 @@ int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
494 struct rt2x00lib_crypto crypto; 494 struct rt2x00lib_crypto crypto;
495 static const u8 bcast_addr[ETH_ALEN] = 495 static const u8 bcast_addr[ETH_ALEN] =
496 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, }; 496 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, };
497 struct rt2x00_sta *sta_priv = NULL;
497 498
498 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) 499 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
499 return 0; 500 return 0;
@@ -504,24 +505,18 @@ int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
504 505
505 memset(&crypto, 0, sizeof(crypto)); 506 memset(&crypto, 0, sizeof(crypto));
506 507
507 /* 508 crypto.bssidx = rt2x00lib_get_bssidx(rt2x00dev, vif);
508 * When in STA mode, bssidx is always 0 otherwise local_address[5]
509 * contains the bss number, see BSS_ID_MASK comments for details.
510 */
511 if (rt2x00dev->intf_sta_count)
512 crypto.bssidx = 0;
513 else
514 crypto.bssidx = vif->addr[5] & (rt2x00dev->ops->max_ap_intf - 1);
515
516 crypto.cipher = rt2x00crypto_key_to_cipher(key); 509 crypto.cipher = rt2x00crypto_key_to_cipher(key);
517 if (crypto.cipher == CIPHER_NONE) 510 if (crypto.cipher == CIPHER_NONE)
518 return -EOPNOTSUPP; 511 return -EOPNOTSUPP;
519 512
520 crypto.cmd = cmd; 513 crypto.cmd = cmd;
521 514
522 if (sta) 515 if (sta) {
523 crypto.address = sta->addr; 516 crypto.address = sta->addr;
524 else 517 sta_priv = sta_to_rt2x00_sta(sta);
518 crypto.wcid = sta_priv->wcid;
519 } else
525 crypto.address = bcast_addr; 520 crypto.address = bcast_addr;
526 521
527 if (crypto.cipher == CIPHER_TKIP) 522 if (crypto.cipher == CIPHER_TKIP)
@@ -560,6 +555,39 @@ int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
560EXPORT_SYMBOL_GPL(rt2x00mac_set_key); 555EXPORT_SYMBOL_GPL(rt2x00mac_set_key);
561#endif /* CONFIG_RT2X00_LIB_CRYPTO */ 556#endif /* CONFIG_RT2X00_LIB_CRYPTO */
562 557
558int rt2x00mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
559 struct ieee80211_sta *sta)
560{
561 struct rt2x00_dev *rt2x00dev = hw->priv;
562 struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta);
563
564 /*
565 * If there's no space left in the device table store
566 * -1 as wcid but tell mac80211 everything went ok.
567 */
568 if (rt2x00dev->ops->lib->sta_add(rt2x00dev, vif, sta))
569 sta_priv->wcid = -1;
570
571 return 0;
572}
573EXPORT_SYMBOL_GPL(rt2x00mac_sta_add);
574
575int rt2x00mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
576 struct ieee80211_sta *sta)
577{
578 struct rt2x00_dev *rt2x00dev = hw->priv;
579 struct rt2x00_sta *sta_priv = sta_to_rt2x00_sta(sta);
580
581 /*
582 * If we never sent the STA to the device no need to clean it up.
583 */
584 if (sta_priv->wcid < 0)
585 return 0;
586
587 return rt2x00dev->ops->lib->sta_remove(rt2x00dev, sta_priv->wcid);
588}
589EXPORT_SYMBOL_GPL(rt2x00mac_sta_remove);
590
563void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw) 591void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw)
564{ 592{
565 struct rt2x00_dev *rt2x00dev = hw->priv; 593 struct rt2x00_dev *rt2x00dev = hw->priv;
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index 29edb9fbe6f1..5adfb3eab9cd 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -310,11 +310,16 @@ static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
310 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 310 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
311 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0]; 311 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
312 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 312 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
313 struct rt2x00_sta *sta_priv = NULL;
313 314
314 if (tx_info->control.sta) 315 if (tx_info->control.sta) {
315 txdesc->u.ht.mpdu_density = 316 txdesc->u.ht.mpdu_density =
316 tx_info->control.sta->ht_cap.ampdu_density; 317 tx_info->control.sta->ht_cap.ampdu_density;
317 318
319 sta_priv = sta_to_rt2x00_sta(tx_info->control.sta);
320 txdesc->u.ht.wcid = sta_priv->wcid;
321 }
322
318 txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */ 323 txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
319 324
320 /* 325 /*
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.h b/drivers/net/wireless/rt2x00/rt2x00queue.h
index f2100f4ddcff..349008d1fb28 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.h
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.h
@@ -288,8 +288,8 @@ enum txentry_desc_flags {
288 * @signal: PLCP signal. 288 * @signal: PLCP signal.
289 * @service: PLCP service. 289 * @service: PLCP service.
290 * @msc: MCS. 290 * @msc: MCS.
291 * @stbc: STBC. 291 * @stbc: Use Space Time Block Coding (only available for MCS rates < 8).
292 * @ba_size: BA size. 292 * @ba_size: Size of the recepients RX reorder buffer - 1.
293 * @rate_mode: Rate mode (See @enum rate_modulation). 293 * @rate_mode: Rate mode (See @enum rate_modulation).
294 * @mpdu_density: MDPU density. 294 * @mpdu_density: MDPU density.
295 * @retry_limit: Max number of retries. 295 * @retry_limit: Max number of retries.
@@ -321,6 +321,7 @@ struct txentry_desc {
321 u8 ba_size; 321 u8 ba_size;
322 u8 mpdu_density; 322 u8 mpdu_density;
323 enum txop txop; 323 enum txop txop;
324 int wcid;
324 } ht; 325 } ht;
325 } u; 326 } u;
326 327
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c
index b6b4542c2460..1e31050dafc9 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.c
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.c
@@ -262,23 +262,20 @@ static void rt2x00usb_interrupt_txdone(struct urb *urb)
262 struct queue_entry *entry = (struct queue_entry *)urb->context; 262 struct queue_entry *entry = (struct queue_entry *)urb->context;
263 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 263 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
264 264
265 if (!test_and_clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) 265 if (!test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags))
266 return; 266 return;
267
268 if (rt2x00dev->ops->lib->tx_dma_done)
269 rt2x00dev->ops->lib->tx_dma_done(entry);
270
271 /*
272 * Report the frame as DMA done
273 */
274 rt2x00lib_dmadone(entry);
275
276 /* 267 /*
277 * Check if the frame was correctly uploaded 268 * Check if the frame was correctly uploaded
278 */ 269 */
279 if (urb->status) 270 if (urb->status)
280 set_bit(ENTRY_DATA_IO_FAILED, &entry->flags); 271 set_bit(ENTRY_DATA_IO_FAILED, &entry->flags);
272 /*
273 * Report the frame as DMA done
274 */
275 rt2x00lib_dmadone(entry);
281 276
277 if (rt2x00dev->ops->lib->tx_dma_done)
278 rt2x00dev->ops->lib->tx_dma_done(entry);
282 /* 279 /*
283 * Schedule the delayed work for reading the TX status 280 * Schedule the delayed work for reading the TX status
284 * from the device. 281 * from the device.
@@ -874,18 +871,8 @@ int rt2x00usb_suspend(struct usb_interface *usb_intf, pm_message_t state)
874{ 871{
875 struct ieee80211_hw *hw = usb_get_intfdata(usb_intf); 872 struct ieee80211_hw *hw = usb_get_intfdata(usb_intf);
876 struct rt2x00_dev *rt2x00dev = hw->priv; 873 struct rt2x00_dev *rt2x00dev = hw->priv;
877 int retval;
878
879 retval = rt2x00lib_suspend(rt2x00dev, state);
880 if (retval)
881 return retval;
882 874
883 /* 875 return rt2x00lib_suspend(rt2x00dev, state);
884 * Decrease usbdev refcount.
885 */
886 usb_put_dev(interface_to_usbdev(usb_intf));
887
888 return 0;
889} 876}
890EXPORT_SYMBOL_GPL(rt2x00usb_suspend); 877EXPORT_SYMBOL_GPL(rt2x00usb_suspend);
891 878
@@ -894,8 +881,6 @@ int rt2x00usb_resume(struct usb_interface *usb_intf)
894 struct ieee80211_hw *hw = usb_get_intfdata(usb_intf); 881 struct ieee80211_hw *hw = usb_get_intfdata(usb_intf);
895 struct rt2x00_dev *rt2x00dev = hw->priv; 882 struct rt2x00_dev *rt2x00dev = hw->priv;
896 883
897 usb_get_dev(interface_to_usbdev(usb_intf));
898
899 return rt2x00lib_resume(rt2x00dev); 884 return rt2x00lib_resume(rt2x00dev);
900} 885}
901EXPORT_SYMBOL_GPL(rt2x00usb_resume); 886EXPORT_SYMBOL_GPL(rt2x00usb_resume);
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 6a93939f44e8..0baeb894f093 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -2420,6 +2420,7 @@ static struct usb_device_id rt73usb_device_table[] = {
2420 /* Buffalo */ 2420 /* Buffalo */
2421 { USB_DEVICE(0x0411, 0x00d8) }, 2421 { USB_DEVICE(0x0411, 0x00d8) },
2422 { USB_DEVICE(0x0411, 0x00d9) }, 2422 { USB_DEVICE(0x0411, 0x00d9) },
2423 { USB_DEVICE(0x0411, 0x00e6) },
2423 { USB_DEVICE(0x0411, 0x00f4) }, 2424 { USB_DEVICE(0x0411, 0x00f4) },
2424 { USB_DEVICE(0x0411, 0x0116) }, 2425 { USB_DEVICE(0x0411, 0x0116) },
2425 { USB_DEVICE(0x0411, 0x0119) }, 2426 { USB_DEVICE(0x0411, 0x0119) },
diff --git a/drivers/net/wireless/rtlwifi/core.c b/drivers/net/wireless/rtlwifi/core.c
index 1bdc1aa305c0..04c4e9eb6ee6 100644
--- a/drivers/net/wireless/rtlwifi/core.c
+++ b/drivers/net/wireless/rtlwifi/core.c
@@ -610,6 +610,11 @@ static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,
610 610
611 mac->link_state = MAC80211_NOLINK; 611 mac->link_state = MAC80211_NOLINK;
612 memset(mac->bssid, 0, 6); 612 memset(mac->bssid, 0, 6);
613
614 /* reset sec info */
615 rtl_cam_reset_sec_info(hw);
616
617 rtl_cam_reset_all_entry(hw);
613 mac->vendor = PEER_UNKNOWN; 618 mac->vendor = PEER_UNKNOWN;
614 619
615 RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG, 620 RT_TRACE(rtlpriv, COMP_MAC80211, DBG_DMESG,
@@ -1063,6 +1068,9 @@ static int rtl_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1063 *or clear all entry here. 1068 *or clear all entry here.
1064 */ 1069 */
1065 rtl_cam_delete_one_entry(hw, mac_addr, key_idx); 1070 rtl_cam_delete_one_entry(hw, mac_addr, key_idx);
1071
1072 rtl_cam_reset_sec_info(hw);
1073
1066 break; 1074 break;
1067 default: 1075 default:
1068 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, 1076 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
index 4c34c4c1ae56..b7ecb9e44aa9 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c
@@ -133,6 +133,10 @@ int rtl92c_init_sw_vars(struct ieee80211_hw *hw)
133 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; 133 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
134 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; 134 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
135 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; 135 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
136 if (!rtlpriv->psc.inactiveps)
137 pr_info("rtl8192ce: Power Save off (module option)\n");
138 if (!rtlpriv->psc.fwctrl_lps)
139 pr_info("rtl8192ce: FW Power Save off (module option)\n");
136 rtlpriv->psc.reg_fwctrl_lps = 3; 140 rtlpriv->psc.reg_fwctrl_lps = 3;
137 rtlpriv->psc.reg_max_lps_awakeintvl = 5; 141 rtlpriv->psc.reg_max_lps_awakeintvl = 5;
138 /* for ASPM, you can close aspm through 142 /* for ASPM, you can close aspm through
@@ -356,10 +360,10 @@ module_param_named(swenc, rtl92ce_mod_params.sw_crypto, bool, 0444);
356module_param_named(ips, rtl92ce_mod_params.inactiveps, bool, 0444); 360module_param_named(ips, rtl92ce_mod_params.inactiveps, bool, 0444);
357module_param_named(swlps, rtl92ce_mod_params.swctrl_lps, bool, 0444); 361module_param_named(swlps, rtl92ce_mod_params.swctrl_lps, bool, 0444);
358module_param_named(fwlps, rtl92ce_mod_params.fwctrl_lps, bool, 0444); 362module_param_named(fwlps, rtl92ce_mod_params.fwctrl_lps, bool, 0444);
359MODULE_PARM_DESC(swenc, "using hardware crypto (default 0 [hardware])\n"); 363MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
360MODULE_PARM_DESC(ips, "using no link power save (default 1 is open)\n"); 364MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
361MODULE_PARM_DESC(fwlps, "using linked fw control power save " 365MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
362 "(default 1 is open)\n"); 366MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
363 367
364static struct pci_driver rtl92ce_driver = { 368static struct pci_driver rtl92ce_driver = {
365 .name = KBUILD_MODNAME, 369 .name = KBUILD_MODNAME,
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
index 81ae64234f80..c8977a50ca36 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
@@ -537,12 +537,6 @@ do { \
537 memset(__pdesc, 0, _size); \ 537 memset(__pdesc, 0, _size); \
538} while (0); 538} while (0);
539 539
540#define RX_HAL_IS_CCK_RATE(_pdesc)\
541 (_pdesc->rxmcs == DESC92_RATE1M || \
542 _pdesc->rxmcs == DESC92_RATE2M || \
543 _pdesc->rxmcs == DESC92_RATE5_5M || \
544 _pdesc->rxmcs == DESC92_RATE11M)
545
546struct rx_fwinfo_92c { 540struct rx_fwinfo_92c {
547 u8 gain_trsw[4]; 541 u8 gain_trsw[4];
548 u8 pwdb_all; 542 u8 pwdb_all;
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h
index 35529f701fc0..626d88e88e26 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h
@@ -87,12 +87,6 @@ void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter);
87 87
88u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw); 88u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw);
89 89
90#define RX_HAL_IS_CCK_RATE(_pdesc)\
91 (GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE1M ||\
92 GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE2M ||\
93 GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE5_5M ||\
94 GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE11M)
95
96struct rx_fwinfo_92c { 90struct rx_fwinfo_92c {
97 u8 gain_trsw[4]; 91 u8 gain_trsw[4];
98 u8 pwdb_all; 92 u8 pwdb_all;
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
index 195666a0c854..424b8a0323e2 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c
@@ -281,6 +281,8 @@ static struct usb_device_id rtl8192c_usb_ids[] = {
281 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817d, rtl92cu_hal_cfg)}, 281 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817d, rtl92cu_hal_cfg)},
282 /* 8188CE-VAU USB minCard (b/g mode only) */ 282 /* 8188CE-VAU USB minCard (b/g mode only) */
283 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817e, rtl92cu_hal_cfg)}, 283 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817e, rtl92cu_hal_cfg)},
284 /* 8188RU in Alfa AWUS036NHR */
285 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817f, rtl92cu_hal_cfg)},
284 /* 8188 Combo for BC4 */ 286 /* 8188 Combo for BC4 */
285 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8754, rtl92cu_hal_cfg)}, 287 {RTL_USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8754, rtl92cu_hal_cfg)},
286 288
@@ -303,20 +305,23 @@ static struct usb_device_id rtl8192c_usb_ids[] = {
303 {RTL_USB_DEVICE(0x0eb0, 0x9071, rtl92cu_hal_cfg)}, /*NO Brand - Etop*/ 305 {RTL_USB_DEVICE(0x0eb0, 0x9071, rtl92cu_hal_cfg)}, /*NO Brand - Etop*/
304 /* HP - Lite-On ,8188CUS Slim Combo */ 306 /* HP - Lite-On ,8188CUS Slim Combo */
305 {RTL_USB_DEVICE(0x103c, 0x1629, rtl92cu_hal_cfg)}, 307 {RTL_USB_DEVICE(0x103c, 0x1629, rtl92cu_hal_cfg)},
308 {RTL_USB_DEVICE(0x13d3, 0x3357, rtl92cu_hal_cfg)}, /* AzureWave */
306 {RTL_USB_DEVICE(0x2001, 0x3308, rtl92cu_hal_cfg)}, /*D-Link - Alpha*/ 309 {RTL_USB_DEVICE(0x2001, 0x3308, rtl92cu_hal_cfg)}, /*D-Link - Alpha*/
307 {RTL_USB_DEVICE(0x2019, 0xab2a, rtl92cu_hal_cfg)}, /*Planex - Abocom*/ 310 {RTL_USB_DEVICE(0x2019, 0xab2a, rtl92cu_hal_cfg)}, /*Planex - Abocom*/
308 {RTL_USB_DEVICE(0x2019, 0xed17, rtl92cu_hal_cfg)}, /*PCI - Edimax*/ 311 {RTL_USB_DEVICE(0x2019, 0xed17, rtl92cu_hal_cfg)}, /*PCI - Edimax*/
309 {RTL_USB_DEVICE(0x20f4, 0x648b, rtl92cu_hal_cfg)}, /*TRENDnet - Cameo*/ 312 {RTL_USB_DEVICE(0x20f4, 0x648b, rtl92cu_hal_cfg)}, /*TRENDnet - Cameo*/
310 {RTL_USB_DEVICE(0x7392, 0x7811, rtl92cu_hal_cfg)}, /*Edimax - Edimax*/ 313 {RTL_USB_DEVICE(0x7392, 0x7811, rtl92cu_hal_cfg)}, /*Edimax - Edimax*/
311 {RTL_USB_DEVICE(0x3358, 0x13d3, rtl92cu_hal_cfg)}, /*Azwave 8188CE-VAU*/ 314 {RTL_USB_DEVICE(0x13d3, 0x3358, rtl92cu_hal_cfg)}, /*Azwave 8188CE-VAU*/
312 /* Russian customer -Azwave (8188CE-VAU b/g mode only) */ 315 /* Russian customer -Azwave (8188CE-VAU b/g mode only) */
313 {RTL_USB_DEVICE(0x3359, 0x13d3, rtl92cu_hal_cfg)}, 316 {RTL_USB_DEVICE(0x13d3, 0x3359, rtl92cu_hal_cfg)},
317 {RTL_USB_DEVICE(0x4855, 0x0090, rtl92cu_hal_cfg)}, /* Feixun */
318 {RTL_USB_DEVICE(0x4855, 0x0091, rtl92cu_hal_cfg)}, /* NetweeN-Feixun */
319 {RTL_USB_DEVICE(0x9846, 0x9041, rtl92cu_hal_cfg)}, /* Netgear Cameo */
314 320
315 /****** 8192CU ********/ 321 /****** 8192CU ********/
316 {RTL_USB_DEVICE(0x0586, 0x341f, rtl92cu_hal_cfg)}, /*Zyxel -Abocom*/ 322 {RTL_USB_DEVICE(0x0586, 0x341f, rtl92cu_hal_cfg)}, /*Zyxel -Abocom*/
317 {RTL_USB_DEVICE(0x07aa, 0x0056, rtl92cu_hal_cfg)}, /*ATKK-Gemtek*/ 323 {RTL_USB_DEVICE(0x07aa, 0x0056, rtl92cu_hal_cfg)}, /*ATKK-Gemtek*/
318 {RTL_USB_DEVICE(0x07b8, 0x8178, rtl92cu_hal_cfg)}, /*Funai -Abocom*/ 324 {RTL_USB_DEVICE(0x07b8, 0x8178, rtl92cu_hal_cfg)}, /*Funai -Abocom*/
319 {RTL_USB_DEVICE(0x07b8, 0x8178, rtl92cu_hal_cfg)}, /*Abocom -Abocom*/
320 {RTL_USB_DEVICE(0x2001, 0x3307, rtl92cu_hal_cfg)}, /*D-Link-Cameo*/ 325 {RTL_USB_DEVICE(0x2001, 0x3307, rtl92cu_hal_cfg)}, /*D-Link-Cameo*/
321 {RTL_USB_DEVICE(0x2001, 0x3309, rtl92cu_hal_cfg)}, /*D-Link-Alpha*/ 326 {RTL_USB_DEVICE(0x2001, 0x3309, rtl92cu_hal_cfg)}, /*D-Link-Alpha*/
322 {RTL_USB_DEVICE(0x2001, 0x330a, rtl92cu_hal_cfg)}, /*D-Link-Alpha*/ 327 {RTL_USB_DEVICE(0x2001, 0x330a, rtl92cu_hal_cfg)}, /*D-Link-Alpha*/
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c
index c4161148e0d8..bc33b147f44f 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c
@@ -548,15 +548,16 @@ void rtl92cu_tx_fill_desc(struct ieee80211_hw *hw,
548 (tcb_desc->rts_use_shortpreamble ? 1 : 0) 548 (tcb_desc->rts_use_shortpreamble ? 1 : 0)
549 : (tcb_desc->rts_use_shortgi ? 1 : 0))); 549 : (tcb_desc->rts_use_shortgi ? 1 : 0)));
550 if (mac->bw_40) { 550 if (mac->bw_40) {
551 if (tcb_desc->packet_bw) { 551 if (rate_flag & IEEE80211_TX_RC_DUP_DATA) {
552 SET_TX_DESC_DATA_BW(txdesc, 1); 552 SET_TX_DESC_DATA_BW(txdesc, 1);
553 SET_TX_DESC_DATA_SC(txdesc, 3); 553 SET_TX_DESC_DATA_SC(txdesc, 3);
554 } else if(rate_flag & IEEE80211_TX_RC_40_MHZ_WIDTH){
555 SET_TX_DESC_DATA_BW(txdesc, 1);
556 SET_TX_DESC_DATA_SC(txdesc, mac->cur_40_prime_sc);
554 } else { 557 } else {
555 SET_TX_DESC_DATA_BW(txdesc, 0); 558 SET_TX_DESC_DATA_BW(txdesc, 0);
556 if (rate_flag & IEEE80211_TX_RC_DUP_DATA) 559 SET_TX_DESC_DATA_SC(txdesc, 0);
557 SET_TX_DESC_DATA_SC(txdesc, 560 }
558 mac->cur_40_prime_sc);
559 }
560 } else { 561 } else {
561 SET_TX_DESC_DATA_BW(txdesc, 0); 562 SET_TX_DESC_DATA_BW(txdesc, 0);
562 SET_TX_DESC_DATA_SC(txdesc, 0); 563 SET_TX_DESC_DATA_SC(txdesc, 0);
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/sw.c b/drivers/net/wireless/rtlwifi/rtl8192de/sw.c
index f6419b7ed2f4..c681597c7f20 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192de/sw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192de/sw.c
@@ -150,6 +150,10 @@ static int rtl92d_init_sw_vars(struct ieee80211_hw *hw)
150 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; 150 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
151 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; 151 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
152 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; 152 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
153 if (!rtlpriv->psc.inactiveps)
154 pr_info("rtl8192ce: Power Save off (module option)\n");
155 if (!rtlpriv->psc.fwctrl_lps)
156 pr_info("rtl8192ce: FW Power Save off (module option)\n");
153 rtlpriv->psc.reg_fwctrl_lps = 3; 157 rtlpriv->psc.reg_fwctrl_lps = 3;
154 rtlpriv->psc.reg_max_lps_awakeintvl = 5; 158 rtlpriv->psc.reg_max_lps_awakeintvl = 5;
155 /* for ASPM, you can close aspm through 159 /* for ASPM, you can close aspm through
@@ -376,10 +380,10 @@ module_param_named(swenc, rtl92de_mod_params.sw_crypto, bool, 0444);
376module_param_named(ips, rtl92de_mod_params.inactiveps, bool, 0444); 380module_param_named(ips, rtl92de_mod_params.inactiveps, bool, 0444);
377module_param_named(swlps, rtl92de_mod_params.swctrl_lps, bool, 0444); 381module_param_named(swlps, rtl92de_mod_params.swctrl_lps, bool, 0444);
378module_param_named(fwlps, rtl92de_mod_params.fwctrl_lps, bool, 0444); 382module_param_named(fwlps, rtl92de_mod_params.fwctrl_lps, bool, 0444);
379MODULE_PARM_DESC(swenc, "using hardware crypto (default 0 [hardware])\n"); 383MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
380MODULE_PARM_DESC(ips, "using no link power save (default 1 is open)\n"); 384MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
381MODULE_PARM_DESC(swlps, "using linked sw control power save (default 1" 385MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
382 " is open)\n"); 386MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
383 387
384static struct pci_driver rtl92de_driver = { 388static struct pci_driver rtl92de_driver = {
385 .name = KBUILD_MODNAME, 389 .name = KBUILD_MODNAME,
diff --git a/drivers/net/wireless/rtlwifi/rtl8192de/trx.h b/drivers/net/wireless/rtlwifi/rtl8192de/trx.h
index 6c2236868c9a..4d55d0b6816d 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192de/trx.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192de/trx.h
@@ -537,12 +537,6 @@ do { \
537 memset((void *)__pdesc, 0, _size); \ 537 memset((void *)__pdesc, 0, _size); \
538} while (0); 538} while (0);
539 539
540#define RX_HAL_IS_CCK_RATE(_pdesc)\
541 (_pdesc->rxmcs == DESC92_RATE1M || \
542 _pdesc->rxmcs == DESC92_RATE2M || \
543 _pdesc->rxmcs == DESC92_RATE5_5M || \
544 _pdesc->rxmcs == DESC92_RATE11M)
545
546/* For 92D early mode */ 540/* For 92D early mode */
547#define SET_EARLYMODE_PKTNUM(__paddr, __value) \ 541#define SET_EARLYMODE_PKTNUM(__paddr, __value) \
548 SET_BITS_OFFSET_LE(__paddr, 0, 3, __value) 542 SET_BITS_OFFSET_LE(__paddr, 0, 3, __value)
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/def.h b/drivers/net/wireless/rtlwifi/rtl8192se/def.h
index 68204ea175dd..c6c044816d39 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192se/def.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192se/def.h
@@ -459,7 +459,7 @@ do { \
459#define SET_RX_STATUS__DESC_BUFF_ADDR(__pdesc, __val) \ 459#define SET_RX_STATUS__DESC_BUFF_ADDR(__pdesc, __val) \
460 SET_BITS_OFFSET_LE(__pdesc + 24, 0, 32, __val) 460 SET_BITS_OFFSET_LE(__pdesc + 24, 0, 32, __val)
461 461
462#define RX_HAL_IS_CCK_RATE(_pdesc)\ 462#define SE_RX_HAL_IS_CCK_RATE(_pdesc)\
463 (GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE1M || \ 463 (GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE1M || \
464 GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE2M || \ 464 GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE2M || \
465 GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE5_5M ||\ 465 GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE5_5M ||\
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/sw.c b/drivers/net/wireless/rtlwifi/rtl8192se/sw.c
index 0055a1c845a2..24bd331a5484 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192se/sw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192se/sw.c
@@ -164,6 +164,10 @@ static int rtl92s_init_sw_vars(struct ieee80211_hw *hw)
164 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; 164 rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
165 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; 165 rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
166 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; 166 rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
167 if (!rtlpriv->psc.inactiveps)
168 pr_info("rtl8192ce: Power Save off (module option)\n");
169 if (!rtlpriv->psc.fwctrl_lps)
170 pr_info("rtl8192ce: FW Power Save off (module option)\n");
167 rtlpriv->psc.reg_fwctrl_lps = 3; 171 rtlpriv->psc.reg_fwctrl_lps = 3;
168 rtlpriv->psc.reg_max_lps_awakeintvl = 5; 172 rtlpriv->psc.reg_max_lps_awakeintvl = 5;
169 /* for ASPM, you can close aspm through 173 /* for ASPM, you can close aspm through
@@ -378,6 +382,7 @@ MODULE_DEVICE_TABLE(pci, rtl92se_pci_ids);
378 382
379MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>"); 383MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
380MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>"); 384MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
385MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
381MODULE_LICENSE("GPL"); 386MODULE_LICENSE("GPL");
382MODULE_DESCRIPTION("Realtek 8192S/8191S 802.11n PCI wireless"); 387MODULE_DESCRIPTION("Realtek 8192S/8191S 802.11n PCI wireless");
383MODULE_FIRMWARE("rtlwifi/rtl8192sefw.bin"); 388MODULE_FIRMWARE("rtlwifi/rtl8192sefw.bin");
@@ -386,11 +391,10 @@ module_param_named(swenc, rtl92se_mod_params.sw_crypto, bool, 0444);
386module_param_named(ips, rtl92se_mod_params.inactiveps, bool, 0444); 391module_param_named(ips, rtl92se_mod_params.inactiveps, bool, 0444);
387module_param_named(swlps, rtl92se_mod_params.swctrl_lps, bool, 0444); 392module_param_named(swlps, rtl92se_mod_params.swctrl_lps, bool, 0444);
388module_param_named(fwlps, rtl92se_mod_params.fwctrl_lps, bool, 0444); 393module_param_named(fwlps, rtl92se_mod_params.fwctrl_lps, bool, 0444);
389MODULE_PARM_DESC(swenc, "using hardware crypto (default 0 [hardware])\n"); 394MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
390MODULE_PARM_DESC(ips, "using no link power save (default 1 is open)\n"); 395MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
391MODULE_PARM_DESC(swlps, "using linked sw control power save (default 1 is " 396MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
392 "open)\n"); 397MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
393
394 398
395static struct pci_driver rtl92se_driver = { 399static struct pci_driver rtl92se_driver = {
396 .name = KBUILD_MODNAME, 400 .name = KBUILD_MODNAME,
diff --git a/drivers/net/wireless/rtlwifi/rtl8192se/trx.c b/drivers/net/wireless/rtlwifi/rtl8192se/trx.c
index d9aeae7f8bdb..ba137da082b5 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192se/trx.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192se/trx.c
@@ -126,7 +126,7 @@ static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
126 bool in_powersavemode = false; 126 bool in_powersavemode = false;
127 bool is_cck_rate; 127 bool is_cck_rate;
128 128
129 is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc); 129 is_cck_rate = SE_RX_HAL_IS_CCK_RATE(pdesc);
130 pstats->packet_matchbssid = packet_match_bssid; 130 pstats->packet_matchbssid = packet_match_bssid;
131 pstats->packet_toself = packet_toself; 131 pstats->packet_toself = packet_toself;
132 pstats->is_cck = is_cck_rate; 132 pstats->is_cck = is_cck_rate;
diff --git a/drivers/net/wireless/rtlwifi/wifi.h b/drivers/net/wireless/rtlwifi/wifi.h
index 8a9091968f31..615f6b4463e6 100644
--- a/drivers/net/wireless/rtlwifi/wifi.h
+++ b/drivers/net/wireless/rtlwifi/wifi.h
@@ -165,6 +165,12 @@ enum hardware_type {
165#define IS_HARDWARE_TYPE_8723U(rtlhal) \ 165#define IS_HARDWARE_TYPE_8723U(rtlhal) \
166 (rtlhal->hw_type == HARDWARE_TYPE_RTL8723U) 166 (rtlhal->hw_type == HARDWARE_TYPE_RTL8723U)
167 167
168#define RX_HAL_IS_CCK_RATE(_pdesc)\
169 (_pdesc->rxmcs == DESC92_RATE1M || \
170 _pdesc->rxmcs == DESC92_RATE2M || \
171 _pdesc->rxmcs == DESC92_RATE5_5M || \
172 _pdesc->rxmcs == DESC92_RATE11M)
173
168enum scan_operation_backup_opt { 174enum scan_operation_backup_opt {
169 SCAN_OPT_BACKUP = 0, 175 SCAN_OPT_BACKUP = 0,
170 SCAN_OPT_RESTORE, 176 SCAN_OPT_RESTORE,
diff --git a/drivers/net/wireless/wl1251/acx.c b/drivers/net/wireless/wl1251/acx.c
index ef8370edace7..ad87a1ac6462 100644
--- a/drivers/net/wireless/wl1251/acx.c
+++ b/drivers/net/wireless/wl1251/acx.c
@@ -140,8 +140,6 @@ int wl1251_acx_sleep_auth(struct wl1251 *wl, u8 sleep_auth)
140 auth->sleep_auth = sleep_auth; 140 auth->sleep_auth = sleep_auth;
141 141
142 ret = wl1251_cmd_configure(wl, ACX_SLEEP_AUTH, auth, sizeof(*auth)); 142 ret = wl1251_cmd_configure(wl, ACX_SLEEP_AUTH, auth, sizeof(*auth));
143 if (ret < 0)
144 return ret;
145 143
146out: 144out:
147 kfree(auth); 145 kfree(auth);
@@ -681,10 +679,8 @@ int wl1251_acx_cca_threshold(struct wl1251 *wl)
681 679
682 ret = wl1251_cmd_configure(wl, ACX_CCA_THRESHOLD, 680 ret = wl1251_cmd_configure(wl, ACX_CCA_THRESHOLD,
683 detection, sizeof(*detection)); 681 detection, sizeof(*detection));
684 if (ret < 0) { 682 if (ret < 0)
685 wl1251_warning("failed to set cca threshold: %d", ret); 683 wl1251_warning("failed to set cca threshold: %d", ret);
686 return ret;
687 }
688 684
689out: 685out:
690 kfree(detection); 686 kfree(detection);
diff --git a/drivers/net/wireless/wl1251/cmd.c b/drivers/net/wireless/wl1251/cmd.c
index 81f164bc4888..d14d69d733a0 100644
--- a/drivers/net/wireless/wl1251/cmd.c
+++ b/drivers/net/wireless/wl1251/cmd.c
@@ -241,7 +241,7 @@ int wl1251_cmd_data_path(struct wl1251 *wl, u8 channel, bool enable)
241 if (ret < 0) { 241 if (ret < 0) {
242 wl1251_error("tx %s cmd for channel %d failed", 242 wl1251_error("tx %s cmd for channel %d failed",
243 enable ? "start" : "stop", channel); 243 enable ? "start" : "stop", channel);
244 return ret; 244 goto out;
245 } 245 }
246 246
247 wl1251_debug(DEBUG_BOOT, "tx %s cmd channel %d", 247 wl1251_debug(DEBUG_BOOT, "tx %s cmd channel %d",
diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig
index 07bcb1548d8b..3fe388b87c2e 100644
--- a/drivers/net/wireless/wl12xx/Kconfig
+++ b/drivers/net/wireless/wl12xx/Kconfig
@@ -19,16 +19,6 @@ config WL12XX
19 If you choose to build a module, it will be called wl12xx. Say N if 19 If you choose to build a module, it will be called wl12xx. Say N if
20 unsure. 20 unsure.
21 21
22config WL12XX_HT
23 bool "TI wl12xx 802.11 HT support (EXPERIMENTAL)"
24 depends on WL12XX && EXPERIMENTAL
25 default n
26 ---help---
27 This will enable 802.11 HT support in the wl12xx module.
28
29 That configuration is temporary due to the code incomplete and
30 still in testing process.
31
32config WL12XX_SPI 22config WL12XX_SPI
33 tristate "TI wl12xx SPI support" 23 tristate "TI wl12xx SPI support"
34 depends on WL12XX && SPI_MASTER 24 depends on WL12XX && SPI_MASTER
diff --git a/drivers/net/wireless/wl12xx/acx.c b/drivers/net/wireless/wl12xx/acx.c
index e047594794aa..399849eeb247 100644
--- a/drivers/net/wireless/wl12xx/acx.c
+++ b/drivers/net/wireless/wl12xx/acx.c
@@ -78,8 +78,6 @@ int wl1271_acx_sleep_auth(struct wl1271 *wl, u8 sleep_auth)
78 auth->sleep_auth = sleep_auth; 78 auth->sleep_auth = sleep_auth;
79 79
80 ret = wl1271_cmd_configure(wl, ACX_SLEEP_AUTH, auth, sizeof(*auth)); 80 ret = wl1271_cmd_configure(wl, ACX_SLEEP_AUTH, auth, sizeof(*auth));
81 if (ret < 0)
82 return ret;
83 81
84out: 82out:
85 kfree(auth); 83 kfree(auth);
@@ -576,10 +574,8 @@ int wl1271_acx_cca_threshold(struct wl1271 *wl)
576 574
577 ret = wl1271_cmd_configure(wl, ACX_CCA_THRESHOLD, 575 ret = wl1271_cmd_configure(wl, ACX_CCA_THRESHOLD,
578 detection, sizeof(*detection)); 576 detection, sizeof(*detection));
579 if (ret < 0) { 577 if (ret < 0)
580 wl1271_warning("failed to set cca threshold: %d", ret); 578 wl1271_warning("failed to set cca threshold: %d", ret);
581 return ret;
582 }
583 579
584out: 580out:
585 kfree(detection); 581 kfree(detection);
@@ -1691,3 +1687,43 @@ out:
1691 kfree(acx); 1687 kfree(acx);
1692 return ret; 1688 return ret;
1693} 1689}
1690
1691int wl12xx_acx_config_hangover(struct wl1271 *wl)
1692{
1693 struct wl12xx_acx_config_hangover *acx;
1694 struct conf_hangover_settings *conf = &wl->conf.hangover;
1695 int ret;
1696
1697 wl1271_debug(DEBUG_ACX, "acx config hangover");
1698
1699 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
1700 if (!acx) {
1701 ret = -ENOMEM;
1702 goto out;
1703 }
1704
1705 acx->recover_time = cpu_to_le32(conf->recover_time);
1706 acx->hangover_period = conf->hangover_period;
1707 acx->dynamic_mode = conf->dynamic_mode;
1708 acx->early_termination_mode = conf->early_termination_mode;
1709 acx->max_period = conf->max_period;
1710 acx->min_period = conf->min_period;
1711 acx->increase_delta = conf->increase_delta;
1712 acx->decrease_delta = conf->decrease_delta;
1713 acx->quiet_time = conf->quiet_time;
1714 acx->increase_time = conf->increase_time;
1715 acx->window_size = acx->window_size;
1716
1717 ret = wl1271_cmd_configure(wl, ACX_CONFIG_HANGOVER, acx,
1718 sizeof(*acx));
1719
1720 if (ret < 0) {
1721 wl1271_warning("acx config hangover failed: %d", ret);
1722 goto out;
1723 }
1724
1725out:
1726 kfree(acx);
1727 return ret;
1728
1729}
diff --git a/drivers/net/wireless/wl12xx/acx.h b/drivers/net/wireless/wl12xx/acx.h
index 758c596f62f6..556ee4e282d5 100644
--- a/drivers/net/wireless/wl12xx/acx.h
+++ b/drivers/net/wireless/wl12xx/acx.h
@@ -1144,6 +1144,23 @@ struct wl12xx_acx_set_rate_mgmt_params {
1144 u8 padding2[2]; 1144 u8 padding2[2];
1145} __packed; 1145} __packed;
1146 1146
1147struct wl12xx_acx_config_hangover {
1148 struct acx_header header;
1149
1150 __le32 recover_time;
1151 u8 hangover_period;
1152 u8 dynamic_mode;
1153 u8 early_termination_mode;
1154 u8 max_period;
1155 u8 min_period;
1156 u8 increase_delta;
1157 u8 decrease_delta;
1158 u8 quiet_time;
1159 u8 increase_time;
1160 u8 window_size;
1161 u8 padding[2];
1162} __packed;
1163
1147enum { 1164enum {
1148 ACX_WAKE_UP_CONDITIONS = 0x0002, 1165 ACX_WAKE_UP_CONDITIONS = 0x0002,
1149 ACX_MEM_CFG = 0x0003, 1166 ACX_MEM_CFG = 0x0003,
@@ -1281,5 +1298,6 @@ int wl1271_acx_config_ps(struct wl1271 *wl);
1281int wl1271_acx_set_inconnection_sta(struct wl1271 *wl, u8 *addr); 1298int wl1271_acx_set_inconnection_sta(struct wl1271 *wl, u8 *addr);
1282int wl1271_acx_fm_coex(struct wl1271 *wl); 1299int wl1271_acx_fm_coex(struct wl1271 *wl);
1283int wl12xx_acx_set_rate_mgmt_params(struct wl1271 *wl); 1300int wl12xx_acx_set_rate_mgmt_params(struct wl1271 *wl);
1301int wl12xx_acx_config_hangover(struct wl1271 *wl);
1284 1302
1285#endif /* __WL1271_ACX_H__ */ 1303#endif /* __WL1271_ACX_H__ */
diff --git a/drivers/net/wireless/wl12xx/boot.c b/drivers/net/wireless/wl12xx/boot.c
index cc70422c0575..6d5664bfc37d 100644
--- a/drivers/net/wireless/wl12xx/boot.c
+++ b/drivers/net/wireless/wl12xx/boot.c
@@ -294,9 +294,7 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
294 */ 294 */
295 if (wl->nvs_len == sizeof(struct wl1271_nvs_file) || 295 if (wl->nvs_len == sizeof(struct wl1271_nvs_file) ||
296 wl->nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) { 296 wl->nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {
297 /* for now 11a is unsupported in AP mode */ 297 if (nvs->general_params.dual_mode_select)
298 if (wl->bss_type != BSS_TYPE_AP_BSS &&
299 nvs->general_params.dual_mode_select)
300 wl->enable_11a = true; 298 wl->enable_11a = true;
301 } 299 }
302 300
diff --git a/drivers/net/wireless/wl12xx/cmd.c b/drivers/net/wireless/wl12xx/cmd.c
index 817bc183bc83..084262f169b2 100644
--- a/drivers/net/wireless/wl12xx/cmd.c
+++ b/drivers/net/wireless/wl12xx/cmd.c
@@ -895,7 +895,7 @@ int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len)
895 struct acx_header *acx = buf; 895 struct acx_header *acx = buf;
896 int ret; 896 int ret;
897 897
898 wl1271_debug(DEBUG_CMD, "cmd configure"); 898 wl1271_debug(DEBUG_CMD, "cmd configure (%d)", id);
899 899
900 acx->id = cpu_to_le16(id); 900 acx->id = cpu_to_le16(id);
901 901
@@ -1413,7 +1413,7 @@ out:
1413int wl12xx_cmd_add_peer(struct wl1271 *wl, struct ieee80211_sta *sta, u8 hlid) 1413int wl12xx_cmd_add_peer(struct wl1271 *wl, struct ieee80211_sta *sta, u8 hlid)
1414{ 1414{
1415 struct wl12xx_cmd_add_peer *cmd; 1415 struct wl12xx_cmd_add_peer *cmd;
1416 int ret; 1416 int i, ret;
1417 u32 sta_rates; 1417 u32 sta_rates;
1418 1418
1419 wl1271_debug(DEBUG_CMD, "cmd add peer %d", (int)hlid); 1419 wl1271_debug(DEBUG_CMD, "cmd add peer %d", (int)hlid);
@@ -1424,15 +1424,19 @@ int wl12xx_cmd_add_peer(struct wl1271 *wl, struct ieee80211_sta *sta, u8 hlid)
1424 goto out; 1424 goto out;
1425 } 1425 }
1426 1426
1427 /* currently we don't support UAPSD */
1428 cmd->sp_len = 0;
1429
1430 memcpy(cmd->addr, sta->addr, ETH_ALEN); 1427 memcpy(cmd->addr, sta->addr, ETH_ALEN);
1431 cmd->bss_index = WL1271_AP_BSS_INDEX; 1428 cmd->bss_index = WL1271_AP_BSS_INDEX;
1432 cmd->aid = sta->aid; 1429 cmd->aid = sta->aid;
1433 cmd->hlid = hlid; 1430 cmd->hlid = hlid;
1431 cmd->sp_len = sta->max_sp;
1434 cmd->wmm = sta->wme ? 1 : 0; 1432 cmd->wmm = sta->wme ? 1 : 0;
1435 1433
1434 for (i = 0; i < NUM_ACCESS_CATEGORIES_COPY; i++)
1435 if (sta->wme && (sta->uapsd_queues & BIT(i)))
1436 cmd->psd_type[i] = WL1271_PSD_UPSD_TRIGGER;
1437 else
1438 cmd->psd_type[i] = WL1271_PSD_LEGACY;
1439
1436 sta_rates = sta->supp_rates[wl->band]; 1440 sta_rates = sta->supp_rates[wl->band];
1437 if (sta->ht_cap.ht_supported) 1441 if (sta->ht_cap.ht_supported)
1438 sta_rates |= sta->ht_cap.mcs.rx_mask[0] << HW_HT_RATES_OFFSET; 1442 sta_rates |= sta->ht_cap.mcs.rx_mask[0] << HW_HT_RATES_OFFSET;
@@ -1440,7 +1444,8 @@ int wl12xx_cmd_add_peer(struct wl1271 *wl, struct ieee80211_sta *sta, u8 hlid)
1440 cmd->supported_rates = 1444 cmd->supported_rates =
1441 cpu_to_le32(wl1271_tx_enabled_rates_get(wl, sta_rates)); 1445 cpu_to_le32(wl1271_tx_enabled_rates_get(wl, sta_rates));
1442 1446
1443 wl1271_debug(DEBUG_CMD, "new peer rates: 0x%x", cmd->supported_rates); 1447 wl1271_debug(DEBUG_CMD, "new peer rates=0x%x queues=0x%x",
1448 cmd->supported_rates, sta->uapsd_queues);
1444 1449
1445 ret = wl1271_cmd_send(wl, CMD_ADD_PEER, cmd, sizeof(*cmd), 0); 1450 ret = wl1271_cmd_send(wl, CMD_ADD_PEER, cmd, sizeof(*cmd), 0);
1446 if (ret < 0) { 1451 if (ret < 0) {
diff --git a/drivers/net/wireless/wl12xx/cmd.h b/drivers/net/wireless/wl12xx/cmd.h
index 22c2f373dd04..8e4d11ec0c55 100644
--- a/drivers/net/wireless/wl12xx/cmd.h
+++ b/drivers/net/wireless/wl12xx/cmd.h
@@ -591,6 +591,13 @@ enum wl12xx_ssid_type {
591 WL12XX_SSID_TYPE_ANY = 2, 591 WL12XX_SSID_TYPE_ANY = 2,
592}; 592};
593 593
594enum wl1271_psd_type {
595 WL1271_PSD_LEGACY = 0,
596 WL1271_PSD_UPSD_TRIGGER = 1,
597 WL1271_PSD_LEGACY_PSPOLL = 2,
598 WL1271_PSD_SAPSD = 3
599};
600
594struct wl12xx_cmd_add_peer { 601struct wl12xx_cmd_add_peer {
595 struct wl1271_cmd_header header; 602 struct wl1271_cmd_header header;
596 603
diff --git a/drivers/net/wireless/wl12xx/conf.h b/drivers/net/wireless/wl12xx/conf.h
index 82f205c43342..45428a21f9e2 100644
--- a/drivers/net/wireless/wl12xx/conf.h
+++ b/drivers/net/wireless/wl12xx/conf.h
@@ -916,14 +916,6 @@ struct conf_conn_settings {
916 u8 psm_entry_nullfunc_retries; 916 u8 psm_entry_nullfunc_retries;
917 917
918 /* 918 /*
919 * Specifies the time to linger in active mode after successfully
920 * transmitting the PSM entry null-func frame.
921 *
922 * Range 0 - 255 TU's
923 */
924 u8 psm_entry_hangover_period;
925
926 /*
927 * 919 *
928 * Specifies the interval of the connection keep-alive null-func 920 * Specifies the interval of the connection keep-alive null-func
929 * frame in ms. 921 * frame in ms.
@@ -1236,6 +1228,20 @@ struct conf_rate_policy_settings {
1236 u8 rate_retry_policy[ACX_RATE_MGMT_NUM_OF_RATES]; 1228 u8 rate_retry_policy[ACX_RATE_MGMT_NUM_OF_RATES];
1237}; 1229};
1238 1230
1231struct conf_hangover_settings {
1232 u32 recover_time;
1233 u8 hangover_period;
1234 u8 dynamic_mode;
1235 u8 early_termination_mode;
1236 u8 max_period;
1237 u8 min_period;
1238 u8 increase_delta;
1239 u8 decrease_delta;
1240 u8 quiet_time;
1241 u8 increase_time;
1242 u8 window_size;
1243};
1244
1239struct conf_drv_settings { 1245struct conf_drv_settings {
1240 struct conf_sg_settings sg; 1246 struct conf_sg_settings sg;
1241 struct conf_rx_settings rx; 1247 struct conf_rx_settings rx;
@@ -1254,6 +1260,7 @@ struct conf_drv_settings {
1254 struct conf_rx_streaming_settings rx_streaming; 1260 struct conf_rx_streaming_settings rx_streaming;
1255 struct conf_fwlog fwlog; 1261 struct conf_fwlog fwlog;
1256 struct conf_rate_policy_settings rate; 1262 struct conf_rate_policy_settings rate;
1263 struct conf_hangover_settings hangover;
1257 u8 hci_io_ds; 1264 u8 hci_io_ds;
1258}; 1265};
1259 1266
diff --git a/drivers/net/wireless/wl12xx/debugfs.c b/drivers/net/wireless/wl12xx/debugfs.c
index d59354f53702..3999fd528302 100644
--- a/drivers/net/wireless/wl12xx/debugfs.c
+++ b/drivers/net/wireless/wl12xx/debugfs.c
@@ -265,18 +265,10 @@ static ssize_t gpio_power_write(struct file *file,
265 size_t count, loff_t *ppos) 265 size_t count, loff_t *ppos)
266{ 266{
267 struct wl1271 *wl = file->private_data; 267 struct wl1271 *wl = file->private_data;
268 char buf[10];
269 size_t len;
270 unsigned long value; 268 unsigned long value;
271 int ret; 269 int ret;
272 270
273 len = min(count, sizeof(buf) - 1); 271 ret = kstrtoul_from_user(user_buf, count, 10, &value);
274 if (copy_from_user(buf, user_buf, len)) {
275 return -EFAULT;
276 }
277 buf[len] = '\0';
278
279 ret = kstrtoul(buf, 0, &value);
280 if (ret < 0) { 272 if (ret < 0) {
281 wl1271_warning("illegal value in gpio_power"); 273 wl1271_warning("illegal value in gpio_power");
282 return -EINVAL; 274 return -EINVAL;
@@ -427,17 +419,10 @@ static ssize_t dtim_interval_write(struct file *file,
427 size_t count, loff_t *ppos) 419 size_t count, loff_t *ppos)
428{ 420{
429 struct wl1271 *wl = file->private_data; 421 struct wl1271 *wl = file->private_data;
430 char buf[10];
431 size_t len;
432 unsigned long value; 422 unsigned long value;
433 int ret; 423 int ret;
434 424
435 len = min(count, sizeof(buf) - 1); 425 ret = kstrtoul_from_user(user_buf, count, 10, &value);
436 if (copy_from_user(buf, user_buf, len))
437 return -EFAULT;
438 buf[len] = '\0';
439
440 ret = kstrtoul(buf, 0, &value);
441 if (ret < 0) { 426 if (ret < 0) {
442 wl1271_warning("illegal value for dtim_interval"); 427 wl1271_warning("illegal value for dtim_interval");
443 return -EINVAL; 428 return -EINVAL;
@@ -492,17 +477,10 @@ static ssize_t beacon_interval_write(struct file *file,
492 size_t count, loff_t *ppos) 477 size_t count, loff_t *ppos)
493{ 478{
494 struct wl1271 *wl = file->private_data; 479 struct wl1271 *wl = file->private_data;
495 char buf[10];
496 size_t len;
497 unsigned long value; 480 unsigned long value;
498 int ret; 481 int ret;
499 482
500 len = min(count, sizeof(buf) - 1); 483 ret = kstrtoul_from_user(user_buf, count, 10, &value);
501 if (copy_from_user(buf, user_buf, len))
502 return -EFAULT;
503 buf[len] = '\0';
504
505 ret = kstrtoul(buf, 0, &value);
506 if (ret < 0) { 484 if (ret < 0) {
507 wl1271_warning("illegal value for beacon_interval"); 485 wl1271_warning("illegal value for beacon_interval");
508 return -EINVAL; 486 return -EINVAL;
@@ -542,17 +520,10 @@ static ssize_t rx_streaming_interval_write(struct file *file,
542 size_t count, loff_t *ppos) 520 size_t count, loff_t *ppos)
543{ 521{
544 struct wl1271 *wl = file->private_data; 522 struct wl1271 *wl = file->private_data;
545 char buf[10];
546 size_t len;
547 unsigned long value; 523 unsigned long value;
548 int ret; 524 int ret;
549 525
550 len = min(count, sizeof(buf) - 1); 526 ret = kstrtoul_from_user(user_buf, count, 10, &value);
551 if (copy_from_user(buf, user_buf, len))
552 return -EFAULT;
553 buf[len] = '\0';
554
555 ret = kstrtoul(buf, 0, &value);
556 if (ret < 0) { 527 if (ret < 0) {
557 wl1271_warning("illegal value in rx_streaming_interval!"); 528 wl1271_warning("illegal value in rx_streaming_interval!");
558 return -EINVAL; 529 return -EINVAL;
@@ -601,17 +572,10 @@ static ssize_t rx_streaming_always_write(struct file *file,
601 size_t count, loff_t *ppos) 572 size_t count, loff_t *ppos)
602{ 573{
603 struct wl1271 *wl = file->private_data; 574 struct wl1271 *wl = file->private_data;
604 char buf[10];
605 size_t len;
606 unsigned long value; 575 unsigned long value;
607 int ret; 576 int ret;
608 577
609 len = min(count, sizeof(buf) - 1); 578 ret = kstrtoul_from_user(user_buf, count, 10, &value);
610 if (copy_from_user(buf, user_buf, len))
611 return -EFAULT;
612 buf[len] = '\0';
613
614 ret = kstrtoul(buf, 0, &value);
615 if (ret < 0) { 579 if (ret < 0) {
616 wl1271_warning("illegal value in rx_streaming_write!"); 580 wl1271_warning("illegal value in rx_streaming_write!");
617 return -EINVAL; 581 return -EINVAL;
@@ -655,6 +619,47 @@ static const struct file_operations rx_streaming_always_ops = {
655 .llseek = default_llseek, 619 .llseek = default_llseek,
656}; 620};
657 621
622static ssize_t beacon_filtering_write(struct file *file,
623 const char __user *user_buf,
624 size_t count, loff_t *ppos)
625{
626 struct wl1271 *wl = file->private_data;
627 char buf[10];
628 size_t len;
629 unsigned long value;
630 int ret;
631
632 len = min(count, sizeof(buf) - 1);
633 if (copy_from_user(buf, user_buf, len))
634 return -EFAULT;
635 buf[len] = '\0';
636
637 ret = kstrtoul(buf, 0, &value);
638 if (ret < 0) {
639 wl1271_warning("illegal value for beacon_filtering!");
640 return -EINVAL;
641 }
642
643 mutex_lock(&wl->mutex);
644
645 ret = wl1271_ps_elp_wakeup(wl);
646 if (ret < 0)
647 goto out;
648
649 ret = wl1271_acx_beacon_filter_opt(wl, !!value);
650
651 wl1271_ps_elp_sleep(wl);
652out:
653 mutex_unlock(&wl->mutex);
654 return count;
655}
656
657static const struct file_operations beacon_filtering_ops = {
658 .write = beacon_filtering_write,
659 .open = wl1271_open_file_generic,
660 .llseek = default_llseek,
661};
662
658static int wl1271_debugfs_add_files(struct wl1271 *wl, 663static int wl1271_debugfs_add_files(struct wl1271 *wl,
659 struct dentry *rootdir) 664 struct dentry *rootdir)
660{ 665{
@@ -767,6 +772,7 @@ static int wl1271_debugfs_add_files(struct wl1271 *wl,
767 DEBUGFS_ADD(driver_state, rootdir); 772 DEBUGFS_ADD(driver_state, rootdir);
768 DEBUGFS_ADD(dtim_interval, rootdir); 773 DEBUGFS_ADD(dtim_interval, rootdir);
769 DEBUGFS_ADD(beacon_interval, rootdir); 774 DEBUGFS_ADD(beacon_interval, rootdir);
775 DEBUGFS_ADD(beacon_filtering, rootdir);
770 776
771 streaming = debugfs_create_dir("rx_streaming", rootdir); 777 streaming = debugfs_create_dir("rx_streaming", rootdir);
772 if (!streaming || IS_ERR(streaming)) 778 if (!streaming || IS_ERR(streaming))
diff --git a/drivers/net/wireless/wl12xx/event.c b/drivers/net/wireless/wl12xx/event.c
index 0bd7b020a420..c73fe4c6b616 100644
--- a/drivers/net/wireless/wl12xx/event.c
+++ b/drivers/net/wireless/wl12xx/event.c
@@ -171,19 +171,26 @@ static void wl1271_event_rssi_trigger(struct wl1271 *wl,
171 wl->last_rssi_event = event; 171 wl->last_rssi_event = event;
172} 172}
173 173
174static void wl1271_stop_ba_event(struct wl1271 *wl, u8 ba_allowed) 174static void wl1271_stop_ba_event(struct wl1271 *wl)
175{ 175{
176 /* Convert the value to bool */ 176 if (wl->bss_type != BSS_TYPE_AP_BSS) {
177 wl->ba_allowed = !!ba_allowed; 177 if (!wl->ba_rx_bitmap)
178 178 return;
179 /* 179 ieee80211_stop_rx_ba_session(wl->vif, wl->ba_rx_bitmap,
180 * Return in case: 180 wl->bssid);
181 * there are not BA open or the event indication is to allowed BA 181 } else {
182 */ 182 int i;
183 if ((!wl->ba_rx_bitmap) || (wl->ba_allowed)) 183 struct wl1271_link *lnk;
184 return; 184 for (i = WL1271_AP_STA_HLID_START; i < WL12XX_MAX_LINKS; i++) {
185 lnk = &wl->links[i];
186 if (!wl1271_is_active_sta(wl, i) || !lnk->ba_bitmap)
187 continue;
185 188
186 ieee80211_stop_rx_ba_session(wl->vif, wl->ba_rx_bitmap, wl->bssid); 189 ieee80211_stop_rx_ba_session(wl->vif,
190 lnk->ba_bitmap,
191 lnk->addr);
192 }
193 }
187} 194}
188 195
189static void wl12xx_event_soft_gemini_sense(struct wl1271 *wl, 196static void wl12xx_event_soft_gemini_sense(struct wl1271 *wl,
@@ -283,12 +290,14 @@ static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)
283 wl1271_event_rssi_trigger(wl, mbox); 290 wl1271_event_rssi_trigger(wl, mbox);
284 } 291 }
285 292
286 if ((vector & BA_SESSION_RX_CONSTRAINT_EVENT_ID) && !is_ap) { 293 if ((vector & BA_SESSION_RX_CONSTRAINT_EVENT_ID)) {
287 wl1271_debug(DEBUG_EVENT, "BA_SESSION_RX_CONSTRAINT_EVENT_ID. " 294 wl1271_debug(DEBUG_EVENT, "BA_SESSION_RX_CONSTRAINT_EVENT_ID. "
288 "ba_allowed = 0x%x", mbox->rx_ba_allowed); 295 "ba_allowed = 0x%x", mbox->rx_ba_allowed);
289 296
290 if (wl->vif) 297 wl->ba_allowed = !!mbox->rx_ba_allowed;
291 wl1271_stop_ba_event(wl, mbox->rx_ba_allowed); 298
299 if (wl->vif && !wl->ba_allowed)
300 wl1271_stop_ba_event(wl);
292 } 301 }
293 302
294 if ((vector & DUMMY_PACKET_EVENT_ID)) { 303 if ((vector & DUMMY_PACKET_EVENT_ID)) {
diff --git a/drivers/net/wireless/wl12xx/init.c b/drivers/net/wireless/wl12xx/init.c
index b13bebea95e0..09515f5e5e1d 100644
--- a/drivers/net/wireless/wl12xx/init.c
+++ b/drivers/net/wireless/wl12xx/init.c
@@ -707,6 +707,11 @@ int wl1271_hw_init(struct wl1271 *wl)
707 if (ret < 0) 707 if (ret < 0)
708 goto out_free_memmap; 708 goto out_free_memmap;
709 709
710 /* configure hangover */
711 ret = wl12xx_acx_config_hangover(wl);
712 if (ret < 0)
713 goto out_free_memmap;
714
710 return 0; 715 return 0;
711 716
712 out_free_memmap: 717 out_free_memmap:
diff --git a/drivers/net/wireless/wl12xx/main.c b/drivers/net/wireless/wl12xx/main.c
index 82f4408e89ad..680f5582618e 100644
--- a/drivers/net/wireless/wl12xx/main.c
+++ b/drivers/net/wireless/wl12xx/main.c
@@ -236,10 +236,9 @@ static struct conf_drv_settings default_conf = {
236 .ps_poll_recovery_period = 700, 236 .ps_poll_recovery_period = 700,
237 .bet_enable = CONF_BET_MODE_ENABLE, 237 .bet_enable = CONF_BET_MODE_ENABLE,
238 .bet_max_consecutive = 50, 238 .bet_max_consecutive = 50,
239 .psm_entry_retries = 5, 239 .psm_entry_retries = 8,
240 .psm_exit_retries = 16, 240 .psm_exit_retries = 16,
241 .psm_entry_nullfunc_retries = 3, 241 .psm_entry_nullfunc_retries = 3,
242 .psm_entry_hangover_period = 1,
243 .keep_alive_interval = 55000, 242 .keep_alive_interval = 55000,
244 .max_listen_interval = 20, 243 .max_listen_interval = 20,
245 }, 244 },
@@ -267,8 +266,8 @@ static struct conf_drv_settings default_conf = {
267 }, 266 },
268 .sched_scan = { 267 .sched_scan = {
269 /* sched_scan requires dwell times in TU instead of TU/1000 */ 268 /* sched_scan requires dwell times in TU instead of TU/1000 */
270 .min_dwell_time_active = 8, 269 .min_dwell_time_active = 30,
271 .max_dwell_time_active = 30, 270 .max_dwell_time_active = 60,
272 .dwell_time_passive = 100, 271 .dwell_time_passive = 100,
273 .dwell_time_dfs = 150, 272 .dwell_time_dfs = 150,
274 .num_probe_reqs = 2, 273 .num_probe_reqs = 2,
@@ -359,9 +358,23 @@ static struct conf_drv_settings default_conf = {
359 0x00, 0x00, 0x00, 358 0x00, 0x00, 0x00,
360 }, 359 },
361 }, 360 },
361 .hangover = {
362 .recover_time = 0,
363 .hangover_period = 20,
364 .dynamic_mode = 1,
365 .early_termination_mode = 1,
366 .max_period = 20,
367 .min_period = 1,
368 .increase_delta = 1,
369 .decrease_delta = 2,
370 .quiet_time = 4,
371 .increase_time = 1,
372 .window_size = 16,
373 },
362}; 374};
363 375
364static char *fwlog_param; 376static char *fwlog_param;
377static bool bug_on_recovery;
365 378
366static void __wl1271_op_remove_interface(struct wl1271 *wl, 379static void __wl1271_op_remove_interface(struct wl1271 *wl,
367 bool reset_tx_queues); 380 bool reset_tx_queues);
@@ -757,13 +770,14 @@ static int wl1271_plt_init(struct wl1271 *wl)
757 770
758static void wl12xx_irq_ps_regulate_link(struct wl1271 *wl, u8 hlid, u8 tx_pkts) 771static void wl12xx_irq_ps_regulate_link(struct wl1271 *wl, u8 hlid, u8 tx_pkts)
759{ 772{
760 bool fw_ps; 773 bool fw_ps, single_sta;
761 774
762 /* only regulate station links */ 775 /* only regulate station links */
763 if (hlid < WL1271_AP_STA_HLID_START) 776 if (hlid < WL1271_AP_STA_HLID_START)
764 return; 777 return;
765 778
766 fw_ps = test_bit(hlid, (unsigned long *)&wl->ap_fw_ps_map); 779 fw_ps = test_bit(hlid, (unsigned long *)&wl->ap_fw_ps_map);
780 single_sta = (wl->active_sta_count == 1);
767 781
768 /* 782 /*
769 * Wake up from high level PS if the STA is asleep with too little 783 * Wake up from high level PS if the STA is asleep with too little
@@ -772,8 +786,12 @@ static void wl12xx_irq_ps_regulate_link(struct wl1271 *wl, u8 hlid, u8 tx_pkts)
772 if (!fw_ps || tx_pkts < WL1271_PS_STA_MAX_PACKETS) 786 if (!fw_ps || tx_pkts < WL1271_PS_STA_MAX_PACKETS)
773 wl1271_ps_link_end(wl, hlid); 787 wl1271_ps_link_end(wl, hlid);
774 788
775 /* Start high-level PS if the STA is asleep with enough blocks in FW */ 789 /*
776 else if (fw_ps && tx_pkts >= WL1271_PS_STA_MAX_PACKETS) 790 * Start high-level PS if the STA is asleep with enough blocks in FW.
791 * Make an exception if this is the only connected station. In this
792 * case FW-memory congestion is not a problem.
793 */
794 else if (!single_sta && fw_ps && tx_pkts >= WL1271_PS_STA_MAX_PACKETS)
777 wl1271_ps_link_start(wl, hlid, true); 795 wl1271_ps_link_start(wl, hlid, true);
778} 796}
779 797
@@ -1213,6 +1231,8 @@ static void wl1271_recovery_work(struct work_struct *work)
1213 wl1271_info("Hardware recovery in progress. FW ver: %s pc: 0x%x", 1231 wl1271_info("Hardware recovery in progress. FW ver: %s pc: 0x%x",
1214 wl->chip.fw_ver_str, wl1271_read32(wl, SCR_PAD4)); 1232 wl->chip.fw_ver_str, wl1271_read32(wl, SCR_PAD4));
1215 1233
1234 BUG_ON(bug_on_recovery);
1235
1216 /* 1236 /*
1217 * Advance security sequence number to overcome potential progress 1237 * Advance security sequence number to overcome potential progress
1218 * in the firmware during recovery. This doens't hurt if the network is 1238 * in the firmware during recovery. This doens't hurt if the network is
@@ -1222,9 +1242,6 @@ static void wl1271_recovery_work(struct work_struct *work)
1222 test_bit(WL1271_FLAG_AP_STARTED, &wl->flags)) 1242 test_bit(WL1271_FLAG_AP_STARTED, &wl->flags))
1223 wl->tx_security_seq += WL1271_TX_SQN_POST_RECOVERY_PADDING; 1243 wl->tx_security_seq += WL1271_TX_SQN_POST_RECOVERY_PADDING;
1224 1244
1225 if (test_bit(WL1271_FLAG_STA_ASSOCIATED, &wl->flags))
1226 ieee80211_connection_loss(wl->vif);
1227
1228 /* Prevent spurious TX during FW restart */ 1245 /* Prevent spurious TX during FW restart */
1229 ieee80211_stop_queues(wl->hw); 1246 ieee80211_stop_queues(wl->hw);
1230 1247
@@ -1528,7 +1545,13 @@ out:
1528int wl1271_tx_dummy_packet(struct wl1271 *wl) 1545int wl1271_tx_dummy_packet(struct wl1271 *wl)
1529{ 1546{
1530 unsigned long flags; 1547 unsigned long flags;
1531 int q = wl1271_tx_get_queue(skb_get_queue_mapping(wl->dummy_packet)); 1548 int q;
1549
1550 /* no need to queue a new dummy packet if one is already pending */
1551 if (test_bit(WL1271_FLAG_DUMMY_PACKET_PENDING, &wl->flags))
1552 return 0;
1553
1554 q = wl1271_tx_get_queue(skb_get_queue_mapping(wl->dummy_packet));
1532 1555
1533 spin_lock_irqsave(&wl->wl_lock, flags); 1556 spin_lock_irqsave(&wl->wl_lock, flags);
1534 set_bit(WL1271_FLAG_DUMMY_PACKET_PENDING, &wl->flags); 1557 set_bit(WL1271_FLAG_DUMMY_PACKET_PENDING, &wl->flags);
@@ -1802,10 +1825,16 @@ static u8 wl12xx_get_role_type(struct wl1271 *wl)
1802{ 1825{
1803 switch (wl->bss_type) { 1826 switch (wl->bss_type) {
1804 case BSS_TYPE_AP_BSS: 1827 case BSS_TYPE_AP_BSS:
1805 return WL1271_ROLE_AP; 1828 if (wl->p2p)
1829 return WL1271_ROLE_P2P_GO;
1830 else
1831 return WL1271_ROLE_AP;
1806 1832
1807 case BSS_TYPE_STA_BSS: 1833 case BSS_TYPE_STA_BSS:
1808 return WL1271_ROLE_STA; 1834 if (wl->p2p)
1835 return WL1271_ROLE_P2P_CL;
1836 else
1837 return WL1271_ROLE_STA;
1809 1838
1810 case BSS_TYPE_IBSS: 1839 case BSS_TYPE_IBSS:
1811 return WL1271_ROLE_IBSS; 1840 return WL1271_ROLE_IBSS;
@@ -1827,7 +1856,7 @@ static int wl1271_op_add_interface(struct ieee80211_hw *hw,
1827 bool booted = false; 1856 bool booted = false;
1828 1857
1829 wl1271_debug(DEBUG_MAC80211, "mac80211 add interface type %d mac %pM", 1858 wl1271_debug(DEBUG_MAC80211, "mac80211 add interface type %d mac %pM",
1830 vif->type, vif->addr); 1859 ieee80211_vif_type_p2p(vif), vif->addr);
1831 1860
1832 mutex_lock(&wl->mutex); 1861 mutex_lock(&wl->mutex);
1833 if (wl->vif) { 1862 if (wl->vif) {
@@ -1847,7 +1876,10 @@ static int wl1271_op_add_interface(struct ieee80211_hw *hw,
1847 goto out; 1876 goto out;
1848 } 1877 }
1849 1878
1850 switch (vif->type) { 1879 switch (ieee80211_vif_type_p2p(vif)) {
1880 case NL80211_IFTYPE_P2P_CLIENT:
1881 wl->p2p = 1;
1882 /* fall-through */
1851 case NL80211_IFTYPE_STATION: 1883 case NL80211_IFTYPE_STATION:
1852 wl->bss_type = BSS_TYPE_STA_BSS; 1884 wl->bss_type = BSS_TYPE_STA_BSS;
1853 wl->set_bss_type = BSS_TYPE_STA_BSS; 1885 wl->set_bss_type = BSS_TYPE_STA_BSS;
@@ -1856,6 +1888,9 @@ static int wl1271_op_add_interface(struct ieee80211_hw *hw,
1856 wl->bss_type = BSS_TYPE_IBSS; 1888 wl->bss_type = BSS_TYPE_IBSS;
1857 wl->set_bss_type = BSS_TYPE_STA_BSS; 1889 wl->set_bss_type = BSS_TYPE_STA_BSS;
1858 break; 1890 break;
1891 case NL80211_IFTYPE_P2P_GO:
1892 wl->p2p = 1;
1893 /* fall-through */
1859 case NL80211_IFTYPE_AP: 1894 case NL80211_IFTYPE_AP:
1860 wl->bss_type = BSS_TYPE_AP_BSS; 1895 wl->bss_type = BSS_TYPE_AP_BSS;
1861 break; 1896 break;
@@ -2051,6 +2086,7 @@ deinit:
2051 wl->ssid_len = 0; 2086 wl->ssid_len = 0;
2052 wl->bss_type = MAX_BSS_TYPE; 2087 wl->bss_type = MAX_BSS_TYPE;
2053 wl->set_bss_type = MAX_BSS_TYPE; 2088 wl->set_bss_type = MAX_BSS_TYPE;
2089 wl->p2p = 0;
2054 wl->band = IEEE80211_BAND_2GHZ; 2090 wl->band = IEEE80211_BAND_2GHZ;
2055 2091
2056 wl->rx_counter = 0; 2092 wl->rx_counter = 0;
@@ -2064,6 +2100,7 @@ deinit:
2064 wl->session_counter = 0; 2100 wl->session_counter = 0;
2065 wl->rate_set = CONF_TX_RATE_MASK_BASIC; 2101 wl->rate_set = CONF_TX_RATE_MASK_BASIC;
2066 wl->vif = NULL; 2102 wl->vif = NULL;
2103 wl->tx_spare_blocks = TX_HW_BLOCK_SPARE_DEFAULT;
2067 wl1271_free_ap_keys(wl); 2104 wl1271_free_ap_keys(wl);
2068 memset(wl->ap_hlid_map, 0, sizeof(wl->ap_hlid_map)); 2105 memset(wl->ap_hlid_map, 0, sizeof(wl->ap_hlid_map));
2069 wl->ap_fw_ps_map = 0; 2106 wl->ap_fw_ps_map = 0;
@@ -2074,6 +2111,7 @@ deinit:
2074 memset(wl->roles_map, 0, sizeof(wl->roles_map)); 2111 memset(wl->roles_map, 0, sizeof(wl->roles_map));
2075 memset(wl->links_map, 0, sizeof(wl->links_map)); 2112 memset(wl->links_map, 0, sizeof(wl->links_map));
2076 memset(wl->roc_map, 0, sizeof(wl->roc_map)); 2113 memset(wl->roc_map, 0, sizeof(wl->roc_map));
2114 wl->active_sta_count = 0;
2077 2115
2078 /* The system link is always allocated */ 2116 /* The system link is always allocated */
2079 __set_bit(WL12XX_SYSTEM_HLID, wl->links_map); 2117 __set_bit(WL12XX_SYSTEM_HLID, wl->links_map);
@@ -2199,10 +2237,14 @@ out:
2199 2237
2200static void wl1271_set_band_rate(struct wl1271 *wl) 2238static void wl1271_set_band_rate(struct wl1271 *wl)
2201{ 2239{
2202 if (wl->band == IEEE80211_BAND_2GHZ) 2240 if (wl->band == IEEE80211_BAND_2GHZ) {
2203 wl->basic_rate_set = wl->conf.tx.basic_rate; 2241 wl->basic_rate_set = wl->conf.tx.basic_rate;
2204 else 2242 wl->rate_set = wl->conf.tx.basic_rate;
2243 } else {
2205 wl->basic_rate_set = wl->conf.tx.basic_rate_5; 2244 wl->basic_rate_set = wl->conf.tx.basic_rate_5;
2245 wl->rate_set = wl->conf.tx.basic_rate_5;
2246 }
2247
2206} 2248}
2207 2249
2208static bool wl12xx_is_roc(struct wl1271 *wl) 2250static bool wl12xx_is_roc(struct wl1271 *wl)
@@ -2653,6 +2695,17 @@ static int wl1271_set_key(struct wl1271 *wl, u16 action, u8 id, u8 key_type,
2653 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 2695 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
2654 }; 2696 };
2655 2697
2698 /*
2699 * A STA set to GEM cipher requires 2 tx spare blocks.
2700 * Return to default value when GEM cipher key is removed
2701 */
2702 if (key_type == KEY_GEM) {
2703 if (action == KEY_ADD_OR_REPLACE)
2704 wl->tx_spare_blocks = 2;
2705 else if (action == KEY_REMOVE)
2706 wl->tx_spare_blocks = TX_HW_BLOCK_SPARE_DEFAULT;
2707 }
2708
2656 addr = sta ? sta->addr : bcast_addr; 2709 addr = sta ? sta->addr : bcast_addr;
2657 2710
2658 if (is_zero_ether_addr(addr)) { 2711 if (is_zero_ether_addr(addr)) {
@@ -3345,19 +3398,6 @@ sta_not_found:
3345 ret = wl1271_acx_conn_monit_params(wl, true); 3398 ret = wl1271_acx_conn_monit_params(wl, true);
3346 if (ret < 0) 3399 if (ret < 0)
3347 goto out; 3400 goto out;
3348
3349 /* If we want to go in PSM but we're not there yet */
3350 if (test_bit(WL1271_FLAG_PSM_REQUESTED, &wl->flags) &&
3351 !test_bit(WL1271_FLAG_PSM, &wl->flags)) {
3352 enum wl1271_cmd_ps_mode mode;
3353
3354 mode = STATION_POWER_SAVE_MODE;
3355 ret = wl1271_ps_set_mode(wl, mode,
3356 wl->basic_rate,
3357 true);
3358 if (ret < 0)
3359 goto out;
3360 }
3361 } else { 3401 } else {
3362 /* use defaults when not associated */ 3402 /* use defaults when not associated */
3363 bool was_assoc = 3403 bool was_assoc =
@@ -3501,6 +3541,19 @@ sta_not_found:
3501 if (ret < 0) 3541 if (ret < 0)
3502 goto out; 3542 goto out;
3503 } 3543 }
3544
3545 /* If we want to go in PSM but we're not there yet */
3546 if (test_bit(WL1271_FLAG_PSM_REQUESTED, &wl->flags) &&
3547 !test_bit(WL1271_FLAG_PSM, &wl->flags)) {
3548 enum wl1271_cmd_ps_mode mode;
3549
3550 mode = STATION_POWER_SAVE_MODE;
3551 ret = wl1271_ps_set_mode(wl, mode,
3552 wl->basic_rate,
3553 true);
3554 if (ret < 0)
3555 goto out;
3556 }
3504 } 3557 }
3505 3558
3506 /* Handle new association with HT. Do this after join. */ 3559 /* Handle new association with HT. Do this after join. */
@@ -3713,14 +3766,18 @@ static int wl1271_allocate_sta(struct wl1271 *wl,
3713 wl_sta->hlid = WL1271_AP_STA_HLID_START + id; 3766 wl_sta->hlid = WL1271_AP_STA_HLID_START + id;
3714 *hlid = wl_sta->hlid; 3767 *hlid = wl_sta->hlid;
3715 memcpy(wl->links[wl_sta->hlid].addr, sta->addr, ETH_ALEN); 3768 memcpy(wl->links[wl_sta->hlid].addr, sta->addr, ETH_ALEN);
3769 wl->active_sta_count++;
3716 return 0; 3770 return 0;
3717} 3771}
3718 3772
3719static void wl1271_free_sta(struct wl1271 *wl, u8 hlid) 3773void wl1271_free_sta(struct wl1271 *wl, u8 hlid)
3720{ 3774{
3721 int id = hlid - WL1271_AP_STA_HLID_START; 3775 int id = hlid - WL1271_AP_STA_HLID_START;
3722 3776
3723 if (WARN_ON(!test_bit(id, wl->ap_hlid_map))) 3777 if (hlid < WL1271_AP_STA_HLID_START)
3778 return;
3779
3780 if (!test_bit(id, wl->ap_hlid_map))
3724 return; 3781 return;
3725 3782
3726 clear_bit(id, wl->ap_hlid_map); 3783 clear_bit(id, wl->ap_hlid_map);
@@ -3729,6 +3786,7 @@ static void wl1271_free_sta(struct wl1271 *wl, u8 hlid)
3729 wl1271_tx_reset_link_queues(wl, hlid); 3786 wl1271_tx_reset_link_queues(wl, hlid);
3730 __clear_bit(hlid, &wl->ap_ps_map); 3787 __clear_bit(hlid, &wl->ap_ps_map);
3731 __clear_bit(hlid, (unsigned long *)&wl->ap_fw_ps_map); 3788 __clear_bit(hlid, (unsigned long *)&wl->ap_fw_ps_map);
3789 wl->active_sta_count--;
3732} 3790}
3733 3791
3734static int wl1271_op_sta_add(struct ieee80211_hw *hw, 3792static int wl1271_op_sta_add(struct ieee80211_hw *hw,
@@ -4050,7 +4108,6 @@ static const u8 wl1271_rate_to_idx_2ghz[] = {
4050/* 11n STA capabilities */ 4108/* 11n STA capabilities */
4051#define HW_RX_HIGHEST_RATE 72 4109#define HW_RX_HIGHEST_RATE 72
4052 4110
4053#ifdef CONFIG_WL12XX_HT
4054#define WL12XX_HT_CAP { \ 4111#define WL12XX_HT_CAP { \
4055 .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | \ 4112 .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | \
4056 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT), \ 4113 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT), \
@@ -4063,11 +4120,6 @@ static const u8 wl1271_rate_to_idx_2ghz[] = {
4063 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \ 4120 .tx_params = IEEE80211_HT_MCS_TX_DEFINED, \
4064 }, \ 4121 }, \
4065} 4122}
4066#else
4067#define WL12XX_HT_CAP { \
4068 .ht_supported = false, \
4069}
4070#endif
4071 4123
4072/* can't be const, mac80211 writes to this */ 4124/* can't be const, mac80211 writes to this */
4073static struct ieee80211_supported_band wl1271_band_2ghz = { 4125static struct ieee80211_supported_band wl1271_band_2ghz = {
@@ -4467,14 +4519,19 @@ int wl1271_init_ieee80211(struct wl1271 *wl)
4467 IEEE80211_HW_SUPPORTS_CQM_RSSI | 4519 IEEE80211_HW_SUPPORTS_CQM_RSSI |
4468 IEEE80211_HW_REPORTS_TX_ACK_STATUS | 4520 IEEE80211_HW_REPORTS_TX_ACK_STATUS |
4469 IEEE80211_HW_SPECTRUM_MGMT | 4521 IEEE80211_HW_SPECTRUM_MGMT |
4470 IEEE80211_HW_AP_LINK_PS; 4522 IEEE80211_HW_AP_LINK_PS |
4523 IEEE80211_HW_AMPDU_AGGREGATION |
4524 IEEE80211_HW_TX_AMPDU_SETUP_IN_HW;
4471 4525
4472 wl->hw->wiphy->cipher_suites = cipher_suites; 4526 wl->hw->wiphy->cipher_suites = cipher_suites;
4473 wl->hw->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites); 4527 wl->hw->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites);
4474 4528
4475 wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 4529 wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
4476 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP); 4530 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP) |
4531 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
4477 wl->hw->wiphy->max_scan_ssids = 1; 4532 wl->hw->wiphy->max_scan_ssids = 1;
4533 wl->hw->wiphy->max_sched_scan_ssids = 16;
4534 wl->hw->wiphy->max_match_sets = 16;
4478 /* 4535 /*
4479 * Maximum length of elements in scanning probe request templates 4536 * Maximum length of elements in scanning probe request templates
4480 * should be the maximum length possible for a template, without 4537 * should be the maximum length possible for a template, without
@@ -4483,6 +4540,8 @@ int wl1271_init_ieee80211(struct wl1271 *wl)
4483 wl->hw->wiphy->max_scan_ie_len = WL1271_CMD_TEMPL_DFLT_SIZE - 4540 wl->hw->wiphy->max_scan_ie_len = WL1271_CMD_TEMPL_DFLT_SIZE -
4484 sizeof(struct ieee80211_header); 4541 sizeof(struct ieee80211_header);
4485 4542
4543 wl->hw->wiphy->flags |= WIPHY_FLAG_AP_UAPSD;
4544
4486 /* make sure all our channels fit in the scanned_ch bitmask */ 4545 /* make sure all our channels fit in the scanned_ch bitmask */
4487 BUILD_BUG_ON(ARRAY_SIZE(wl1271_channels) + 4546 BUILD_BUG_ON(ARRAY_SIZE(wl1271_channels) +
4488 ARRAY_SIZE(wl1271_channels_5ghz) > 4547 ARRAY_SIZE(wl1271_channels_5ghz) >
@@ -4599,6 +4658,7 @@ struct ieee80211_hw *wl1271_alloc_hw(void)
4599 wl->sched_scanning = false; 4658 wl->sched_scanning = false;
4600 wl->tx_security_seq = 0; 4659 wl->tx_security_seq = 0;
4601 wl->tx_security_last_seq_lsb = 0; 4660 wl->tx_security_last_seq_lsb = 0;
4661 wl->tx_spare_blocks = TX_HW_BLOCK_SPARE_DEFAULT;
4602 wl->role_id = WL12XX_INVALID_ROLE_ID; 4662 wl->role_id = WL12XX_INVALID_ROLE_ID;
4603 wl->system_hlid = WL12XX_SYSTEM_HLID; 4663 wl->system_hlid = WL12XX_SYSTEM_HLID;
4604 wl->sta_hlid = WL12XX_INVALID_LINK_ID; 4664 wl->sta_hlid = WL12XX_INVALID_LINK_ID;
@@ -4607,6 +4667,7 @@ struct ieee80211_hw *wl1271_alloc_hw(void)
4607 wl->session_counter = 0; 4667 wl->session_counter = 0;
4608 wl->ap_bcast_hlid = WL12XX_INVALID_LINK_ID; 4668 wl->ap_bcast_hlid = WL12XX_INVALID_LINK_ID;
4609 wl->ap_global_hlid = WL12XX_INVALID_LINK_ID; 4669 wl->ap_global_hlid = WL12XX_INVALID_LINK_ID;
4670 wl->active_sta_count = 0;
4610 setup_timer(&wl->rx_streaming_timer, wl1271_rx_streaming_timer, 4671 setup_timer(&wl->rx_streaming_timer, wl1271_rx_streaming_timer,
4611 (unsigned long) wl); 4672 (unsigned long) wl);
4612 wl->fwlog_size = 0; 4673 wl->fwlog_size = 0;
@@ -4758,6 +4819,9 @@ module_param_named(fwlog, fwlog_param, charp, 0);
4758MODULE_PARM_DESC(keymap, 4819MODULE_PARM_DESC(keymap,
4759 "FW logger options: continuous, ondemand, dbgpins or disable"); 4820 "FW logger options: continuous, ondemand, dbgpins or disable");
4760 4821
4822module_param(bug_on_recovery, bool, S_IRUSR | S_IWUSR);
4823MODULE_PARM_DESC(bug_on_recovery, "BUG() on fw recovery");
4824
4761MODULE_LICENSE("GPL"); 4825MODULE_LICENSE("GPL");
4762MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>"); 4826MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
4763MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>"); 4827MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
diff --git a/drivers/net/wireless/wl12xx/ps.c b/drivers/net/wireless/wl12xx/ps.c
index 4b720b1b9f65..c15ebf2efd40 100644
--- a/drivers/net/wireless/wl12xx/ps.c
+++ b/drivers/net/wireless/wl12xx/ps.c
@@ -199,15 +199,19 @@ static void wl1271_ps_filter_frames(struct wl1271 *wl, u8 hlid)
199 unsigned long flags; 199 unsigned long flags;
200 int filtered[NUM_TX_QUEUES]; 200 int filtered[NUM_TX_QUEUES];
201 201
202 /* filter all frames currently the low level queus for this hlid */ 202 /* filter all frames currently in the low level queues for this hlid */
203 for (i = 0; i < NUM_TX_QUEUES; i++) { 203 for (i = 0; i < NUM_TX_QUEUES; i++) {
204 filtered[i] = 0; 204 filtered[i] = 0;
205 while ((skb = skb_dequeue(&wl->links[hlid].tx_queue[i]))) { 205 while ((skb = skb_dequeue(&wl->links[hlid].tx_queue[i]))) {
206 filtered[i]++;
207
208 if (WARN_ON(wl12xx_is_dummy_packet(wl, skb)))
209 continue;
210
206 info = IEEE80211_SKB_CB(skb); 211 info = IEEE80211_SKB_CB(skb);
207 info->flags |= IEEE80211_TX_STAT_TX_FILTERED; 212 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
208 info->status.rates[0].idx = -1; 213 info->status.rates[0].idx = -1;
209 ieee80211_tx_status_ni(wl->hw, skb); 214 ieee80211_tx_status_ni(wl->hw, skb);
210 filtered[i]++;
211 } 215 }
212 } 216 }
213 217
diff --git a/drivers/net/wireless/wl12xx/rx.c b/drivers/net/wireless/wl12xx/rx.c
index 78d8410da1f4..dee4cfe9ccc1 100644
--- a/drivers/net/wireless/wl12xx/rx.c
+++ b/drivers/net/wireless/wl12xx/rx.c
@@ -66,11 +66,9 @@ static void wl1271_rx_status(struct wl1271 *wl,
66 66
67 status->rate_idx = wl1271_rate_to_idx(desc->rate, status->band); 67 status->rate_idx = wl1271_rate_to_idx(desc->rate, status->band);
68 68
69#ifdef CONFIG_WL12XX_HT
70 /* 11n support */ 69 /* 11n support */
71 if (desc->rate <= CONF_HW_RXTX_RATE_MCS0) 70 if (desc->rate <= CONF_HW_RXTX_RATE_MCS0)
72 status->flag |= RX_FLAG_HT; 71 status->flag |= RX_FLAG_HT;
73#endif
74 72
75 status->signal = desc->rssi; 73 status->signal = desc->rssi;
76 74
@@ -107,6 +105,7 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
107 u8 beacon = 0; 105 u8 beacon = 0;
108 u8 is_data = 0; 106 u8 is_data = 0;
109 u8 reserved = unaligned ? NET_IP_ALIGN : 0; 107 u8 reserved = unaligned ? NET_IP_ALIGN : 0;
108 u16 seq_num;
110 109
111 /* 110 /*
112 * In PLT mode we seem to get frames and mac80211 warns about them, 111 * In PLT mode we seem to get frames and mac80211 warns about them,
@@ -169,9 +168,11 @@ static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
169 168
170 wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon); 169 wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
171 170
172 wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s", skb, 171 seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
172 wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d", skb,
173 skb->len - desc->pad_len, 173 skb->len - desc->pad_len,
174 beacon ? "beacon" : ""); 174 beacon ? "beacon" : "",
175 seq_num);
175 176
176 skb_trim(skb, skb->len - desc->pad_len); 177 skb_trim(skb, skb->len - desc->pad_len);
177 178
diff --git a/drivers/net/wireless/wl12xx/scan.c b/drivers/net/wireless/wl12xx/scan.c
index 7229eaa89018..eeccc9f095bb 100644
--- a/drivers/net/wireless/wl12xx/scan.c
+++ b/drivers/net/wireless/wl12xx/scan.c
@@ -65,8 +65,9 @@ void wl1271_scan_complete_work(struct work_struct *work)
65 /* return to ROC if needed */ 65 /* return to ROC if needed */
66 is_sta = (wl->bss_type == BSS_TYPE_STA_BSS); 66 is_sta = (wl->bss_type == BSS_TYPE_STA_BSS);
67 is_ibss = (wl->bss_type == BSS_TYPE_IBSS); 67 is_ibss = (wl->bss_type == BSS_TYPE_IBSS);
68 if ((is_sta && !test_bit(WL1271_FLAG_STA_ASSOCIATED, &wl->flags)) || 68 if (((is_sta && !test_bit(WL1271_FLAG_STA_ASSOCIATED, &wl->flags)) ||
69 (is_ibss && !test_bit(WL1271_FLAG_IBSS_JOINED, &wl->flags))) { 69 (is_ibss && !test_bit(WL1271_FLAG_IBSS_JOINED, &wl->flags))) &&
70 !test_bit(wl->dev_role_id, wl->roc_map)) {
70 /* restore remain on channel */ 71 /* restore remain on channel */
71 wl12xx_cmd_role_start_dev(wl); 72 wl12xx_cmd_role_start_dev(wl);
72 wl12xx_roc(wl, wl->dev_role_id); 73 wl12xx_roc(wl, wl->dev_role_id);
@@ -164,9 +165,6 @@ static int wl1271_scan_send(struct wl1271 *wl, enum ieee80211_band band,
164 goto out; 165 goto out;
165 } 166 }
166 167
167 /* We always use high priority scans */
168 scan_options = WL1271_SCAN_OPT_PRIORITY_HIGH;
169
170 /* No SSIDs means that we have a forced passive scan */ 168 /* No SSIDs means that we have a forced passive scan */
171 if (passive || wl->scan.req->n_ssids == 0) 169 if (passive || wl->scan.req->n_ssids == 0)
172 scan_options |= WL1271_SCAN_OPT_PASSIVE; 170 scan_options |= WL1271_SCAN_OPT_PASSIVE;
@@ -473,6 +471,105 @@ wl1271_scan_sched_scan_channels(struct wl1271 *wl,
473 cfg->passive[2] || cfg->active[2]; 471 cfg->passive[2] || cfg->active[2];
474} 472}
475 473
474/* Returns the scan type to be used or a negative value on error */
475static int
476wl12xx_scan_sched_scan_ssid_list(struct wl1271 *wl,
477 struct cfg80211_sched_scan_request *req)
478{
479 struct wl1271_cmd_sched_scan_ssid_list *cmd = NULL;
480 struct cfg80211_match_set *sets = req->match_sets;
481 struct cfg80211_ssid *ssids = req->ssids;
482 int ret = 0, type, i, j, n_match_ssids = 0;
483
484 wl1271_debug(DEBUG_CMD, "cmd sched scan ssid list");
485
486 /* count the match sets that contain SSIDs */
487 for (i = 0; i < req->n_match_sets; i++)
488 if (sets[i].ssid.ssid_len > 0)
489 n_match_ssids++;
490
491 /* No filter, no ssids or only bcast ssid */
492 if (!n_match_ssids &&
493 (!req->n_ssids ||
494 (req->n_ssids == 1 && req->ssids[0].ssid_len == 0))) {
495 type = SCAN_SSID_FILTER_ANY;
496 goto out;
497 }
498
499 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
500 if (!cmd) {
501 ret = -ENOMEM;
502 goto out;
503 }
504
505 if (!n_match_ssids) {
506 /* No filter, with ssids */
507 type = SCAN_SSID_FILTER_DISABLED;
508
509 for (i = 0; i < req->n_ssids; i++) {
510 cmd->ssids[cmd->n_ssids].type = (ssids[i].ssid_len) ?
511 SCAN_SSID_TYPE_HIDDEN : SCAN_SSID_TYPE_PUBLIC;
512 cmd->ssids[cmd->n_ssids].len = ssids[i].ssid_len;
513 memcpy(cmd->ssids[cmd->n_ssids].ssid, ssids[i].ssid,
514 ssids[i].ssid_len);
515 cmd->n_ssids++;
516 }
517 } else {
518 type = SCAN_SSID_FILTER_LIST;
519
520 /* Add all SSIDs from the filters */
521 for (i = 0; i < req->n_match_sets; i++) {
522 /* ignore sets without SSIDs */
523 if (!sets[i].ssid.ssid_len)
524 continue;
525
526 cmd->ssids[cmd->n_ssids].type = SCAN_SSID_TYPE_PUBLIC;
527 cmd->ssids[cmd->n_ssids].len = sets[i].ssid.ssid_len;
528 memcpy(cmd->ssids[cmd->n_ssids].ssid,
529 sets[i].ssid.ssid, sets[i].ssid.ssid_len);
530 cmd->n_ssids++;
531 }
532 if ((req->n_ssids > 1) ||
533 (req->n_ssids == 1 && req->ssids[0].ssid_len > 0)) {
534 /*
535 * Mark all the SSIDs passed in the SSID list as HIDDEN,
536 * so they're used in probe requests.
537 */
538 for (i = 0; i < req->n_ssids; i++) {
539 for (j = 0; j < cmd->n_ssids; j++)
540 if (!memcmp(req->ssids[i].ssid,
541 cmd->ssids[j].ssid,
542 req->ssids[i].ssid_len)) {
543 cmd->ssids[j].type =
544 SCAN_SSID_TYPE_HIDDEN;
545 break;
546 }
547 /* Fail if SSID isn't present in the filters */
548 if (j == req->n_ssids) {
549 ret = -EINVAL;
550 goto out_free;
551 }
552 }
553 }
554 }
555
556 wl1271_dump(DEBUG_SCAN, "SSID_LIST: ", cmd, sizeof(*cmd));
557
558 ret = wl1271_cmd_send(wl, CMD_CONNECTION_SCAN_SSID_CFG, cmd,
559 sizeof(*cmd), 0);
560 if (ret < 0) {
561 wl1271_error("cmd sched scan ssid list failed");
562 goto out_free;
563 }
564
565out_free:
566 kfree(cmd);
567out:
568 if (ret < 0)
569 return ret;
570 return type;
571}
572
476int wl1271_scan_sched_scan_config(struct wl1271 *wl, 573int wl1271_scan_sched_scan_config(struct wl1271 *wl,
477 struct cfg80211_sched_scan_request *req, 574 struct cfg80211_sched_scan_request *req,
478 struct ieee80211_sched_scan_ies *ies) 575 struct ieee80211_sched_scan_ies *ies)
@@ -504,15 +601,14 @@ int wl1271_scan_sched_scan_config(struct wl1271 *wl,
504 for (i = 0; i < SCAN_MAX_CYCLE_INTERVALS; i++) 601 for (i = 0; i < SCAN_MAX_CYCLE_INTERVALS; i++)
505 cfg->intervals[i] = cpu_to_le32(req->interval); 602 cfg->intervals[i] = cpu_to_le32(req->interval);
506 603
507 if (!force_passive && req->ssids[0].ssid_len && req->ssids[0].ssid) { 604 cfg->ssid_len = 0;
508 cfg->filter_type = SCAN_SSID_FILTER_SPECIFIC; 605 ret = wl12xx_scan_sched_scan_ssid_list(wl, req);
509 cfg->ssid_len = req->ssids[0].ssid_len; 606 if (ret < 0)
510 memcpy(cfg->ssid, req->ssids[0].ssid, 607 goto out;
511 req->ssids[0].ssid_len); 608
512 } else { 609 cfg->filter_type = ret;
513 cfg->filter_type = SCAN_SSID_FILTER_ANY; 610
514 cfg->ssid_len = 0; 611 wl1271_debug(DEBUG_SCAN, "filter_type = %d", cfg->filter_type);
515 }
516 612
517 if (!wl1271_scan_sched_scan_channels(wl, req, cfg)) { 613 if (!wl1271_scan_sched_scan_channels(wl, req, cfg)) {
518 wl1271_error("scan channel list is empty"); 614 wl1271_error("scan channel list is empty");
diff --git a/drivers/net/wireless/wl12xx/sdio.c b/drivers/net/wireless/wl12xx/sdio.c
index ac2e5661397c..516a8980723c 100644
--- a/drivers/net/wireless/wl12xx/sdio.c
+++ b/drivers/net/wireless/wl12xx/sdio.c
@@ -164,7 +164,7 @@ static int wl1271_sdio_power_on(struct wl1271 *wl)
164 /* If enabled, tell runtime PM not to power off the card */ 164 /* If enabled, tell runtime PM not to power off the card */
165 if (pm_runtime_enabled(&func->dev)) { 165 if (pm_runtime_enabled(&func->dev)) {
166 ret = pm_runtime_get_sync(&func->dev); 166 ret = pm_runtime_get_sync(&func->dev);
167 if (ret) 167 if (ret < 0)
168 goto out; 168 goto out;
169 } else { 169 } else {
170 /* Runtime PM is disabled: power up the card manually */ 170 /* Runtime PM is disabled: power up the card manually */
diff --git a/drivers/net/wireless/wl12xx/testmode.c b/drivers/net/wireless/wl12xx/testmode.c
index 5d5e1ef87206..4ae8effaee22 100644
--- a/drivers/net/wireless/wl12xx/testmode.c
+++ b/drivers/net/wireless/wl12xx/testmode.c
@@ -36,7 +36,6 @@ enum wl1271_tm_commands {
36 WL1271_TM_CMD_TEST, 36 WL1271_TM_CMD_TEST,
37 WL1271_TM_CMD_INTERROGATE, 37 WL1271_TM_CMD_INTERROGATE,
38 WL1271_TM_CMD_CONFIGURE, 38 WL1271_TM_CMD_CONFIGURE,
39 WL1271_TM_CMD_NVS_PUSH,
40 WL1271_TM_CMD_SET_PLT_MODE, 39 WL1271_TM_CMD_SET_PLT_MODE,
41 WL1271_TM_CMD_RECOVER, 40 WL1271_TM_CMD_RECOVER,
42 41
@@ -139,12 +138,15 @@ static int wl1271_tm_cmd_interrogate(struct wl1271 *wl, struct nlattr *tb[])
139 138
140 if (ret < 0) { 139 if (ret < 0) {
141 wl1271_warning("testmode cmd interrogate failed: %d", ret); 140 wl1271_warning("testmode cmd interrogate failed: %d", ret);
141 kfree(cmd);
142 return ret; 142 return ret;
143 } 143 }
144 144
145 skb = cfg80211_testmode_alloc_reply_skb(wl->hw->wiphy, sizeof(*cmd)); 145 skb = cfg80211_testmode_alloc_reply_skb(wl->hw->wiphy, sizeof(*cmd));
146 if (!skb) 146 if (!skb) {
147 kfree(cmd);
147 return -ENOMEM; 148 return -ENOMEM;
149 }
148 150
149 NLA_PUT(skb, WL1271_TM_ATTR_DATA, sizeof(*cmd), cmd); 151 NLA_PUT(skb, WL1271_TM_ATTR_DATA, sizeof(*cmd), cmd);
150 152
@@ -187,48 +189,6 @@ static int wl1271_tm_cmd_configure(struct wl1271 *wl, struct nlattr *tb[])
187 return 0; 189 return 0;
188} 190}
189 191
190static int wl1271_tm_cmd_nvs_push(struct wl1271 *wl, struct nlattr *tb[])
191{
192 int ret = 0;
193 size_t len;
194 void *buf;
195
196 wl1271_debug(DEBUG_TESTMODE, "testmode cmd nvs push");
197
198 if (!tb[WL1271_TM_ATTR_DATA])
199 return -EINVAL;
200
201 buf = nla_data(tb[WL1271_TM_ATTR_DATA]);
202 len = nla_len(tb[WL1271_TM_ATTR_DATA]);
203
204 mutex_lock(&wl->mutex);
205
206 kfree(wl->nvs);
207
208 if ((wl->chip.id == CHIP_ID_1283_PG20) &&
209 (len != sizeof(struct wl128x_nvs_file)))
210 return -EINVAL;
211 else if (len != sizeof(struct wl1271_nvs_file))
212 return -EINVAL;
213
214 wl->nvs = kzalloc(len, GFP_KERNEL);
215 if (!wl->nvs) {
216 wl1271_error("could not allocate memory for the nvs file");
217 ret = -ENOMEM;
218 goto out;
219 }
220
221 memcpy(wl->nvs, buf, len);
222 wl->nvs_len = len;
223
224 wl1271_debug(DEBUG_TESTMODE, "testmode pushed nvs");
225
226out:
227 mutex_unlock(&wl->mutex);
228
229 return ret;
230}
231
232static int wl1271_tm_cmd_set_plt_mode(struct wl1271 *wl, struct nlattr *tb[]) 192static int wl1271_tm_cmd_set_plt_mode(struct wl1271 *wl, struct nlattr *tb[])
233{ 193{
234 u32 val; 194 u32 val;
@@ -285,8 +245,6 @@ int wl1271_tm_cmd(struct ieee80211_hw *hw, void *data, int len)
285 return wl1271_tm_cmd_interrogate(wl, tb); 245 return wl1271_tm_cmd_interrogate(wl, tb);
286 case WL1271_TM_CMD_CONFIGURE: 246 case WL1271_TM_CMD_CONFIGURE:
287 return wl1271_tm_cmd_configure(wl, tb); 247 return wl1271_tm_cmd_configure(wl, tb);
288 case WL1271_TM_CMD_NVS_PUSH:
289 return wl1271_tm_cmd_nvs_push(wl, tb);
290 case WL1271_TM_CMD_SET_PLT_MODE: 248 case WL1271_TM_CMD_SET_PLT_MODE:
291 return wl1271_tm_cmd_set_plt_mode(wl, tb); 249 return wl1271_tm_cmd_set_plt_mode(wl, tb);
292 case WL1271_TM_CMD_RECOVER: 250 case WL1271_TM_CMD_RECOVER:
diff --git a/drivers/net/wireless/wl12xx/tx.c b/drivers/net/wireless/wl12xx/tx.c
index 0f1578577b1a..9d4157ce0950 100644
--- a/drivers/net/wireless/wl12xx/tx.c
+++ b/drivers/net/wireless/wl12xx/tx.c
@@ -30,6 +30,7 @@
30#include "reg.h" 30#include "reg.h"
31#include "ps.h" 31#include "ps.h"
32#include "tx.h" 32#include "tx.h"
33#include "event.h"
33 34
34static int wl1271_set_default_wep_key(struct wl1271 *wl, u8 id) 35static int wl1271_set_default_wep_key(struct wl1271 *wl, u8 id)
35{ 36{
@@ -125,25 +126,31 @@ static void wl1271_tx_ap_update_inconnection_sta(struct wl1271 *wl,
125 126
126static void wl1271_tx_regulate_link(struct wl1271 *wl, u8 hlid) 127static void wl1271_tx_regulate_link(struct wl1271 *wl, u8 hlid)
127{ 128{
128 bool fw_ps; 129 bool fw_ps, single_sta;
129 u8 tx_pkts; 130 u8 tx_pkts;
130 131
131 /* only regulate station links */ 132 /* only regulate station links */
132 if (hlid < WL1271_AP_STA_HLID_START) 133 if (hlid < WL1271_AP_STA_HLID_START)
133 return; 134 return;
134 135
136 if (WARN_ON(!wl1271_is_active_sta(wl, hlid)))
137 return;
138
135 fw_ps = test_bit(hlid, (unsigned long *)&wl->ap_fw_ps_map); 139 fw_ps = test_bit(hlid, (unsigned long *)&wl->ap_fw_ps_map);
136 tx_pkts = wl->links[hlid].allocated_pkts; 140 tx_pkts = wl->links[hlid].allocated_pkts;
141 single_sta = (wl->active_sta_count == 1);
137 142
138 /* 143 /*
139 * if in FW PS and there is enough data in FW we can put the link 144 * if in FW PS and there is enough data in FW we can put the link
140 * into high-level PS and clean out its TX queues. 145 * into high-level PS and clean out its TX queues.
146 * Make an exception if this is the only connected station. In this
147 * case FW-memory congestion is not a problem.
141 */ 148 */
142 if (fw_ps && tx_pkts >= WL1271_PS_STA_MAX_PACKETS) 149 if (!single_sta && fw_ps && tx_pkts >= WL1271_PS_STA_MAX_PACKETS)
143 wl1271_ps_link_start(wl, hlid, true); 150 wl1271_ps_link_start(wl, hlid, true);
144} 151}
145 152
146static bool wl12xx_is_dummy_packet(struct wl1271 *wl, struct sk_buff *skb) 153bool wl12xx_is_dummy_packet(struct wl1271 *wl, struct sk_buff *skb)
147{ 154{
148 return wl->dummy_packet == skb; 155 return wl->dummy_packet == skb;
149} 156}
@@ -204,9 +211,7 @@ static int wl1271_tx_allocate(struct wl1271 *wl, struct sk_buff *skb, u32 extra,
204 u32 len; 211 u32 len;
205 u32 total_blocks; 212 u32 total_blocks;
206 int id, ret = -EBUSY, ac; 213 int id, ret = -EBUSY, ac;
207 214 u32 spare_blocks = wl->tx_spare_blocks;
208 /* we use 1 spare block */
209 u32 spare_blocks = 1;
210 215
211 if (buf_offset + total_len > WL1271_AGGR_BUFFER_SIZE) 216 if (buf_offset + total_len > WL1271_AGGR_BUFFER_SIZE)
212 return -EAGAIN; 217 return -EAGAIN;
@@ -220,6 +225,10 @@ static int wl1271_tx_allocate(struct wl1271 *wl, struct sk_buff *skb, u32 extra,
220 in the firmware */ 225 in the firmware */
221 len = wl12xx_calc_packet_alignment(wl, total_len); 226 len = wl12xx_calc_packet_alignment(wl, total_len);
222 227
228 /* in case of a dummy packet, use default amount of spare mem blocks */
229 if (unlikely(wl12xx_is_dummy_packet(wl, skb)))
230 spare_blocks = TX_HW_BLOCK_SPARE_DEFAULT;
231
223 total_blocks = (len + TX_HW_BLOCK_SIZE - 1) / TX_HW_BLOCK_SIZE + 232 total_blocks = (len + TX_HW_BLOCK_SIZE - 1) / TX_HW_BLOCK_SIZE +
224 spare_blocks; 233 spare_blocks;
225 234
@@ -451,7 +460,6 @@ u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set)
451 rate_set >>= 1; 460 rate_set >>= 1;
452 } 461 }
453 462
454#ifdef CONFIG_WL12XX_HT
455 /* MCS rates indication are on bits 16 - 23 */ 463 /* MCS rates indication are on bits 16 - 23 */
456 rate_set >>= HW_HT_RATES_OFFSET - band->n_bitrates; 464 rate_set >>= HW_HT_RATES_OFFSET - band->n_bitrates;
457 465
@@ -460,7 +468,6 @@ u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set)
460 enabled_rates |= (CONF_HW_BIT_RATE_MCS_0 << bit); 468 enabled_rates |= (CONF_HW_BIT_RATE_MCS_0 << bit);
461 rate_set >>= 1; 469 rate_set >>= 1;
462 } 470 }
463#endif
464 471
465 return enabled_rates; 472 return enabled_rates;
466} 473}
@@ -884,6 +891,7 @@ void wl1271_tx_reset(struct wl1271 *wl, bool reset_tx_queues)
884 /* TX failure */ 891 /* TX failure */
885 if (wl->bss_type == BSS_TYPE_AP_BSS) { 892 if (wl->bss_type == BSS_TYPE_AP_BSS) {
886 for (i = 0; i < AP_MAX_LINKS; i++) { 893 for (i = 0; i < AP_MAX_LINKS; i++) {
894 wl1271_free_sta(wl, i);
887 wl1271_tx_reset_link_queues(wl, i); 895 wl1271_tx_reset_link_queues(wl, i);
888 wl->links[i].allocated_pkts = 0; 896 wl->links[i].allocated_pkts = 0;
889 wl->links[i].prev_freed_pkts = 0; 897 wl->links[i].prev_freed_pkts = 0;
@@ -903,10 +911,14 @@ void wl1271_tx_reset(struct wl1271 *wl, bool reset_tx_queues)
903 ieee80211_tx_status_ni(wl->hw, skb); 911 ieee80211_tx_status_ni(wl->hw, skb);
904 } 912 }
905 } 913 }
906 wl->tx_queue_count[i] = 0;
907 } 914 }
915
916 wl->ba_rx_bitmap = 0;
908 } 917 }
909 918
919 for (i = 0; i < NUM_TX_QUEUES; i++)
920 wl->tx_queue_count[i] = 0;
921
910 wl->stopped_queues_map = 0; 922 wl->stopped_queues_map = 0;
911 923
912 /* 924 /*
diff --git a/drivers/net/wireless/wl12xx/tx.h b/drivers/net/wireless/wl12xx/tx.h
index 7da35c0e411b..d6fdbf904a09 100644
--- a/drivers/net/wireless/wl12xx/tx.h
+++ b/drivers/net/wireless/wl12xx/tx.h
@@ -25,6 +25,7 @@
25#ifndef __TX_H__ 25#ifndef __TX_H__
26#define __TX_H__ 26#define __TX_H__
27 27
28#define TX_HW_BLOCK_SPARE_DEFAULT 1
28#define TX_HW_BLOCK_SIZE 252 29#define TX_HW_BLOCK_SIZE 252
29 30
30#define TX_HW_MGMT_PKT_LIFETIME_TU 2000 31#define TX_HW_MGMT_PKT_LIFETIME_TU 2000
@@ -213,5 +214,9 @@ u32 wl1271_tx_min_rate_get(struct wl1271 *wl);
213u8 wl12xx_tx_get_hlid_ap(struct wl1271 *wl, struct sk_buff *skb); 214u8 wl12xx_tx_get_hlid_ap(struct wl1271 *wl, struct sk_buff *skb);
214void wl1271_tx_reset_link_queues(struct wl1271 *wl, u8 hlid); 215void wl1271_tx_reset_link_queues(struct wl1271 *wl, u8 hlid);
215void wl1271_handle_tx_low_watermark(struct wl1271 *wl); 216void wl1271_handle_tx_low_watermark(struct wl1271 *wl);
217bool wl12xx_is_dummy_packet(struct wl1271 *wl, struct sk_buff *skb);
218
219/* from main.c */
220void wl1271_free_sta(struct wl1271 *wl, u8 hlid);
216 221
217#endif 222#endif
diff --git a/drivers/net/wireless/wl12xx/wl12xx.h b/drivers/net/wireless/wl12xx/wl12xx.h
index 61a7c2163ea2..3ceb20c170bc 100644
--- a/drivers/net/wireless/wl12xx/wl12xx.h
+++ b/drivers/net/wireless/wl12xx/wl12xx.h
@@ -234,14 +234,14 @@ struct wl1271_stats {
234#define NUM_TX_QUEUES 4 234#define NUM_TX_QUEUES 4
235#define NUM_RX_PKT_DESC 8 235#define NUM_RX_PKT_DESC 8
236 236
237#define AP_MAX_STATIONS 5 237#define AP_MAX_STATIONS 8
238 238
239/* Broadcast and Global links + system link + links to stations */ 239/* Broadcast and Global links + system link + links to stations */
240/* 240/*
241 * TODO: when WL1271_AP_STA_HLID_START is no longer constant, change all 241 * TODO: when WL1271_AP_STA_HLID_START is no longer constant, change all
242 * the places that use this. 242 * the places that use this.
243 */ 243 */
244#define AP_MAX_LINKS (AP_MAX_STATIONS + 3) 244#define AP_MAX_LINKS (AP_MAX_STATIONS + WL1271_AP_STA_HLID_START)
245 245
246/* FW status registers */ 246/* FW status registers */
247struct wl12xx_fw_status { 247struct wl12xx_fw_status {
@@ -402,6 +402,7 @@ struct wl1271 {
402 u8 mac_addr[ETH_ALEN]; 402 u8 mac_addr[ETH_ALEN];
403 u8 bss_type; 403 u8 bss_type;
404 u8 set_bss_type; 404 u8 set_bss_type;
405 u8 p2p; /* we are using p2p role */
405 u8 ssid[IEEE80211_MAX_SSID_LEN + 1]; 406 u8 ssid[IEEE80211_MAX_SSID_LEN + 1];
406 u8 ssid_len; 407 u8 ssid_len;
407 int channel; 408 int channel;
@@ -425,6 +426,9 @@ struct wl1271 {
425 u32 tx_allocated_blocks; 426 u32 tx_allocated_blocks;
426 u32 tx_results_count; 427 u32 tx_results_count;
427 428
429 /* amount of spare TX blocks to use */
430 u32 tx_spare_blocks;
431
428 /* Accounting for allocated / available Tx packets in HW */ 432 /* Accounting for allocated / available Tx packets in HW */
429 u32 tx_pkts_freed[NUM_TX_QUEUES]; 433 u32 tx_pkts_freed[NUM_TX_QUEUES];
430 u32 tx_allocated_pkts[NUM_TX_QUEUES]; 434 u32 tx_allocated_pkts[NUM_TX_QUEUES];
@@ -623,6 +627,9 @@ struct wl1271 {
623 627
624 /* number of currently active RX BA sessions */ 628 /* number of currently active RX BA sessions */
625 int ba_rx_session_count; 629 int ba_rx_session_count;
630
631 /* AP-mode - number of currently connected stations */
632 int active_sta_count;
626}; 633};
627 634
628struct wl1271_station { 635struct wl1271_station {
diff --git a/drivers/nfc/Kconfig b/drivers/nfc/Kconfig
index 2acff4307ca4..5af959274d4e 100644
--- a/drivers/nfc/Kconfig
+++ b/drivers/nfc/Kconfig
@@ -27,4 +27,15 @@ config NFC_PN533
27 Say Y here to compile support for PN533 devices into the 27 Say Y here to compile support for PN533 devices into the
28 kernel or say M to compile it as module (pn533). 28 kernel or say M to compile it as module (pn533).
29 29
30config NFC_WILINK
31 tristate "Texas Instruments NFC WiLink driver"
32 depends on TI_ST && NFC_NCI
33 help
34 This enables the NFC driver for Texas Instrument's BT/FM/GPS/NFC
35 combo devices. This makes use of shared transport line discipline
36 core driver to communicate with the NFC core of the combo chip.
37
38 Say Y here to compile support for Texas Instrument's NFC WiLink driver
39 into the kernel or say M to compile it as module.
40
30endmenu 41endmenu
diff --git a/drivers/nfc/Makefile b/drivers/nfc/Makefile
index 8ef446d2c1bd..ab99e8572f02 100644
--- a/drivers/nfc/Makefile
+++ b/drivers/nfc/Makefile
@@ -4,5 +4,6 @@
4 4
5obj-$(CONFIG_PN544_NFC) += pn544.o 5obj-$(CONFIG_PN544_NFC) += pn544.o
6obj-$(CONFIG_NFC_PN533) += pn533.o 6obj-$(CONFIG_NFC_PN533) += pn533.o
7obj-$(CONFIG_NFC_WILINK) += nfcwilink.o
7 8
8ccflags-$(CONFIG_NFC_DEBUG) := -DDEBUG 9ccflags-$(CONFIG_NFC_DEBUG) := -DDEBUG
diff --git a/drivers/nfc/nfcwilink.c b/drivers/nfc/nfcwilink.c
new file mode 100644
index 000000000000..5b0f1ff80361
--- /dev/null
+++ b/drivers/nfc/nfcwilink.c
@@ -0,0 +1,342 @@
1/*
2 * Texas Instrument's NFC Driver For Shared Transport.
3 *
4 * NFC Driver acts as interface between NCI core and
5 * TI Shared Transport Layer.
6 *
7 * Copyright (C) 2011 Texas Instruments, Inc.
8 *
9 * Written by Ilan Elias <ilane@ti.com>
10 *
11 * Acknowledgements:
12 * This file is based on btwilink.c, which was written
13 * by Raja Mani and Pavan Savoy.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 *
28 */
29#include <linux/platform_device.h>
30#include <linux/nfc.h>
31#include <net/nfc/nci.h>
32#include <net/nfc/nci_core.h>
33#include <linux/ti_wilink_st.h>
34
35#define NFCWILINK_CHNL 12
36#define NFCWILINK_OPCODE 7
37#define NFCWILINK_MAX_FRAME_SIZE 300
38#define NFCWILINK_HDR_LEN 4
39#define NFCWILINK_OFFSET_LEN_IN_HDR 1
40#define NFCWILINK_LEN_SIZE 2
41#define NFCWILINK_REGISTER_TIMEOUT 8000 /* 8 sec */
42
43struct nfcwilink_hdr {
44 u8 chnl;
45 u8 opcode;
46 u16 len;
47} __packed;
48
49struct nfcwilink {
50 struct platform_device *pdev;
51 struct nci_dev *ndev;
52 unsigned long flags;
53
54 char st_register_cb_status;
55 long (*st_write) (struct sk_buff *);
56 struct completion st_register_completed;
57};
58
59/* NFCWILINK driver flags */
60enum {
61 NFCWILINK_RUNNING,
62};
63
64/* Called by ST when registration is complete */
65static void nfcwilink_register_complete(void *priv_data, char data)
66{
67 struct nfcwilink *drv = priv_data;
68
69 nfc_dev_dbg(&drv->pdev->dev, "register_complete entry");
70
71 /* store ST registration status */
72 drv->st_register_cb_status = data;
73
74 /* complete the wait in nfc_st_open() */
75 complete(&drv->st_register_completed);
76}
77
78/* Called by ST when receive data is available */
79static long nfcwilink_receive(void *priv_data, struct sk_buff *skb)
80{
81 struct nfcwilink *drv = priv_data;
82 int rc;
83
84 nfc_dev_dbg(&drv->pdev->dev, "receive entry, len %d", skb->len);
85
86 if (!skb)
87 return -EFAULT;
88
89 if (!drv) {
90 kfree_skb(skb);
91 return -EFAULT;
92 }
93
94 /* strip the ST header
95 (apart for the chnl byte, which is not received in the hdr) */
96 skb_pull(skb, (NFCWILINK_HDR_LEN-1));
97
98 skb->dev = (void *) drv->ndev;
99
100 /* Forward skb to NCI core layer */
101 rc = nci_recv_frame(skb);
102 if (rc < 0) {
103 nfc_dev_err(&drv->pdev->dev, "nci_recv_frame failed %d", rc);
104 return rc;
105 }
106
107 return 0;
108}
109
110/* protocol structure registered with ST */
111static struct st_proto_s nfcwilink_proto = {
112 .chnl_id = NFCWILINK_CHNL,
113 .max_frame_size = NFCWILINK_MAX_FRAME_SIZE,
114 .hdr_len = (NFCWILINK_HDR_LEN-1), /* not including chnl byte */
115 .offset_len_in_hdr = NFCWILINK_OFFSET_LEN_IN_HDR,
116 .len_size = NFCWILINK_LEN_SIZE,
117 .reserve = 0,
118 .recv = nfcwilink_receive,
119 .reg_complete_cb = nfcwilink_register_complete,
120 .write = NULL,
121};
122
123static int nfcwilink_open(struct nci_dev *ndev)
124{
125 struct nfcwilink *drv = nci_get_drvdata(ndev);
126 unsigned long comp_ret;
127 int rc;
128
129 nfc_dev_dbg(&drv->pdev->dev, "open entry");
130
131 if (test_and_set_bit(NFCWILINK_RUNNING, &drv->flags)) {
132 rc = -EBUSY;
133 goto exit;
134 }
135
136 nfcwilink_proto.priv_data = drv;
137
138 init_completion(&drv->st_register_completed);
139 drv->st_register_cb_status = -EINPROGRESS;
140
141 rc = st_register(&nfcwilink_proto);
142 if (rc < 0) {
143 if (rc == -EINPROGRESS) {
144 comp_ret = wait_for_completion_timeout(
145 &drv->st_register_completed,
146 msecs_to_jiffies(NFCWILINK_REGISTER_TIMEOUT));
147
148 nfc_dev_dbg(&drv->pdev->dev,
149 "wait_for_completion_timeout returned %ld",
150 comp_ret);
151
152 if (comp_ret == 0) {
153 /* timeout */
154 rc = -ETIMEDOUT;
155 goto clear_exit;
156 } else if (drv->st_register_cb_status != 0) {
157 rc = drv->st_register_cb_status;
158 nfc_dev_err(&drv->pdev->dev,
159 "st_register_cb failed %d", rc);
160 goto clear_exit;
161 }
162 } else {
163 nfc_dev_err(&drv->pdev->dev,
164 "st_register failed %d", rc);
165 goto clear_exit;
166 }
167 }
168
169 /* st_register MUST fill the write callback */
170 BUG_ON(nfcwilink_proto.write == NULL);
171 drv->st_write = nfcwilink_proto.write;
172
173 goto exit;
174
175clear_exit:
176 clear_bit(NFCWILINK_RUNNING, &drv->flags);
177
178exit:
179 return rc;
180}
181
182static int nfcwilink_close(struct nci_dev *ndev)
183{
184 struct nfcwilink *drv = nci_get_drvdata(ndev);
185 int rc;
186
187 nfc_dev_dbg(&drv->pdev->dev, "close entry");
188
189 if (!test_and_clear_bit(NFCWILINK_RUNNING, &drv->flags))
190 return 0;
191
192 rc = st_unregister(&nfcwilink_proto);
193 if (rc)
194 nfc_dev_err(&drv->pdev->dev, "st_unregister failed %d", rc);
195
196 drv->st_write = NULL;
197
198 return rc;
199}
200
201static int nfcwilink_send(struct sk_buff *skb)
202{
203 struct nci_dev *ndev = (struct nci_dev *)skb->dev;
204 struct nfcwilink *drv = nci_get_drvdata(ndev);
205 struct nfcwilink_hdr hdr = {NFCWILINK_CHNL, NFCWILINK_OPCODE, 0x0000};
206 long len;
207
208 nfc_dev_dbg(&drv->pdev->dev, "send entry, len %d", skb->len);
209
210 if (!test_bit(NFCWILINK_RUNNING, &drv->flags))
211 return -EBUSY;
212
213 /* add the ST hdr to the start of the buffer */
214 hdr.len = skb->len;
215 memcpy(skb_push(skb, NFCWILINK_HDR_LEN), &hdr, NFCWILINK_HDR_LEN);
216
217 /* Insert skb to shared transport layer's transmit queue.
218 * Freeing skb memory is taken care in shared transport layer,
219 * so don't free skb memory here.
220 */
221 len = drv->st_write(skb);
222 if (len < 0) {
223 kfree_skb(skb);
224 nfc_dev_err(&drv->pdev->dev, "st_write failed %ld", len);
225 return -EFAULT;
226 }
227
228 return 0;
229}
230
231static struct nci_ops nfcwilink_ops = {
232 .open = nfcwilink_open,
233 .close = nfcwilink_close,
234 .send = nfcwilink_send,
235};
236
237static int nfcwilink_probe(struct platform_device *pdev)
238{
239 static struct nfcwilink *drv;
240 int rc;
241 u32 protocols;
242
243 nfc_dev_dbg(&pdev->dev, "probe entry");
244
245 drv = kzalloc(sizeof(struct nfcwilink), GFP_KERNEL);
246 if (!drv) {
247 rc = -ENOMEM;
248 goto exit;
249 }
250
251 drv->pdev = pdev;
252
253 protocols = NFC_PROTO_JEWEL_MASK
254 | NFC_PROTO_MIFARE_MASK | NFC_PROTO_FELICA_MASK
255 | NFC_PROTO_ISO14443_MASK
256 | NFC_PROTO_NFC_DEP_MASK;
257
258 drv->ndev = nci_allocate_device(&nfcwilink_ops,
259 protocols,
260 NFCWILINK_HDR_LEN,
261 0);
262 if (!drv->ndev) {
263 nfc_dev_err(&pdev->dev, "nci_allocate_device failed");
264 rc = -ENOMEM;
265 goto free_exit;
266 }
267
268 nci_set_parent_dev(drv->ndev, &pdev->dev);
269 nci_set_drvdata(drv->ndev, drv);
270
271 rc = nci_register_device(drv->ndev);
272 if (rc < 0) {
273 nfc_dev_err(&pdev->dev, "nci_register_device failed %d", rc);
274 goto free_dev_exit;
275 }
276
277 dev_set_drvdata(&pdev->dev, drv);
278
279 goto exit;
280
281free_dev_exit:
282 nci_free_device(drv->ndev);
283
284free_exit:
285 kfree(drv);
286
287exit:
288 return rc;
289}
290
291static int nfcwilink_remove(struct platform_device *pdev)
292{
293 struct nfcwilink *drv = dev_get_drvdata(&pdev->dev);
294 struct nci_dev *ndev;
295
296 nfc_dev_dbg(&pdev->dev, "remove entry");
297
298 if (!drv)
299 return -EFAULT;
300
301 ndev = drv->ndev;
302
303 nci_unregister_device(ndev);
304 nci_free_device(ndev);
305
306 kfree(drv);
307
308 dev_set_drvdata(&pdev->dev, NULL);
309
310 return 0;
311}
312
313static struct platform_driver nfcwilink_driver = {
314 .probe = nfcwilink_probe,
315 .remove = nfcwilink_remove,
316 .driver = {
317 .name = "nfcwilink",
318 .owner = THIS_MODULE,
319 },
320};
321
322/* ------- Module Init/Exit interfaces ------ */
323static int __init nfcwilink_init(void)
324{
325 printk(KERN_INFO "NFC Driver for TI WiLink");
326
327 return platform_driver_register(&nfcwilink_driver);
328}
329
330static void __exit nfcwilink_exit(void)
331{
332 platform_driver_unregister(&nfcwilink_driver);
333}
334
335module_init(nfcwilink_init);
336module_exit(nfcwilink_exit);
337
338/* ------ Module Info ------ */
339
340MODULE_AUTHOR("Ilan Elias <ilane@ti.com>");
341MODULE_DESCRIPTION("NFC Driver for TI Shared Transport");
342MODULE_LICENSE("GPL");
diff --git a/drivers/nfc/pn533.c b/drivers/nfc/pn533.c
index f81a93e5b59d..7bcb1febef0d 100644
--- a/drivers/nfc/pn533.c
+++ b/drivers/nfc/pn533.c
@@ -28,7 +28,7 @@
28#include <linux/usb.h> 28#include <linux/usb.h>
29#include <linux/nfc.h> 29#include <linux/nfc.h>
30#include <linux/netdevice.h> 30#include <linux/netdevice.h>
31#include <net/nfc.h> 31#include <net/nfc/nfc.h>
32 32
33#define VERSION "0.1" 33#define VERSION "0.1"
34 34
@@ -1432,6 +1432,8 @@ static int pn533_set_configuration(struct pn533 *dev, u8 cfgitem, u8 *cfgdata,
1432} 1432}
1433 1433
1434struct nfc_ops pn533_nfc_ops = { 1434struct nfc_ops pn533_nfc_ops = {
1435 .dev_up = NULL,
1436 .dev_down = NULL,
1435 .start_poll = pn533_start_poll, 1437 .start_poll = pn533_start_poll,
1436 .stop_poll = pn533_stop_poll, 1438 .stop_poll = pn533_stop_poll,
1437 .activate_target = pn533_activate_target, 1439 .activate_target = pn533_activate_target,
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index a7ae33d06f24..1526d965ed06 100644
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -378,4 +378,13 @@ u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value);
378/* PMU support */ 378/* PMU support */
379extern void bcma_pmu_init(struct bcma_drv_cc *cc); 379extern void bcma_pmu_init(struct bcma_drv_cc *cc);
380 380
381extern void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset,
382 u32 value);
383extern void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset,
384 u32 mask, u32 set);
385extern void bcma_chipco_chipctl_maskset(struct bcma_drv_cc *cc,
386 u32 offset, u32 mask, u32 set);
387extern void bcma_chipco_regctl_maskset(struct bcma_drv_cc *cc,
388 u32 offset, u32 mask, u32 set);
389
381#endif /* LINUX_BCMA_DRIVER_CC_H_ */ 390#endif /* LINUX_BCMA_DRIVER_CC_H_ */
diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h
index 37f95f2e10f9..b5e0a5c344fd 100644
--- a/include/linux/ieee80211.h
+++ b/include/linux/ieee80211.h
@@ -130,6 +130,8 @@
130#define IEEE80211_QOS_CTL_ACK_POLICY_BLOCKACK 0x0060 130#define IEEE80211_QOS_CTL_ACK_POLICY_BLOCKACK 0x0060
131/* A-MSDU 802.11n */ 131/* A-MSDU 802.11n */
132#define IEEE80211_QOS_CTL_A_MSDU_PRESENT 0x0080 132#define IEEE80211_QOS_CTL_A_MSDU_PRESENT 0x0080
133/* Mesh Control 802.11s */
134#define IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT 0x0100
133 135
134/* U-APSD queue for WMM IEs sent by AP */ 136/* U-APSD queue for WMM IEs sent by AP */
135#define IEEE80211_WMM_IE_AP_QOSINFO_UAPSD (1<<7) 137#define IEEE80211_WMM_IE_AP_QOSINFO_UAPSD (1<<7)
@@ -775,6 +777,13 @@ struct ieee80211_mmie {
775 u8 mic[8]; 777 u8 mic[8];
776} __attribute__ ((packed)); 778} __attribute__ ((packed));
777 779
780struct ieee80211_vendor_ie {
781 u8 element_id;
782 u8 len;
783 u8 oui[3];
784 u8 oui_type;
785} __packed;
786
778/* Control frames */ 787/* Control frames */
779struct ieee80211_rts { 788struct ieee80211_rts {
780 __le16 frame_control; 789 __le16 frame_control;
@@ -1468,6 +1477,9 @@ enum ieee80211_sa_query_action {
1468 1477
1469#define WLAN_PMKID_LEN 16 1478#define WLAN_PMKID_LEN 16
1470 1479
1480#define WLAN_OUI_WFA 0x506f9a
1481#define WLAN_OUI_TYPE_WFA_P2P 9
1482
1471/* 1483/*
1472 * WMM/802.11e Tspec Element 1484 * WMM/802.11e Tspec Element
1473 */ 1485 */
diff --git a/include/linux/nfc.h b/include/linux/nfc.h
index c525e0b5876b..36cb955b05cc 100644
--- a/include/linux/nfc.h
+++ b/include/linux/nfc.h
@@ -39,6 +39,10 @@
39 * 39 *
40 * @NFC_CMD_GET_DEVICE: request information about a device (requires 40 * @NFC_CMD_GET_DEVICE: request information about a device (requires
41 * %NFC_ATTR_DEVICE_INDEX) or dump request to get a list of all nfc devices 41 * %NFC_ATTR_DEVICE_INDEX) or dump request to get a list of all nfc devices
42 * @NFC_CMD_DEV_UP: turn on the nfc device
43 * (requires %NFC_ATTR_DEVICE_INDEX)
44 * @NFC_CMD_DEV_DOWN: turn off the nfc device
45 * (requires %NFC_ATTR_DEVICE_INDEX)
42 * @NFC_CMD_START_POLL: start polling for targets using the given protocols 46 * @NFC_CMD_START_POLL: start polling for targets using the given protocols
43 * (requires %NFC_ATTR_DEVICE_INDEX and %NFC_ATTR_PROTOCOLS) 47 * (requires %NFC_ATTR_DEVICE_INDEX and %NFC_ATTR_PROTOCOLS)
44 * @NFC_CMD_STOP_POLL: stop polling for targets (requires 48 * @NFC_CMD_STOP_POLL: stop polling for targets (requires
@@ -56,6 +60,8 @@
56enum nfc_commands { 60enum nfc_commands {
57 NFC_CMD_UNSPEC, 61 NFC_CMD_UNSPEC,
58 NFC_CMD_GET_DEVICE, 62 NFC_CMD_GET_DEVICE,
63 NFC_CMD_DEV_UP,
64 NFC_CMD_DEV_DOWN,
59 NFC_CMD_START_POLL, 65 NFC_CMD_START_POLL,
60 NFC_CMD_STOP_POLL, 66 NFC_CMD_STOP_POLL,
61 NFC_CMD_GET_TARGET, 67 NFC_CMD_GET_TARGET,
diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h
index 0343504082a8..460b12a8ef66 100644
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
@@ -499,6 +499,9 @@
499 * this command may also be sent by the driver as an MLME event to 499 * this command may also be sent by the driver as an MLME event to
500 * inform userspace of the new replay counter. 500 * inform userspace of the new replay counter.
501 * 501 *
502 * @NL80211_CMD_PMKSA_CANDIDATE: This is used as an event to inform userspace
503 * of PMKSA caching dandidates.
504 *
502 * @NL80211_CMD_MAX: highest used command number 505 * @NL80211_CMD_MAX: highest used command number
503 * @__NL80211_CMD_AFTER_LAST: internal use 506 * @__NL80211_CMD_AFTER_LAST: internal use
504 */ 507 */
@@ -623,6 +626,8 @@ enum nl80211_commands {
623 626
624 NL80211_CMD_SET_REKEY_OFFLOAD, 627 NL80211_CMD_SET_REKEY_OFFLOAD,
625 628
629 NL80211_CMD_PMKSA_CANDIDATE,
630
626 /* add new commands above here */ 631 /* add new commands above here */
627 632
628 /* used to define NL80211_CMD_MAX below */ 633 /* used to define NL80211_CMD_MAX below */
@@ -769,6 +774,8 @@ enum nl80211_commands {
769 * that can be added to a scan request 774 * that can be added to a scan request
770 * @NL80211_ATTR_MAX_SCHED_SCAN_IE_LEN: maximum length of information 775 * @NL80211_ATTR_MAX_SCHED_SCAN_IE_LEN: maximum length of information
771 * elements that can be added to a scheduled scan request 776 * elements that can be added to a scheduled scan request
777 * @NL80211_ATTR_MAX_MATCH_SETS: maximum number of sets that can be
778 * used with @NL80211_ATTR_SCHED_SCAN_MATCH, a wiphy attribute.
772 * 779 *
773 * @NL80211_ATTR_SCAN_FREQUENCIES: nested attribute with frequencies (in MHz) 780 * @NL80211_ATTR_SCAN_FREQUENCIES: nested attribute with frequencies (in MHz)
774 * @NL80211_ATTR_SCAN_SSIDS: nested attribute with SSIDs, leave out for passive 781 * @NL80211_ATTR_SCAN_SSIDS: nested attribute with SSIDs, leave out for passive
@@ -1011,6 +1018,24 @@ enum nl80211_commands {
1011 1018
1012 * @NL80211_ATTR_SCHED_SCAN_INTERVAL: Interval between scheduled scan 1019 * @NL80211_ATTR_SCHED_SCAN_INTERVAL: Interval between scheduled scan
1013 * cycles, in msecs. 1020 * cycles, in msecs.
1021
1022 * @NL80211_ATTR_SCHED_SCAN_MATCH: Nested attribute with one or more
1023 * sets of attributes to match during scheduled scans. Only BSSs
1024 * that match any of the sets will be reported. These are
1025 * pass-thru filter rules.
1026 * For a match to succeed, the BSS must match all attributes of a
1027 * set. Since not every hardware supports matching all types of
1028 * attributes, there is no guarantee that the reported BSSs are
1029 * fully complying with the match sets and userspace needs to be
1030 * able to ignore them by itself.
1031 * Thus, the implementation is somewhat hardware-dependent, but
1032 * this is only an optimization and the userspace application
1033 * needs to handle all the non-filtered results anyway.
1034 * If the match attributes don't make sense when combined with
1035 * the values passed in @NL80211_ATTR_SCAN_SSIDS (eg. if an SSID
1036 * is included in the probe request, but the match attributes
1037 * will never let it go through), -EINVAL may be returned.
1038 * If ommited, no filtering is done.
1014 * 1039 *
1015 * @NL80211_ATTR_INTERFACE_COMBINATIONS: Nested attribute listing the supported 1040 * @NL80211_ATTR_INTERFACE_COMBINATIONS: Nested attribute listing the supported
1016 * interface combinations. In each nested item, it contains attributes 1041 * interface combinations. In each nested item, it contains attributes
@@ -1044,6 +1069,14 @@ enum nl80211_commands {
1044 * 1069 *
1045 * @NL80211_ATTR_STA_WME: Nested attribute containing the wme configuration 1070 * @NL80211_ATTR_STA_WME: Nested attribute containing the wme configuration
1046 * of the station, see &enum nl80211_sta_wme_attr. 1071 * of the station, see &enum nl80211_sta_wme_attr.
1072 * @NL80211_ATTR_SUPPORT_AP_UAPSD: the device supports uapsd when working
1073 * as AP.
1074 *
1075 * @NL80211_ATTR_ROAM_SUPPORT: Indicates whether the firmware is capable of
1076 * roaming to another AP in the same ESS if the signal lever is low.
1077 *
1078 * @NL80211_ATTR_PMKSA_CANDIDATE: Nested attribute containing the PMKSA caching
1079 * candidate information, see &enum nl80211_pmksa_candidate_attr.
1047 * 1080 *
1048 * @NL80211_ATTR_MAX: highest attribute number currently defined 1081 * @NL80211_ATTR_MAX: highest attribute number currently defined
1049 * @__NL80211_ATTR_AFTER_LAST: internal use 1082 * @__NL80211_ATTR_AFTER_LAST: internal use
@@ -1256,6 +1289,14 @@ enum nl80211_attrs {
1256 NL80211_ATTR_IE_ASSOC_RESP, 1289 NL80211_ATTR_IE_ASSOC_RESP,
1257 1290
1258 NL80211_ATTR_STA_WME, 1291 NL80211_ATTR_STA_WME,
1292 NL80211_ATTR_SUPPORT_AP_UAPSD,
1293
1294 NL80211_ATTR_ROAM_SUPPORT,
1295
1296 NL80211_ATTR_SCHED_SCAN_MATCH,
1297 NL80211_ATTR_MAX_MATCH_SETS,
1298
1299 NL80211_ATTR_PMKSA_CANDIDATE,
1259 1300
1260 /* add attributes here, update the policy in nl80211.c */ 1301 /* add attributes here, update the policy in nl80211.c */
1261 1302
@@ -1716,6 +1757,26 @@ enum nl80211_reg_rule_attr {
1716}; 1757};
1717 1758
1718/** 1759/**
1760 * enum nl80211_sched_scan_match_attr - scheduled scan match attributes
1761 * @__NL80211_SCHED_SCAN_MATCH_ATTR_INVALID: attribute number 0 is reserved
1762 * @NL80211_SCHED_SCAN_MATCH_ATTR_SSID: SSID to be used for matching,
1763 * only report BSS with matching SSID.
1764 * @NL80211_SCHED_SCAN_MATCH_ATTR_MAX: highest scheduled scan filter
1765 * attribute number currently defined
1766 * @__NL80211_SCHED_SCAN_MATCH_ATTR_AFTER_LAST: internal use
1767 */
1768enum nl80211_sched_scan_match_attr {
1769 __NL80211_SCHED_SCAN_MATCH_ATTR_INVALID,
1770
1771 NL80211_ATTR_SCHED_SCAN_MATCH_SSID,
1772
1773 /* keep last */
1774 __NL80211_SCHED_SCAN_MATCH_ATTR_AFTER_LAST,
1775 NL80211_SCHED_SCAN_MATCH_ATTR_MAX =
1776 __NL80211_SCHED_SCAN_MATCH_ATTR_AFTER_LAST - 1
1777};
1778
1779/**
1719 * enum nl80211_reg_rule_flags - regulatory rule flags 1780 * enum nl80211_reg_rule_flags - regulatory rule flags
1720 * 1781 *
1721 * @NL80211_RRF_NO_OFDM: OFDM modulation not allowed 1782 * @NL80211_RRF_NO_OFDM: OFDM modulation not allowed
@@ -2490,8 +2551,10 @@ enum nl80211_hidden_ssid {
2490/** 2551/**
2491 * enum nl80211_sta_wme_attr - station WME attributes 2552 * enum nl80211_sta_wme_attr - station WME attributes
2492 * @__NL80211_STA_WME_INVALID: invalid number for nested attribute 2553 * @__NL80211_STA_WME_INVALID: invalid number for nested attribute
2493 * @NL80211_STA_WME_QUEUES: bitmap of uapsd queues. 2554 * @NL80211_STA_WME_UAPSD_QUEUES: bitmap of uapsd queues. the format
2494 * @NL80211_STA_WME_MAX_SP: max service period. 2555 * is the same as the AC bitmap in the QoS info field.
2556 * @NL80211_STA_WME_MAX_SP: max service period. the format is the same
2557 * as the MAX_SP field in the QoS info field (but already shifted down).
2495 * @__NL80211_STA_WME_AFTER_LAST: internal 2558 * @__NL80211_STA_WME_AFTER_LAST: internal
2496 * @NL80211_STA_WME_MAX: highest station WME attribute 2559 * @NL80211_STA_WME_MAX: highest station WME attribute
2497 */ 2560 */
@@ -2505,4 +2568,27 @@ enum nl80211_sta_wme_attr {
2505 NL80211_STA_WME_MAX = __NL80211_STA_WME_AFTER_LAST - 1 2568 NL80211_STA_WME_MAX = __NL80211_STA_WME_AFTER_LAST - 1
2506}; 2569};
2507 2570
2571/**
2572 * enum nl80211_pmksa_candidate_attr - attributes for PMKSA caching candidates
2573 * @__NL80211_PMKSA_CANDIDATE_INVALID: invalid number for nested attributes
2574 * @NL80211_PMKSA_CANDIDATE_INDEX: candidate index (u32; the smaller, the higher
2575 * priority)
2576 * @NL80211_PMKSA_CANDIDATE_BSSID: candidate BSSID (6 octets)
2577 * @NL80211_PMKSA_CANDIDATE_PREAUTH: RSN pre-authentication supported (flag)
2578 * @NUM_NL80211_PMKSA_CANDIDATE: number of PMKSA caching candidate attributes
2579 * (internal)
2580 * @MAX_NL80211_PMKSA_CANDIDATE: highest PMKSA caching candidate attribute
2581 * (internal)
2582 */
2583enum nl80211_pmksa_candidate_attr {
2584 __NL80211_PMKSA_CANDIDATE_INVALID,
2585 NL80211_PMKSA_CANDIDATE_INDEX,
2586 NL80211_PMKSA_CANDIDATE_BSSID,
2587 NL80211_PMKSA_CANDIDATE_PREAUTH,
2588
2589 /* keep last */
2590 NUM_NL80211_PMKSA_CANDIDATE,
2591 MAX_NL80211_PMKSA_CANDIDATE = NUM_NL80211_PMKSA_CANDIDATE - 1
2592};
2593
2508#endif /* __LINUX_NL80211_H */ 2594#endif /* __LINUX_NL80211_H */
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 8623217f84d0..f10ed7b4a714 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -25,7 +25,7 @@ struct ssb_sprom {
25 u8 et1phyaddr; /* MII address for enet1 */ 25 u8 et1phyaddr; /* MII address for enet1 */
26 u8 et0mdcport; /* MDIO for enet0 */ 26 u8 et0mdcport; /* MDIO for enet0 */
27 u8 et1mdcport; /* MDIO for enet1 */ 27 u8 et1mdcport; /* MDIO for enet1 */
28 u8 board_rev; /* Board revision number from SPROM. */ 28 u16 board_rev; /* Board revision number from SPROM. */
29 u8 country_code; /* Country Code */ 29 u8 country_code; /* Country Code */
30 u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */ 30 u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
31 u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */ 31 u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index eb2659aefd97..ccfdf3f63ce5 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -441,6 +441,10 @@ enum plink_actions {
441 * @plink_action: plink action to take 441 * @plink_action: plink action to take
442 * @plink_state: set the peer link state for a station 442 * @plink_state: set the peer link state for a station
443 * @ht_capa: HT capabilities of station 443 * @ht_capa: HT capabilities of station
444 * @uapsd_queues: bitmap of queues configured for uapsd. same format
445 * as the AC bitmap in the QoS info field
446 * @max_sp: max Service Period. same format as the MAX_SP in the
447 * QoS info field (but already shifted down)
444 */ 448 */
445struct station_parameters { 449struct station_parameters {
446 u8 *supported_rates; 450 u8 *supported_rates;
@@ -876,6 +880,15 @@ struct cfg80211_scan_request {
876}; 880};
877 881
878/** 882/**
883 * struct cfg80211_match_set - sets of attributes to match
884 *
885 * @ssid: SSID to be matched
886 */
887struct cfg80211_match_set {
888 struct cfg80211_ssid ssid;
889};
890
891/**
879 * struct cfg80211_sched_scan_request - scheduled scan request description 892 * struct cfg80211_sched_scan_request - scheduled scan request description
880 * 893 *
881 * @ssids: SSIDs to scan for (passed in the probe_reqs in active scans) 894 * @ssids: SSIDs to scan for (passed in the probe_reqs in active scans)
@@ -884,6 +897,11 @@ struct cfg80211_scan_request {
884 * @interval: interval between each scheduled scan cycle 897 * @interval: interval between each scheduled scan cycle
885 * @ie: optional information element(s) to add into Probe Request or %NULL 898 * @ie: optional information element(s) to add into Probe Request or %NULL
886 * @ie_len: length of ie in octets 899 * @ie_len: length of ie in octets
900 * @match_sets: sets of parameters to be matched for a scan result
901 * entry to be considered valid and to be passed to the host
902 * (others are filtered out).
903 * If ommited, all results are passed.
904 * @n_match_sets: number of match sets
887 * @wiphy: the wiphy this was for 905 * @wiphy: the wiphy this was for
888 * @dev: the interface 906 * @dev: the interface
889 * @channels: channels to scan 907 * @channels: channels to scan
@@ -895,6 +913,8 @@ struct cfg80211_sched_scan_request {
895 u32 interval; 913 u32 interval;
896 const u8 *ie; 914 const u8 *ie;
897 size_t ie_len; 915 size_t ie_len;
916 struct cfg80211_match_set *match_sets;
917 int n_match_sets;
898 918
899 /* internal */ 919 /* internal */
900 struct wiphy *wiphy; 920 struct wiphy *wiphy;
@@ -1619,6 +1639,9 @@ struct cfg80211_ops {
1619 * @WIPHY_FLAG_MESH_AUTH: The device supports mesh authentication by routing 1639 * @WIPHY_FLAG_MESH_AUTH: The device supports mesh authentication by routing
1620 * auth frames to userspace. See @NL80211_MESH_SETUP_USERSPACE_AUTH. 1640 * auth frames to userspace. See @NL80211_MESH_SETUP_USERSPACE_AUTH.
1621 * @WIPHY_FLAG_SUPPORTS_SCHED_SCAN: The device supports scheduled scans. 1641 * @WIPHY_FLAG_SUPPORTS_SCHED_SCAN: The device supports scheduled scans.
1642 * @WIPHY_FLAG_SUPPORTS_FW_ROAM: The device supports roaming feature in the
1643 * firmware.
1644 * @WIPHY_FLAG_AP_UAPSD: The device supports uapsd on AP.
1622 */ 1645 */
1623enum wiphy_flags { 1646enum wiphy_flags {
1624 WIPHY_FLAG_CUSTOM_REGULATORY = BIT(0), 1647 WIPHY_FLAG_CUSTOM_REGULATORY = BIT(0),
@@ -1633,6 +1656,8 @@ enum wiphy_flags {
1633 WIPHY_FLAG_MESH_AUTH = BIT(10), 1656 WIPHY_FLAG_MESH_AUTH = BIT(10),
1634 WIPHY_FLAG_SUPPORTS_SCHED_SCAN = BIT(11), 1657 WIPHY_FLAG_SUPPORTS_SCHED_SCAN = BIT(11),
1635 WIPHY_FLAG_ENFORCE_COMBINATIONS = BIT(12), 1658 WIPHY_FLAG_ENFORCE_COMBINATIONS = BIT(12),
1659 WIPHY_FLAG_SUPPORTS_FW_ROAM = BIT(13),
1660 WIPHY_FLAG_AP_UAPSD = BIT(14),
1636}; 1661};
1637 1662
1638/** 1663/**
@@ -1789,6 +1814,8 @@ struct wiphy_wowlan_support {
1789 * by default for perm_addr. In this case, the mask should be set to 1814 * by default for perm_addr. In this case, the mask should be set to
1790 * all-zeroes. In this case it is assumed that the device can handle 1815 * all-zeroes. In this case it is assumed that the device can handle
1791 * the same number of arbitrary MAC addresses. 1816 * the same number of arbitrary MAC addresses.
1817 * @registered: protects ->resume and ->suspend sysfs callbacks against
1818 * unregister hardware
1792 * @debugfsdir: debugfs directory used for this wiphy, will be renamed 1819 * @debugfsdir: debugfs directory used for this wiphy, will be renamed
1793 * automatically on wiphy renames 1820 * automatically on wiphy renames
1794 * @dev: (virtual) struct device for this wiphy 1821 * @dev: (virtual) struct device for this wiphy
@@ -1809,6 +1836,9 @@ struct wiphy_wowlan_support {
1809 * any given scan 1836 * any given scan
1810 * @max_sched_scan_ssids: maximum number of SSIDs the device can scan 1837 * @max_sched_scan_ssids: maximum number of SSIDs the device can scan
1811 * for in any given scheduled scan 1838 * for in any given scheduled scan
1839 * @max_match_sets: maximum number of match sets the device can handle
1840 * when performing a scheduled scan, 0 if filtering is not
1841 * supported.
1812 * @max_scan_ie_len: maximum length of user-controlled IEs device can 1842 * @max_scan_ie_len: maximum length of user-controlled IEs device can
1813 * add to probe request frames transmitted during a scan, must not 1843 * add to probe request frames transmitted during a scan, must not
1814 * include fixed IEs like supported rates 1844 * include fixed IEs like supported rates
@@ -1866,6 +1896,7 @@ struct wiphy {
1866 int bss_priv_size; 1896 int bss_priv_size;
1867 u8 max_scan_ssids; 1897 u8 max_scan_ssids;
1868 u8 max_sched_scan_ssids; 1898 u8 max_sched_scan_ssids;
1899 u8 max_match_sets;
1869 u16 max_scan_ie_len; 1900 u16 max_scan_ie_len;
1870 u16 max_sched_scan_ie_len; 1901 u16 max_sched_scan_ie_len;
1871 1902
@@ -1911,6 +1942,9 @@ struct wiphy {
1911 * you need use set_wiphy_dev() (see below) */ 1942 * you need use set_wiphy_dev() (see below) */
1912 struct device dev; 1943 struct device dev;
1913 1944
1945 /* protects ->resume, ->suspend sysfs callbacks against unregister hw */
1946 bool registered;
1947
1914 /* dir in debugfs: ieee80211/<wiphyname> */ 1948 /* dir in debugfs: ieee80211/<wiphyname> */
1915 struct dentry *debugfsdir; 1949 struct dentry *debugfsdir;
1916 1950
@@ -2428,6 +2462,24 @@ unsigned int cfg80211_classify8021d(struct sk_buff *skb);
2428const u8 *cfg80211_find_ie(u8 eid, const u8 *ies, int len); 2462const u8 *cfg80211_find_ie(u8 eid, const u8 *ies, int len);
2429 2463
2430/** 2464/**
2465 * cfg80211_find_vendor_ie - find vendor specific information element in data
2466 *
2467 * @oui: vendor OUI
2468 * @oui_type: vendor-specific OUI type
2469 * @ies: data consisting of IEs
2470 * @len: length of data
2471 *
2472 * This function will return %NULL if the vendor specific element ID
2473 * could not be found or if the element is invalid (claims to be
2474 * longer than the given data), or a pointer to the first byte
2475 * of the requested element, that is the byte containing the
2476 * element ID. There are no checks on the element length
2477 * other than having to fit into the given data.
2478 */
2479const u8 *cfg80211_find_vendor_ie(unsigned int oui, u8 oui_type,
2480 const u8 *ies, int len);
2481
2482/**
2431 * DOC: Regulatory enforcement infrastructure 2483 * DOC: Regulatory enforcement infrastructure
2432 * 2484 *
2433 * TODO 2485 * TODO
@@ -3087,6 +3139,17 @@ void cfg80211_cqm_pktloss_notify(struct net_device *dev,
3087void cfg80211_gtk_rekey_notify(struct net_device *dev, const u8 *bssid, 3139void cfg80211_gtk_rekey_notify(struct net_device *dev, const u8 *bssid,
3088 const u8 *replay_ctr, gfp_t gfp); 3140 const u8 *replay_ctr, gfp_t gfp);
3089 3141
3142/**
3143 * cfg80211_pmksa_candidate_notify - notify about PMKSA caching candidate
3144 * @dev: network device
3145 * @index: candidate index (the smaller the index, the higher the priority)
3146 * @bssid: BSSID of AP
3147 * @preauth: Whether AP advertises support for RSN pre-authentication
3148 * @gfp: allocation flags
3149 */
3150void cfg80211_pmksa_candidate_notify(struct net_device *dev, int index,
3151 const u8 *bssid, bool preauth, gfp_t gfp);
3152
3090/* Logging, debugging and troubleshooting/diagnostic helpers. */ 3153/* Logging, debugging and troubleshooting/diagnostic helpers. */
3091 3154
3092/* wiphy_printk helpers, similar to dev_printk */ 3155/* wiphy_printk helpers, similar to dev_printk */
diff --git a/include/net/mac80211.h b/include/net/mac80211.h
index 2e752df57510..c0f63fd0c52b 100644
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -164,13 +164,14 @@ struct ieee80211_low_level_stats {
164 * @BSS_CHANGED_QOS: QoS for this association was enabled/disabled. Note 164 * @BSS_CHANGED_QOS: QoS for this association was enabled/disabled. Note
165 * that it is only ever disabled for station mode. 165 * that it is only ever disabled for station mode.
166 * @BSS_CHANGED_IDLE: Idle changed for this BSS/interface. 166 * @BSS_CHANGED_IDLE: Idle changed for this BSS/interface.
167 * @BSS_CHANGED_SSID: SSID changed for this BSS (AP mode)
167 */ 168 */
168enum ieee80211_bss_change { 169enum ieee80211_bss_change {
169 BSS_CHANGED_ASSOC = 1<<0, 170 BSS_CHANGED_ASSOC = 1<<0,
170 BSS_CHANGED_ERP_CTS_PROT = 1<<1, 171 BSS_CHANGED_ERP_CTS_PROT = 1<<1,
171 BSS_CHANGED_ERP_PREAMBLE = 1<<2, 172 BSS_CHANGED_ERP_PREAMBLE = 1<<2,
172 BSS_CHANGED_ERP_SLOT = 1<<3, 173 BSS_CHANGED_ERP_SLOT = 1<<3,
173 BSS_CHANGED_HT = 1<<4, 174 BSS_CHANGED_HT = 1<<4,
174 BSS_CHANGED_BASIC_RATES = 1<<5, 175 BSS_CHANGED_BASIC_RATES = 1<<5,
175 BSS_CHANGED_BEACON_INT = 1<<6, 176 BSS_CHANGED_BEACON_INT = 1<<6,
176 BSS_CHANGED_BSSID = 1<<7, 177 BSS_CHANGED_BSSID = 1<<7,
@@ -181,6 +182,7 @@ enum ieee80211_bss_change {
181 BSS_CHANGED_ARP_FILTER = 1<<12, 182 BSS_CHANGED_ARP_FILTER = 1<<12,
182 BSS_CHANGED_QOS = 1<<13, 183 BSS_CHANGED_QOS = 1<<13,
183 BSS_CHANGED_IDLE = 1<<14, 184 BSS_CHANGED_IDLE = 1<<14,
185 BSS_CHANGED_SSID = 1<<15,
184 186
185 /* when adding here, make sure to change ieee80211_reconfig */ 187 /* when adding here, make sure to change ieee80211_reconfig */
186}; 188};
@@ -254,6 +256,9 @@ enum ieee80211_rssi_event {
254 * @idle: This interface is idle. There's also a global idle flag in the 256 * @idle: This interface is idle. There's also a global idle flag in the
255 * hardware config which may be more appropriate depending on what 257 * hardware config which may be more appropriate depending on what
256 * your driver/device needs to do. 258 * your driver/device needs to do.
259 * @ssid: The SSID of the current vif. Only valid in AP-mode.
260 * @ssid_len: Length of SSID given in @ssid.
261 * @hidden_ssid: The SSID of the current vif is hidden. Only valid in AP-mode.
257 */ 262 */
258struct ieee80211_bss_conf { 263struct ieee80211_bss_conf {
259 const u8 *bssid; 264 const u8 *bssid;
@@ -280,6 +285,9 @@ struct ieee80211_bss_conf {
280 bool arp_filter_enabled; 285 bool arp_filter_enabled;
281 bool qos; 286 bool qos;
282 bool idle; 287 bool idle;
288 u8 ssid[IEEE80211_MAX_SSID_LEN];
289 size_t ssid_len;
290 bool hidden_ssid;
283}; 291};
284 292
285/** 293/**
@@ -947,6 +955,9 @@ enum set_key_cmd {
947 * @wme: indicates whether the STA supports WME. Only valid during AP-mode. 955 * @wme: indicates whether the STA supports WME. Only valid during AP-mode.
948 * @drv_priv: data area for driver use, will always be aligned to 956 * @drv_priv: data area for driver use, will always be aligned to
949 * sizeof(void *), size is determined in hw information. 957 * sizeof(void *), size is determined in hw information.
958 * @uapsd_queues: bitmap of queues configured for uapsd. Only valid
959 * if wme is supported.
960 * @max_sp: max Service Period. Only valid if wme is supported.
950 */ 961 */
951struct ieee80211_sta { 962struct ieee80211_sta {
952 u32 supp_rates[IEEE80211_NUM_BANDS]; 963 u32 supp_rates[IEEE80211_NUM_BANDS];
@@ -1096,6 +1107,10 @@ enum sta_notify_cmd {
1096 * stations based on the PM bit of incoming frames. 1107 * stations based on the PM bit of incoming frames.
1097 * Use ieee80211_start_ps()/ieee8021_end_ps() to manually configure 1108 * Use ieee80211_start_ps()/ieee8021_end_ps() to manually configure
1098 * the PS mode of connected stations. 1109 * the PS mode of connected stations.
1110 *
1111 * @IEEE80211_HW_TX_AMPDU_SETUP_IN_HW: The device handles TX A-MPDU session
1112 * setup strictly in HW. mac80211 should not attempt to do this in
1113 * software.
1099 */ 1114 */
1100enum ieee80211_hw_flags { 1115enum ieee80211_hw_flags {
1101 IEEE80211_HW_HAS_RATE_CONTROL = 1<<0, 1116 IEEE80211_HW_HAS_RATE_CONTROL = 1<<0,
@@ -1121,6 +1136,7 @@ enum ieee80211_hw_flags {
1121 IEEE80211_HW_SUPPORTS_CQM_RSSI = 1<<20, 1136 IEEE80211_HW_SUPPORTS_CQM_RSSI = 1<<20,
1122 IEEE80211_HW_SUPPORTS_PER_STA_GTK = 1<<21, 1137 IEEE80211_HW_SUPPORTS_PER_STA_GTK = 1<<21,
1123 IEEE80211_HW_AP_LINK_PS = 1<<22, 1138 IEEE80211_HW_AP_LINK_PS = 1<<22,
1139 IEEE80211_HW_TX_AMPDU_SETUP_IN_HW = 1<<23,
1124}; 1140};
1125 1141
1126/** 1142/**
@@ -3220,6 +3236,19 @@ void ieee80211_remain_on_channel_expired(struct ieee80211_hw *hw);
3220void ieee80211_stop_rx_ba_session(struct ieee80211_vif *vif, u16 ba_rx_bitmap, 3236void ieee80211_stop_rx_ba_session(struct ieee80211_vif *vif, u16 ba_rx_bitmap,
3221 const u8 *addr); 3237 const u8 *addr);
3222 3238
3239/**
3240 * ieee80211_send_bar - send a BlockAckReq frame
3241 *
3242 * can be used to flush pending frames from the peer's aggregation reorder
3243 * buffer.
3244 *
3245 * @vif: &struct ieee80211_vif pointer from the add_interface callback.
3246 * @ra: the peer's destination address
3247 * @tid: the TID of the aggregation session
3248 * @ssn: the new starting sequence number for the receiver
3249 */
3250void ieee80211_send_bar(struct ieee80211_vif *vif, u8 *ra, u16 tid, u16 ssn);
3251
3223/* Rate control API */ 3252/* Rate control API */
3224 3253
3225/** 3254/**
diff --git a/include/net/nfc/nci.h b/include/net/nfc/nci.h
new file mode 100644
index 000000000000..39b85bc0804f
--- /dev/null
+++ b/include/net/nfc/nci.h
@@ -0,0 +1,313 @@
1/*
2 * The NFC Controller Interface is the communication protocol between an
3 * NFC Controller (NFCC) and a Device Host (DH).
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Written by Ilan Elias <ilane@ti.com>
8 *
9 * Acknowledgements:
10 * This file is based on hci.h, which was written
11 * by Maxim Krasnyansky.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#ifndef __NCI_H
29#define __NCI_H
30
31/* NCI constants */
32#define NCI_MAX_NUM_MAPPING_CONFIGS 10
33#define NCI_MAX_NUM_RF_CONFIGS 10
34#define NCI_MAX_NUM_CONN 10
35
36/* NCI Status Codes */
37#define NCI_STATUS_OK 0x00
38#define NCI_STATUS_REJECTED 0x01
39#define NCI_STATUS_MESSAGE_CORRUPTED 0x02
40#define NCI_STATUS_BUFFER_FULL 0x03
41#define NCI_STATUS_FAILED 0x04
42#define NCI_STATUS_NOT_INITIALIZED 0x05
43#define NCI_STATUS_SYNTAX_ERROR 0x06
44#define NCI_STATUS_SEMANTIC_ERROR 0x07
45#define NCI_STATUS_UNKNOWN_GID 0x08
46#define NCI_STATUS_UNKNOWN_OID 0x09
47#define NCI_STATUS_INVALID_PARAM 0x0a
48#define NCI_STATUS_MESSAGE_SIZE_EXCEEDED 0x0b
49/* Discovery Specific Status Codes */
50#define NCI_STATUS_DISCOVERY_ALREADY_STARTED 0xa0
51#define NCI_STATUS_DISCOVERY_TARGET_ACTIVATION_FAILED 0xa1
52/* RF Interface Specific Status Codes */
53#define NCI_STATUS_RF_TRANSMISSION_ERROR 0xb0
54#define NCI_STATUS_RF_PROTOCOL_ERROR 0xb1
55#define NCI_STATUS_RF_TIMEOUT_ERROR 0xb2
56#define NCI_STATUS_RF_LINK_LOSS_ERROR 0xb3
57/* NFCEE Interface Specific Status Codes */
58#define NCI_STATUS_MAX_ACTIVE_NFCEE_INTERFACES_REACHED 0xc0
59#define NCI_STATUS_NFCEE_INTERFACE_ACTIVATION_FAILED 0xc1
60#define NCI_STATUS_NFCEE_TRANSMISSION_ERROR 0xc2
61#define NCI_STATUS_NFCEE_PROTOCOL_ERROR 0xc3
62#define NCI_STATUS_NFCEE_TIMEOUT_ERROR 0xc4
63
64/* NCI RF Technology and Mode */
65#define NCI_NFC_A_PASSIVE_POLL_MODE 0x00
66#define NCI_NFC_B_PASSIVE_POLL_MODE 0x01
67#define NCI_NFC_F_PASSIVE_POLL_MODE 0x02
68#define NCI_NFC_A_ACTIVE_POLL_MODE 0x03
69#define NCI_NFC_F_ACTIVE_POLL_MODE 0x05
70#define NCI_NFC_A_PASSIVE_LISTEN_MODE 0x80
71#define NCI_NFC_B_PASSIVE_LISTEN_MODE 0x81
72#define NCI_NFC_F_PASSIVE_LISTEN_MODE 0x82
73#define NCI_NFC_A_ACTIVE_LISTEN_MODE 0x83
74#define NCI_NFC_F_ACTIVE_LISTEN_MODE 0x85
75
76/* NCI RF Protocols */
77#define NCI_RF_PROTOCOL_UNKNOWN 0x00
78#define NCI_RF_PROTOCOL_T1T 0x01
79#define NCI_RF_PROTOCOL_T2T 0x02
80#define NCI_RF_PROTOCOL_T3T 0x03
81#define NCI_RF_PROTOCOL_ISO_DEP 0x04
82#define NCI_RF_PROTOCOL_NFC_DEP 0x05
83
84/* NCI RF Interfaces */
85#define NCI_RF_INTERFACE_RFU 0x00
86#define NCI_RF_INTERFACE_FRAME 0x01
87#define NCI_RF_INTERFACE_ISO_DEP 0x02
88#define NCI_RF_INTERFACE_NFC_DEP 0x03
89
90/* NCI RF_DISCOVER_MAP_CMD modes */
91#define NCI_DISC_MAP_MODE_POLL 0x01
92#define NCI_DISC_MAP_MODE_LISTEN 0x02
93#define NCI_DISC_MAP_MODE_BOTH 0x03
94
95/* NCI Discovery Types */
96#define NCI_DISCOVERY_TYPE_POLL_A_PASSIVE 0x00
97#define NCI_DISCOVERY_TYPE_POLL_B_PASSIVE 0x01
98#define NCI_DISCOVERY_TYPE_POLL_F_PASSIVE 0x02
99#define NCI_DISCOVERY_TYPE_POLL_A_ACTIVE 0x03
100#define NCI_DISCOVERY_TYPE_POLL_F_ACTIVE 0x05
101#define NCI_DISCOVERY_TYPE_WAKEUP_A_PASSIVE 0x06
102#define NCI_DISCOVERY_TYPE_WAKEUP_B_PASSIVE 0x07
103#define NCI_DISCOVERY_TYPE_WAKEUP_A_ACTIVE 0x09
104#define NCI_DISCOVERY_TYPE_LISTEN_A_PASSIVE 0x80
105#define NCI_DISCOVERY_TYPE_LISTEN_B_PASSIVE 0x81
106#define NCI_DISCOVERY_TYPE_LISTEN_F_PASSIVE 0x82
107#define NCI_DISCOVERY_TYPE_LISTEN_A_ACTIVE 0x83
108#define NCI_DISCOVERY_TYPE_LISTEN_F_ACTIVE 0x85
109
110/* NCI Deactivation Type */
111#define NCI_DEACTIVATE_TYPE_IDLE_MODE 0x00
112#define NCI_DEACTIVATE_TYPE_SLEEP_MODE 0x01
113#define NCI_DEACTIVATE_TYPE_SLEEP_AF_MODE 0x02
114#define NCI_DEACTIVATE_TYPE_RF_LINK_LOSS 0x03
115#define NCI_DEACTIVATE_TYPE_DISCOVERY_ERROR 0x04
116
117/* Message Type (MT) */
118#define NCI_MT_DATA_PKT 0x00
119#define NCI_MT_CMD_PKT 0x01
120#define NCI_MT_RSP_PKT 0x02
121#define NCI_MT_NTF_PKT 0x03
122
123#define nci_mt(hdr) (((hdr)[0]>>5)&0x07)
124#define nci_mt_set(hdr, mt) ((hdr)[0] |= (__u8)(((mt)&0x07)<<5))
125
126/* Packet Boundary Flag (PBF) */
127#define NCI_PBF_LAST 0x00
128#define NCI_PBF_CONT 0x01
129
130#define nci_pbf(hdr) (__u8)(((hdr)[0]>>4)&0x01)
131#define nci_pbf_set(hdr, pbf) ((hdr)[0] |= (__u8)(((pbf)&0x01)<<4))
132
133/* Control Opcode manipulation */
134#define nci_opcode_pack(gid, oid) (__u16)((((__u16)((gid)&0x0f))<<8)|\
135 ((__u16)((oid)&0x3f)))
136#define nci_opcode(hdr) nci_opcode_pack(hdr[0], hdr[1])
137#define nci_opcode_gid(op) (__u8)(((op)&0x0f00)>>8)
138#define nci_opcode_oid(op) (__u8)((op)&0x003f)
139
140/* Payload Length */
141#define nci_plen(hdr) (__u8)((hdr)[2])
142
143/* Connection ID */
144#define nci_conn_id(hdr) (__u8)(((hdr)[0])&0x0f)
145
146/* GID values */
147#define NCI_GID_CORE 0x0
148#define NCI_GID_RF_MGMT 0x1
149#define NCI_GID_NFCEE_MGMT 0x2
150#define NCI_GID_PROPRIETARY 0xf
151
152/* ---- NCI Packet structures ---- */
153#define NCI_CTRL_HDR_SIZE 3
154#define NCI_DATA_HDR_SIZE 3
155
156struct nci_ctrl_hdr {
157 __u8 gid; /* MT & PBF & GID */
158 __u8 oid;
159 __u8 plen;
160} __packed;
161
162struct nci_data_hdr {
163 __u8 conn_id; /* MT & PBF & ConnID */
164 __u8 rfu;
165 __u8 plen;
166} __packed;
167
168/* ------------------------ */
169/* ----- NCI Commands ---- */
170/* ------------------------ */
171#define NCI_OP_CORE_RESET_CMD nci_opcode_pack(NCI_GID_CORE, 0x00)
172
173#define NCI_OP_CORE_INIT_CMD nci_opcode_pack(NCI_GID_CORE, 0x01)
174
175#define NCI_OP_CORE_SET_CONFIG_CMD nci_opcode_pack(NCI_GID_CORE, 0x02)
176
177#define NCI_OP_CORE_CONN_CREATE_CMD nci_opcode_pack(NCI_GID_CORE, 0x04)
178struct nci_core_conn_create_cmd {
179 __u8 target_handle;
180 __u8 num_target_specific_params;
181} __packed;
182
183#define NCI_OP_CORE_CONN_CLOSE_CMD nci_opcode_pack(NCI_GID_CORE, 0x06)
184
185#define NCI_OP_RF_DISCOVER_MAP_CMD nci_opcode_pack(NCI_GID_RF_MGMT, 0x00)
186struct disc_map_config {
187 __u8 rf_protocol;
188 __u8 mode;
189 __u8 rf_interface_type;
190} __packed;
191
192struct nci_rf_disc_map_cmd {
193 __u8 num_mapping_configs;
194 struct disc_map_config mapping_configs
195 [NCI_MAX_NUM_MAPPING_CONFIGS];
196} __packed;
197
198#define NCI_OP_RF_DISCOVER_CMD nci_opcode_pack(NCI_GID_RF_MGMT, 0x03)
199struct disc_config {
200 __u8 type;
201 __u8 frequency;
202} __packed;
203
204struct nci_rf_disc_cmd {
205 __u8 num_disc_configs;
206 struct disc_config disc_configs[NCI_MAX_NUM_RF_CONFIGS];
207} __packed;
208
209#define NCI_OP_RF_DEACTIVATE_CMD nci_opcode_pack(NCI_GID_RF_MGMT, 0x06)
210struct nci_rf_deactivate_cmd {
211 __u8 type;
212} __packed;
213
214/* ----------------------- */
215/* ---- NCI Responses ---- */
216/* ----------------------- */
217#define NCI_OP_CORE_RESET_RSP nci_opcode_pack(NCI_GID_CORE, 0x00)
218struct nci_core_reset_rsp {
219 __u8 status;
220 __u8 nci_ver;
221} __packed;
222
223#define NCI_OP_CORE_INIT_RSP nci_opcode_pack(NCI_GID_CORE, 0x01)
224struct nci_core_init_rsp_1 {
225 __u8 status;
226 __le32 nfcc_features;
227 __u8 num_supported_rf_interfaces;
228 __u8 supported_rf_interfaces[0]; /* variable size array */
229 /* continuted in nci_core_init_rsp_2 */
230} __packed;
231
232struct nci_core_init_rsp_2 {
233 __u8 max_logical_connections;
234 __le16 max_routing_table_size;
235 __u8 max_control_packet_payload_length;
236 __le16 rf_sending_buffer_size;
237 __le16 rf_receiving_buffer_size;
238 __le16 manufacturer_id;
239} __packed;
240
241#define NCI_OP_CORE_SET_CONFIG_RSP nci_opcode_pack(NCI_GID_CORE, 0x02)
242
243#define NCI_OP_CORE_CONN_CREATE_RSP nci_opcode_pack(NCI_GID_CORE, 0x04)
244struct nci_core_conn_create_rsp {
245 __u8 status;
246 __u8 max_pkt_payload_size;
247 __u8 initial_num_credits;
248 __u8 conn_id;
249} __packed;
250
251#define NCI_OP_CORE_CONN_CLOSE_RSP nci_opcode_pack(NCI_GID_CORE, 0x06)
252
253#define NCI_OP_RF_DISCOVER_MAP_RSP nci_opcode_pack(NCI_GID_RF_MGMT, 0x00)
254
255#define NCI_OP_RF_DISCOVER_RSP nci_opcode_pack(NCI_GID_RF_MGMT, 0x03)
256
257#define NCI_OP_RF_DEACTIVATE_RSP nci_opcode_pack(NCI_GID_RF_MGMT, 0x06)
258
259/* --------------------------- */
260/* ---- NCI Notifications ---- */
261/* --------------------------- */
262#define NCI_OP_CORE_CONN_CREDITS_NTF nci_opcode_pack(NCI_GID_CORE, 0x07)
263struct conn_credit_entry {
264 __u8 conn_id;
265 __u8 credits;
266} __packed;
267
268struct nci_core_conn_credit_ntf {
269 __u8 num_entries;
270 struct conn_credit_entry conn_entries[NCI_MAX_NUM_CONN];
271} __packed;
272
273#define NCI_OP_RF_FIELD_INFO_NTF nci_opcode_pack(NCI_GID_CORE, 0x08)
274struct nci_rf_field_info_ntf {
275 __u8 rf_field_status;
276} __packed;
277
278#define NCI_OP_RF_ACTIVATE_NTF nci_opcode_pack(NCI_GID_RF_MGMT, 0x05)
279struct rf_tech_specific_params_nfca_poll {
280 __u16 sens_res;
281 __u8 nfcid1_len; /* 0, 4, 7, or 10 Bytes */
282 __u8 nfcid1[10];
283 __u8 sel_res_len; /* 0 or 1 Bytes */
284 __u8 sel_res;
285} __packed;
286
287struct activation_params_nfca_poll_iso_dep {
288 __u8 rats_res_len;
289 __u8 rats_res[20];
290};
291
292struct nci_rf_activate_ntf {
293 __u8 target_handle;
294 __u8 rf_protocol;
295 __u8 rf_tech_and_mode;
296 __u8 rf_tech_specific_params_len;
297
298 union {
299 struct rf_tech_specific_params_nfca_poll nfca_poll;
300 } rf_tech_specific_params;
301
302 __u8 rf_interface_type;
303 __u8 activation_params_len;
304
305 union {
306 struct activation_params_nfca_poll_iso_dep nfca_poll_iso_dep;
307 } activation_params;
308
309} __packed;
310
311#define NCI_OP_RF_DEACTIVATE_NTF nci_opcode_pack(NCI_GID_RF_MGMT, 0x06)
312
313#endif /* __NCI_H */
diff --git a/include/net/nfc/nci_core.h b/include/net/nfc/nci_core.h
new file mode 100644
index 000000000000..2563f3a95e67
--- /dev/null
+++ b/include/net/nfc/nci_core.h
@@ -0,0 +1,183 @@
1/*
2 * The NFC Controller Interface is the communication protocol between an
3 * NFC Controller (NFCC) and a Device Host (DH).
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Written by Ilan Elias <ilane@ti.com>
8 *
9 * Acknowledgements:
10 * This file is based on hci_core.h, which was written
11 * by Maxim Krasnyansky.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#ifndef __NCI_CORE_H
29#define __NCI_CORE_H
30
31#include <linux/interrupt.h>
32#include <linux/skbuff.h>
33
34#include <net/nfc/nfc.h>
35#include <net/nfc/nci.h>
36
37/* NCI device state */
38enum {
39 NCI_INIT,
40 NCI_UP,
41 NCI_DISCOVERY,
42 NCI_POLL_ACTIVE,
43};
44
45/* NCI timeouts */
46#define NCI_RESET_TIMEOUT 5000
47#define NCI_INIT_TIMEOUT 5000
48#define NCI_RF_DISC_TIMEOUT 5000
49#define NCI_RF_DEACTIVATE_TIMEOUT 5000
50#define NCI_CMD_TIMEOUT 5000
51
52struct nci_dev;
53
54struct nci_ops {
55 int (*open)(struct nci_dev *ndev);
56 int (*close)(struct nci_dev *ndev);
57 int (*send)(struct sk_buff *skb);
58};
59
60#define NCI_MAX_SUPPORTED_RF_INTERFACES 4
61
62/* NCI Core structures */
63struct nci_dev {
64 struct nfc_dev *nfc_dev;
65 struct nci_ops *ops;
66
67 int tx_headroom;
68 int tx_tailroom;
69
70 unsigned long flags;
71
72 atomic_t cmd_cnt;
73 atomic_t credits_cnt;
74
75 struct timer_list cmd_timer;
76
77 struct workqueue_struct *cmd_wq;
78 struct work_struct cmd_work;
79
80 struct workqueue_struct *rx_wq;
81 struct work_struct rx_work;
82
83 struct workqueue_struct *tx_wq;
84 struct work_struct tx_work;
85
86 struct sk_buff_head cmd_q;
87 struct sk_buff_head rx_q;
88 struct sk_buff_head tx_q;
89
90 struct mutex req_lock;
91 struct completion req_completion;
92 __u32 req_status;
93 __u32 req_result;
94
95 void *driver_data;
96
97 __u32 poll_prots;
98 __u32 target_available_prots;
99 __u32 target_active_prot;
100
101 /* received during NCI_OP_CORE_RESET_RSP */
102 __u8 nci_ver;
103
104 /* received during NCI_OP_CORE_INIT_RSP */
105 __u32 nfcc_features;
106 __u8 num_supported_rf_interfaces;
107 __u8 supported_rf_interfaces
108 [NCI_MAX_SUPPORTED_RF_INTERFACES];
109 __u8 max_logical_connections;
110 __u16 max_routing_table_size;
111 __u8 max_control_packet_payload_length;
112 __u16 rf_sending_buffer_size;
113 __u16 rf_receiving_buffer_size;
114 __u16 manufacturer_id;
115
116 /* received during NCI_OP_CORE_CONN_CREATE_RSP for static conn 0 */
117 __u8 max_pkt_payload_size;
118 __u8 initial_num_credits;
119 __u8 conn_id;
120
121 /* stored during nci_data_exchange */
122 data_exchange_cb_t data_exchange_cb;
123 void *data_exchange_cb_context;
124 struct sk_buff *rx_data_reassembly;
125};
126
127/* ----- NCI Devices ----- */
128struct nci_dev *nci_allocate_device(struct nci_ops *ops,
129 __u32 supported_protocols,
130 int tx_headroom,
131 int tx_tailroom);
132void nci_free_device(struct nci_dev *ndev);
133int nci_register_device(struct nci_dev *ndev);
134void nci_unregister_device(struct nci_dev *ndev);
135int nci_recv_frame(struct sk_buff *skb);
136
137static inline struct sk_buff *nci_skb_alloc(struct nci_dev *ndev,
138 unsigned int len,
139 gfp_t how)
140{
141 struct sk_buff *skb;
142
143 skb = alloc_skb(len + ndev->tx_headroom + ndev->tx_tailroom, how);
144 if (skb)
145 skb_reserve(skb, ndev->tx_headroom);
146
147 return skb;
148}
149
150static inline void nci_set_parent_dev(struct nci_dev *ndev, struct device *dev)
151{
152 nfc_set_parent_dev(ndev->nfc_dev, dev);
153}
154
155static inline void nci_set_drvdata(struct nci_dev *ndev, void *data)
156{
157 ndev->driver_data = data;
158}
159
160static inline void *nci_get_drvdata(struct nci_dev *ndev)
161{
162 return ndev->driver_data;
163}
164
165void nci_rsp_packet(struct nci_dev *ndev, struct sk_buff *skb);
166void nci_ntf_packet(struct nci_dev *ndev, struct sk_buff *skb);
167void nci_rx_data_packet(struct nci_dev *ndev, struct sk_buff *skb);
168int nci_send_cmd(struct nci_dev *ndev, __u16 opcode, __u8 plen, void *payload);
169int nci_send_data(struct nci_dev *ndev, __u8 conn_id, struct sk_buff *skb);
170void nci_data_exchange_complete(struct nci_dev *ndev, struct sk_buff *skb,
171 int err);
172
173/* ----- NCI requests ----- */
174#define NCI_REQ_DONE 0
175#define NCI_REQ_PEND 1
176#define NCI_REQ_CANCELED 2
177
178void nci_req_complete(struct nci_dev *ndev, int result);
179
180/* ----- NCI status code ----- */
181int nci_to_errno(__u8 code);
182
183#endif /* __NCI_CORE_H */
diff --git a/include/net/nfc.h b/include/net/nfc/nfc.h
index 87b51fe15b70..6a7f602aa841 100644
--- a/include/net/nfc.h
+++ b/include/net/nfc/nfc.h
@@ -48,6 +48,8 @@ typedef void (*data_exchange_cb_t)(void *context, struct sk_buff *skb,
48 int err); 48 int err);
49 49
50struct nfc_ops { 50struct nfc_ops {
51 int (*dev_up)(struct nfc_dev *dev);
52 int (*dev_down)(struct nfc_dev *dev);
51 int (*start_poll)(struct nfc_dev *dev, u32 protocols); 53 int (*start_poll)(struct nfc_dev *dev, u32 protocols);
52 void (*stop_poll)(struct nfc_dev *dev); 54 void (*stop_poll)(struct nfc_dev *dev);
53 int (*activate_target)(struct nfc_dev *dev, u32 target_idx, 55 int (*activate_target)(struct nfc_dev *dev, u32 target_idx,
@@ -78,7 +80,9 @@ struct nfc_dev {
78 int targets_generation; 80 int targets_generation;
79 spinlock_t targets_lock; 81 spinlock_t targets_lock;
80 struct device dev; 82 struct device dev;
83 bool dev_up;
81 bool polling; 84 bool polling;
85 bool remote_activated;
82 struct nfc_genl_data genl_data; 86 struct nfc_genl_data genl_data;
83 u32 supported_protocols; 87 u32 supported_protocols;
84 88
diff --git a/net/bluetooth/af_bluetooth.c b/net/bluetooth/af_bluetooth.c
index 8add9b499912..117e0d161780 100644
--- a/net/bluetooth/af_bluetooth.c
+++ b/net/bluetooth/af_bluetooth.c
@@ -494,9 +494,8 @@ int bt_sock_wait_state(struct sock *sk, int state, unsigned long timeo)
494 BT_DBG("sk %p", sk); 494 BT_DBG("sk %p", sk);
495 495
496 add_wait_queue(sk_sleep(sk), &wait); 496 add_wait_queue(sk_sleep(sk), &wait);
497 set_current_state(TASK_INTERRUPTIBLE);
497 while (sk->sk_state != state) { 498 while (sk->sk_state != state) {
498 set_current_state(TASK_INTERRUPTIBLE);
499
500 if (!timeo) { 499 if (!timeo) {
501 err = -EINPROGRESS; 500 err = -EINPROGRESS;
502 break; 501 break;
@@ -510,12 +509,13 @@ int bt_sock_wait_state(struct sock *sk, int state, unsigned long timeo)
510 release_sock(sk); 509 release_sock(sk);
511 timeo = schedule_timeout(timeo); 510 timeo = schedule_timeout(timeo);
512 lock_sock(sk); 511 lock_sock(sk);
512 set_current_state(TASK_INTERRUPTIBLE);
513 513
514 err = sock_error(sk); 514 err = sock_error(sk);
515 if (err) 515 if (err)
516 break; 516 break;
517 } 517 }
518 set_current_state(TASK_RUNNING); 518 __set_current_state(TASK_RUNNING);
519 remove_wait_queue(sk_sleep(sk), &wait); 519 remove_wait_queue(sk_sleep(sk), &wait);
520 return err; 520 return err;
521} 521}
diff --git a/net/bluetooth/bnep/bnep.h b/net/bluetooth/bnep/bnep.h
index 8e6c06158f8e..e7ee5314f39a 100644
--- a/net/bluetooth/bnep/bnep.h
+++ b/net/bluetooth/bnep/bnep.h
@@ -155,6 +155,7 @@ struct bnep_session {
155 unsigned int role; 155 unsigned int role;
156 unsigned long state; 156 unsigned long state;
157 unsigned long flags; 157 unsigned long flags;
158 atomic_t terminate;
158 struct task_struct *task; 159 struct task_struct *task;
159 160
160 struct ethhdr eh; 161 struct ethhdr eh;
diff --git a/net/bluetooth/bnep/core.c b/net/bluetooth/bnep/core.c
index ca39fcf010ce..d9edfe8bf9d6 100644
--- a/net/bluetooth/bnep/core.c
+++ b/net/bluetooth/bnep/core.c
@@ -484,9 +484,11 @@ static int bnep_session(void *arg)
484 484
485 init_waitqueue_entry(&wait, current); 485 init_waitqueue_entry(&wait, current);
486 add_wait_queue(sk_sleep(sk), &wait); 486 add_wait_queue(sk_sleep(sk), &wait);
487 while (!kthread_should_stop()) { 487 while (1) {
488 set_current_state(TASK_INTERRUPTIBLE); 488 set_current_state(TASK_INTERRUPTIBLE);
489 489
490 if (atomic_read(&s->terminate))
491 break;
490 /* RX */ 492 /* RX */
491 while ((skb = skb_dequeue(&sk->sk_receive_queue))) { 493 while ((skb = skb_dequeue(&sk->sk_receive_queue))) {
492 skb_orphan(skb); 494 skb_orphan(skb);
@@ -504,7 +506,7 @@ static int bnep_session(void *arg)
504 506
505 schedule(); 507 schedule();
506 } 508 }
507 set_current_state(TASK_RUNNING); 509 __set_current_state(TASK_RUNNING);
508 remove_wait_queue(sk_sleep(sk), &wait); 510 remove_wait_queue(sk_sleep(sk), &wait);
509 511
510 /* Cleanup session */ 512 /* Cleanup session */
@@ -640,9 +642,10 @@ int bnep_del_connection(struct bnep_conndel_req *req)
640 down_read(&bnep_session_sem); 642 down_read(&bnep_session_sem);
641 643
642 s = __bnep_get_session(req->dst); 644 s = __bnep_get_session(req->dst);
643 if (s) 645 if (s) {
644 kthread_stop(s->task); 646 atomic_inc(&s->terminate);
645 else 647 wake_up_process(s->task);
648 } else
646 err = -ENOENT; 649 err = -ENOENT;
647 650
648 up_read(&bnep_session_sem); 651 up_read(&bnep_session_sem);
diff --git a/net/bluetooth/cmtp/capi.c b/net/bluetooth/cmtp/capi.c
index 040f67b12978..50f0d135eb8f 100644
--- a/net/bluetooth/cmtp/capi.c
+++ b/net/bluetooth/cmtp/capi.c
@@ -386,7 +386,8 @@ static void cmtp_reset_ctr(struct capi_ctr *ctrl)
386 386
387 capi_ctr_down(ctrl); 387 capi_ctr_down(ctrl);
388 388
389 kthread_stop(session->task); 389 atomic_inc(&session->terminate);
390 wake_up_process(session->task);
390} 391}
391 392
392static void cmtp_register_appl(struct capi_ctr *ctrl, __u16 appl, capi_register_params *rp) 393static void cmtp_register_appl(struct capi_ctr *ctrl, __u16 appl, capi_register_params *rp)
diff --git a/net/bluetooth/cmtp/cmtp.h b/net/bluetooth/cmtp/cmtp.h
index db43b54ac9af..c32638dddbf9 100644
--- a/net/bluetooth/cmtp/cmtp.h
+++ b/net/bluetooth/cmtp/cmtp.h
@@ -81,6 +81,7 @@ struct cmtp_session {
81 81
82 char name[BTNAMSIZ]; 82 char name[BTNAMSIZ];
83 83
84 atomic_t terminate;
84 struct task_struct *task; 85 struct task_struct *task;
85 86
86 wait_queue_head_t wait; 87 wait_queue_head_t wait;
diff --git a/net/bluetooth/cmtp/core.c b/net/bluetooth/cmtp/core.c
index c5b11af908be..521baa4fe835 100644
--- a/net/bluetooth/cmtp/core.c
+++ b/net/bluetooth/cmtp/core.c
@@ -292,9 +292,11 @@ static int cmtp_session(void *arg)
292 292
293 init_waitqueue_entry(&wait, current); 293 init_waitqueue_entry(&wait, current);
294 add_wait_queue(sk_sleep(sk), &wait); 294 add_wait_queue(sk_sleep(sk), &wait);
295 while (!kthread_should_stop()) { 295 while (1) {
296 set_current_state(TASK_INTERRUPTIBLE); 296 set_current_state(TASK_INTERRUPTIBLE);
297 297
298 if (atomic_read(&session->terminate))
299 break;
298 if (sk->sk_state != BT_CONNECTED) 300 if (sk->sk_state != BT_CONNECTED)
299 break; 301 break;
300 302
@@ -307,7 +309,7 @@ static int cmtp_session(void *arg)
307 309
308 schedule(); 310 schedule();
309 } 311 }
310 set_current_state(TASK_RUNNING); 312 __set_current_state(TASK_RUNNING);
311 remove_wait_queue(sk_sleep(sk), &wait); 313 remove_wait_queue(sk_sleep(sk), &wait);
312 314
313 down_write(&cmtp_session_sem); 315 down_write(&cmtp_session_sem);
@@ -380,16 +382,17 @@ int cmtp_add_connection(struct cmtp_connadd_req *req, struct socket *sock)
380 382
381 if (!(session->flags & (1 << CMTP_LOOPBACK))) { 383 if (!(session->flags & (1 << CMTP_LOOPBACK))) {
382 err = cmtp_attach_device(session); 384 err = cmtp_attach_device(session);
383 if (err < 0) 385 if (err < 0) {
384 goto detach; 386 atomic_inc(&session->terminate);
387 wake_up_process(session->task);
388 up_write(&cmtp_session_sem);
389 return err;
390 }
385 } 391 }
386 392
387 up_write(&cmtp_session_sem); 393 up_write(&cmtp_session_sem);
388 return 0; 394 return 0;
389 395
390detach:
391 cmtp_detach_device(session);
392
393unlink: 396unlink:
394 __cmtp_unlink_session(session); 397 __cmtp_unlink_session(session);
395 398
@@ -414,7 +417,8 @@ int cmtp_del_connection(struct cmtp_conndel_req *req)
414 skb_queue_purge(&session->transmit); 417 skb_queue_purge(&session->transmit);
415 418
416 /* Stop session thread */ 419 /* Stop session thread */
417 kthread_stop(session->task); 420 atomic_inc(&session->terminate);
421 wake_up_process(session->task);
418 } else 422 } else
419 err = -ENOENT; 423 err = -ENOENT;
420 424
diff --git a/net/bluetooth/hci_core.c b/net/bluetooth/hci_core.c
index ec0bc3f60f2e..56943add45cc 100644
--- a/net/bluetooth/hci_core.c
+++ b/net/bluetooth/hci_core.c
@@ -1209,7 +1209,6 @@ static void hci_cmd_timer(unsigned long arg)
1209 1209
1210 BT_ERR("%s command tx timeout", hdev->name); 1210 BT_ERR("%s command tx timeout", hdev->name);
1211 atomic_set(&hdev->cmd_cnt, 1); 1211 atomic_set(&hdev->cmd_cnt, 1);
1212 clear_bit(HCI_RESET, &hdev->flags);
1213 tasklet_schedule(&hdev->cmd_task); 1212 tasklet_schedule(&hdev->cmd_task);
1214} 1213}
1215 1214
@@ -1327,7 +1326,7 @@ int hci_blacklist_add(struct hci_dev *hdev, bdaddr_t *bdaddr)
1327 1326
1328 entry = kzalloc(sizeof(struct bdaddr_list), GFP_KERNEL); 1327 entry = kzalloc(sizeof(struct bdaddr_list), GFP_KERNEL);
1329 if (!entry) { 1328 if (!entry) {
1330 return -ENOMEM; 1329 err = -ENOMEM;
1331 goto err; 1330 goto err;
1332 } 1331 }
1333 1332
@@ -2408,7 +2407,10 @@ static void hci_cmd_task(unsigned long arg)
2408 if (hdev->sent_cmd) { 2407 if (hdev->sent_cmd) {
2409 atomic_dec(&hdev->cmd_cnt); 2408 atomic_dec(&hdev->cmd_cnt);
2410 hci_send_frame(skb); 2409 hci_send_frame(skb);
2411 mod_timer(&hdev->cmd_timer, 2410 if (test_bit(HCI_RESET, &hdev->flags))
2411 del_timer(&hdev->cmd_timer);
2412 else
2413 mod_timer(&hdev->cmd_timer,
2412 jiffies + msecs_to_jiffies(HCI_CMD_TIMEOUT)); 2414 jiffies + msecs_to_jiffies(HCI_CMD_TIMEOUT));
2413 } else { 2415 } else {
2414 skb_queue_head(&hdev->cmd_q, skb); 2416 skb_queue_head(&hdev->cmd_q, skb);
diff --git a/net/bluetooth/hci_event.c b/net/bluetooth/hci_event.c
index a40170e022e8..7ef4eb4435fb 100644
--- a/net/bluetooth/hci_event.c
+++ b/net/bluetooth/hci_event.c
@@ -58,8 +58,8 @@ static void hci_cc_inquiry_cancel(struct hci_dev *hdev, struct sk_buff *skb)
58 if (status) 58 if (status)
59 return; 59 return;
60 60
61 if (test_bit(HCI_MGMT, &hdev->flags) && 61 if (test_and_clear_bit(HCI_INQUIRY, &hdev->flags) &&
62 test_and_clear_bit(HCI_INQUIRY, &hdev->flags)) 62 test_bit(HCI_MGMT, &hdev->flags))
63 mgmt_discovering(hdev->id, 0); 63 mgmt_discovering(hdev->id, 0);
64 64
65 hci_req_complete(hdev, HCI_OP_INQUIRY_CANCEL, status); 65 hci_req_complete(hdev, HCI_OP_INQUIRY_CANCEL, status);
@@ -76,8 +76,8 @@ static void hci_cc_exit_periodic_inq(struct hci_dev *hdev, struct sk_buff *skb)
76 if (status) 76 if (status)
77 return; 77 return;
78 78
79 if (test_bit(HCI_MGMT, &hdev->flags) && 79 if (test_and_clear_bit(HCI_INQUIRY, &hdev->flags) &&
80 test_and_clear_bit(HCI_INQUIRY, &hdev->flags)) 80 test_bit(HCI_MGMT, &hdev->flags))
81 mgmt_discovering(hdev->id, 0); 81 mgmt_discovering(hdev->id, 0);
82 82
83 hci_conn_check_pending(hdev); 83 hci_conn_check_pending(hdev);
@@ -959,9 +959,8 @@ static inline void hci_cs_inquiry(struct hci_dev *hdev, __u8 status)
959 return; 959 return;
960 } 960 }
961 961
962 if (test_bit(HCI_MGMT, &hdev->flags) && 962 if (!test_and_set_bit(HCI_INQUIRY, &hdev->flags) &&
963 !test_and_set_bit(HCI_INQUIRY, 963 test_bit(HCI_MGMT, &hdev->flags))
964 &hdev->flags))
965 mgmt_discovering(hdev->id, 1); 964 mgmt_discovering(hdev->id, 1);
966} 965}
967 966
@@ -1340,8 +1339,8 @@ static inline void hci_inquiry_complete_evt(struct hci_dev *hdev, struct sk_buff
1340 1339
1341 BT_DBG("%s status %d", hdev->name, status); 1340 BT_DBG("%s status %d", hdev->name, status);
1342 1341
1343 if (test_bit(HCI_MGMT, &hdev->flags) && 1342 if (test_and_clear_bit(HCI_INQUIRY, &hdev->flags) &&
1344 test_and_clear_bit(HCI_INQUIRY, &hdev->flags)) 1343 test_bit(HCI_MGMT, &hdev->flags))
1345 mgmt_discovering(hdev->id, 0); 1344 mgmt_discovering(hdev->id, 0);
1346 1345
1347 hci_req_complete(hdev, HCI_OP_INQUIRY, status); 1346 hci_req_complete(hdev, HCI_OP_INQUIRY, status);
diff --git a/net/bluetooth/hidp/core.c b/net/bluetooth/hidp/core.c
index 43b4c2deb7cc..fb68f344c34a 100644
--- a/net/bluetooth/hidp/core.c
+++ b/net/bluetooth/hidp/core.c
@@ -764,6 +764,7 @@ static int hidp_session(void *arg)
764 764
765 up_write(&hidp_session_sem); 765 up_write(&hidp_session_sem);
766 766
767 kfree(session->rd_data);
767 kfree(session); 768 kfree(session);
768 return 0; 769 return 0;
769} 770}
@@ -841,7 +842,8 @@ static int hidp_setup_input(struct hidp_session *session,
841 842
842 err = input_register_device(input); 843 err = input_register_device(input);
843 if (err < 0) { 844 if (err < 0) {
844 hci_conn_put_device(session->conn); 845 input_free_device(input);
846 session->input = NULL;
845 return err; 847 return err;
846 } 848 }
847 849
@@ -1044,8 +1046,12 @@ int hidp_add_connection(struct hidp_connadd_req *req, struct socket *ctrl_sock,
1044 } 1046 }
1045 1047
1046 err = hid_add_device(session->hid); 1048 err = hid_add_device(session->hid);
1047 if (err < 0) 1049 if (err < 0) {
1048 goto err_add_device; 1050 atomic_inc(&session->terminate);
1051 wake_up_process(session->task);
1052 up_write(&hidp_session_sem);
1053 return err;
1054 }
1049 1055
1050 if (session->input) { 1056 if (session->input) {
1051 hidp_send_ctrl_message(session, 1057 hidp_send_ctrl_message(session,
@@ -1059,12 +1065,6 @@ int hidp_add_connection(struct hidp_connadd_req *req, struct socket *ctrl_sock,
1059 up_write(&hidp_session_sem); 1065 up_write(&hidp_session_sem);
1060 return 0; 1066 return 0;
1061 1067
1062err_add_device:
1063 hid_destroy_device(session->hid);
1064 session->hid = NULL;
1065 atomic_inc(&session->terminate);
1066 wake_up_process(session->task);
1067
1068unlink: 1068unlink:
1069 hidp_del_timer(session); 1069 hidp_del_timer(session);
1070 1070
@@ -1090,7 +1090,6 @@ purge:
1090failed: 1090failed:
1091 up_write(&hidp_session_sem); 1091 up_write(&hidp_session_sem);
1092 1092
1093 input_free_device(session->input);
1094 kfree(session); 1093 kfree(session);
1095 return err; 1094 return err;
1096} 1095}
diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
index 3204ba8a701c..b3bdb482bbe6 100644
--- a/net/bluetooth/l2cap_core.c
+++ b/net/bluetooth/l2cap_core.c
@@ -1159,9 +1159,8 @@ int __l2cap_wait_ack(struct sock *sk)
1159 int timeo = HZ/5; 1159 int timeo = HZ/5;
1160 1160
1161 add_wait_queue(sk_sleep(sk), &wait); 1161 add_wait_queue(sk_sleep(sk), &wait);
1162 while ((chan->unacked_frames > 0 && chan->conn)) { 1162 set_current_state(TASK_INTERRUPTIBLE);
1163 set_current_state(TASK_INTERRUPTIBLE); 1163 while (chan->unacked_frames > 0 && chan->conn) {
1164
1165 if (!timeo) 1164 if (!timeo)
1166 timeo = HZ/5; 1165 timeo = HZ/5;
1167 1166
@@ -1173,6 +1172,7 @@ int __l2cap_wait_ack(struct sock *sk)
1173 release_sock(sk); 1172 release_sock(sk);
1174 timeo = schedule_timeout(timeo); 1173 timeo = schedule_timeout(timeo);
1175 lock_sock(sk); 1174 lock_sock(sk);
1175 set_current_state(TASK_INTERRUPTIBLE);
1176 1176
1177 err = sock_error(sk); 1177 err = sock_error(sk);
1178 if (err) 1178 if (err)
diff --git a/net/bluetooth/l2cap_sock.c b/net/bluetooth/l2cap_sock.c
index 5c36b3e8739c..61f1f623091d 100644
--- a/net/bluetooth/l2cap_sock.c
+++ b/net/bluetooth/l2cap_sock.c
@@ -235,30 +235,26 @@ static int l2cap_sock_accept(struct socket *sock, struct socket *newsock, int fl
235 235
236 lock_sock_nested(sk, SINGLE_DEPTH_NESTING); 236 lock_sock_nested(sk, SINGLE_DEPTH_NESTING);
237 237
238 if (sk->sk_state != BT_LISTEN) {
239 err = -EBADFD;
240 goto done;
241 }
242
243 timeo = sock_rcvtimeo(sk, flags & O_NONBLOCK); 238 timeo = sock_rcvtimeo(sk, flags & O_NONBLOCK);
244 239
245 BT_DBG("sk %p timeo %ld", sk, timeo); 240 BT_DBG("sk %p timeo %ld", sk, timeo);
246 241
247 /* Wait for an incoming connection. (wake-one). */ 242 /* Wait for an incoming connection. (wake-one). */
248 add_wait_queue_exclusive(sk_sleep(sk), &wait); 243 add_wait_queue_exclusive(sk_sleep(sk), &wait);
249 while (!(nsk = bt_accept_dequeue(sk, newsock))) { 244 while (1) {
250 set_current_state(TASK_INTERRUPTIBLE); 245 set_current_state(TASK_INTERRUPTIBLE);
251 if (!timeo) { 246
252 err = -EAGAIN; 247 if (sk->sk_state != BT_LISTEN) {
248 err = -EBADFD;
253 break; 249 break;
254 } 250 }
255 251
256 release_sock(sk); 252 nsk = bt_accept_dequeue(sk, newsock);
257 timeo = schedule_timeout(timeo); 253 if (nsk)
258 lock_sock_nested(sk, SINGLE_DEPTH_NESTING); 254 break;
259 255
260 if (sk->sk_state != BT_LISTEN) { 256 if (!timeo) {
261 err = -EBADFD; 257 err = -EAGAIN;
262 break; 258 break;
263 } 259 }
264 260
@@ -266,8 +262,12 @@ static int l2cap_sock_accept(struct socket *sock, struct socket *newsock, int fl
266 err = sock_intr_errno(timeo); 262 err = sock_intr_errno(timeo);
267 break; 263 break;
268 } 264 }
265
266 release_sock(sk);
267 timeo = schedule_timeout(timeo);
268 lock_sock_nested(sk, SINGLE_DEPTH_NESTING);
269 } 269 }
270 set_current_state(TASK_RUNNING); 270 __set_current_state(TASK_RUNNING);
271 remove_wait_queue(sk_sleep(sk), &wait); 271 remove_wait_queue(sk_sleep(sk), &wait);
272 272
273 if (err) 273 if (err)
@@ -993,7 +993,7 @@ static struct sock *l2cap_sock_alloc(struct net *net, struct socket *sock, int p
993 INIT_LIST_HEAD(&bt_sk(sk)->accept_q); 993 INIT_LIST_HEAD(&bt_sk(sk)->accept_q);
994 994
995 sk->sk_destruct = l2cap_sock_destruct; 995 sk->sk_destruct = l2cap_sock_destruct;
996 sk->sk_sndtimeo = msecs_to_jiffies(L2CAP_CONN_TIMEOUT); 996 sk->sk_sndtimeo = L2CAP_CONN_TIMEOUT;
997 997
998 sock_reset_flag(sk, SOCK_ZAPPED); 998 sock_reset_flag(sk, SOCK_ZAPPED);
999 999
diff --git a/net/bluetooth/rfcomm/core.c b/net/bluetooth/rfcomm/core.c
index 5759bb7054f7..5ba3f6df665c 100644
--- a/net/bluetooth/rfcomm/core.c
+++ b/net/bluetooth/rfcomm/core.c
@@ -62,7 +62,6 @@ static DEFINE_MUTEX(rfcomm_mutex);
62#define rfcomm_lock() mutex_lock(&rfcomm_mutex) 62#define rfcomm_lock() mutex_lock(&rfcomm_mutex)
63#define rfcomm_unlock() mutex_unlock(&rfcomm_mutex) 63#define rfcomm_unlock() mutex_unlock(&rfcomm_mutex)
64 64
65static unsigned long rfcomm_event;
66 65
67static LIST_HEAD(session_list); 66static LIST_HEAD(session_list);
68 67
@@ -120,7 +119,6 @@ static inline void rfcomm_schedule(void)
120{ 119{
121 if (!rfcomm_thread) 120 if (!rfcomm_thread)
122 return; 121 return;
123 set_bit(RFCOMM_SCHED_WAKEUP, &rfcomm_event);
124 wake_up_process(rfcomm_thread); 122 wake_up_process(rfcomm_thread);
125} 123}
126 124
@@ -2038,19 +2036,18 @@ static int rfcomm_run(void *unused)
2038 2036
2039 rfcomm_add_listener(BDADDR_ANY); 2037 rfcomm_add_listener(BDADDR_ANY);
2040 2038
2041 while (!kthread_should_stop()) { 2039 while (1) {
2042 set_current_state(TASK_INTERRUPTIBLE); 2040 set_current_state(TASK_INTERRUPTIBLE);
2043 if (!test_bit(RFCOMM_SCHED_WAKEUP, &rfcomm_event)) { 2041
2044 /* No pending events. Let's sleep. 2042 if (kthread_should_stop())
2045 * Incoming connections and data will wake us up. */ 2043 break;
2046 schedule();
2047 }
2048 set_current_state(TASK_RUNNING);
2049 2044
2050 /* Process stuff */ 2045 /* Process stuff */
2051 clear_bit(RFCOMM_SCHED_WAKEUP, &rfcomm_event);
2052 rfcomm_process_sessions(); 2046 rfcomm_process_sessions();
2047
2048 schedule();
2053 } 2049 }
2050 __set_current_state(TASK_RUNNING);
2054 2051
2055 rfcomm_kill_listener(); 2052 rfcomm_kill_listener();
2056 2053
diff --git a/net/bluetooth/rfcomm/sock.c b/net/bluetooth/rfcomm/sock.c
index 8f01e6b11a70..482722bbc7a0 100644
--- a/net/bluetooth/rfcomm/sock.c
+++ b/net/bluetooth/rfcomm/sock.c
@@ -485,11 +485,6 @@ static int rfcomm_sock_accept(struct socket *sock, struct socket *newsock, int f
485 485
486 lock_sock(sk); 486 lock_sock(sk);
487 487
488 if (sk->sk_state != BT_LISTEN) {
489 err = -EBADFD;
490 goto done;
491 }
492
493 if (sk->sk_type != SOCK_STREAM) { 488 if (sk->sk_type != SOCK_STREAM) {
494 err = -EINVAL; 489 err = -EINVAL;
495 goto done; 490 goto done;
@@ -501,19 +496,20 @@ static int rfcomm_sock_accept(struct socket *sock, struct socket *newsock, int f
501 496
502 /* Wait for an incoming connection. (wake-one). */ 497 /* Wait for an incoming connection. (wake-one). */
503 add_wait_queue_exclusive(sk_sleep(sk), &wait); 498 add_wait_queue_exclusive(sk_sleep(sk), &wait);
504 while (!(nsk = bt_accept_dequeue(sk, newsock))) { 499 while (1) {
505 set_current_state(TASK_INTERRUPTIBLE); 500 set_current_state(TASK_INTERRUPTIBLE);
506 if (!timeo) { 501
507 err = -EAGAIN; 502 if (sk->sk_state != BT_LISTEN) {
503 err = -EBADFD;
508 break; 504 break;
509 } 505 }
510 506
511 release_sock(sk); 507 nsk = bt_accept_dequeue(sk, newsock);
512 timeo = schedule_timeout(timeo); 508 if (nsk)
513 lock_sock(sk); 509 break;
514 510
515 if (sk->sk_state != BT_LISTEN) { 511 if (!timeo) {
516 err = -EBADFD; 512 err = -EAGAIN;
517 break; 513 break;
518 } 514 }
519 515
@@ -521,8 +517,12 @@ static int rfcomm_sock_accept(struct socket *sock, struct socket *newsock, int f
521 err = sock_intr_errno(timeo); 517 err = sock_intr_errno(timeo);
522 break; 518 break;
523 } 519 }
520
521 release_sock(sk);
522 timeo = schedule_timeout(timeo);
523 lock_sock(sk);
524 } 524 }
525 set_current_state(TASK_RUNNING); 525 __set_current_state(TASK_RUNNING);
526 remove_wait_queue(sk_sleep(sk), &wait); 526 remove_wait_queue(sk_sleep(sk), &wait);
527 527
528 if (err) 528 if (err)
diff --git a/net/bluetooth/sco.c b/net/bluetooth/sco.c
index 4c3621b5e0aa..8270f05e3f1f 100644
--- a/net/bluetooth/sco.c
+++ b/net/bluetooth/sco.c
@@ -564,30 +564,26 @@ static int sco_sock_accept(struct socket *sock, struct socket *newsock, int flag
564 564
565 lock_sock(sk); 565 lock_sock(sk);
566 566
567 if (sk->sk_state != BT_LISTEN) {
568 err = -EBADFD;
569 goto done;
570 }
571
572 timeo = sock_rcvtimeo(sk, flags & O_NONBLOCK); 567 timeo = sock_rcvtimeo(sk, flags & O_NONBLOCK);
573 568
574 BT_DBG("sk %p timeo %ld", sk, timeo); 569 BT_DBG("sk %p timeo %ld", sk, timeo);
575 570
576 /* Wait for an incoming connection. (wake-one). */ 571 /* Wait for an incoming connection. (wake-one). */
577 add_wait_queue_exclusive(sk_sleep(sk), &wait); 572 add_wait_queue_exclusive(sk_sleep(sk), &wait);
578 while (!(ch = bt_accept_dequeue(sk, newsock))) { 573 while (1) {
579 set_current_state(TASK_INTERRUPTIBLE); 574 set_current_state(TASK_INTERRUPTIBLE);
580 if (!timeo) { 575
581 err = -EAGAIN; 576 if (sk->sk_state != BT_LISTEN) {
577 err = -EBADFD;
582 break; 578 break;
583 } 579 }
584 580
585 release_sock(sk); 581 ch = bt_accept_dequeue(sk, newsock);
586 timeo = schedule_timeout(timeo); 582 if (ch)
587 lock_sock(sk); 583 break;
588 584
589 if (sk->sk_state != BT_LISTEN) { 585 if (!timeo) {
590 err = -EBADFD; 586 err = -EAGAIN;
591 break; 587 break;
592 } 588 }
593 589
@@ -595,8 +591,12 @@ static int sco_sock_accept(struct socket *sock, struct socket *newsock, int flag
595 err = sock_intr_errno(timeo); 591 err = sock_intr_errno(timeo);
596 break; 592 break;
597 } 593 }
594
595 release_sock(sk);
596 timeo = schedule_timeout(timeo);
597 lock_sock(sk);
598 } 598 }
599 set_current_state(TASK_RUNNING); 599 __set_current_state(TASK_RUNNING);
600 remove_wait_queue(sk_sleep(sk), &wait); 600 remove_wait_queue(sk_sleep(sk), &wait);
601 601
602 if (err) 602 if (err)
diff --git a/net/mac80211/agg-rx.c b/net/mac80211/agg-rx.c
index fd1aaf2a4a6c..e6cab51dceb0 100644
--- a/net/mac80211/agg-rx.c
+++ b/net/mac80211/agg-rx.c
@@ -167,12 +167,8 @@ static void ieee80211_send_addba_resp(struct ieee80211_sub_if_data *sdata, u8 *d
167 u16 capab; 167 u16 capab;
168 168
169 skb = dev_alloc_skb(sizeof(*mgmt) + local->hw.extra_tx_headroom); 169 skb = dev_alloc_skb(sizeof(*mgmt) + local->hw.extra_tx_headroom);
170 170 if (!skb)
171 if (!skb) {
172 printk(KERN_DEBUG "%s: failed to allocate buffer "
173 "for addba resp frame\n", sdata->name);
174 return; 171 return;
175 }
176 172
177 skb_reserve(skb, local->hw.extra_tx_headroom); 173 skb_reserve(skb, local->hw.extra_tx_headroom);
178 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24); 174 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24);
@@ -279,14 +275,8 @@ void ieee80211_process_addba_request(struct ieee80211_local *local,
279 275
280 /* prepare A-MPDU MLME for Rx aggregation */ 276 /* prepare A-MPDU MLME for Rx aggregation */
281 tid_agg_rx = kmalloc(sizeof(struct tid_ampdu_rx), GFP_KERNEL); 277 tid_agg_rx = kmalloc(sizeof(struct tid_ampdu_rx), GFP_KERNEL);
282 if (!tid_agg_rx) { 278 if (!tid_agg_rx)
283#ifdef CONFIG_MAC80211_HT_DEBUG
284 if (net_ratelimit())
285 printk(KERN_ERR "allocate rx mlme to tid %d failed\n",
286 tid);
287#endif
288 goto end; 279 goto end;
289 }
290 280
291 spin_lock_init(&tid_agg_rx->reorder_lock); 281 spin_lock_init(&tid_agg_rx->reorder_lock);
292 282
@@ -306,11 +296,6 @@ void ieee80211_process_addba_request(struct ieee80211_local *local,
306 tid_agg_rx->reorder_time = 296 tid_agg_rx->reorder_time =
307 kcalloc(buf_size, sizeof(unsigned long), GFP_KERNEL); 297 kcalloc(buf_size, sizeof(unsigned long), GFP_KERNEL);
308 if (!tid_agg_rx->reorder_buf || !tid_agg_rx->reorder_time) { 298 if (!tid_agg_rx->reorder_buf || !tid_agg_rx->reorder_time) {
309#ifdef CONFIG_MAC80211_HT_DEBUG
310 if (net_ratelimit())
311 printk(KERN_ERR "can not allocate reordering buffer "
312 "to tid %d\n", tid);
313#endif
314 kfree(tid_agg_rx->reorder_buf); 299 kfree(tid_agg_rx->reorder_buf);
315 kfree(tid_agg_rx->reorder_time); 300 kfree(tid_agg_rx->reorder_time);
316 kfree(tid_agg_rx); 301 kfree(tid_agg_rx);
diff --git a/net/mac80211/agg-tx.c b/net/mac80211/agg-tx.c
index 018108d1a2fd..3cef5a7281cb 100644
--- a/net/mac80211/agg-tx.c
+++ b/net/mac80211/agg-tx.c
@@ -68,11 +68,9 @@ static void ieee80211_send_addba_request(struct ieee80211_sub_if_data *sdata,
68 68
69 skb = dev_alloc_skb(sizeof(*mgmt) + local->hw.extra_tx_headroom); 69 skb = dev_alloc_skb(sizeof(*mgmt) + local->hw.extra_tx_headroom);
70 70
71 if (!skb) { 71 if (!skb)
72 printk(KERN_ERR "%s: failed to allocate buffer "
73 "for addba request frame\n", sdata->name);
74 return; 72 return;
75 } 73
76 skb_reserve(skb, local->hw.extra_tx_headroom); 74 skb_reserve(skb, local->hw.extra_tx_headroom);
77 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24); 75 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24);
78 memset(mgmt, 0, 24); 76 memset(mgmt, 0, 24);
@@ -106,19 +104,18 @@ static void ieee80211_send_addba_request(struct ieee80211_sub_if_data *sdata,
106 ieee80211_tx_skb(sdata, skb); 104 ieee80211_tx_skb(sdata, skb);
107} 105}
108 106
109void ieee80211_send_bar(struct ieee80211_sub_if_data *sdata, u8 *ra, u16 tid, u16 ssn) 107void ieee80211_send_bar(struct ieee80211_vif *vif, u8 *ra, u16 tid, u16 ssn)
110{ 108{
109 struct ieee80211_sub_if_data *sdata = vif_to_sdata(vif);
111 struct ieee80211_local *local = sdata->local; 110 struct ieee80211_local *local = sdata->local;
112 struct sk_buff *skb; 111 struct sk_buff *skb;
113 struct ieee80211_bar *bar; 112 struct ieee80211_bar *bar;
114 u16 bar_control = 0; 113 u16 bar_control = 0;
115 114
116 skb = dev_alloc_skb(sizeof(*bar) + local->hw.extra_tx_headroom); 115 skb = dev_alloc_skb(sizeof(*bar) + local->hw.extra_tx_headroom);
117 if (!skb) { 116 if (!skb)
118 printk(KERN_ERR "%s: failed to allocate buffer for "
119 "bar frame\n", sdata->name);
120 return; 117 return;
121 } 118
122 skb_reserve(skb, local->hw.extra_tx_headroom); 119 skb_reserve(skb, local->hw.extra_tx_headroom);
123 bar = (struct ieee80211_bar *)skb_put(skb, sizeof(*bar)); 120 bar = (struct ieee80211_bar *)skb_put(skb, sizeof(*bar));
124 memset(bar, 0, sizeof(*bar)); 121 memset(bar, 0, sizeof(*bar));
@@ -135,6 +132,7 @@ void ieee80211_send_bar(struct ieee80211_sub_if_data *sdata, u8 *ra, u16 tid, u1
135 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT; 132 IEEE80211_SKB_CB(skb)->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT;
136 ieee80211_tx_skb(sdata, skb); 133 ieee80211_tx_skb(sdata, skb);
137} 134}
135EXPORT_SYMBOL(ieee80211_send_bar);
138 136
139void ieee80211_assign_tid_tx(struct sta_info *sta, int tid, 137void ieee80211_assign_tid_tx(struct sta_info *sta, int tid,
140 struct tid_ampdu_tx *tid_tx) 138 struct tid_ampdu_tx *tid_tx)
@@ -364,7 +362,8 @@ int ieee80211_start_tx_ba_session(struct ieee80211_sta *pubsta, u16 tid,
364 return -EINVAL; 362 return -EINVAL;
365 363
366 if ((tid >= STA_TID_NUM) || 364 if ((tid >= STA_TID_NUM) ||
367 !(local->hw.flags & IEEE80211_HW_AMPDU_AGGREGATION)) 365 !(local->hw.flags & IEEE80211_HW_AMPDU_AGGREGATION) ||
366 (local->hw.flags & IEEE80211_HW_TX_AMPDU_SETUP_IN_HW))
368 return -EINVAL; 367 return -EINVAL;
369 368
370#ifdef CONFIG_MAC80211_HT_DEBUG 369#ifdef CONFIG_MAC80211_HT_DEBUG
@@ -413,11 +412,6 @@ int ieee80211_start_tx_ba_session(struct ieee80211_sta *pubsta, u16 tid,
413 /* prepare A-MPDU MLME for Tx aggregation */ 412 /* prepare A-MPDU MLME for Tx aggregation */
414 tid_tx = kzalloc(sizeof(struct tid_ampdu_tx), GFP_ATOMIC); 413 tid_tx = kzalloc(sizeof(struct tid_ampdu_tx), GFP_ATOMIC);
415 if (!tid_tx) { 414 if (!tid_tx) {
416#ifdef CONFIG_MAC80211_HT_DEBUG
417 if (net_ratelimit())
418 printk(KERN_ERR "allocate tx mlme to tid %d failed\n",
419 tid);
420#endif
421 ret = -ENOMEM; 415 ret = -ENOMEM;
422 goto err_unlock_sta; 416 goto err_unlock_sta;
423 } 417 }
@@ -574,14 +568,9 @@ void ieee80211_start_tx_ba_cb_irqsafe(struct ieee80211_vif *vif,
574 struct ieee80211_ra_tid *ra_tid; 568 struct ieee80211_ra_tid *ra_tid;
575 struct sk_buff *skb = dev_alloc_skb(0); 569 struct sk_buff *skb = dev_alloc_skb(0);
576 570
577 if (unlikely(!skb)) { 571 if (unlikely(!skb))
578#ifdef CONFIG_MAC80211_HT_DEBUG
579 if (net_ratelimit())
580 printk(KERN_WARNING "%s: Not enough memory, "
581 "dropping start BA session", sdata->name);
582#endif
583 return; 572 return;
584 } 573
585 ra_tid = (struct ieee80211_ra_tid *) &skb->cb; 574 ra_tid = (struct ieee80211_ra_tid *) &skb->cb;
586 memcpy(&ra_tid->ra, ra, ETH_ALEN); 575 memcpy(&ra_tid->ra, ra, ETH_ALEN);
587 ra_tid->tid = tid; 576 ra_tid->tid = tid;
@@ -727,14 +716,9 @@ void ieee80211_stop_tx_ba_cb_irqsafe(struct ieee80211_vif *vif,
727 struct ieee80211_ra_tid *ra_tid; 716 struct ieee80211_ra_tid *ra_tid;
728 struct sk_buff *skb = dev_alloc_skb(0); 717 struct sk_buff *skb = dev_alloc_skb(0);
729 718
730 if (unlikely(!skb)) { 719 if (unlikely(!skb))
731#ifdef CONFIG_MAC80211_HT_DEBUG
732 if (net_ratelimit())
733 printk(KERN_WARNING "%s: Not enough memory, "
734 "dropping stop BA session", sdata->name);
735#endif
736 return; 720 return;
737 } 721
738 ra_tid = (struct ieee80211_ra_tid *) &skb->cb; 722 ra_tid = (struct ieee80211_ra_tid *) &skb->cb;
739 memcpy(&ra_tid->ra, ra, ETH_ALEN); 723 memcpy(&ra_tid->ra, ra, ETH_ALEN);
740 ra_tid->tid = tid; 724 ra_tid->tid = tid;
diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c
index 0baaaecf4558..b57ddf941e59 100644
--- a/net/mac80211/cfg.c
+++ b/net/mac80211/cfg.c
@@ -455,6 +455,20 @@ static int ieee80211_get_station(struct wiphy *wiphy, struct net_device *dev,
455 return ret; 455 return ret;
456} 456}
457 457
458static void ieee80211_config_ap_ssid(struct ieee80211_sub_if_data *sdata,
459 struct beacon_parameters *params)
460{
461 struct ieee80211_bss_conf *bss_conf = &sdata->vif.bss_conf;
462
463 bss_conf->ssid_len = params->ssid_len;
464
465 if (params->ssid_len)
466 memcpy(bss_conf->ssid, params->ssid, params->ssid_len);
467
468 bss_conf->hidden_ssid =
469 (params->hidden_ssid != NL80211_HIDDEN_SSID_NOT_IN_USE);
470}
471
458/* 472/*
459 * This handles both adding a beacon and setting new beacon info 473 * This handles both adding a beacon and setting new beacon info
460 */ 474 */
@@ -548,8 +562,11 @@ static int ieee80211_config_beacon(struct ieee80211_sub_if_data *sdata,
548 562
549 kfree(old); 563 kfree(old);
550 564
565 ieee80211_config_ap_ssid(sdata, params);
566
551 ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_BEACON_ENABLED | 567 ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_BEACON_ENABLED |
552 BSS_CHANGED_BEACON); 568 BSS_CHANGED_BEACON |
569 BSS_CHANGED_SSID);
553 return 0; 570 return 0;
554} 571}
555 572
@@ -921,7 +938,7 @@ static int ieee80211_del_mpath(struct wiphy *wiphy, struct net_device *dev,
921 if (dst) 938 if (dst)
922 return mesh_path_del(dst, sdata); 939 return mesh_path_del(dst, sdata);
923 940
924 mesh_path_flush(sdata); 941 mesh_path_flush_by_iface(sdata);
925 return 0; 942 return 0;
926} 943}
927 944
diff --git a/net/mac80211/debugfs.c b/net/mac80211/debugfs.c
index 267ed45ef6a2..c9141168fd43 100644
--- a/net/mac80211/debugfs.c
+++ b/net/mac80211/debugfs.c
@@ -297,6 +297,9 @@ static ssize_t hwflags_read(struct file *file, char __user *user_buf,
297 char *buf = kzalloc(mxln, GFP_KERNEL); 297 char *buf = kzalloc(mxln, GFP_KERNEL);
298 int sf = 0; /* how many written so far */ 298 int sf = 0; /* how many written so far */
299 299
300 if (!buf)
301 return 0;
302
300 sf += snprintf(buf, mxln - sf, "0x%x\n", local->hw.flags); 303 sf += snprintf(buf, mxln - sf, "0x%x\n", local->hw.flags);
301 if (local->hw.flags & IEEE80211_HW_HAS_RATE_CONTROL) 304 if (local->hw.flags & IEEE80211_HW_HAS_RATE_CONTROL)
302 sf += snprintf(buf + sf, mxln - sf, "HAS_RATE_CONTROL\n"); 305 sf += snprintf(buf + sf, mxln - sf, "HAS_RATE_CONTROL\n");
@@ -347,6 +350,8 @@ static ssize_t hwflags_read(struct file *file, char __user *user_buf,
347 sf += snprintf(buf + sf, mxln - sf, "SUPPORTS_PER_STA_GTK\n"); 350 sf += snprintf(buf + sf, mxln - sf, "SUPPORTS_PER_STA_GTK\n");
348 if (local->hw.flags & IEEE80211_HW_AP_LINK_PS) 351 if (local->hw.flags & IEEE80211_HW_AP_LINK_PS)
349 sf += snprintf(buf + sf, mxln - sf, "AP_LINK_PS\n"); 352 sf += snprintf(buf + sf, mxln - sf, "AP_LINK_PS\n");
353 if (local->hw.flags & IEEE80211_HW_TX_AMPDU_SETUP_IN_HW)
354 sf += snprintf(buf + sf, mxln - sf, "TX_AMPDU_SETUP_IN_HW\n");
350 355
351 rv = simple_read_from_buffer(user_buf, count, ppos, buf, strlen(buf)); 356 rv = simple_read_from_buffer(user_buf, count, ppos, buf, strlen(buf));
352 kfree(buf); 357 kfree(buf);
diff --git a/net/mac80211/debugfs_netdev.c b/net/mac80211/debugfs_netdev.c
index 6e8eab7919e2..dd0462917518 100644
--- a/net/mac80211/debugfs_netdev.c
+++ b/net/mac80211/debugfs_netdev.c
@@ -340,6 +340,8 @@ IEEE80211_IF_FILE(fwded_mcast, u.mesh.mshstats.fwded_mcast, DEC);
340IEEE80211_IF_FILE(fwded_unicast, u.mesh.mshstats.fwded_unicast, DEC); 340IEEE80211_IF_FILE(fwded_unicast, u.mesh.mshstats.fwded_unicast, DEC);
341IEEE80211_IF_FILE(fwded_frames, u.mesh.mshstats.fwded_frames, DEC); 341IEEE80211_IF_FILE(fwded_frames, u.mesh.mshstats.fwded_frames, DEC);
342IEEE80211_IF_FILE(dropped_frames_ttl, u.mesh.mshstats.dropped_frames_ttl, DEC); 342IEEE80211_IF_FILE(dropped_frames_ttl, u.mesh.mshstats.dropped_frames_ttl, DEC);
343IEEE80211_IF_FILE(dropped_frames_congestion,
344 u.mesh.mshstats.dropped_frames_congestion, DEC);
343IEEE80211_IF_FILE(dropped_frames_no_route, 345IEEE80211_IF_FILE(dropped_frames_no_route,
344 u.mesh.mshstats.dropped_frames_no_route, DEC); 346 u.mesh.mshstats.dropped_frames_no_route, DEC);
345IEEE80211_IF_FILE(estab_plinks, u.mesh.mshstats.estab_plinks, ATOMIC); 347IEEE80211_IF_FILE(estab_plinks, u.mesh.mshstats.estab_plinks, ATOMIC);
@@ -463,6 +465,7 @@ static void add_mesh_stats(struct ieee80211_sub_if_data *sdata)
463 MESHSTATS_ADD(fwded_frames); 465 MESHSTATS_ADD(fwded_frames);
464 MESHSTATS_ADD(dropped_frames_ttl); 466 MESHSTATS_ADD(dropped_frames_ttl);
465 MESHSTATS_ADD(dropped_frames_no_route); 467 MESHSTATS_ADD(dropped_frames_no_route);
468 MESHSTATS_ADD(dropped_frames_congestion);
466 MESHSTATS_ADD(estab_plinks); 469 MESHSTATS_ADD(estab_plinks);
467#undef MESHSTATS_ADD 470#undef MESHSTATS_ADD
468} 471}
diff --git a/net/mac80211/ht.c b/net/mac80211/ht.c
index 7cfc286946c0..2b9b52c69569 100644
--- a/net/mac80211/ht.c
+++ b/net/mac80211/ht.c
@@ -186,12 +186,8 @@ void ieee80211_send_delba(struct ieee80211_sub_if_data *sdata,
186 u16 params; 186 u16 params;
187 187
188 skb = dev_alloc_skb(sizeof(*mgmt) + local->hw.extra_tx_headroom); 188 skb = dev_alloc_skb(sizeof(*mgmt) + local->hw.extra_tx_headroom);
189 189 if (!skb)
190 if (!skb) {
191 printk(KERN_ERR "%s: failed to allocate buffer "
192 "for delba frame\n", sdata->name);
193 return; 190 return;
194 }
195 191
196 skb_reserve(skb, local->hw.extra_tx_headroom); 192 skb_reserve(skb, local->hw.extra_tx_headroom);
197 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24); 193 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24);
diff --git a/net/mac80211/ibss.c b/net/mac80211/ibss.c
index 56c24cabf26d..836b2752ecd6 100644
--- a/net/mac80211/ibss.c
+++ b/net/mac80211/ibss.c
@@ -417,7 +417,7 @@ static void ieee80211_rx_bss_info(struct ieee80211_sub_if_data *sdata,
417 * must be callable in atomic context. 417 * must be callable in atomic context.
418 */ 418 */
419struct sta_info *ieee80211_ibss_add_sta(struct ieee80211_sub_if_data *sdata, 419struct sta_info *ieee80211_ibss_add_sta(struct ieee80211_sub_if_data *sdata,
420 u8 *bssid,u8 *addr, u32 supp_rates, 420 u8 *bssid, u8 *addr, u32 supp_rates,
421 gfp_t gfp) 421 gfp_t gfp)
422{ 422{
423 struct ieee80211_if_ibss *ifibss = &sdata->u.ibss; 423 struct ieee80211_if_ibss *ifibss = &sdata->u.ibss;
diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h
index c204cee1189c..21186e280ceb 100644
--- a/net/mac80211/ieee80211_i.h
+++ b/net/mac80211/ieee80211_i.h
@@ -261,6 +261,7 @@ struct mesh_stats {
261 __u32 fwded_frames; /* Mesh total forwarded frames */ 261 __u32 fwded_frames; /* Mesh total forwarded frames */
262 __u32 dropped_frames_ttl; /* Not transmitted since mesh_ttl == 0*/ 262 __u32 dropped_frames_ttl; /* Not transmitted since mesh_ttl == 0*/
263 __u32 dropped_frames_no_route; /* Not transmitted, no route found */ 263 __u32 dropped_frames_no_route; /* Not transmitted, no route found */
264 __u32 dropped_frames_congestion;/* Not forwarded due to congestion */
264 atomic_t estab_plinks; 265 atomic_t estab_plinks;
265}; 266};
266 267
@@ -670,6 +671,7 @@ enum queue_stop_reason {
670 IEEE80211_QUEUE_STOP_REASON_AGGREGATION, 671 IEEE80211_QUEUE_STOP_REASON_AGGREGATION,
671 IEEE80211_QUEUE_STOP_REASON_SUSPEND, 672 IEEE80211_QUEUE_STOP_REASON_SUSPEND,
672 IEEE80211_QUEUE_STOP_REASON_SKB_ADD, 673 IEEE80211_QUEUE_STOP_REASON_SKB_ADD,
674 IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE,
673}; 675};
674 676
675#ifdef CONFIG_MAC80211_LEDS 677#ifdef CONFIG_MAC80211_LEDS
@@ -1186,7 +1188,6 @@ struct ieee80211_tx_status_rtap_hdr {
1186void ieee80211_ht_cap_ie_to_sta_ht_cap(struct ieee80211_supported_band *sband, 1188void ieee80211_ht_cap_ie_to_sta_ht_cap(struct ieee80211_supported_band *sband,
1187 struct ieee80211_ht_cap *ht_cap_ie, 1189 struct ieee80211_ht_cap *ht_cap_ie,
1188 struct ieee80211_sta_ht_cap *ht_cap); 1190 struct ieee80211_sta_ht_cap *ht_cap);
1189void ieee80211_send_bar(struct ieee80211_sub_if_data *sdata, u8 *ra, u16 tid, u16 ssn);
1190void ieee80211_send_delba(struct ieee80211_sub_if_data *sdata, 1191void ieee80211_send_delba(struct ieee80211_sub_if_data *sdata,
1191 const u8 *da, u16 tid, 1192 const u8 *da, u16 tid,
1192 u16 initiator, u16 reason_code); 1193 u16 initiator, u16 reason_code);
diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c
index 556e7e6ddf0a..4116a7542b6b 100644
--- a/net/mac80211/iface.c
+++ b/net/mac80211/iface.c
@@ -460,17 +460,15 @@ static void ieee80211_do_stop(struct ieee80211_sub_if_data *sdata,
460 synchronize_rcu(); 460 synchronize_rcu();
461 kfree(old_beacon); 461 kfree(old_beacon);
462 462
463 /* free all potentially still buffered bcast frames */
464 while ((skb = skb_dequeue(&sdata->u.ap.ps_bc_buf))) {
465 local->total_ps_buffered--;
466 dev_kfree_skb(skb);
467 }
468
469 /* down all dependent devices, that is VLANs */ 463 /* down all dependent devices, that is VLANs */
470 list_for_each_entry_safe(vlan, tmpsdata, &sdata->u.ap.vlans, 464 list_for_each_entry_safe(vlan, tmpsdata, &sdata->u.ap.vlans,
471 u.vlan.list) 465 u.vlan.list)
472 dev_close(vlan->dev); 466 dev_close(vlan->dev);
473 WARN_ON(!list_empty(&sdata->u.ap.vlans)); 467 WARN_ON(!list_empty(&sdata->u.ap.vlans));
468
469 /* free all potentially still buffered bcast frames */
470 local->total_ps_buffered -= skb_queue_len(&sdata->u.ap.ps_bc_buf);
471 skb_queue_purge(&sdata->u.ap.ps_bc_buf);
474 } 472 }
475 473
476 if (going_down) 474 if (going_down)
@@ -1214,6 +1212,9 @@ void ieee80211_if_remove(struct ieee80211_sub_if_data *sdata)
1214 list_del_rcu(&sdata->list); 1212 list_del_rcu(&sdata->list);
1215 mutex_unlock(&sdata->local->iflist_mtx); 1213 mutex_unlock(&sdata->local->iflist_mtx);
1216 1214
1215 if (ieee80211_vif_is_mesh(&sdata->vif))
1216 mesh_path_flush_by_iface(sdata);
1217
1217 synchronize_rcu(); 1218 synchronize_rcu();
1218 unregister_netdevice(sdata->dev); 1219 unregister_netdevice(sdata->dev);
1219} 1220}
@@ -1233,6 +1234,9 @@ void ieee80211_remove_interfaces(struct ieee80211_local *local)
1233 list_for_each_entry_safe(sdata, tmp, &local->interfaces, list) { 1234 list_for_each_entry_safe(sdata, tmp, &local->interfaces, list) {
1234 list_del(&sdata->list); 1235 list_del(&sdata->list);
1235 1236
1237 if (ieee80211_vif_is_mesh(&sdata->vif))
1238 mesh_path_flush_by_iface(sdata);
1239
1236 unregister_netdevice_queue(sdata->dev, &unreg_list); 1240 unregister_netdevice_queue(sdata->dev, &unreg_list);
1237 } 1241 }
1238 mutex_unlock(&local->iflist_mtx); 1242 mutex_unlock(&local->iflist_mtx);
diff --git a/net/mac80211/main.c b/net/mac80211/main.c
index 104fdd9862bd..a5809a1a6239 100644
--- a/net/mac80211/main.c
+++ b/net/mac80211/main.c
@@ -1013,7 +1013,6 @@ void ieee80211_unregister_hw(struct ieee80211_hw *hw)
1013 cancel_work_sync(&local->reconfig_filter); 1013 cancel_work_sync(&local->reconfig_filter);
1014 1014
1015 ieee80211_clear_tx_pending(local); 1015 ieee80211_clear_tx_pending(local);
1016 sta_info_stop(local);
1017 rate_control_deinitialize(local); 1016 rate_control_deinitialize(local);
1018 1017
1019 if (skb_queue_len(&local->skb_queue) || 1018 if (skb_queue_len(&local->skb_queue) ||
@@ -1025,6 +1024,7 @@ void ieee80211_unregister_hw(struct ieee80211_hw *hw)
1025 1024
1026 destroy_workqueue(local->workqueue); 1025 destroy_workqueue(local->workqueue);
1027 wiphy_unregister(local->hw.wiphy); 1026 wiphy_unregister(local->hw.wiphy);
1027 sta_info_stop(local);
1028 ieee80211_wep_free(local); 1028 ieee80211_wep_free(local);
1029 ieee80211_led_exit(local); 1029 ieee80211_led_exit(local);
1030 kfree(local->int_scan_req); 1030 kfree(local->int_scan_req);
diff --git a/net/mac80211/mesh.c b/net/mac80211/mesh.c
index 28ab510e621a..a4225ae69681 100644
--- a/net/mac80211/mesh.c
+++ b/net/mac80211/mesh.c
@@ -200,10 +200,9 @@ int mesh_rmc_check(u8 *sa, struct ieee80211s_hdr *mesh_hdr,
200 } 200 }
201 201
202 p = kmem_cache_alloc(rm_cache, GFP_ATOMIC); 202 p = kmem_cache_alloc(rm_cache, GFP_ATOMIC);
203 if (!p) { 203 if (!p)
204 printk(KERN_DEBUG "o11s: could not allocate RMC entry\n");
205 return 0; 204 return 0;
206 } 205
207 p->seqnum = seqnum; 206 p->seqnum = seqnum;
208 p->exp_time = jiffies + RMC_TIMEOUT; 207 p->exp_time = jiffies + RMC_TIMEOUT;
209 memcpy(p->sa, sa, ETH_ALEN); 208 memcpy(p->sa, sa, ETH_ALEN);
@@ -464,8 +463,7 @@ int ieee80211_fill_mesh_addresses(struct ieee80211_hdr *hdr, __le16 *fc,
464 memcpy(hdr->addr3, meshsa, ETH_ALEN); 463 memcpy(hdr->addr3, meshsa, ETH_ALEN);
465 return 24; 464 return 24;
466 } else { 465 } else {
467 *fc |= cpu_to_le16(IEEE80211_FCTL_FROMDS | 466 *fc |= cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS);
468 IEEE80211_FCTL_TODS);
469 /* RA TA DA SA */ 467 /* RA TA DA SA */
470 memset(hdr->addr1, 0, ETH_ALEN); /* RA is resolved later */ 468 memset(hdr->addr1, 0, ETH_ALEN); /* RA is resolved later */
471 memcpy(hdr->addr2, meshsa, ETH_ALEN); 469 memcpy(hdr->addr2, meshsa, ETH_ALEN);
diff --git a/net/mac80211/mesh.h b/net/mac80211/mesh.h
index 20272072171f..7118e8e8855c 100644
--- a/net/mac80211/mesh.h
+++ b/net/mac80211/mesh.h
@@ -80,7 +80,9 @@ enum mesh_deferred_task_flags {
80 * retry 80 * retry
81 * @discovery_retries: number of discovery retries 81 * @discovery_retries: number of discovery retries
82 * @flags: mesh path flags, as specified on &enum mesh_path_flags 82 * @flags: mesh path flags, as specified on &enum mesh_path_flags
83 * @state_lock: mesh path state lock 83 * @state_lock: mesh path state lock used to protect changes to the
84 * mpath itself. No need to take this lock when adding or removing
85 * an mpath to a hash bucket on a path table.
84 * @is_gate: the destination station of this path is a mesh gate 86 * @is_gate: the destination station of this path is a mesh gate
85 * 87 *
86 * 88 *
@@ -238,7 +240,6 @@ struct mesh_path *mesh_path_lookup_by_idx(int idx,
238 struct ieee80211_sub_if_data *sdata); 240 struct ieee80211_sub_if_data *sdata);
239void mesh_path_fix_nexthop(struct mesh_path *mpath, struct sta_info *next_hop); 241void mesh_path_fix_nexthop(struct mesh_path *mpath, struct sta_info *next_hop);
240void mesh_path_expire(struct ieee80211_sub_if_data *sdata); 242void mesh_path_expire(struct ieee80211_sub_if_data *sdata);
241void mesh_path_flush(struct ieee80211_sub_if_data *sdata);
242void mesh_rx_path_sel_frame(struct ieee80211_sub_if_data *sdata, 243void mesh_rx_path_sel_frame(struct ieee80211_sub_if_data *sdata,
243 struct ieee80211_mgmt *mgmt, size_t len); 244 struct ieee80211_mgmt *mgmt, size_t len);
244int mesh_path_add(u8 *dst, struct ieee80211_sub_if_data *sdata); 245int mesh_path_add(u8 *dst, struct ieee80211_sub_if_data *sdata);
@@ -275,6 +276,7 @@ void mesh_pathtbl_unregister(void);
275int mesh_path_del(u8 *addr, struct ieee80211_sub_if_data *sdata); 276int mesh_path_del(u8 *addr, struct ieee80211_sub_if_data *sdata);
276void mesh_path_timer(unsigned long data); 277void mesh_path_timer(unsigned long data);
277void mesh_path_flush_by_nexthop(struct sta_info *sta); 278void mesh_path_flush_by_nexthop(struct sta_info *sta);
279void mesh_path_flush_by_iface(struct ieee80211_sub_if_data *sdata);
278void mesh_path_discard_frame(struct sk_buff *skb, 280void mesh_path_discard_frame(struct sk_buff *skb,
279 struct ieee80211_sub_if_data *sdata); 281 struct ieee80211_sub_if_data *sdata);
280void mesh_path_quiesce(struct ieee80211_sub_if_data *sdata); 282void mesh_path_quiesce(struct ieee80211_sub_if_data *sdata);
diff --git a/net/mac80211/mesh_hwmp.c b/net/mac80211/mesh_hwmp.c
index fd4f76a3e139..6df7913d7ca4 100644
--- a/net/mac80211/mesh_hwmp.c
+++ b/net/mac80211/mesh_hwmp.c
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include <linux/slab.h> 10#include <linux/slab.h>
11#include "wme.h"
11#include "mesh.h" 12#include "mesh.h"
12 13
13#ifdef CONFIG_MAC80211_VERBOSE_MHWMP_DEBUG 14#ifdef CONFIG_MAC80211_VERBOSE_MHWMP_DEBUG
@@ -202,6 +203,26 @@ static int mesh_path_sel_frame_tx(enum mpath_frame_type action, u8 flags,
202 return 0; 203 return 0;
203} 204}
204 205
206
207/* Headroom is not adjusted. Caller should ensure that skb has sufficient
208 * headroom in case the frame is encrypted. */
209static void prepare_frame_for_deferred_tx(struct ieee80211_sub_if_data *sdata,
210 struct sk_buff *skb)
211{
212 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
213
214 skb_set_mac_header(skb, 0);
215 skb_set_network_header(skb, 0);
216 skb_set_transport_header(skb, 0);
217
218 /* Send all internal mgmt frames on VO. Accordingly set TID to 7. */
219 skb_set_queue_mapping(skb, IEEE80211_AC_VO);
220 skb->priority = 7;
221
222 info->control.vif = &sdata->vif;
223 ieee80211_set_qos_hdr(sdata, skb);
224}
225
205/** 226/**
206 * mesh_send_path error - Sends a PERR mesh management frame 227 * mesh_send_path error - Sends a PERR mesh management frame
207 * 228 *
@@ -209,6 +230,10 @@ static int mesh_path_sel_frame_tx(enum mpath_frame_type action, u8 flags,
209 * @target_sn: SN of the broken destination 230 * @target_sn: SN of the broken destination
210 * @target_rcode: reason code for this PERR 231 * @target_rcode: reason code for this PERR
211 * @ra: node this frame is addressed to 232 * @ra: node this frame is addressed to
233 *
234 * Note: This function may be called with driver locks taken that the driver
235 * also acquires in the TX path. To avoid a deadlock we don't transmit the
236 * frame directly but add it to the pending queue instead.
212 */ 237 */
213int mesh_path_error_tx(u8 ttl, u8 *target, __le32 target_sn, 238int mesh_path_error_tx(u8 ttl, u8 *target, __le32 target_sn,
214 __le16 target_rcode, const u8 *ra, 239 __le16 target_rcode, const u8 *ra,
@@ -222,7 +247,7 @@ int mesh_path_error_tx(u8 ttl, u8 *target, __le32 target_sn,
222 247
223 if (!skb) 248 if (!skb)
224 return -1; 249 return -1;
225 skb_reserve(skb, local->hw.extra_tx_headroom); 250 skb_reserve(skb, local->tx_headroom + local->hw.extra_tx_headroom);
226 /* 25 is the size of the common mgmt part (24) plus the size of the 251 /* 25 is the size of the common mgmt part (24) plus the size of the
227 * common action part (1) 252 * common action part (1)
228 */ 253 */
@@ -263,7 +288,9 @@ int mesh_path_error_tx(u8 ttl, u8 *target, __le32 target_sn,
263 pos += 4; 288 pos += 4;
264 memcpy(pos, &target_rcode, 2); 289 memcpy(pos, &target_rcode, 2);
265 290
266 ieee80211_tx_skb(sdata, skb); 291 /* see note in function header */
292 prepare_frame_for_deferred_tx(sdata, skb);
293 ieee80211_add_pending_skb(local, skb);
267 return 0; 294 return 0;
268} 295}
269 296
diff --git a/net/mac80211/mesh_pathtbl.c b/net/mac80211/mesh_pathtbl.c
index ede4f5242e0b..332b5ff1e885 100644
--- a/net/mac80211/mesh_pathtbl.c
+++ b/net/mac80211/mesh_pathtbl.c
@@ -14,6 +14,7 @@
14#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <linux/string.h> 15#include <linux/string.h>
16#include <net/mac80211.h> 16#include <net/mac80211.h>
17#include "wme.h"
17#include "ieee80211_i.h" 18#include "ieee80211_i.h"
18#include "mesh.h" 19#include "mesh.h"
19 20
@@ -48,8 +49,10 @@ static struct mesh_table __rcu *mpp_paths; /* Store paths for MPP&MAP */
48int mesh_paths_generation; 49int mesh_paths_generation;
49 50
50/* This lock will have the grow table function as writer and add / delete nodes 51/* This lock will have the grow table function as writer and add / delete nodes
51 * as readers. When reading the table (i.e. doing lookups) we are well protected 52 * as readers. RCU provides sufficient protection only when reading the table
52 * by RCU 53 * (i.e. doing lookups). Adding or adding or removing nodes requires we take
54 * the read lock or we risk operating on an old table. The write lock is only
55 * needed when modifying the number of buckets a table.
53 */ 56 */
54static DEFINE_RWLOCK(pathtbl_resize_lock); 57static DEFINE_RWLOCK(pathtbl_resize_lock);
55 58
@@ -210,6 +213,7 @@ void mesh_path_assign_nexthop(struct mesh_path *mpath, struct sta_info *sta)
210 struct ieee80211_hdr *hdr; 213 struct ieee80211_hdr *hdr;
211 struct sk_buff_head tmpq; 214 struct sk_buff_head tmpq;
212 unsigned long flags; 215 unsigned long flags;
216 struct ieee80211_sub_if_data *sdata = mpath->sdata;
213 217
214 rcu_assign_pointer(mpath->next_hop, sta); 218 rcu_assign_pointer(mpath->next_hop, sta);
215 219
@@ -220,6 +224,8 @@ void mesh_path_assign_nexthop(struct mesh_path *mpath, struct sta_info *sta)
220 while ((skb = __skb_dequeue(&mpath->frame_queue)) != NULL) { 224 while ((skb = __skb_dequeue(&mpath->frame_queue)) != NULL) {
221 hdr = (struct ieee80211_hdr *) skb->data; 225 hdr = (struct ieee80211_hdr *) skb->data;
222 memcpy(hdr->addr1, sta->sta.addr, ETH_ALEN); 226 memcpy(hdr->addr1, sta->sta.addr, ETH_ALEN);
227 skb_set_queue_mapping(skb, ieee80211_select_queue(sdata, skb));
228 ieee80211_set_qos_hdr(sdata, skb);
223 __skb_queue_tail(&tmpq, skb); 229 __skb_queue_tail(&tmpq, skb);
224 } 230 }
225 231
@@ -333,25 +339,14 @@ static void mesh_path_move_to_queue(struct mesh_path *gate_mpath,
333} 339}
334 340
335 341
336/** 342static struct mesh_path *path_lookup(struct mesh_table *tbl, u8 *dst,
337 * mesh_path_lookup - look up a path in the mesh path table 343 struct ieee80211_sub_if_data *sdata)
338 * @dst: hardware address (ETH_ALEN length) of destination
339 * @sdata: local subif
340 *
341 * Returns: pointer to the mesh path structure, or NULL if not found
342 *
343 * Locking: must be called within a read rcu section.
344 */
345struct mesh_path *mesh_path_lookup(u8 *dst, struct ieee80211_sub_if_data *sdata)
346{ 344{
347 struct mesh_path *mpath; 345 struct mesh_path *mpath;
348 struct hlist_node *n; 346 struct hlist_node *n;
349 struct hlist_head *bucket; 347 struct hlist_head *bucket;
350 struct mesh_table *tbl;
351 struct mpath_node *node; 348 struct mpath_node *node;
352 349
353 tbl = rcu_dereference(mesh_paths);
354
355 bucket = &tbl->hash_buckets[mesh_table_hash(dst, sdata, tbl)]; 350 bucket = &tbl->hash_buckets[mesh_table_hash(dst, sdata, tbl)];
356 hlist_for_each_entry_rcu(node, n, bucket, list) { 351 hlist_for_each_entry_rcu(node, n, bucket, list) {
357 mpath = node->mpath; 352 mpath = node->mpath;
@@ -359,8 +354,7 @@ struct mesh_path *mesh_path_lookup(u8 *dst, struct ieee80211_sub_if_data *sdata)
359 memcmp(dst, mpath->dst, ETH_ALEN) == 0) { 354 memcmp(dst, mpath->dst, ETH_ALEN) == 0) {
360 if (MPATH_EXPIRED(mpath)) { 355 if (MPATH_EXPIRED(mpath)) {
361 spin_lock_bh(&mpath->state_lock); 356 spin_lock_bh(&mpath->state_lock);
362 if (MPATH_EXPIRED(mpath)) 357 mpath->flags &= ~MESH_PATH_ACTIVE;
363 mpath->flags &= ~MESH_PATH_ACTIVE;
364 spin_unlock_bh(&mpath->state_lock); 358 spin_unlock_bh(&mpath->state_lock);
365 } 359 }
366 return mpath; 360 return mpath;
@@ -369,31 +363,23 @@ struct mesh_path *mesh_path_lookup(u8 *dst, struct ieee80211_sub_if_data *sdata)
369 return NULL; 363 return NULL;
370} 364}
371 365
372struct mesh_path *mpp_path_lookup(u8 *dst, struct ieee80211_sub_if_data *sdata) 366/**
367 * mesh_path_lookup - look up a path in the mesh path table
368 * @dst: hardware address (ETH_ALEN length) of destination
369 * @sdata: local subif
370 *
371 * Returns: pointer to the mesh path structure, or NULL if not found
372 *
373 * Locking: must be called within a read rcu section.
374 */
375struct mesh_path *mesh_path_lookup(u8 *dst, struct ieee80211_sub_if_data *sdata)
373{ 376{
374 struct mesh_path *mpath; 377 return path_lookup(rcu_dereference(mesh_paths), dst, sdata);
375 struct hlist_node *n; 378}
376 struct hlist_head *bucket;
377 struct mesh_table *tbl;
378 struct mpath_node *node;
379
380 tbl = rcu_dereference(mpp_paths);
381 379
382 bucket = &tbl->hash_buckets[mesh_table_hash(dst, sdata, tbl)]; 380struct mesh_path *mpp_path_lookup(u8 *dst, struct ieee80211_sub_if_data *sdata)
383 hlist_for_each_entry_rcu(node, n, bucket, list) { 381{
384 mpath = node->mpath; 382 return path_lookup(rcu_dereference(mpp_paths), dst, sdata);
385 if (mpath->sdata == sdata &&
386 memcmp(dst, mpath->dst, ETH_ALEN) == 0) {
387 if (MPATH_EXPIRED(mpath)) {
388 spin_lock_bh(&mpath->state_lock);
389 if (MPATH_EXPIRED(mpath))
390 mpath->flags &= ~MESH_PATH_ACTIVE;
391 spin_unlock_bh(&mpath->state_lock);
392 }
393 return mpath;
394 }
395 }
396 return NULL;
397} 383}
398 384
399 385
@@ -420,8 +406,7 @@ struct mesh_path *mesh_path_lookup_by_idx(int idx, struct ieee80211_sub_if_data
420 if (j++ == idx) { 406 if (j++ == idx) {
421 if (MPATH_EXPIRED(node->mpath)) { 407 if (MPATH_EXPIRED(node->mpath)) {
422 spin_lock_bh(&node->mpath->state_lock); 408 spin_lock_bh(&node->mpath->state_lock);
423 if (MPATH_EXPIRED(node->mpath)) 409 node->mpath->flags &= ~MESH_PATH_ACTIVE;
424 node->mpath->flags &= ~MESH_PATH_ACTIVE;
425 spin_unlock_bh(&node->mpath->state_lock); 410 spin_unlock_bh(&node->mpath->state_lock);
426 } 411 }
427 return node->mpath; 412 return node->mpath;
@@ -776,22 +761,47 @@ void mesh_plink_broken(struct sta_info *sta)
776 tbl = rcu_dereference(mesh_paths); 761 tbl = rcu_dereference(mesh_paths);
777 for_each_mesh_entry(tbl, p, node, i) { 762 for_each_mesh_entry(tbl, p, node, i) {
778 mpath = node->mpath; 763 mpath = node->mpath;
779 spin_lock_bh(&mpath->state_lock);
780 if (rcu_dereference(mpath->next_hop) == sta && 764 if (rcu_dereference(mpath->next_hop) == sta &&
781 mpath->flags & MESH_PATH_ACTIVE && 765 mpath->flags & MESH_PATH_ACTIVE &&
782 !(mpath->flags & MESH_PATH_FIXED)) { 766 !(mpath->flags & MESH_PATH_FIXED)) {
767 spin_lock_bh(&mpath->state_lock);
783 mpath->flags &= ~MESH_PATH_ACTIVE; 768 mpath->flags &= ~MESH_PATH_ACTIVE;
784 ++mpath->sn; 769 ++mpath->sn;
785 spin_unlock_bh(&mpath->state_lock); 770 spin_unlock_bh(&mpath->state_lock);
786 mesh_path_error_tx(sdata->u.mesh.mshcfg.element_ttl, 771 mesh_path_error_tx(sdata->u.mesh.mshcfg.element_ttl,
787 mpath->dst, cpu_to_le32(mpath->sn), 772 mpath->dst, cpu_to_le32(mpath->sn),
788 reason, bcast, sdata); 773 reason, bcast, sdata);
789 } else 774 }
790 spin_unlock_bh(&mpath->state_lock);
791 } 775 }
792 rcu_read_unlock(); 776 rcu_read_unlock();
793} 777}
794 778
779static void mesh_path_node_reclaim(struct rcu_head *rp)
780{
781 struct mpath_node *node = container_of(rp, struct mpath_node, rcu);
782 struct ieee80211_sub_if_data *sdata = node->mpath->sdata;
783
784 del_timer_sync(&node->mpath->timer);
785 atomic_dec(&sdata->u.mesh.mpaths);
786 kfree(node->mpath);
787 kfree(node);
788}
789
790/* needs to be called with the corresponding hashwlock taken */
791static void __mesh_path_del(struct mesh_table *tbl, struct mpath_node *node)
792{
793 struct mesh_path *mpath;
794 mpath = node->mpath;
795 spin_lock(&mpath->state_lock);
796 mpath->flags |= MESH_PATH_RESOLVING;
797 if (mpath->is_gate)
798 mesh_gate_del(tbl, mpath);
799 hlist_del_rcu(&node->list);
800 call_rcu(&node->rcu, mesh_path_node_reclaim);
801 spin_unlock(&mpath->state_lock);
802 atomic_dec(&tbl->entries);
803}
804
795/** 805/**
796 * mesh_path_flush_by_nexthop - Deletes mesh paths if their next hop matches 806 * mesh_path_flush_by_nexthop - Deletes mesh paths if their next hop matches
797 * 807 *
@@ -812,42 +822,59 @@ void mesh_path_flush_by_nexthop(struct sta_info *sta)
812 int i; 822 int i;
813 823
814 rcu_read_lock(); 824 rcu_read_lock();
815 tbl = rcu_dereference(mesh_paths); 825 read_lock_bh(&pathtbl_resize_lock);
826 tbl = resize_dereference_mesh_paths();
816 for_each_mesh_entry(tbl, p, node, i) { 827 for_each_mesh_entry(tbl, p, node, i) {
817 mpath = node->mpath; 828 mpath = node->mpath;
818 if (rcu_dereference(mpath->next_hop) == sta) 829 if (rcu_dereference(mpath->next_hop) == sta) {
819 mesh_path_del(mpath->dst, mpath->sdata); 830 spin_lock_bh(&tbl->hashwlock[i]);
831 __mesh_path_del(tbl, node);
832 spin_unlock_bh(&tbl->hashwlock[i]);
833 }
820 } 834 }
835 read_unlock_bh(&pathtbl_resize_lock);
821 rcu_read_unlock(); 836 rcu_read_unlock();
822} 837}
823 838
824void mesh_path_flush(struct ieee80211_sub_if_data *sdata) 839static void table_flush_by_iface(struct mesh_table *tbl,
840 struct ieee80211_sub_if_data *sdata)
825{ 841{
826 struct mesh_table *tbl;
827 struct mesh_path *mpath; 842 struct mesh_path *mpath;
828 struct mpath_node *node; 843 struct mpath_node *node;
829 struct hlist_node *p; 844 struct hlist_node *p;
830 int i; 845 int i;
831 846
832 rcu_read_lock(); 847 WARN_ON(!rcu_read_lock_held());
833 tbl = rcu_dereference(mesh_paths);
834 for_each_mesh_entry(tbl, p, node, i) { 848 for_each_mesh_entry(tbl, p, node, i) {
835 mpath = node->mpath; 849 mpath = node->mpath;
836 if (mpath->sdata == sdata) 850 if (mpath->sdata != sdata)
837 mesh_path_del(mpath->dst, mpath->sdata); 851 continue;
852 spin_lock_bh(&tbl->hashwlock[i]);
853 __mesh_path_del(tbl, node);
854 spin_unlock_bh(&tbl->hashwlock[i]);
838 } 855 }
839 rcu_read_unlock();
840} 856}
841 857
842static void mesh_path_node_reclaim(struct rcu_head *rp) 858/**
859 * mesh_path_flush_by_iface - Deletes all mesh paths associated with a given iface
860 *
861 * This function deletes both mesh paths as well as mesh portal paths.
862 *
863 * @sdata - interface data to match
864 *
865 */
866void mesh_path_flush_by_iface(struct ieee80211_sub_if_data *sdata)
843{ 867{
844 struct mpath_node *node = container_of(rp, struct mpath_node, rcu); 868 struct mesh_table *tbl;
845 struct ieee80211_sub_if_data *sdata = node->mpath->sdata;
846 869
847 del_timer_sync(&node->mpath->timer); 870 rcu_read_lock();
848 atomic_dec(&sdata->u.mesh.mpaths); 871 read_lock_bh(&pathtbl_resize_lock);
849 kfree(node->mpath); 872 tbl = resize_dereference_mesh_paths();
850 kfree(node); 873 table_flush_by_iface(tbl, sdata);
874 tbl = resize_dereference_mpp_paths();
875 table_flush_by_iface(tbl, sdata);
876 read_unlock_bh(&pathtbl_resize_lock);
877 rcu_read_unlock();
851} 878}
852 879
853/** 880/**
@@ -878,14 +905,7 @@ int mesh_path_del(u8 *addr, struct ieee80211_sub_if_data *sdata)
878 mpath = node->mpath; 905 mpath = node->mpath;
879 if (mpath->sdata == sdata && 906 if (mpath->sdata == sdata &&
880 memcmp(addr, mpath->dst, ETH_ALEN) == 0) { 907 memcmp(addr, mpath->dst, ETH_ALEN) == 0) {
881 spin_lock_bh(&mpath->state_lock); 908 __mesh_path_del(tbl, node);
882 if (mpath->is_gate)
883 mesh_gate_del(tbl, mpath);
884 mpath->flags |= MESH_PATH_RESOLVING;
885 hlist_del_rcu(&node->list);
886 call_rcu(&node->rcu, mesh_path_node_reclaim);
887 atomic_dec(&tbl->entries);
888 spin_unlock_bh(&mpath->state_lock);
889 goto enddel; 909 goto enddel;
890 } 910 }
891 } 911 }
@@ -991,9 +1011,14 @@ void mesh_path_discard_frame(struct sk_buff *skb,
991 1011
992 da = hdr->addr3; 1012 da = hdr->addr3;
993 ra = hdr->addr1; 1013 ra = hdr->addr1;
1014 rcu_read_lock();
994 mpath = mesh_path_lookup(da, sdata); 1015 mpath = mesh_path_lookup(da, sdata);
995 if (mpath) 1016 if (mpath) {
1017 spin_lock_bh(&mpath->state_lock);
996 sn = ++mpath->sn; 1018 sn = ++mpath->sn;
1019 spin_unlock_bh(&mpath->state_lock);
1020 }
1021 rcu_read_unlock();
997 mesh_path_error_tx(sdata->u.mesh.mshcfg.element_ttl, skb->data, 1022 mesh_path_error_tx(sdata->u.mesh.mshcfg.element_ttl, skb->data,
998 cpu_to_le32(sn), reason, ra, sdata); 1023 cpu_to_le32(sn), reason, ra, sdata);
999 } 1024 }
@@ -1074,6 +1099,7 @@ static int mesh_path_node_copy(struct hlist_node *p, struct mesh_table *newtbl)
1074int mesh_pathtbl_init(void) 1099int mesh_pathtbl_init(void)
1075{ 1100{
1076 struct mesh_table *tbl_path, *tbl_mpp; 1101 struct mesh_table *tbl_path, *tbl_mpp;
1102 int ret;
1077 1103
1078 tbl_path = mesh_table_alloc(INIT_PATHS_SIZE_ORDER); 1104 tbl_path = mesh_table_alloc(INIT_PATHS_SIZE_ORDER);
1079 if (!tbl_path) 1105 if (!tbl_path)
@@ -1082,18 +1108,26 @@ int mesh_pathtbl_init(void)
1082 tbl_path->copy_node = &mesh_path_node_copy; 1108 tbl_path->copy_node = &mesh_path_node_copy;
1083 tbl_path->mean_chain_len = MEAN_CHAIN_LEN; 1109 tbl_path->mean_chain_len = MEAN_CHAIN_LEN;
1084 tbl_path->known_gates = kzalloc(sizeof(struct hlist_head), GFP_ATOMIC); 1110 tbl_path->known_gates = kzalloc(sizeof(struct hlist_head), GFP_ATOMIC);
1111 if (!tbl_path->known_gates) {
1112 ret = -ENOMEM;
1113 goto free_path;
1114 }
1085 INIT_HLIST_HEAD(tbl_path->known_gates); 1115 INIT_HLIST_HEAD(tbl_path->known_gates);
1086 1116
1087 1117
1088 tbl_mpp = mesh_table_alloc(INIT_PATHS_SIZE_ORDER); 1118 tbl_mpp = mesh_table_alloc(INIT_PATHS_SIZE_ORDER);
1089 if (!tbl_mpp) { 1119 if (!tbl_mpp) {
1090 mesh_table_free(tbl_path, true); 1120 ret = -ENOMEM;
1091 return -ENOMEM; 1121 goto free_path;
1092 } 1122 }
1093 tbl_mpp->free_node = &mesh_path_node_free; 1123 tbl_mpp->free_node = &mesh_path_node_free;
1094 tbl_mpp->copy_node = &mesh_path_node_copy; 1124 tbl_mpp->copy_node = &mesh_path_node_copy;
1095 tbl_mpp->mean_chain_len = MEAN_CHAIN_LEN; 1125 tbl_mpp->mean_chain_len = MEAN_CHAIN_LEN;
1096 tbl_mpp->known_gates = kzalloc(sizeof(struct hlist_head), GFP_ATOMIC); 1126 tbl_mpp->known_gates = kzalloc(sizeof(struct hlist_head), GFP_ATOMIC);
1127 if (!tbl_mpp->known_gates) {
1128 ret = -ENOMEM;
1129 goto free_mpp;
1130 }
1097 INIT_HLIST_HEAD(tbl_mpp->known_gates); 1131 INIT_HLIST_HEAD(tbl_mpp->known_gates);
1098 1132
1099 /* Need no locking since this is during init */ 1133 /* Need no locking since this is during init */
@@ -1101,6 +1135,12 @@ int mesh_pathtbl_init(void)
1101 RCU_INIT_POINTER(mpp_paths, tbl_mpp); 1135 RCU_INIT_POINTER(mpp_paths, tbl_mpp);
1102 1136
1103 return 0; 1137 return 0;
1138
1139free_mpp:
1140 mesh_table_free(tbl_mpp, true);
1141free_path:
1142 mesh_table_free(tbl_path, true);
1143 return ret;
1104} 1144}
1105 1145
1106void mesh_path_expire(struct ieee80211_sub_if_data *sdata) 1146void mesh_path_expire(struct ieee80211_sub_if_data *sdata)
@@ -1117,14 +1157,10 @@ void mesh_path_expire(struct ieee80211_sub_if_data *sdata)
1117 if (node->mpath->sdata != sdata) 1157 if (node->mpath->sdata != sdata)
1118 continue; 1158 continue;
1119 mpath = node->mpath; 1159 mpath = node->mpath;
1120 spin_lock_bh(&mpath->state_lock);
1121 if ((!(mpath->flags & MESH_PATH_RESOLVING)) && 1160 if ((!(mpath->flags & MESH_PATH_RESOLVING)) &&
1122 (!(mpath->flags & MESH_PATH_FIXED)) && 1161 (!(mpath->flags & MESH_PATH_FIXED)) &&
1123 time_after(jiffies, mpath->exp_time + MESH_PATH_EXPIRE)) { 1162 time_after(jiffies, mpath->exp_time + MESH_PATH_EXPIRE))
1124 spin_unlock_bh(&mpath->state_lock);
1125 mesh_path_del(mpath->dst, mpath->sdata); 1163 mesh_path_del(mpath->dst, mpath->sdata);
1126 } else
1127 spin_unlock_bh(&mpath->state_lock);
1128 } 1164 }
1129 rcu_read_unlock(); 1165 rcu_read_unlock();
1130} 1166}
diff --git a/net/mac80211/mesh_plink.c b/net/mac80211/mesh_plink.c
index 1a00d0f701c3..1213a23ff0fa 100644
--- a/net/mac80211/mesh_plink.c
+++ b/net/mac80211/mesh_plink.c
@@ -43,6 +43,10 @@ enum plink_event {
43 CLS_IGNR 43 CLS_IGNR
44}; 44};
45 45
46static int mesh_plink_frame_tx(struct ieee80211_sub_if_data *sdata,
47 enum ieee80211_self_protected_actioncode action,
48 u8 *da, __le16 llid, __le16 plid, __le16 reason);
49
46static inline 50static inline
47void mesh_plink_inc_estab_count(struct ieee80211_sub_if_data *sdata) 51void mesh_plink_inc_estab_count(struct ieee80211_sub_if_data *sdata)
48{ 52{
@@ -88,7 +92,7 @@ static struct sta_info *mesh_plink_alloc(struct ieee80211_sub_if_data *sdata,
88 if (!sta) 92 if (!sta)
89 return NULL; 93 return NULL;
90 94
91 sta->flags = WLAN_STA_AUTHORIZED | WLAN_STA_AUTH; 95 sta->flags = WLAN_STA_AUTHORIZED | WLAN_STA_AUTH | WLAN_STA_WME;
92 sta->sta.supp_rates[local->hw.conf.channel->band] = rates; 96 sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
93 rate_control_rate_init(sta); 97 rate_control_rate_init(sta);
94 98
@@ -133,6 +137,10 @@ void mesh_plink_deactivate(struct sta_info *sta)
133 137
134 spin_lock_bh(&sta->lock); 138 spin_lock_bh(&sta->lock);
135 deactivated = __mesh_plink_deactivate(sta); 139 deactivated = __mesh_plink_deactivate(sta);
140 sta->reason = cpu_to_le16(WLAN_REASON_MESH_PEER_CANCELED);
141 mesh_plink_frame_tx(sdata, WLAN_SP_MESH_PEERING_CLOSE,
142 sta->sta.addr, sta->llid, sta->plid,
143 sta->reason);
136 spin_unlock_bh(&sta->lock); 144 spin_unlock_bh(&sta->lock);
137 145
138 if (deactivated) 146 if (deactivated)
diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c
index 60a6f273cd30..1a59fb6630d4 100644
--- a/net/mac80211/mlme.c
+++ b/net/mac80211/mlme.c
@@ -160,7 +160,8 @@ static int ecw2cw(int ecw)
160 */ 160 */
161static u32 ieee80211_enable_ht(struct ieee80211_sub_if_data *sdata, 161static u32 ieee80211_enable_ht(struct ieee80211_sub_if_data *sdata,
162 struct ieee80211_ht_info *hti, 162 struct ieee80211_ht_info *hti,
163 const u8 *bssid, u16 ap_ht_cap_flags) 163 const u8 *bssid, u16 ap_ht_cap_flags,
164 bool beacon_htcap_ie)
164{ 165{
165 struct ieee80211_local *local = sdata->local; 166 struct ieee80211_local *local = sdata->local;
166 struct ieee80211_supported_band *sband; 167 struct ieee80211_supported_band *sband;
@@ -232,6 +233,21 @@ static u32 ieee80211_enable_ht(struct ieee80211_sub_if_data *sdata,
232 WARN_ON(!ieee80211_set_channel_type(local, sdata, channel_type)); 233 WARN_ON(!ieee80211_set_channel_type(local, sdata, channel_type));
233 } 234 }
234 235
236 if (beacon_htcap_ie && (prev_chantype != channel_type)) {
237 /*
238 * Whenever the AP announces the HT mode change that can be
239 * 40MHz intolerant or etc., it would be safer to stop tx
240 * queues before doing hw config to avoid buffer overflow.
241 */
242 ieee80211_stop_queues_by_reason(&sdata->local->hw,
243 IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE);
244
245 /* flush out all packets */
246 synchronize_net();
247
248 drv_flush(local, false);
249 }
250
235 /* channel_type change automatically detected */ 251 /* channel_type change automatically detected */
236 ieee80211_hw_config(local, 0); 252 ieee80211_hw_config(local, 0);
237 253
@@ -243,6 +259,10 @@ static u32 ieee80211_enable_ht(struct ieee80211_sub_if_data *sdata,
243 IEEE80211_RC_HT_CHANGED, 259 IEEE80211_RC_HT_CHANGED,
244 channel_type); 260 channel_type);
245 rcu_read_unlock(); 261 rcu_read_unlock();
262
263 if (beacon_htcap_ie)
264 ieee80211_wake_queues_by_reason(&sdata->local->hw,
265 IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE);
246 } 266 }
247 267
248 ht_opmode = le16_to_cpu(hti->operation_mode); 268 ht_opmode = le16_to_cpu(hti->operation_mode);
@@ -271,11 +291,9 @@ static void ieee80211_send_deauth_disassoc(struct ieee80211_sub_if_data *sdata,
271 struct ieee80211_mgmt *mgmt; 291 struct ieee80211_mgmt *mgmt;
272 292
273 skb = dev_alloc_skb(local->hw.extra_tx_headroom + sizeof(*mgmt)); 293 skb = dev_alloc_skb(local->hw.extra_tx_headroom + sizeof(*mgmt));
274 if (!skb) { 294 if (!skb)
275 printk(KERN_DEBUG "%s: failed to allocate buffer for "
276 "deauth/disassoc frame\n", sdata->name);
277 return; 295 return;
278 } 296
279 skb_reserve(skb, local->hw.extra_tx_headroom); 297 skb_reserve(skb, local->hw.extra_tx_headroom);
280 298
281 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24); 299 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24);
@@ -354,11 +372,9 @@ static void ieee80211_send_4addr_nullfunc(struct ieee80211_local *local,
354 return; 372 return;
355 373
356 skb = dev_alloc_skb(local->hw.extra_tx_headroom + 30); 374 skb = dev_alloc_skb(local->hw.extra_tx_headroom + 30);
357 if (!skb) { 375 if (!skb)
358 printk(KERN_DEBUG "%s: failed to allocate buffer for 4addr "
359 "nullfunc frame\n", sdata->name);
360 return; 376 return;
361 } 377
362 skb_reserve(skb, local->hw.extra_tx_headroom); 378 skb_reserve(skb, local->hw.extra_tx_headroom);
363 379
364 nullfunc = (struct ieee80211_hdr *) skb_put(skb, 30); 380 nullfunc = (struct ieee80211_hdr *) skb_put(skb, 30);
@@ -394,6 +410,9 @@ static void ieee80211_chswitch_work(struct work_struct *work)
394 /* call "hw_config" only if doing sw channel switch */ 410 /* call "hw_config" only if doing sw channel switch */
395 ieee80211_hw_config(sdata->local, 411 ieee80211_hw_config(sdata->local,
396 IEEE80211_CONF_CHANGE_CHANNEL); 412 IEEE80211_CONF_CHANGE_CHANNEL);
413 } else {
414 /* update the device channel directly */
415 sdata->local->hw.conf.channel = sdata->local->oper_channel;
397 } 416 }
398 417
399 /* XXX: shouldn't really modify cfg80211-owned data! */ 418 /* XXX: shouldn't really modify cfg80211-owned data! */
@@ -1589,7 +1608,8 @@ static bool ieee80211_assoc_success(struct ieee80211_work *wk,
1589 (sdata->local->hw.queues >= 4) && 1608 (sdata->local->hw.queues >= 4) &&
1590 !(ifmgd->flags & IEEE80211_STA_DISABLE_11N)) 1609 !(ifmgd->flags & IEEE80211_STA_DISABLE_11N))
1591 changed |= ieee80211_enable_ht(sdata, elems.ht_info_elem, 1610 changed |= ieee80211_enable_ht(sdata, elems.ht_info_elem,
1592 cbss->bssid, ap_ht_cap_flags); 1611 cbss->bssid, ap_ht_cap_flags,
1612 false);
1593 1613
1594 /* set AID and assoc capability, 1614 /* set AID and assoc capability,
1595 * ieee80211_set_associated() will tell the driver */ 1615 * ieee80211_set_associated() will tell the driver */
@@ -1923,7 +1943,7 @@ static void ieee80211_rx_mgmt_beacon(struct ieee80211_sub_if_data *sdata,
1923 rcu_read_unlock(); 1943 rcu_read_unlock();
1924 1944
1925 changed |= ieee80211_enable_ht(sdata, elems.ht_info_elem, 1945 changed |= ieee80211_enable_ht(sdata, elems.ht_info_elem,
1926 bssid, ap_ht_cap_flags); 1946 bssid, ap_ht_cap_flags, true);
1927 } 1947 }
1928 1948
1929 /* Note: country IE parsing is done for us by cfg80211 */ 1949 /* Note: country IE parsing is done for us by cfg80211 */
@@ -2441,11 +2461,8 @@ static int ieee80211_pre_assoc(struct ieee80211_sub_if_data *sdata,
2441 int err; 2461 int err;
2442 2462
2443 sta = sta_info_alloc(sdata, bssid, GFP_KERNEL); 2463 sta = sta_info_alloc(sdata, bssid, GFP_KERNEL);
2444 if (!sta) { 2464 if (!sta)
2445 printk(KERN_DEBUG "%s: failed to alloc STA entry for"
2446 " the AP\n", sdata->name);
2447 return -ENOMEM; 2465 return -ENOMEM;
2448 }
2449 2466
2450 sta->dummy = true; 2467 sta->dummy = true;
2451 2468
diff --git a/net/mac80211/rc80211_minstrel_ht.c b/net/mac80211/rc80211_minstrel_ht.c
index 21588386a302..e19249b0f971 100644
--- a/net/mac80211/rc80211_minstrel_ht.c
+++ b/net/mac80211/rc80211_minstrel_ht.c
@@ -452,7 +452,8 @@ minstrel_ht_tx_status(void *priv, struct ieee80211_supported_band *sband,
452 452
453 if (time_after(jiffies, mi->stats_update + (mp->update_interval / 2 * HZ) / 1000)) { 453 if (time_after(jiffies, mi->stats_update + (mp->update_interval / 2 * HZ) / 1000)) {
454 minstrel_ht_update_stats(mp, mi); 454 minstrel_ht_update_stats(mp, mi);
455 minstrel_aggr_check(mp, sta, skb); 455 if (!(info->flags & IEEE80211_TX_CTL_AMPDU))
456 minstrel_aggr_check(mp, sta, skb);
456 } 457 }
457} 458}
458 459
diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c
index f45fd2fedc24..db46601e50bf 100644
--- a/net/mac80211/rx.c
+++ b/net/mac80211/rx.c
@@ -476,7 +476,6 @@ static ieee80211_rx_result
476ieee80211_rx_mesh_check(struct ieee80211_rx_data *rx) 476ieee80211_rx_mesh_check(struct ieee80211_rx_data *rx)
477{ 477{
478 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)rx->skb->data; 478 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)rx->skb->data;
479 unsigned int hdrlen = ieee80211_hdrlen(hdr->frame_control);
480 char *dev_addr = rx->sdata->vif.addr; 479 char *dev_addr = rx->sdata->vif.addr;
481 480
482 if (ieee80211_is_data(hdr->frame_control)) { 481 if (ieee80211_is_data(hdr->frame_control)) {
@@ -524,14 +523,6 @@ ieee80211_rx_mesh_check(struct ieee80211_rx_data *rx)
524 523
525 } 524 }
526 525
527#define msh_h_get(h, l) ((struct ieee80211s_hdr *) ((u8 *)h + l))
528
529 if (ieee80211_is_data(hdr->frame_control) &&
530 is_multicast_ether_addr(hdr->addr1) &&
531 mesh_rmc_check(hdr->addr3, msh_h_get(hdr, hdrlen), rx->sdata))
532 return RX_DROP_MONITOR;
533#undef msh_h_get
534
535 return RX_CONTINUE; 526 return RX_CONTINUE;
536} 527}
537 528
@@ -1840,6 +1831,12 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx)
1840 hdrlen = ieee80211_hdrlen(hdr->frame_control); 1831 hdrlen = ieee80211_hdrlen(hdr->frame_control);
1841 mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); 1832 mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen);
1842 1833
1834 /* frame is in RMC, don't forward */
1835 if (ieee80211_is_data(hdr->frame_control) &&
1836 is_multicast_ether_addr(hdr->addr1) &&
1837 mesh_rmc_check(hdr->addr3, mesh_hdr, rx->sdata))
1838 return RX_DROP_MONITOR;
1839
1843 if (!ieee80211_is_data(hdr->frame_control)) 1840 if (!ieee80211_is_data(hdr->frame_control))
1844 return RX_CONTINUE; 1841 return RX_CONTINUE;
1845 1842
@@ -1847,6 +1844,12 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx)
1847 /* illegal frame */ 1844 /* illegal frame */
1848 return RX_DROP_MONITOR; 1845 return RX_DROP_MONITOR;
1849 1846
1847 if (ieee80211_queue_stopped(&local->hw, skb_get_queue_mapping(skb))) {
1848 IEEE80211_IFSTA_MESH_CTR_INC(&sdata->u.mesh,
1849 dropped_frames_congestion);
1850 return RX_DROP_MONITOR;
1851 }
1852
1850 if (mesh_hdr->flags & MESH_FLAGS_AE) { 1853 if (mesh_hdr->flags & MESH_FLAGS_AE) {
1851 struct mesh_path *mppath; 1854 struct mesh_path *mppath;
1852 char *proxied_addr; 1855 char *proxied_addr;
@@ -1902,13 +1905,13 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx)
1902 memset(info, 0, sizeof(*info)); 1905 memset(info, 0, sizeof(*info));
1903 info->flags |= IEEE80211_TX_INTFL_NEED_TXPROCESSING; 1906 info->flags |= IEEE80211_TX_INTFL_NEED_TXPROCESSING;
1904 info->control.vif = &rx->sdata->vif; 1907 info->control.vif = &rx->sdata->vif;
1905 skb_set_queue_mapping(skb, 1908 if (is_multicast_ether_addr(fwd_hdr->addr1)) {
1906 ieee80211_select_queue(rx->sdata, fwd_skb));
1907 ieee80211_set_qos_hdr(local, skb);
1908 if (is_multicast_ether_addr(fwd_hdr->addr1))
1909 IEEE80211_IFSTA_MESH_CTR_INC(&sdata->u.mesh, 1909 IEEE80211_IFSTA_MESH_CTR_INC(&sdata->u.mesh,
1910 fwded_mcast); 1910 fwded_mcast);
1911 else { 1911 skb_set_queue_mapping(fwd_skb,
1912 ieee80211_select_queue(sdata, fwd_skb));
1913 ieee80211_set_qos_hdr(sdata, fwd_skb);
1914 } else {
1912 int err; 1915 int err;
1913 /* 1916 /*
1914 * Save TA to addr1 to send TA a path error if a 1917 * Save TA to addr1 to send TA a path error if a
@@ -2569,12 +2572,12 @@ static void ieee80211_rx_handlers(struct ieee80211_rx_data *rx)
2569 CALL_RXH(ieee80211_rx_h_ps_poll) 2572 CALL_RXH(ieee80211_rx_h_ps_poll)
2570 CALL_RXH(ieee80211_rx_h_michael_mic_verify) 2573 CALL_RXH(ieee80211_rx_h_michael_mic_verify)
2571 /* must be after MMIC verify so header is counted in MPDU mic */ 2574 /* must be after MMIC verify so header is counted in MPDU mic */
2572 CALL_RXH(ieee80211_rx_h_remove_qos_control)
2573 CALL_RXH(ieee80211_rx_h_amsdu)
2574#ifdef CONFIG_MAC80211_MESH 2575#ifdef CONFIG_MAC80211_MESH
2575 if (ieee80211_vif_is_mesh(&rx->sdata->vif)) 2576 if (ieee80211_vif_is_mesh(&rx->sdata->vif))
2576 CALL_RXH(ieee80211_rx_h_mesh_fwding); 2577 CALL_RXH(ieee80211_rx_h_mesh_fwding);
2577#endif 2578#endif
2579 CALL_RXH(ieee80211_rx_h_remove_qos_control)
2580 CALL_RXH(ieee80211_rx_h_amsdu)
2578 CALL_RXH(ieee80211_rx_h_data) 2581 CALL_RXH(ieee80211_rx_h_data)
2579 CALL_RXH(ieee80211_rx_h_ctrl); 2582 CALL_RXH(ieee80211_rx_h_ctrl);
2580 CALL_RXH(ieee80211_rx_h_mgmt_check) 2583 CALL_RXH(ieee80211_rx_h_mgmt_check)
diff --git a/net/mac80211/spectmgmt.c b/net/mac80211/spectmgmt.c
index 7733f66ee2c4..578eea3fc04d 100644
--- a/net/mac80211/spectmgmt.c
+++ b/net/mac80211/spectmgmt.c
@@ -32,12 +32,8 @@ static void ieee80211_send_refuse_measurement_request(struct ieee80211_sub_if_da
32 32
33 skb = dev_alloc_skb(sizeof(*msr_report) + local->hw.extra_tx_headroom + 33 skb = dev_alloc_skb(sizeof(*msr_report) + local->hw.extra_tx_headroom +
34 sizeof(struct ieee80211_msrment_ie)); 34 sizeof(struct ieee80211_msrment_ie));
35 35 if (!skb)
36 if (!skb) {
37 printk(KERN_ERR "%s: failed to allocate buffer for "
38 "measurement report frame\n", sdata->name);
39 return; 36 return;
40 }
41 37
42 skb_reserve(skb, local->hw.extra_tx_headroom); 38 skb_reserve(skb, local->hw.extra_tx_headroom);
43 msr_report = (struct ieee80211_mgmt *)skb_put(skb, 24); 39 msr_report = (struct ieee80211_mgmt *)skb_put(skb, 24);
diff --git a/net/mac80211/sta_info.c b/net/mac80211/sta_info.c
index 17caba27040b..c52e58c0a979 100644
--- a/net/mac80211/sta_info.c
+++ b/net/mac80211/sta_info.c
@@ -691,14 +691,13 @@ void sta_info_clear_tim_bit(struct sta_info *sta)
691 spin_unlock_irqrestore(&sta->local->sta_lock, flags); 691 spin_unlock_irqrestore(&sta->local->sta_lock, flags);
692} 692}
693 693
694static int sta_info_buffer_expired(struct sta_info *sta, 694static bool sta_info_buffer_expired(struct sta_info *sta, struct sk_buff *skb)
695 struct sk_buff *skb)
696{ 695{
697 struct ieee80211_tx_info *info; 696 struct ieee80211_tx_info *info;
698 int timeout; 697 int timeout;
699 698
700 if (!skb) 699 if (!skb)
701 return 0; 700 return false;
702 701
703 info = IEEE80211_SKB_CB(skb); 702 info = IEEE80211_SKB_CB(skb);
704 703
@@ -718,9 +717,6 @@ static bool sta_info_cleanup_expire_buffered(struct ieee80211_local *local,
718 unsigned long flags; 717 unsigned long flags;
719 struct sk_buff *skb; 718 struct sk_buff *skb;
720 719
721 if (skb_queue_empty(&sta->ps_tx_buf))
722 return false;
723
724 for (;;) { 720 for (;;) {
725 spin_lock_irqsave(&sta->ps_tx_buf.lock, flags); 721 spin_lock_irqsave(&sta->ps_tx_buf.lock, flags);
726 skb = skb_peek(&sta->ps_tx_buf); 722 skb = skb_peek(&sta->ps_tx_buf);
@@ -745,7 +741,7 @@ static bool sta_info_cleanup_expire_buffered(struct ieee80211_local *local,
745 sta_info_clear_tim_bit(sta); 741 sta_info_clear_tim_bit(sta);
746 } 742 }
747 743
748 return true; 744 return !skb_queue_empty(&sta->ps_tx_buf);
749} 745}
750 746
751static int __must_check __sta_info_destroy(struct sta_info *sta) 747static int __must_check __sta_info_destroy(struct sta_info *sta)
@@ -796,7 +792,7 @@ static int __must_check __sta_info_destroy(struct sta_info *sta)
796 BUG_ON(!sdata->bss); 792 BUG_ON(!sdata->bss);
797 793
798 atomic_dec(&sdata->bss->num_sta_ps); 794 atomic_dec(&sdata->bss->num_sta_ps);
799 __sta_info_clear_tim_bit(sdata->bss, sta); 795 sta_info_clear_tim_bit(sta);
800 } 796 }
801 797
802 local->num_sta--; 798 local->num_sta--;
diff --git a/net/mac80211/sta_info.h b/net/mac80211/sta_info.h
index e9eb565506da..56a3d38a2cd1 100644
--- a/net/mac80211/sta_info.h
+++ b/net/mac80211/sta_info.h
@@ -86,6 +86,8 @@ enum ieee80211_sta_info_flags {
86 * @stop_initiator: initiator of a session stop 86 * @stop_initiator: initiator of a session stop
87 * @tx_stop: TX DelBA frame when stopping 87 * @tx_stop: TX DelBA frame when stopping
88 * @buf_size: reorder buffer size at receiver 88 * @buf_size: reorder buffer size at receiver
89 * @failed_bar_ssn: ssn of the last failed BAR tx attempt
90 * @bar_pending: BAR needs to be re-sent
89 * 91 *
90 * This structure's lifetime is managed by RCU, assignments to 92 * This structure's lifetime is managed by RCU, assignments to
91 * the array holding it must hold the aggregation mutex. 93 * the array holding it must hold the aggregation mutex.
@@ -106,6 +108,9 @@ struct tid_ampdu_tx {
106 u8 stop_initiator; 108 u8 stop_initiator;
107 bool tx_stop; 109 bool tx_stop;
108 u8 buf_size; 110 u8 buf_size;
111
112 u16 failed_bar_ssn;
113 bool bar_pending;
109}; 114};
110 115
111/** 116/**
diff --git a/net/mac80211/status.c b/net/mac80211/status.c
index e51bd2a1a073..d50358c45ab0 100644
--- a/net/mac80211/status.c
+++ b/net/mac80211/status.c
@@ -127,12 +127,32 @@ static void ieee80211_handle_filtered_frame(struct ieee80211_local *local,
127 dev_kfree_skb(skb); 127 dev_kfree_skb(skb);
128} 128}
129 129
130static void ieee80211_check_pending_bar(struct sta_info *sta, u8 *addr, u8 tid)
131{
132 struct tid_ampdu_tx *tid_tx;
133
134 tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
135 if (!tid_tx || !tid_tx->bar_pending)
136 return;
137
138 tid_tx->bar_pending = false;
139 ieee80211_send_bar(&sta->sdata->vif, addr, tid, tid_tx->failed_bar_ssn);
140}
141
130static void ieee80211_frame_acked(struct sta_info *sta, struct sk_buff *skb) 142static void ieee80211_frame_acked(struct sta_info *sta, struct sk_buff *skb)
131{ 143{
132 struct ieee80211_mgmt *mgmt = (void *) skb->data; 144 struct ieee80211_mgmt *mgmt = (void *) skb->data;
133 struct ieee80211_local *local = sta->local; 145 struct ieee80211_local *local = sta->local;
134 struct ieee80211_sub_if_data *sdata = sta->sdata; 146 struct ieee80211_sub_if_data *sdata = sta->sdata;
135 147
148 if (ieee80211_is_data_qos(mgmt->frame_control)) {
149 struct ieee80211_hdr *hdr = (void *) skb->data;
150 u8 *qc = ieee80211_get_qos_ctl(hdr);
151 u16 tid = qc[0] & 0xf;
152
153 ieee80211_check_pending_bar(sta, hdr->addr1, tid);
154 }
155
136 if (ieee80211_is_action(mgmt->frame_control) && 156 if (ieee80211_is_action(mgmt->frame_control) &&
137 sdata->vif.type == NL80211_IFTYPE_STATION && 157 sdata->vif.type == NL80211_IFTYPE_STATION &&
138 mgmt->u.action.category == WLAN_CATEGORY_HT && 158 mgmt->u.action.category == WLAN_CATEGORY_HT &&
@@ -161,6 +181,18 @@ static void ieee80211_frame_acked(struct sta_info *sta, struct sk_buff *skb)
161 } 181 }
162} 182}
163 183
184static void ieee80211_set_bar_pending(struct sta_info *sta, u8 tid, u16 ssn)
185{
186 struct tid_ampdu_tx *tid_tx;
187
188 tid_tx = rcu_dereference(sta->ampdu_mlme.tid_tx[tid]);
189 if (!tid_tx)
190 return;
191
192 tid_tx->failed_bar_ssn = ssn;
193 tid_tx->bar_pending = true;
194}
195
164/* 196/*
165 * Use a static threshold for now, best value to be determined 197 * Use a static threshold for now, best value to be determined
166 * by testing ... 198 * by testing ...
@@ -241,23 +273,28 @@ void ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)
241 tid = qc[0] & 0xf; 273 tid = qc[0] & 0xf;
242 ssn = ((le16_to_cpu(hdr->seq_ctrl) + 0x10) 274 ssn = ((le16_to_cpu(hdr->seq_ctrl) + 0x10)
243 & IEEE80211_SCTL_SEQ); 275 & IEEE80211_SCTL_SEQ);
244 ieee80211_send_bar(sta->sdata, hdr->addr1, 276 ieee80211_send_bar(&sta->sdata->vif, hdr->addr1,
245 tid, ssn); 277 tid, ssn);
246 } 278 }
247 279
248 if (!acked && ieee80211_is_back_req(fc)) { 280 if (!acked && ieee80211_is_back_req(fc)) {
281 u16 control;
282
249 /* 283 /*
250 * BAR failed, let's tear down the BA session as a 284 * BAR failed, store the last SSN and retry sending
251 * last resort as some STAs (Intel 5100 on Windows) 285 * the BAR when the next unicast transmission on the
252 * can get stuck when the BA window isn't flushed 286 * same TID succeeds.
253 * correctly.
254 */ 287 */
255 bar = (struct ieee80211_bar *) skb->data; 288 bar = (struct ieee80211_bar *) skb->data;
256 if (!(bar->control & IEEE80211_BAR_CTRL_MULTI_TID)) { 289 control = le16_to_cpu(bar->control);
257 tid = (bar->control & 290 if (!(control & IEEE80211_BAR_CTRL_MULTI_TID)) {
291 u16 ssn = le16_to_cpu(bar->start_seq_num);
292
293 tid = (control &
258 IEEE80211_BAR_CTRL_TID_INFO_MASK) >> 294 IEEE80211_BAR_CTRL_TID_INFO_MASK) >>
259 IEEE80211_BAR_CTRL_TID_INFO_SHIFT; 295 IEEE80211_BAR_CTRL_TID_INFO_SHIFT;
260 ieee80211_stop_tx_ba_session(&sta->sta, tid); 296
297 ieee80211_set_bar_pending(sta, tid, ssn);
261 } 298 }
262 } 299 }
263 300
diff --git a/net/mac80211/tx.c b/net/mac80211/tx.c
index 01072639666f..7cd6c28968b2 100644
--- a/net/mac80211/tx.c
+++ b/net/mac80211/tx.c
@@ -1232,7 +1232,8 @@ ieee80211_tx_prepare(struct ieee80211_sub_if_data *sdata,
1232 tx->sta = sta_info_get(sdata, hdr->addr1); 1232 tx->sta = sta_info_get(sdata, hdr->addr1);
1233 1233
1234 if (tx->sta && ieee80211_is_data_qos(hdr->frame_control) && 1234 if (tx->sta && ieee80211_is_data_qos(hdr->frame_control) &&
1235 (local->hw.flags & IEEE80211_HW_AMPDU_AGGREGATION)) { 1235 (local->hw.flags & IEEE80211_HW_AMPDU_AGGREGATION) &&
1236 !(local->hw.flags & IEEE80211_HW_TX_AMPDU_SETUP_IN_HW)) {
1236 struct tid_ampdu_tx *tid_tx; 1237 struct tid_ampdu_tx *tid_tx;
1237 1238
1238 qc = ieee80211_get_qos_ctl(hdr); 1239 qc = ieee80211_get_qos_ctl(hdr);
@@ -1595,7 +1596,7 @@ static void ieee80211_xmit(struct ieee80211_sub_if_data *sdata,
1595 return; 1596 return;
1596 } 1597 }
1597 1598
1598 ieee80211_set_qos_hdr(local, skb); 1599 ieee80211_set_qos_hdr(sdata, skb);
1599 ieee80211_tx(sdata, skb, false); 1600 ieee80211_tx(sdata, skb, false);
1600 rcu_read_unlock(); 1601 rcu_read_unlock();
1601} 1602}
@@ -1878,6 +1879,10 @@ netdev_tx_t ieee80211_subif_start_xmit(struct sk_buff *skb,
1878 rcu_read_unlock(); 1879 rcu_read_unlock();
1879 } 1880 }
1880 1881
1882 /* For mesh, the use of the QoS header is mandatory */
1883 if (ieee80211_vif_is_mesh(&sdata->vif))
1884 sta_flags |= WLAN_STA_WME;
1885
1881 /* receiver and we are QoS enabled, use a QoS type frame */ 1886 /* receiver and we are QoS enabled, use a QoS type frame */
1882 if ((sta_flags & WLAN_STA_WME) && local->hw.queues >= 4) { 1887 if ((sta_flags & WLAN_STA_WME) && local->hw.queues >= 4) {
1883 fc |= cpu_to_le16(IEEE80211_STYPE_QOS_DATA); 1888 fc |= cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
@@ -2365,11 +2370,9 @@ struct sk_buff *ieee80211_pspoll_get(struct ieee80211_hw *hw,
2365 local = sdata->local; 2370 local = sdata->local;
2366 2371
2367 skb = dev_alloc_skb(local->hw.extra_tx_headroom + sizeof(*pspoll)); 2372 skb = dev_alloc_skb(local->hw.extra_tx_headroom + sizeof(*pspoll));
2368 if (!skb) { 2373 if (!skb)
2369 printk(KERN_DEBUG "%s: failed to allocate buffer for "
2370 "pspoll template\n", sdata->name);
2371 return NULL; 2374 return NULL;
2372 } 2375
2373 skb_reserve(skb, local->hw.extra_tx_headroom); 2376 skb_reserve(skb, local->hw.extra_tx_headroom);
2374 2377
2375 pspoll = (struct ieee80211_pspoll *) skb_put(skb, sizeof(*pspoll)); 2378 pspoll = (struct ieee80211_pspoll *) skb_put(skb, sizeof(*pspoll));
@@ -2405,11 +2408,9 @@ struct sk_buff *ieee80211_nullfunc_get(struct ieee80211_hw *hw,
2405 local = sdata->local; 2408 local = sdata->local;
2406 2409
2407 skb = dev_alloc_skb(local->hw.extra_tx_headroom + sizeof(*nullfunc)); 2410 skb = dev_alloc_skb(local->hw.extra_tx_headroom + sizeof(*nullfunc));
2408 if (!skb) { 2411 if (!skb)
2409 printk(KERN_DEBUG "%s: failed to allocate buffer for nullfunc "
2410 "template\n", sdata->name);
2411 return NULL; 2412 return NULL;
2412 } 2413
2413 skb_reserve(skb, local->hw.extra_tx_headroom); 2414 skb_reserve(skb, local->hw.extra_tx_headroom);
2414 2415
2415 nullfunc = (struct ieee80211_hdr_3addr *) skb_put(skb, 2416 nullfunc = (struct ieee80211_hdr_3addr *) skb_put(skb,
@@ -2444,11 +2445,8 @@ struct sk_buff *ieee80211_probereq_get(struct ieee80211_hw *hw,
2444 2445
2445 skb = dev_alloc_skb(local->hw.extra_tx_headroom + sizeof(*hdr) + 2446 skb = dev_alloc_skb(local->hw.extra_tx_headroom + sizeof(*hdr) +
2446 ie_ssid_len + ie_len); 2447 ie_ssid_len + ie_len);
2447 if (!skb) { 2448 if (!skb)
2448 printk(KERN_DEBUG "%s: failed to allocate buffer for probe "
2449 "request template\n", sdata->name);
2450 return NULL; 2449 return NULL;
2451 }
2452 2450
2453 skb_reserve(skb, local->hw.extra_tx_headroom); 2451 skb_reserve(skb, local->hw.extra_tx_headroom);
2454 2452
diff --git a/net/mac80211/util.c b/net/mac80211/util.c
index ce916ff6ef08..4b1466d5b6a1 100644
--- a/net/mac80211/util.c
+++ b/net/mac80211/util.c
@@ -707,11 +707,9 @@ void ieee80211_send_auth(struct ieee80211_sub_if_data *sdata,
707 707
708 skb = dev_alloc_skb(local->hw.extra_tx_headroom + 708 skb = dev_alloc_skb(local->hw.extra_tx_headroom +
709 sizeof(*mgmt) + 6 + extra_len); 709 sizeof(*mgmt) + 6 + extra_len);
710 if (!skb) { 710 if (!skb)
711 printk(KERN_DEBUG "%s: failed to allocate buffer for auth "
712 "frame\n", sdata->name);
713 return; 711 return;
714 } 712
715 skb_reserve(skb, local->hw.extra_tx_headroom); 713 skb_reserve(skb, local->hw.extra_tx_headroom);
716 714
717 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24 + 6); 715 mgmt = (struct ieee80211_mgmt *) skb_put(skb, 24 + 6);
@@ -864,11 +862,8 @@ struct sk_buff *ieee80211_build_probe_req(struct ieee80211_sub_if_data *sdata,
864 862
865 /* FIXME: come up with a proper value */ 863 /* FIXME: come up with a proper value */
866 buf = kmalloc(200 + ie_len, GFP_KERNEL); 864 buf = kmalloc(200 + ie_len, GFP_KERNEL);
867 if (!buf) { 865 if (!buf)
868 printk(KERN_DEBUG "%s: failed to allocate temporary IE "
869 "buffer\n", sdata->name);
870 return NULL; 866 return NULL;
871 }
872 867
873 /* 868 /*
874 * Do not send DS Channel parameter for directed probe requests 869 * Do not send DS Channel parameter for directed probe requests
@@ -1082,6 +1077,8 @@ int ieee80211_reconfig(struct ieee80211_local *local)
1082 changed |= BSS_CHANGED_IBSS; 1077 changed |= BSS_CHANGED_IBSS;
1083 /* fall through */ 1078 /* fall through */
1084 case NL80211_IFTYPE_AP: 1079 case NL80211_IFTYPE_AP:
1080 changed |= BSS_CHANGED_SSID;
1081 /* fall through */
1085 case NL80211_IFTYPE_MESH_POINT: 1082 case NL80211_IFTYPE_MESH_POINT:
1086 changed |= BSS_CHANGED_BEACON | 1083 changed |= BSS_CHANGED_BEACON |
1087 BSS_CHANGED_BEACON_ENABLED; 1084 BSS_CHANGED_BEACON_ENABLED;
diff --git a/net/mac80211/wme.c b/net/mac80211/wme.c
index 7a49532f14cb..971004c9b04f 100644
--- a/net/mac80211/wme.c
+++ b/net/mac80211/wme.c
@@ -83,11 +83,7 @@ u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
83 break; 83 break;
84#ifdef CONFIG_MAC80211_MESH 84#ifdef CONFIG_MAC80211_MESH
85 case NL80211_IFTYPE_MESH_POINT: 85 case NL80211_IFTYPE_MESH_POINT:
86 /* 86 ra = skb->data;
87 * XXX: This is clearly broken ... but already was before,
88 * because ieee80211_fill_mesh_addresses() would clear A1
89 * except for multicast addresses.
90 */
91 break; 87 break;
92#endif 88#endif
93 case NL80211_IFTYPE_STATION: 89 case NL80211_IFTYPE_STATION:
@@ -139,7 +135,8 @@ u16 ieee80211_downgrade_queue(struct ieee80211_local *local,
139 return ieee802_1d_to_ac[skb->priority]; 135 return ieee802_1d_to_ac[skb->priority];
140} 136}
141 137
142void ieee80211_set_qos_hdr(struct ieee80211_local *local, struct sk_buff *skb) 138void ieee80211_set_qos_hdr(struct ieee80211_sub_if_data *sdata,
139 struct sk_buff *skb)
143{ 140{
144 struct ieee80211_hdr *hdr = (void *)skb->data; 141 struct ieee80211_hdr *hdr = (void *)skb->data;
145 142
@@ -150,10 +147,11 @@ void ieee80211_set_qos_hdr(struct ieee80211_local *local, struct sk_buff *skb)
150 147
151 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; 148 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
152 149
153 if (unlikely(local->wifi_wme_noack_test)) 150 if (unlikely(sdata->local->wifi_wme_noack_test))
154 ack_policy |= IEEE80211_QOS_CTL_ACK_POLICY_NOACK; 151 ack_policy |= IEEE80211_QOS_CTL_ACK_POLICY_NOACK;
155 /* qos header is 2 bytes, second reserved */ 152 /* qos header is 2 bytes */
156 *p++ = ack_policy | tid; 153 *p++ = ack_policy | tid;
157 *p = 0; 154 *p = ieee80211_vif_is_mesh(&sdata->vif) ?
155 (IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT >> 8) : 0;
158 } 156 }
159} 157}
diff --git a/net/mac80211/wme.h b/net/mac80211/wme.h
index faead6d02026..34e166fbf4d4 100644
--- a/net/mac80211/wme.h
+++ b/net/mac80211/wme.h
@@ -17,7 +17,8 @@ extern const int ieee802_1d_to_ac[8];
17 17
18u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata, 18u16 ieee80211_select_queue(struct ieee80211_sub_if_data *sdata,
19 struct sk_buff *skb); 19 struct sk_buff *skb);
20void ieee80211_set_qos_hdr(struct ieee80211_local *local, struct sk_buff *skb); 20void ieee80211_set_qos_hdr(struct ieee80211_sub_if_data *sdata,
21 struct sk_buff *skb);
21u16 ieee80211_downgrade_queue(struct ieee80211_local *local, 22u16 ieee80211_downgrade_queue(struct ieee80211_local *local,
22 struct sk_buff *skb); 23 struct sk_buff *skb);
23 24
diff --git a/net/mac80211/work.c b/net/mac80211/work.c
index 380b9a7462b6..bac34394c05e 100644
--- a/net/mac80211/work.c
+++ b/net/mac80211/work.c
@@ -229,11 +229,9 @@ static void ieee80211_send_assoc(struct ieee80211_sub_if_data *sdata,
229 wk->ie_len + /* extra IEs */ 229 wk->ie_len + /* extra IEs */
230 9, /* WMM */ 230 9, /* WMM */
231 GFP_KERNEL); 231 GFP_KERNEL);
232 if (!skb) { 232 if (!skb)
233 printk(KERN_DEBUG "%s: failed to allocate buffer for assoc "
234 "frame\n", sdata->name);
235 return; 233 return;
236 } 234
237 skb_reserve(skb, local->hw.extra_tx_headroom); 235 skb_reserve(skb, local->hw.extra_tx_headroom);
238 236
239 capab = WLAN_CAPABILITY_ESS; 237 capab = WLAN_CAPABILITY_ESS;
diff --git a/net/nfc/Kconfig b/net/nfc/Kconfig
index 33e095b124b3..58cddadf8e8e 100644
--- a/net/nfc/Kconfig
+++ b/net/nfc/Kconfig
@@ -13,4 +13,6 @@ menuconfig NFC
13 To compile this support as a module, choose M here: the module will 13 To compile this support as a module, choose M here: the module will
14 be called nfc. 14 be called nfc.
15 15
16source "net/nfc/nci/Kconfig"
17
16source "drivers/nfc/Kconfig" 18source "drivers/nfc/Kconfig"
diff --git a/net/nfc/Makefile b/net/nfc/Makefile
index 16250c353851..fbb550f2377b 100644
--- a/net/nfc/Makefile
+++ b/net/nfc/Makefile
@@ -3,5 +3,6 @@
3# 3#
4 4
5obj-$(CONFIG_NFC) += nfc.o 5obj-$(CONFIG_NFC) += nfc.o
6obj-$(CONFIG_NFC_NCI) += nci/
6 7
7nfc-objs := core.o netlink.o af_nfc.o rawsock.o 8nfc-objs := core.o netlink.o af_nfc.o rawsock.o
diff --git a/net/nfc/core.c b/net/nfc/core.c
index 284e2f6a14ff..47e02c1b8c02 100644
--- a/net/nfc/core.c
+++ b/net/nfc/core.c
@@ -53,6 +53,80 @@ int nfc_printk(const char *level, const char *format, ...)
53EXPORT_SYMBOL(nfc_printk); 53EXPORT_SYMBOL(nfc_printk);
54 54
55/** 55/**
56 * nfc_dev_up - turn on the NFC device
57 *
58 * @dev: The nfc device to be turned on
59 *
60 * The device remains up until the nfc_dev_down function is called.
61 */
62int nfc_dev_up(struct nfc_dev *dev)
63{
64 int rc = 0;
65
66 nfc_dbg("dev_name=%s", dev_name(&dev->dev));
67
68 device_lock(&dev->dev);
69
70 if (!device_is_registered(&dev->dev)) {
71 rc = -ENODEV;
72 goto error;
73 }
74
75 if (dev->dev_up) {
76 rc = -EALREADY;
77 goto error;
78 }
79
80 if (dev->ops->dev_up)
81 rc = dev->ops->dev_up(dev);
82
83 if (!rc)
84 dev->dev_up = true;
85
86error:
87 device_unlock(&dev->dev);
88 return rc;
89}
90
91/**
92 * nfc_dev_down - turn off the NFC device
93 *
94 * @dev: The nfc device to be turned off
95 */
96int nfc_dev_down(struct nfc_dev *dev)
97{
98 int rc = 0;
99
100 nfc_dbg("dev_name=%s", dev_name(&dev->dev));
101
102 device_lock(&dev->dev);
103
104 if (!device_is_registered(&dev->dev)) {
105 rc = -ENODEV;
106 goto error;
107 }
108
109 if (!dev->dev_up) {
110 rc = -EALREADY;
111 goto error;
112 }
113
114 if (dev->polling || dev->remote_activated) {
115 rc = -EBUSY;
116 goto error;
117 }
118
119 if (dev->ops->dev_down)
120 dev->ops->dev_down(dev);
121
122 dev->dev_up = false;
123
124error:
125 device_unlock(&dev->dev);
126 return rc;
127}
128
129/**
56 * nfc_start_poll - start polling for nfc targets 130 * nfc_start_poll - start polling for nfc targets
57 * 131 *
58 * @dev: The nfc device that must start polling 132 * @dev: The nfc device that must start polling
@@ -144,6 +218,8 @@ int nfc_activate_target(struct nfc_dev *dev, u32 target_idx, u32 protocol)
144 } 218 }
145 219
146 rc = dev->ops->activate_target(dev, target_idx, protocol); 220 rc = dev->ops->activate_target(dev, target_idx, protocol);
221 if (!rc)
222 dev->remote_activated = true;
147 223
148error: 224error:
149 device_unlock(&dev->dev); 225 device_unlock(&dev->dev);
@@ -170,6 +246,7 @@ int nfc_deactivate_target(struct nfc_dev *dev, u32 target_idx)
170 } 246 }
171 247
172 dev->ops->deactivate_target(dev, target_idx); 248 dev->ops->deactivate_target(dev, target_idx);
249 dev->remote_activated = false;
173 250
174error: 251error:
175 device_unlock(&dev->dev); 252 device_unlock(&dev->dev);
diff --git a/net/nfc/nci/Kconfig b/net/nfc/nci/Kconfig
new file mode 100644
index 000000000000..decdc49b26d8
--- /dev/null
+++ b/net/nfc/nci/Kconfig
@@ -0,0 +1,10 @@
1config NFC_NCI
2 depends on NFC && EXPERIMENTAL
3 tristate "NCI protocol support (EXPERIMENTAL)"
4 default n
5 help
6 NCI (NFC Controller Interface) is a communication protocol between
7 an NFC Controller (NFCC) and a Device Host (DH).
8
9 Say Y here to compile NCI support into the kernel or say M to
10 compile it as module (nci).
diff --git a/net/nfc/nci/Makefile b/net/nfc/nci/Makefile
new file mode 100644
index 000000000000..cdb3a2e44471
--- /dev/null
+++ b/net/nfc/nci/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for the Linux NFC NCI layer.
3#
4
5obj-$(CONFIG_NFC_NCI) += nci.o
6
7nci-objs := core.o data.o lib.o ntf.o rsp.o \ No newline at end of file
diff --git a/net/nfc/nci/core.c b/net/nfc/nci/core.c
new file mode 100644
index 000000000000..895e5fdf464a
--- /dev/null
+++ b/net/nfc/nci/core.c
@@ -0,0 +1,790 @@
1/*
2 * The NFC Controller Interface is the communication protocol between an
3 * NFC Controller (NFCC) and a Device Host (DH).
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Written by Ilan Elias <ilane@ti.com>
8 *
9 * Acknowledgements:
10 * This file is based on hci_core.c, which was written
11 * by Maxim Krasnyansky.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#include <linux/types.h>
29#include <linux/workqueue.h>
30#include <linux/completion.h>
31#include <linux/sched.h>
32#include <linux/bitops.h>
33#include <linux/skbuff.h>
34
35#include "../nfc.h"
36#include <net/nfc/nci.h>
37#include <net/nfc/nci_core.h>
38#include <linux/nfc.h>
39
40static void nci_cmd_work(struct work_struct *work);
41static void nci_rx_work(struct work_struct *work);
42static void nci_tx_work(struct work_struct *work);
43
44/* ---- NCI requests ---- */
45
46void nci_req_complete(struct nci_dev *ndev, int result)
47{
48 if (ndev->req_status == NCI_REQ_PEND) {
49 ndev->req_result = result;
50 ndev->req_status = NCI_REQ_DONE;
51 complete(&ndev->req_completion);
52 }
53}
54
55static void nci_req_cancel(struct nci_dev *ndev, int err)
56{
57 if (ndev->req_status == NCI_REQ_PEND) {
58 ndev->req_result = err;
59 ndev->req_status = NCI_REQ_CANCELED;
60 complete(&ndev->req_completion);
61 }
62}
63
64/* Execute request and wait for completion. */
65static int __nci_request(struct nci_dev *ndev,
66 void (*req)(struct nci_dev *ndev, unsigned long opt),
67 unsigned long opt,
68 __u32 timeout)
69{
70 int rc = 0;
71 unsigned long completion_rc;
72
73 ndev->req_status = NCI_REQ_PEND;
74
75 init_completion(&ndev->req_completion);
76 req(ndev, opt);
77 completion_rc = wait_for_completion_interruptible_timeout(
78 &ndev->req_completion,
79 timeout);
80
81 nfc_dbg("wait_for_completion return %ld", completion_rc);
82
83 if (completion_rc > 0) {
84 switch (ndev->req_status) {
85 case NCI_REQ_DONE:
86 rc = nci_to_errno(ndev->req_result);
87 break;
88
89 case NCI_REQ_CANCELED:
90 rc = -ndev->req_result;
91 break;
92
93 default:
94 rc = -ETIMEDOUT;
95 break;
96 }
97 } else {
98 nfc_err("wait_for_completion_interruptible_timeout failed %ld",
99 completion_rc);
100
101 rc = ((completion_rc == 0) ? (-ETIMEDOUT) : (completion_rc));
102 }
103
104 ndev->req_status = ndev->req_result = 0;
105
106 return rc;
107}
108
109static inline int nci_request(struct nci_dev *ndev,
110 void (*req)(struct nci_dev *ndev, unsigned long opt),
111 unsigned long opt, __u32 timeout)
112{
113 int rc;
114
115 if (!test_bit(NCI_UP, &ndev->flags))
116 return -ENETDOWN;
117
118 /* Serialize all requests */
119 mutex_lock(&ndev->req_lock);
120 rc = __nci_request(ndev, req, opt, timeout);
121 mutex_unlock(&ndev->req_lock);
122
123 return rc;
124}
125
126static void nci_reset_req(struct nci_dev *ndev, unsigned long opt)
127{
128 nci_send_cmd(ndev, NCI_OP_CORE_RESET_CMD, 0, NULL);
129}
130
131static void nci_init_req(struct nci_dev *ndev, unsigned long opt)
132{
133 nci_send_cmd(ndev, NCI_OP_CORE_INIT_CMD, 0, NULL);
134}
135
136static void nci_init_complete_req(struct nci_dev *ndev, unsigned long opt)
137{
138 struct nci_rf_disc_map_cmd cmd;
139 struct nci_core_conn_create_cmd conn_cmd;
140 int i;
141
142 /* create static rf connection */
143 conn_cmd.target_handle = 0;
144 conn_cmd.num_target_specific_params = 0;
145 nci_send_cmd(ndev, NCI_OP_CORE_CONN_CREATE_CMD, 2, &conn_cmd);
146
147 /* set rf mapping configurations */
148 cmd.num_mapping_configs = 0;
149
150 /* by default mapping is set to NCI_RF_INTERFACE_FRAME */
151 for (i = 0; i < ndev->num_supported_rf_interfaces; i++) {
152 if (ndev->supported_rf_interfaces[i] ==
153 NCI_RF_INTERFACE_ISO_DEP) {
154 cmd.mapping_configs[cmd.num_mapping_configs]
155 .rf_protocol = NCI_RF_PROTOCOL_ISO_DEP;
156 cmd.mapping_configs[cmd.num_mapping_configs]
157 .mode = NCI_DISC_MAP_MODE_BOTH;
158 cmd.mapping_configs[cmd.num_mapping_configs]
159 .rf_interface_type = NCI_RF_INTERFACE_ISO_DEP;
160 cmd.num_mapping_configs++;
161 } else if (ndev->supported_rf_interfaces[i] ==
162 NCI_RF_INTERFACE_NFC_DEP) {
163 cmd.mapping_configs[cmd.num_mapping_configs]
164 .rf_protocol = NCI_RF_PROTOCOL_NFC_DEP;
165 cmd.mapping_configs[cmd.num_mapping_configs]
166 .mode = NCI_DISC_MAP_MODE_BOTH;
167 cmd.mapping_configs[cmd.num_mapping_configs]
168 .rf_interface_type = NCI_RF_INTERFACE_NFC_DEP;
169 cmd.num_mapping_configs++;
170 }
171
172 if (cmd.num_mapping_configs == NCI_MAX_NUM_MAPPING_CONFIGS)
173 break;
174 }
175
176 nci_send_cmd(ndev, NCI_OP_RF_DISCOVER_MAP_CMD,
177 (1 + (cmd.num_mapping_configs*sizeof(struct disc_map_config))),
178 &cmd);
179}
180
181static void nci_rf_discover_req(struct nci_dev *ndev, unsigned long opt)
182{
183 struct nci_rf_disc_cmd cmd;
184 __u32 protocols = opt;
185
186 cmd.num_disc_configs = 0;
187
188 if ((cmd.num_disc_configs < NCI_MAX_NUM_RF_CONFIGS) &&
189 (protocols & NFC_PROTO_JEWEL_MASK
190 || protocols & NFC_PROTO_MIFARE_MASK
191 || protocols & NFC_PROTO_ISO14443_MASK
192 || protocols & NFC_PROTO_NFC_DEP_MASK)) {
193 cmd.disc_configs[cmd.num_disc_configs].type =
194 NCI_DISCOVERY_TYPE_POLL_A_PASSIVE;
195 cmd.disc_configs[cmd.num_disc_configs].frequency = 1;
196 cmd.num_disc_configs++;
197 }
198
199 if ((cmd.num_disc_configs < NCI_MAX_NUM_RF_CONFIGS) &&
200 (protocols & NFC_PROTO_ISO14443_MASK)) {
201 cmd.disc_configs[cmd.num_disc_configs].type =
202 NCI_DISCOVERY_TYPE_POLL_B_PASSIVE;
203 cmd.disc_configs[cmd.num_disc_configs].frequency = 1;
204 cmd.num_disc_configs++;
205 }
206
207 if ((cmd.num_disc_configs < NCI_MAX_NUM_RF_CONFIGS) &&
208 (protocols & NFC_PROTO_FELICA_MASK
209 || protocols & NFC_PROTO_NFC_DEP_MASK)) {
210 cmd.disc_configs[cmd.num_disc_configs].type =
211 NCI_DISCOVERY_TYPE_POLL_F_PASSIVE;
212 cmd.disc_configs[cmd.num_disc_configs].frequency = 1;
213 cmd.num_disc_configs++;
214 }
215
216 nci_send_cmd(ndev, NCI_OP_RF_DISCOVER_CMD,
217 (1 + (cmd.num_disc_configs*sizeof(struct disc_config))),
218 &cmd);
219}
220
221static void nci_rf_deactivate_req(struct nci_dev *ndev, unsigned long opt)
222{
223 struct nci_rf_deactivate_cmd cmd;
224
225 cmd.type = NCI_DEACTIVATE_TYPE_IDLE_MODE;
226
227 nci_send_cmd(ndev, NCI_OP_RF_DEACTIVATE_CMD,
228 sizeof(struct nci_rf_deactivate_cmd),
229 &cmd);
230}
231
232static int nci_open_device(struct nci_dev *ndev)
233{
234 int rc = 0;
235
236 mutex_lock(&ndev->req_lock);
237
238 if (test_bit(NCI_UP, &ndev->flags)) {
239 rc = -EALREADY;
240 goto done;
241 }
242
243 if (ndev->ops->open(ndev)) {
244 rc = -EIO;
245 goto done;
246 }
247
248 atomic_set(&ndev->cmd_cnt, 1);
249
250 set_bit(NCI_INIT, &ndev->flags);
251
252 rc = __nci_request(ndev, nci_reset_req, 0,
253 msecs_to_jiffies(NCI_RESET_TIMEOUT));
254
255 if (!rc) {
256 rc = __nci_request(ndev, nci_init_req, 0,
257 msecs_to_jiffies(NCI_INIT_TIMEOUT));
258 }
259
260 if (!rc) {
261 rc = __nci_request(ndev, nci_init_complete_req, 0,
262 msecs_to_jiffies(NCI_INIT_TIMEOUT));
263 }
264
265 clear_bit(NCI_INIT, &ndev->flags);
266
267 if (!rc) {
268 set_bit(NCI_UP, &ndev->flags);
269 } else {
270 /* Init failed, cleanup */
271 skb_queue_purge(&ndev->cmd_q);
272 skb_queue_purge(&ndev->rx_q);
273 skb_queue_purge(&ndev->tx_q);
274
275 ndev->ops->close(ndev);
276 ndev->flags = 0;
277 }
278
279done:
280 mutex_unlock(&ndev->req_lock);
281 return rc;
282}
283
284static int nci_close_device(struct nci_dev *ndev)
285{
286 nci_req_cancel(ndev, ENODEV);
287 mutex_lock(&ndev->req_lock);
288
289 if (!test_and_clear_bit(NCI_UP, &ndev->flags)) {
290 del_timer_sync(&ndev->cmd_timer);
291 mutex_unlock(&ndev->req_lock);
292 return 0;
293 }
294
295 /* Drop RX and TX queues */
296 skb_queue_purge(&ndev->rx_q);
297 skb_queue_purge(&ndev->tx_q);
298
299 /* Flush RX and TX wq */
300 flush_workqueue(ndev->rx_wq);
301 flush_workqueue(ndev->tx_wq);
302
303 /* Reset device */
304 skb_queue_purge(&ndev->cmd_q);
305 atomic_set(&ndev->cmd_cnt, 1);
306
307 set_bit(NCI_INIT, &ndev->flags);
308 __nci_request(ndev, nci_reset_req, 0,
309 msecs_to_jiffies(NCI_RESET_TIMEOUT));
310 clear_bit(NCI_INIT, &ndev->flags);
311
312 /* Flush cmd wq */
313 flush_workqueue(ndev->cmd_wq);
314
315 /* After this point our queues are empty
316 * and no works are scheduled. */
317 ndev->ops->close(ndev);
318
319 /* Clear flags */
320 ndev->flags = 0;
321
322 mutex_unlock(&ndev->req_lock);
323
324 return 0;
325}
326
327/* NCI command timer function */
328static void nci_cmd_timer(unsigned long arg)
329{
330 struct nci_dev *ndev = (void *) arg;
331
332 nfc_dbg("entry");
333
334 atomic_set(&ndev->cmd_cnt, 1);
335 queue_work(ndev->cmd_wq, &ndev->cmd_work);
336}
337
338static int nci_dev_up(struct nfc_dev *nfc_dev)
339{
340 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev);
341
342 nfc_dbg("entry");
343
344 return nci_open_device(ndev);
345}
346
347static int nci_dev_down(struct nfc_dev *nfc_dev)
348{
349 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev);
350
351 nfc_dbg("entry");
352
353 return nci_close_device(ndev);
354}
355
356static int nci_start_poll(struct nfc_dev *nfc_dev, __u32 protocols)
357{
358 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev);
359 int rc;
360
361 nfc_dbg("entry");
362
363 if (test_bit(NCI_DISCOVERY, &ndev->flags)) {
364 nfc_err("unable to start poll, since poll is already active");
365 return -EBUSY;
366 }
367
368 if (test_bit(NCI_POLL_ACTIVE, &ndev->flags)) {
369 nfc_dbg("target already active, first deactivate...");
370
371 rc = nci_request(ndev, nci_rf_deactivate_req, 0,
372 msecs_to_jiffies(NCI_RF_DEACTIVATE_TIMEOUT));
373 if (rc)
374 return -EBUSY;
375 }
376
377 rc = nci_request(ndev, nci_rf_discover_req, protocols,
378 msecs_to_jiffies(NCI_RF_DISC_TIMEOUT));
379
380 if (!rc)
381 ndev->poll_prots = protocols;
382
383 return rc;
384}
385
386static void nci_stop_poll(struct nfc_dev *nfc_dev)
387{
388 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev);
389
390 nfc_dbg("entry");
391
392 if (!test_bit(NCI_DISCOVERY, &ndev->flags)) {
393 nfc_err("unable to stop poll, since poll is not active");
394 return;
395 }
396
397 nci_request(ndev, nci_rf_deactivate_req, 0,
398 msecs_to_jiffies(NCI_RF_DEACTIVATE_TIMEOUT));
399}
400
401static int nci_activate_target(struct nfc_dev *nfc_dev, __u32 target_idx,
402 __u32 protocol)
403{
404 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev);
405
406 nfc_dbg("entry, target_idx %d, protocol 0x%x", target_idx, protocol);
407
408 if (!test_bit(NCI_POLL_ACTIVE, &ndev->flags)) {
409 nfc_err("there is no available target to activate");
410 return -EINVAL;
411 }
412
413 if (ndev->target_active_prot) {
414 nfc_err("there is already an active target");
415 return -EBUSY;
416 }
417
418 if (!(ndev->target_available_prots & (1 << protocol))) {
419 nfc_err("target does not support the requested protocol 0x%x",
420 protocol);
421 return -EINVAL;
422 }
423
424 ndev->target_active_prot = protocol;
425 ndev->target_available_prots = 0;
426
427 return 0;
428}
429
430static void nci_deactivate_target(struct nfc_dev *nfc_dev, __u32 target_idx)
431{
432 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev);
433
434 nfc_dbg("entry, target_idx %d", target_idx);
435
436 if (!ndev->target_active_prot) {
437 nfc_err("unable to deactivate target, no active target");
438 return;
439 }
440
441 ndev->target_active_prot = 0;
442
443 if (test_bit(NCI_POLL_ACTIVE, &ndev->flags)) {
444 nci_request(ndev, nci_rf_deactivate_req, 0,
445 msecs_to_jiffies(NCI_RF_DEACTIVATE_TIMEOUT));
446 }
447}
448
449static int nci_data_exchange(struct nfc_dev *nfc_dev, __u32 target_idx,
450 struct sk_buff *skb,
451 data_exchange_cb_t cb,
452 void *cb_context)
453{
454 struct nci_dev *ndev = nfc_get_drvdata(nfc_dev);
455
456 nfc_dbg("entry, target_idx %d, len %d", target_idx, skb->len);
457
458 if (!ndev->target_active_prot) {
459 nfc_err("unable to exchange data, no active target");
460 return -EINVAL;
461 }
462
463 /* store cb and context to be used on receiving data */
464 ndev->data_exchange_cb = cb;
465 ndev->data_exchange_cb_context = cb_context;
466
467 return nci_send_data(ndev, ndev->conn_id, skb);
468}
469
470static struct nfc_ops nci_nfc_ops = {
471 .dev_up = nci_dev_up,
472 .dev_down = nci_dev_down,
473 .start_poll = nci_start_poll,
474 .stop_poll = nci_stop_poll,
475 .activate_target = nci_activate_target,
476 .deactivate_target = nci_deactivate_target,
477 .data_exchange = nci_data_exchange,
478};
479
480/* ---- Interface to NCI drivers ---- */
481
482/**
483 * nci_allocate_device - allocate a new nci device
484 *
485 * @ops: device operations
486 * @supported_protocols: NFC protocols supported by the device
487 */
488struct nci_dev *nci_allocate_device(struct nci_ops *ops,
489 __u32 supported_protocols,
490 int tx_headroom,
491 int tx_tailroom)
492{
493 struct nci_dev *ndev = NULL;
494
495 nfc_dbg("entry, supported_protocols 0x%x", supported_protocols);
496
497 if (!ops->open || !ops->close || !ops->send)
498 goto exit;
499
500 if (!supported_protocols)
501 goto exit;
502
503 ndev = kzalloc(sizeof(struct nci_dev), GFP_KERNEL);
504 if (!ndev)
505 goto exit;
506
507 ndev->ops = ops;
508 ndev->tx_headroom = tx_headroom;
509 ndev->tx_tailroom = tx_tailroom;
510
511 ndev->nfc_dev = nfc_allocate_device(&nci_nfc_ops,
512 supported_protocols,
513 tx_headroom + NCI_DATA_HDR_SIZE,
514 tx_tailroom);
515 if (!ndev->nfc_dev)
516 goto free_exit;
517
518 nfc_set_drvdata(ndev->nfc_dev, ndev);
519
520 goto exit;
521
522free_exit:
523 kfree(ndev);
524
525exit:
526 return ndev;
527}
528EXPORT_SYMBOL(nci_allocate_device);
529
530/**
531 * nci_free_device - deallocate nci device
532 *
533 * @ndev: The nci device to deallocate
534 */
535void nci_free_device(struct nci_dev *ndev)
536{
537 nfc_dbg("entry");
538
539 nfc_free_device(ndev->nfc_dev);
540 kfree(ndev);
541}
542EXPORT_SYMBOL(nci_free_device);
543
544/**
545 * nci_register_device - register a nci device in the nfc subsystem
546 *
547 * @dev: The nci device to register
548 */
549int nci_register_device(struct nci_dev *ndev)
550{
551 int rc;
552 struct device *dev = &ndev->nfc_dev->dev;
553 char name[32];
554
555 nfc_dbg("entry");
556
557 rc = nfc_register_device(ndev->nfc_dev);
558 if (rc)
559 goto exit;
560
561 ndev->flags = 0;
562
563 INIT_WORK(&ndev->cmd_work, nci_cmd_work);
564 snprintf(name, sizeof(name), "%s_nci_cmd_wq", dev_name(dev));
565 ndev->cmd_wq = create_singlethread_workqueue(name);
566 if (!ndev->cmd_wq) {
567 rc = -ENOMEM;
568 goto unreg_exit;
569 }
570
571 INIT_WORK(&ndev->rx_work, nci_rx_work);
572 snprintf(name, sizeof(name), "%s_nci_rx_wq", dev_name(dev));
573 ndev->rx_wq = create_singlethread_workqueue(name);
574 if (!ndev->rx_wq) {
575 rc = -ENOMEM;
576 goto destroy_cmd_wq_exit;
577 }
578
579 INIT_WORK(&ndev->tx_work, nci_tx_work);
580 snprintf(name, sizeof(name), "%s_nci_tx_wq", dev_name(dev));
581 ndev->tx_wq = create_singlethread_workqueue(name);
582 if (!ndev->tx_wq) {
583 rc = -ENOMEM;
584 goto destroy_rx_wq_exit;
585 }
586
587 skb_queue_head_init(&ndev->cmd_q);
588 skb_queue_head_init(&ndev->rx_q);
589 skb_queue_head_init(&ndev->tx_q);
590
591 setup_timer(&ndev->cmd_timer, nci_cmd_timer,
592 (unsigned long) ndev);
593
594 mutex_init(&ndev->req_lock);
595
596 goto exit;
597
598destroy_rx_wq_exit:
599 destroy_workqueue(ndev->rx_wq);
600
601destroy_cmd_wq_exit:
602 destroy_workqueue(ndev->cmd_wq);
603
604unreg_exit:
605 nfc_unregister_device(ndev->nfc_dev);
606
607exit:
608 return rc;
609}
610EXPORT_SYMBOL(nci_register_device);
611
612/**
613 * nci_unregister_device - unregister a nci device in the nfc subsystem
614 *
615 * @dev: The nci device to unregister
616 */
617void nci_unregister_device(struct nci_dev *ndev)
618{
619 nfc_dbg("entry");
620
621 nci_close_device(ndev);
622
623 destroy_workqueue(ndev->cmd_wq);
624 destroy_workqueue(ndev->rx_wq);
625 destroy_workqueue(ndev->tx_wq);
626
627 nfc_unregister_device(ndev->nfc_dev);
628}
629EXPORT_SYMBOL(nci_unregister_device);
630
631/**
632 * nci_recv_frame - receive frame from NCI drivers
633 *
634 * @skb: The sk_buff to receive
635 */
636int nci_recv_frame(struct sk_buff *skb)
637{
638 struct nci_dev *ndev = (struct nci_dev *) skb->dev;
639
640 nfc_dbg("entry, len %d", skb->len);
641
642 if (!ndev || (!test_bit(NCI_UP, &ndev->flags)
643 && !test_bit(NCI_INIT, &ndev->flags))) {
644 kfree_skb(skb);
645 return -ENXIO;
646 }
647
648 /* Queue frame for rx worker thread */
649 skb_queue_tail(&ndev->rx_q, skb);
650 queue_work(ndev->rx_wq, &ndev->rx_work);
651
652 return 0;
653}
654EXPORT_SYMBOL(nci_recv_frame);
655
656static int nci_send_frame(struct sk_buff *skb)
657{
658 struct nci_dev *ndev = (struct nci_dev *) skb->dev;
659
660 nfc_dbg("entry, len %d", skb->len);
661
662 if (!ndev) {
663 kfree_skb(skb);
664 return -ENODEV;
665 }
666
667 /* Get rid of skb owner, prior to sending to the driver. */
668 skb_orphan(skb);
669
670 return ndev->ops->send(skb);
671}
672
673/* Send NCI command */
674int nci_send_cmd(struct nci_dev *ndev, __u16 opcode, __u8 plen, void *payload)
675{
676 struct nci_ctrl_hdr *hdr;
677 struct sk_buff *skb;
678
679 nfc_dbg("entry, opcode 0x%x, plen %d", opcode, plen);
680
681 skb = nci_skb_alloc(ndev, (NCI_CTRL_HDR_SIZE + plen), GFP_KERNEL);
682 if (!skb) {
683 nfc_err("no memory for command");
684 return -ENOMEM;
685 }
686
687 hdr = (struct nci_ctrl_hdr *) skb_put(skb, NCI_CTRL_HDR_SIZE);
688 hdr->gid = nci_opcode_gid(opcode);
689 hdr->oid = nci_opcode_oid(opcode);
690 hdr->plen = plen;
691
692 nci_mt_set((__u8 *)hdr, NCI_MT_CMD_PKT);
693 nci_pbf_set((__u8 *)hdr, NCI_PBF_LAST);
694
695 if (plen)
696 memcpy(skb_put(skb, plen), payload, plen);
697
698 skb->dev = (void *) ndev;
699
700 skb_queue_tail(&ndev->cmd_q, skb);
701 queue_work(ndev->cmd_wq, &ndev->cmd_work);
702
703 return 0;
704}
705
706/* ---- NCI TX Data worker thread ---- */
707
708static void nci_tx_work(struct work_struct *work)
709{
710 struct nci_dev *ndev = container_of(work, struct nci_dev, tx_work);
711 struct sk_buff *skb;
712
713 nfc_dbg("entry, credits_cnt %d", atomic_read(&ndev->credits_cnt));
714
715 /* Send queued tx data */
716 while (atomic_read(&ndev->credits_cnt)) {
717 skb = skb_dequeue(&ndev->tx_q);
718 if (!skb)
719 return;
720
721 atomic_dec(&ndev->credits_cnt);
722
723 nfc_dbg("NCI TX: MT=data, PBF=%d, conn_id=%d, plen=%d",
724 nci_pbf(skb->data),
725 nci_conn_id(skb->data),
726 nci_plen(skb->data));
727
728 nci_send_frame(skb);
729 }
730}
731
732/* ----- NCI RX worker thread (data & control) ----- */
733
734static void nci_rx_work(struct work_struct *work)
735{
736 struct nci_dev *ndev = container_of(work, struct nci_dev, rx_work);
737 struct sk_buff *skb;
738
739 while ((skb = skb_dequeue(&ndev->rx_q))) {
740 /* Process frame */
741 switch (nci_mt(skb->data)) {
742 case NCI_MT_RSP_PKT:
743 nci_rsp_packet(ndev, skb);
744 break;
745
746 case NCI_MT_NTF_PKT:
747 nci_ntf_packet(ndev, skb);
748 break;
749
750 case NCI_MT_DATA_PKT:
751 nci_rx_data_packet(ndev, skb);
752 break;
753
754 default:
755 nfc_err("unknown MT 0x%x", nci_mt(skb->data));
756 kfree_skb(skb);
757 break;
758 }
759 }
760}
761
762/* ----- NCI TX CMD worker thread ----- */
763
764static void nci_cmd_work(struct work_struct *work)
765{
766 struct nci_dev *ndev = container_of(work, struct nci_dev, cmd_work);
767 struct sk_buff *skb;
768
769 nfc_dbg("entry, cmd_cnt %d", atomic_read(&ndev->cmd_cnt));
770
771 /* Send queued command */
772 if (atomic_read(&ndev->cmd_cnt)) {
773 skb = skb_dequeue(&ndev->cmd_q);
774 if (!skb)
775 return;
776
777 atomic_dec(&ndev->cmd_cnt);
778
779 nfc_dbg("NCI TX: MT=cmd, PBF=%d, GID=0x%x, OID=0x%x, plen=%d",
780 nci_pbf(skb->data),
781 nci_opcode_gid(nci_opcode(skb->data)),
782 nci_opcode_oid(nci_opcode(skb->data)),
783 nci_plen(skb->data));
784
785 nci_send_frame(skb);
786
787 mod_timer(&ndev->cmd_timer,
788 jiffies + msecs_to_jiffies(NCI_CMD_TIMEOUT));
789 }
790}
diff --git a/net/nfc/nci/data.c b/net/nfc/nci/data.c
new file mode 100644
index 000000000000..141790ada4aa
--- /dev/null
+++ b/net/nfc/nci/data.c
@@ -0,0 +1,245 @@
1/*
2 * The NFC Controller Interface is the communication protocol between an
3 * NFC Controller (NFCC) and a Device Host (DH).
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Written by Ilan Elias <ilane@ti.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2
11 * as published by the Free Software Foundation
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#include <linux/types.h>
25#include <linux/interrupt.h>
26#include <linux/wait.h>
27#include <linux/bitops.h>
28#include <linux/skbuff.h>
29
30#include "../nfc.h"
31#include <net/nfc/nci.h>
32#include <net/nfc/nci_core.h>
33#include <linux/nfc.h>
34
35/* Complete data exchange transaction and forward skb to nfc core */
36void nci_data_exchange_complete(struct nci_dev *ndev,
37 struct sk_buff *skb,
38 int err)
39{
40 data_exchange_cb_t cb = ndev->data_exchange_cb;
41 void *cb_context = ndev->data_exchange_cb_context;
42
43 nfc_dbg("entry, len %d, err %d", ((skb) ? (skb->len) : (0)), err);
44
45 if (cb) {
46 ndev->data_exchange_cb = NULL;
47 ndev->data_exchange_cb_context = 0;
48
49 /* forward skb to nfc core */
50 cb(cb_context, skb, err);
51 } else if (skb) {
52 nfc_err("no rx callback, dropping rx data...");
53
54 /* no waiting callback, free skb */
55 kfree_skb(skb);
56 }
57}
58
59/* ----------------- NCI TX Data ----------------- */
60
61static inline void nci_push_data_hdr(struct nci_dev *ndev,
62 __u8 conn_id,
63 struct sk_buff *skb,
64 __u8 pbf)
65{
66 struct nci_data_hdr *hdr;
67 int plen = skb->len;
68
69 hdr = (struct nci_data_hdr *) skb_push(skb, NCI_DATA_HDR_SIZE);
70 hdr->conn_id = conn_id;
71 hdr->rfu = 0;
72 hdr->plen = plen;
73
74 nci_mt_set((__u8 *)hdr, NCI_MT_DATA_PKT);
75 nci_pbf_set((__u8 *)hdr, pbf);
76
77 skb->dev = (void *) ndev;
78}
79
80static int nci_queue_tx_data_frags(struct nci_dev *ndev,
81 __u8 conn_id,
82 struct sk_buff *skb) {
83 int total_len = skb->len;
84 unsigned char *data = skb->data;
85 unsigned long flags;
86 struct sk_buff_head frags_q;
87 struct sk_buff *skb_frag;
88 int frag_len;
89 int rc = 0;
90
91 nfc_dbg("entry, conn_id 0x%x, total_len %d", conn_id, total_len);
92
93 __skb_queue_head_init(&frags_q);
94
95 while (total_len) {
96 frag_len = min_t(int, total_len, ndev->max_pkt_payload_size);
97
98 skb_frag = nci_skb_alloc(ndev,
99 (NCI_DATA_HDR_SIZE + frag_len),
100 GFP_KERNEL);
101 if (skb_frag == NULL) {
102 rc = -ENOMEM;
103 goto free_exit;
104 }
105 skb_reserve(skb_frag, NCI_DATA_HDR_SIZE);
106
107 /* first, copy the data */
108 memcpy(skb_put(skb_frag, frag_len), data, frag_len);
109
110 /* second, set the header */
111 nci_push_data_hdr(ndev, conn_id, skb_frag,
112 ((total_len == frag_len) ? (NCI_PBF_LAST) : (NCI_PBF_CONT)));
113
114 __skb_queue_tail(&frags_q, skb_frag);
115
116 data += frag_len;
117 total_len -= frag_len;
118
119 nfc_dbg("frag_len %d, remaining total_len %d",
120 frag_len, total_len);
121 }
122
123 /* queue all fragments atomically */
124 spin_lock_irqsave(&ndev->tx_q.lock, flags);
125
126 while ((skb_frag = __skb_dequeue(&frags_q)) != NULL)
127 __skb_queue_tail(&ndev->tx_q, skb_frag);
128
129 spin_unlock_irqrestore(&ndev->tx_q.lock, flags);
130
131 /* free the original skb */
132 kfree_skb(skb);
133
134 goto exit;
135
136free_exit:
137 while ((skb_frag = __skb_dequeue(&frags_q)) != NULL)
138 kfree_skb(skb_frag);
139
140exit:
141 return rc;
142}
143
144/* Send NCI data */
145int nci_send_data(struct nci_dev *ndev, __u8 conn_id, struct sk_buff *skb)
146{
147 int rc = 0;
148
149 nfc_dbg("entry, conn_id 0x%x, plen %d", conn_id, skb->len);
150
151 /* check if the packet need to be fragmented */
152 if (skb->len <= ndev->max_pkt_payload_size) {
153 /* no need to fragment packet */
154 nci_push_data_hdr(ndev, conn_id, skb, NCI_PBF_LAST);
155
156 skb_queue_tail(&ndev->tx_q, skb);
157 } else {
158 /* fragment packet and queue the fragments */
159 rc = nci_queue_tx_data_frags(ndev, conn_id, skb);
160 if (rc) {
161 nfc_err("failed to fragment tx data packet");
162 goto free_exit;
163 }
164 }
165
166 queue_work(ndev->tx_wq, &ndev->tx_work);
167
168 goto exit;
169
170free_exit:
171 kfree_skb(skb);
172
173exit:
174 return rc;
175}
176
177/* ----------------- NCI RX Data ----------------- */
178
179static void nci_add_rx_data_frag(struct nci_dev *ndev,
180 struct sk_buff *skb,
181 __u8 pbf)
182{
183 int reassembly_len;
184 int err = 0;
185
186 if (ndev->rx_data_reassembly) {
187 reassembly_len = ndev->rx_data_reassembly->len;
188
189 /* first, make enough room for the already accumulated data */
190 if (skb_cow_head(skb, reassembly_len)) {
191 nfc_err("error adding room for accumulated rx data");
192
193 kfree_skb(skb);
194 skb = 0;
195
196 kfree_skb(ndev->rx_data_reassembly);
197 ndev->rx_data_reassembly = 0;
198
199 err = -ENOMEM;
200 goto exit;
201 }
202
203 /* second, combine the two fragments */
204 memcpy(skb_push(skb, reassembly_len),
205 ndev->rx_data_reassembly->data,
206 reassembly_len);
207
208 /* third, free old reassembly */
209 kfree_skb(ndev->rx_data_reassembly);
210 ndev->rx_data_reassembly = 0;
211 }
212
213 if (pbf == NCI_PBF_CONT) {
214 /* need to wait for next fragment, store skb and exit */
215 ndev->rx_data_reassembly = skb;
216 return;
217 }
218
219exit:
220 nci_data_exchange_complete(ndev, skb, err);
221}
222
223/* Rx Data packet */
224void nci_rx_data_packet(struct nci_dev *ndev, struct sk_buff *skb)
225{
226 __u8 pbf = nci_pbf(skb->data);
227
228 nfc_dbg("entry, len %d", skb->len);
229
230 nfc_dbg("NCI RX: MT=data, PBF=%d, conn_id=%d, plen=%d",
231 nci_pbf(skb->data),
232 nci_conn_id(skb->data),
233 nci_plen(skb->data));
234
235 /* strip the nci data header */
236 skb_pull(skb, NCI_DATA_HDR_SIZE);
237
238 if (ndev->target_active_prot == NFC_PROTO_MIFARE) {
239 /* frame I/F => remove the status byte */
240 nfc_dbg("NFC_PROTO_MIFARE => remove the status byte");
241 skb_trim(skb, (skb->len - 1));
242 }
243
244 nci_add_rx_data_frag(ndev, skb, pbf);
245}
diff --git a/net/nfc/nci/lib.c b/net/nfc/nci/lib.c
new file mode 100644
index 000000000000..b19dc2fa90e1
--- /dev/null
+++ b/net/nfc/nci/lib.c
@@ -0,0 +1,94 @@
1/*
2 * The NFC Controller Interface is the communication protocol between an
3 * NFC Controller (NFCC) and a Device Host (DH).
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Written by Ilan Elias <ilane@ti.com>
8 *
9 * Acknowledgements:
10 * This file is based on lib.c, which was written
11 * by Maxim Krasnyansky.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/types.h>
31#include <linux/errno.h>
32
33#include <net/nfc/nci.h>
34
35/* NCI status codes to Unix errno mapping */
36int nci_to_errno(__u8 code)
37{
38 switch (code) {
39 case NCI_STATUS_OK:
40 return 0;
41
42 case NCI_STATUS_REJECTED:
43 return -EBUSY;
44
45 case NCI_STATUS_MESSAGE_CORRUPTED:
46 return -EBADMSG;
47
48 case NCI_STATUS_BUFFER_FULL:
49 return -ENOBUFS;
50
51 case NCI_STATUS_NOT_INITIALIZED:
52 return -EHOSTDOWN;
53
54 case NCI_STATUS_SYNTAX_ERROR:
55 case NCI_STATUS_SEMANTIC_ERROR:
56 case NCI_STATUS_INVALID_PARAM:
57 case NCI_STATUS_RF_PROTOCOL_ERROR:
58 case NCI_STATUS_NFCEE_PROTOCOL_ERROR:
59 return -EPROTO;
60
61 case NCI_STATUS_UNKNOWN_GID:
62 case NCI_STATUS_UNKNOWN_OID:
63 return -EBADRQC;
64
65 case NCI_STATUS_MESSAGE_SIZE_EXCEEDED:
66 return -EMSGSIZE;
67
68 case NCI_STATUS_DISCOVERY_ALREADY_STARTED:
69 return -EALREADY;
70
71 case NCI_STATUS_DISCOVERY_TARGET_ACTIVATION_FAILED:
72 case NCI_STATUS_NFCEE_INTERFACE_ACTIVATION_FAILED:
73 return -ECONNREFUSED;
74
75 case NCI_STATUS_RF_TRANSMISSION_ERROR:
76 case NCI_STATUS_NFCEE_TRANSMISSION_ERROR:
77 return -ECOMM;
78
79 case NCI_STATUS_RF_TIMEOUT_ERROR:
80 case NCI_STATUS_NFCEE_TIMEOUT_ERROR:
81 return -ETIMEDOUT;
82
83 case NCI_STATUS_RF_LINK_LOSS_ERROR:
84 return -ENOLINK;
85
86 case NCI_STATUS_MAX_ACTIVE_NFCEE_INTERFACES_REACHED:
87 return -EDQUOT;
88
89 case NCI_STATUS_FAILED:
90 default:
91 return -ENOSYS;
92 }
93}
94EXPORT_SYMBOL(nci_to_errno);
diff --git a/net/nfc/nci/ntf.c b/net/nfc/nci/ntf.c
new file mode 100644
index 000000000000..8dd75352ab6c
--- /dev/null
+++ b/net/nfc/nci/ntf.c
@@ -0,0 +1,258 @@
1/*
2 * The NFC Controller Interface is the communication protocol between an
3 * NFC Controller (NFCC) and a Device Host (DH).
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Written by Ilan Elias <ilane@ti.com>
8 *
9 * Acknowledgements:
10 * This file is based on hci_event.c, which was written
11 * by Maxim Krasnyansky.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#include <linux/types.h>
29#include <linux/interrupt.h>
30#include <linux/bitops.h>
31#include <linux/skbuff.h>
32
33#include "../nfc.h"
34#include <net/nfc/nci.h>
35#include <net/nfc/nci_core.h>
36#include <linux/nfc.h>
37
38/* Handle NCI Notification packets */
39
40static void nci_core_conn_credits_ntf_packet(struct nci_dev *ndev,
41 struct sk_buff *skb)
42{
43 struct nci_core_conn_credit_ntf *ntf = (void *) skb->data;
44 int i;
45
46 nfc_dbg("entry, num_entries %d", ntf->num_entries);
47
48 if (ntf->num_entries > NCI_MAX_NUM_CONN)
49 ntf->num_entries = NCI_MAX_NUM_CONN;
50
51 /* update the credits */
52 for (i = 0; i < ntf->num_entries; i++) {
53 nfc_dbg("entry[%d]: conn_id %d, credits %d", i,
54 ntf->conn_entries[i].conn_id,
55 ntf->conn_entries[i].credits);
56
57 if (ntf->conn_entries[i].conn_id == ndev->conn_id) {
58 /* found static rf connection */
59 atomic_add(ntf->conn_entries[i].credits,
60 &ndev->credits_cnt);
61 }
62 }
63
64 /* trigger the next tx */
65 if (!skb_queue_empty(&ndev->tx_q))
66 queue_work(ndev->tx_wq, &ndev->tx_work);
67}
68
69static void nci_rf_field_info_ntf_packet(struct nci_dev *ndev,
70 struct sk_buff *skb)
71{
72 struct nci_rf_field_info_ntf *ntf = (void *) skb->data;
73
74 nfc_dbg("entry, rf_field_status %d", ntf->rf_field_status);
75}
76
77static int nci_rf_activate_nfca_passive_poll(struct nci_dev *ndev,
78 struct nci_rf_activate_ntf *ntf, __u8 *data)
79{
80 struct rf_tech_specific_params_nfca_poll *nfca_poll;
81 struct activation_params_nfca_poll_iso_dep *nfca_poll_iso_dep;
82
83 nfca_poll = &ntf->rf_tech_specific_params.nfca_poll;
84 nfca_poll_iso_dep = &ntf->activation_params.nfca_poll_iso_dep;
85
86 nfca_poll->sens_res = __le16_to_cpu(*((__u16 *)data));
87 data += 2;
88
89 nfca_poll->nfcid1_len = *data++;
90
91 nfc_dbg("sens_res 0x%x, nfcid1_len %d",
92 nfca_poll->sens_res,
93 nfca_poll->nfcid1_len);
94
95 memcpy(nfca_poll->nfcid1, data, nfca_poll->nfcid1_len);
96 data += nfca_poll->nfcid1_len;
97
98 nfca_poll->sel_res_len = *data++;
99
100 if (nfca_poll->sel_res_len != 0)
101 nfca_poll->sel_res = *data++;
102
103 ntf->rf_interface_type = *data++;
104 ntf->activation_params_len = *data++;
105
106 nfc_dbg("sel_res_len %d, sel_res 0x%x, rf_interface_type %d, activation_params_len %d",
107 nfca_poll->sel_res_len,
108 nfca_poll->sel_res,
109 ntf->rf_interface_type,
110 ntf->activation_params_len);
111
112 switch (ntf->rf_interface_type) {
113 case NCI_RF_INTERFACE_ISO_DEP:
114 nfca_poll_iso_dep->rats_res_len = *data++;
115 if (nfca_poll_iso_dep->rats_res_len > 0) {
116 memcpy(nfca_poll_iso_dep->rats_res,
117 data,
118 nfca_poll_iso_dep->rats_res_len);
119 }
120 break;
121
122 case NCI_RF_INTERFACE_FRAME:
123 /* no activation params */
124 break;
125
126 default:
127 nfc_err("unsupported rf_interface_type 0x%x",
128 ntf->rf_interface_type);
129 return -EPROTO;
130 }
131
132 return 0;
133}
134
135static void nci_target_found(struct nci_dev *ndev,
136 struct nci_rf_activate_ntf *ntf)
137{
138 struct nfc_target nfc_tgt;
139
140 if (ntf->rf_protocol == NCI_RF_PROTOCOL_T2T) /* T2T MifareUL */
141 nfc_tgt.supported_protocols = NFC_PROTO_MIFARE_MASK;
142 else if (ntf->rf_protocol == NCI_RF_PROTOCOL_ISO_DEP) /* 4A */
143 nfc_tgt.supported_protocols = NFC_PROTO_ISO14443_MASK;
144
145 nfc_tgt.sens_res = ntf->rf_tech_specific_params.nfca_poll.sens_res;
146 nfc_tgt.sel_res = ntf->rf_tech_specific_params.nfca_poll.sel_res;
147
148 if (!(nfc_tgt.supported_protocols & ndev->poll_prots)) {
149 nfc_dbg("the target found does not have the desired protocol");
150 return;
151 }
152
153 nfc_dbg("new target found, supported_protocols 0x%x",
154 nfc_tgt.supported_protocols);
155
156 ndev->target_available_prots = nfc_tgt.supported_protocols;
157
158 nfc_targets_found(ndev->nfc_dev, &nfc_tgt, 1);
159}
160
161static void nci_rf_activate_ntf_packet(struct nci_dev *ndev,
162 struct sk_buff *skb)
163{
164 struct nci_rf_activate_ntf ntf;
165 __u8 *data = skb->data;
166 int rc = -1;
167
168 clear_bit(NCI_DISCOVERY, &ndev->flags);
169 set_bit(NCI_POLL_ACTIVE, &ndev->flags);
170
171 ntf.target_handle = *data++;
172 ntf.rf_protocol = *data++;
173 ntf.rf_tech_and_mode = *data++;
174 ntf.rf_tech_specific_params_len = *data++;
175
176 nfc_dbg("target_handle %d, rf_protocol 0x%x, rf_tech_and_mode 0x%x, rf_tech_specific_params_len %d",
177 ntf.target_handle,
178 ntf.rf_protocol,
179 ntf.rf_tech_and_mode,
180 ntf.rf_tech_specific_params_len);
181
182 switch (ntf.rf_tech_and_mode) {
183 case NCI_NFC_A_PASSIVE_POLL_MODE:
184 rc = nci_rf_activate_nfca_passive_poll(ndev, &ntf,
185 data);
186 break;
187
188 default:
189 nfc_err("unsupported rf_tech_and_mode 0x%x",
190 ntf.rf_tech_and_mode);
191 return;
192 }
193
194 if (!rc)
195 nci_target_found(ndev, &ntf);
196}
197
198static void nci_rf_deactivate_ntf_packet(struct nci_dev *ndev,
199 struct sk_buff *skb)
200{
201 __u8 type = skb->data[0];
202
203 nfc_dbg("entry, type 0x%x", type);
204
205 clear_bit(NCI_POLL_ACTIVE, &ndev->flags);
206 ndev->target_active_prot = 0;
207
208 /* drop tx data queue */
209 skb_queue_purge(&ndev->tx_q);
210
211 /* drop partial rx data packet */
212 if (ndev->rx_data_reassembly) {
213 kfree_skb(ndev->rx_data_reassembly);
214 ndev->rx_data_reassembly = 0;
215 }
216
217 /* complete the data exchange transaction, if exists */
218 if (ndev->data_exchange_cb)
219 nci_data_exchange_complete(ndev, NULL, -EIO);
220}
221
222void nci_ntf_packet(struct nci_dev *ndev, struct sk_buff *skb)
223{
224 __u16 ntf_opcode = nci_opcode(skb->data);
225
226 nfc_dbg("NCI RX: MT=ntf, PBF=%d, GID=0x%x, OID=0x%x, plen=%d",
227 nci_pbf(skb->data),
228 nci_opcode_gid(ntf_opcode),
229 nci_opcode_oid(ntf_opcode),
230 nci_plen(skb->data));
231
232 /* strip the nci control header */
233 skb_pull(skb, NCI_CTRL_HDR_SIZE);
234
235 switch (ntf_opcode) {
236 case NCI_OP_CORE_CONN_CREDITS_NTF:
237 nci_core_conn_credits_ntf_packet(ndev, skb);
238 break;
239
240 case NCI_OP_RF_FIELD_INFO_NTF:
241 nci_rf_field_info_ntf_packet(ndev, skb);
242 break;
243
244 case NCI_OP_RF_ACTIVATE_NTF:
245 nci_rf_activate_ntf_packet(ndev, skb);
246 break;
247
248 case NCI_OP_RF_DEACTIVATE_NTF:
249 nci_rf_deactivate_ntf_packet(ndev, skb);
250 break;
251
252 default:
253 nfc_err("unknown ntf opcode 0x%x", ntf_opcode);
254 break;
255 }
256
257 kfree_skb(skb);
258}
diff --git a/net/nfc/nci/rsp.c b/net/nfc/nci/rsp.c
new file mode 100644
index 000000000000..0403d4cd0917
--- /dev/null
+++ b/net/nfc/nci/rsp.c
@@ -0,0 +1,226 @@
1/*
2 * The NFC Controller Interface is the communication protocol between an
3 * NFC Controller (NFCC) and a Device Host (DH).
4 *
5 * Copyright (C) 2011 Texas Instruments, Inc.
6 *
7 * Written by Ilan Elias <ilane@ti.com>
8 *
9 * Acknowledgements:
10 * This file is based on hci_event.c, which was written
11 * by Maxim Krasnyansky.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 */
27
28#include <linux/types.h>
29#include <linux/interrupt.h>
30#include <linux/bitops.h>
31#include <linux/skbuff.h>
32
33#include "../nfc.h"
34#include <net/nfc/nci.h>
35#include <net/nfc/nci_core.h>
36
37/* Handle NCI Response packets */
38
39static void nci_core_reset_rsp_packet(struct nci_dev *ndev, struct sk_buff *skb)
40{
41 struct nci_core_reset_rsp *rsp = (void *) skb->data;
42
43 nfc_dbg("entry, status 0x%x", rsp->status);
44
45 if (rsp->status == NCI_STATUS_OK)
46 ndev->nci_ver = rsp->nci_ver;
47
48 nfc_dbg("nci_ver 0x%x", ndev->nci_ver);
49
50 nci_req_complete(ndev, rsp->status);
51}
52
53static void nci_core_init_rsp_packet(struct nci_dev *ndev, struct sk_buff *skb)
54{
55 struct nci_core_init_rsp_1 *rsp_1 = (void *) skb->data;
56 struct nci_core_init_rsp_2 *rsp_2;
57
58 nfc_dbg("entry, status 0x%x", rsp_1->status);
59
60 if (rsp_1->status != NCI_STATUS_OK)
61 return;
62
63 ndev->nfcc_features = __le32_to_cpu(rsp_1->nfcc_features);
64 ndev->num_supported_rf_interfaces = rsp_1->num_supported_rf_interfaces;
65
66 if (ndev->num_supported_rf_interfaces >
67 NCI_MAX_SUPPORTED_RF_INTERFACES) {
68 ndev->num_supported_rf_interfaces =
69 NCI_MAX_SUPPORTED_RF_INTERFACES;
70 }
71
72 memcpy(ndev->supported_rf_interfaces,
73 rsp_1->supported_rf_interfaces,
74 ndev->num_supported_rf_interfaces);
75
76 rsp_2 = (void *) (skb->data + 6 + ndev->num_supported_rf_interfaces);
77
78 ndev->max_logical_connections =
79 rsp_2->max_logical_connections;
80 ndev->max_routing_table_size =
81 __le16_to_cpu(rsp_2->max_routing_table_size);
82 ndev->max_control_packet_payload_length =
83 rsp_2->max_control_packet_payload_length;
84 ndev->rf_sending_buffer_size =
85 __le16_to_cpu(rsp_2->rf_sending_buffer_size);
86 ndev->rf_receiving_buffer_size =
87 __le16_to_cpu(rsp_2->rf_receiving_buffer_size);
88 ndev->manufacturer_id =
89 __le16_to_cpu(rsp_2->manufacturer_id);
90
91 nfc_dbg("nfcc_features 0x%x",
92 ndev->nfcc_features);
93 nfc_dbg("num_supported_rf_interfaces %d",
94 ndev->num_supported_rf_interfaces);
95 nfc_dbg("supported_rf_interfaces[0] 0x%x",
96 ndev->supported_rf_interfaces[0]);
97 nfc_dbg("supported_rf_interfaces[1] 0x%x",
98 ndev->supported_rf_interfaces[1]);
99 nfc_dbg("supported_rf_interfaces[2] 0x%x",
100 ndev->supported_rf_interfaces[2]);
101 nfc_dbg("supported_rf_interfaces[3] 0x%x",
102 ndev->supported_rf_interfaces[3]);
103 nfc_dbg("max_logical_connections %d",
104 ndev->max_logical_connections);
105 nfc_dbg("max_routing_table_size %d",
106 ndev->max_routing_table_size);
107 nfc_dbg("max_control_packet_payload_length %d",
108 ndev->max_control_packet_payload_length);
109 nfc_dbg("rf_sending_buffer_size %d",
110 ndev->rf_sending_buffer_size);
111 nfc_dbg("rf_receiving_buffer_size %d",
112 ndev->rf_receiving_buffer_size);
113 nfc_dbg("manufacturer_id 0x%x",
114 ndev->manufacturer_id);
115
116 nci_req_complete(ndev, rsp_1->status);
117}
118
119static void nci_core_conn_create_rsp_packet(struct nci_dev *ndev,
120 struct sk_buff *skb)
121{
122 struct nci_core_conn_create_rsp *rsp = (void *) skb->data;
123
124 nfc_dbg("entry, status 0x%x", rsp->status);
125
126 if (rsp->status != NCI_STATUS_OK)
127 return;
128
129 ndev->max_pkt_payload_size = rsp->max_pkt_payload_size;
130 ndev->initial_num_credits = rsp->initial_num_credits;
131 ndev->conn_id = rsp->conn_id;
132
133 atomic_set(&ndev->credits_cnt, ndev->initial_num_credits);
134
135 nfc_dbg("max_pkt_payload_size %d", ndev->max_pkt_payload_size);
136 nfc_dbg("initial_num_credits %d", ndev->initial_num_credits);
137 nfc_dbg("conn_id %d", ndev->conn_id);
138}
139
140static void nci_rf_disc_map_rsp_packet(struct nci_dev *ndev,
141 struct sk_buff *skb)
142{
143 __u8 status = skb->data[0];
144
145 nfc_dbg("entry, status 0x%x", status);
146
147 nci_req_complete(ndev, status);
148}
149
150static void nci_rf_disc_rsp_packet(struct nci_dev *ndev, struct sk_buff *skb)
151{
152 __u8 status = skb->data[0];
153
154 nfc_dbg("entry, status 0x%x", status);
155
156 if (status == NCI_STATUS_OK)
157 set_bit(NCI_DISCOVERY, &ndev->flags);
158
159 nci_req_complete(ndev, status);
160}
161
162static void nci_rf_deactivate_rsp_packet(struct nci_dev *ndev,
163 struct sk_buff *skb)
164{
165 __u8 status = skb->data[0];
166
167 nfc_dbg("entry, status 0x%x", status);
168
169 clear_bit(NCI_DISCOVERY, &ndev->flags);
170
171 nci_req_complete(ndev, status);
172}
173
174void nci_rsp_packet(struct nci_dev *ndev, struct sk_buff *skb)
175{
176 __u16 rsp_opcode = nci_opcode(skb->data);
177
178 /* we got a rsp, stop the cmd timer */
179 del_timer(&ndev->cmd_timer);
180
181 nfc_dbg("NCI RX: MT=rsp, PBF=%d, GID=0x%x, OID=0x%x, plen=%d",
182 nci_pbf(skb->data),
183 nci_opcode_gid(rsp_opcode),
184 nci_opcode_oid(rsp_opcode),
185 nci_plen(skb->data));
186
187 /* strip the nci control header */
188 skb_pull(skb, NCI_CTRL_HDR_SIZE);
189
190 switch (rsp_opcode) {
191 case NCI_OP_CORE_RESET_RSP:
192 nci_core_reset_rsp_packet(ndev, skb);
193 break;
194
195 case NCI_OP_CORE_INIT_RSP:
196 nci_core_init_rsp_packet(ndev, skb);
197 break;
198
199 case NCI_OP_CORE_CONN_CREATE_RSP:
200 nci_core_conn_create_rsp_packet(ndev, skb);
201 break;
202
203 case NCI_OP_RF_DISCOVER_MAP_RSP:
204 nci_rf_disc_map_rsp_packet(ndev, skb);
205 break;
206
207 case NCI_OP_RF_DISCOVER_RSP:
208 nci_rf_disc_rsp_packet(ndev, skb);
209 break;
210
211 case NCI_OP_RF_DEACTIVATE_RSP:
212 nci_rf_deactivate_rsp_packet(ndev, skb);
213 break;
214
215 default:
216 nfc_err("unknown rsp opcode 0x%x", rsp_opcode);
217 break;
218 }
219
220 kfree_skb(skb);
221
222 /* trigger the next cmd */
223 atomic_set(&ndev->cmd_cnt, 1);
224 if (!skb_queue_empty(&ndev->cmd_q))
225 queue_work(ndev->cmd_wq, &ndev->cmd_work);
226}
diff --git a/net/nfc/netlink.c b/net/nfc/netlink.c
index ccdff7953f7d..03f8818e1f16 100644
--- a/net/nfc/netlink.c
+++ b/net/nfc/netlink.c
@@ -367,6 +367,52 @@ out_putdev:
367 return rc; 367 return rc;
368} 368}
369 369
370static int nfc_genl_dev_up(struct sk_buff *skb, struct genl_info *info)
371{
372 struct nfc_dev *dev;
373 int rc;
374 u32 idx;
375
376 nfc_dbg("entry");
377
378 if (!info->attrs[NFC_ATTR_DEVICE_INDEX])
379 return -EINVAL;
380
381 idx = nla_get_u32(info->attrs[NFC_ATTR_DEVICE_INDEX]);
382
383 dev = nfc_get_device(idx);
384 if (!dev)
385 return -ENODEV;
386
387 rc = nfc_dev_up(dev);
388
389 nfc_put_device(dev);
390 return rc;
391}
392
393static int nfc_genl_dev_down(struct sk_buff *skb, struct genl_info *info)
394{
395 struct nfc_dev *dev;
396 int rc;
397 u32 idx;
398
399 nfc_dbg("entry");
400
401 if (!info->attrs[NFC_ATTR_DEVICE_INDEX])
402 return -EINVAL;
403
404 idx = nla_get_u32(info->attrs[NFC_ATTR_DEVICE_INDEX]);
405
406 dev = nfc_get_device(idx);
407 if (!dev)
408 return -ENODEV;
409
410 rc = nfc_dev_down(dev);
411
412 nfc_put_device(dev);
413 return rc;
414}
415
370static int nfc_genl_start_poll(struct sk_buff *skb, struct genl_info *info) 416static int nfc_genl_start_poll(struct sk_buff *skb, struct genl_info *info)
371{ 417{
372 struct nfc_dev *dev; 418 struct nfc_dev *dev;
@@ -441,6 +487,16 @@ static struct genl_ops nfc_genl_ops[] = {
441 .policy = nfc_genl_policy, 487 .policy = nfc_genl_policy,
442 }, 488 },
443 { 489 {
490 .cmd = NFC_CMD_DEV_UP,
491 .doit = nfc_genl_dev_up,
492 .policy = nfc_genl_policy,
493 },
494 {
495 .cmd = NFC_CMD_DEV_DOWN,
496 .doit = nfc_genl_dev_down,
497 .policy = nfc_genl_policy,
498 },
499 {
444 .cmd = NFC_CMD_START_POLL, 500 .cmd = NFC_CMD_START_POLL,
445 .doit = nfc_genl_start_poll, 501 .doit = nfc_genl_start_poll,
446 .policy = nfc_genl_policy, 502 .policy = nfc_genl_policy,
diff --git a/net/nfc/nfc.h b/net/nfc/nfc.h
index aaf9832298f3..b6753f45624e 100644
--- a/net/nfc/nfc.h
+++ b/net/nfc/nfc.h
@@ -24,7 +24,7 @@
24#ifndef __LOCAL_NFC_H 24#ifndef __LOCAL_NFC_H
25#define __LOCAL_NFC_H 25#define __LOCAL_NFC_H
26 26
27#include <net/nfc.h> 27#include <net/nfc/nfc.h>
28#include <net/sock.h> 28#include <net/sock.h>
29 29
30__attribute__((format (printf, 2, 3))) 30__attribute__((format (printf, 2, 3)))
@@ -101,6 +101,10 @@ static inline void nfc_device_iter_exit(struct class_dev_iter *iter)
101 class_dev_iter_exit(iter); 101 class_dev_iter_exit(iter);
102} 102}
103 103
104int nfc_dev_up(struct nfc_dev *dev);
105
106int nfc_dev_down(struct nfc_dev *dev);
107
104int nfc_start_poll(struct nfc_dev *dev, u32 protocols); 108int nfc_start_poll(struct nfc_dev *dev, u32 protocols);
105 109
106int nfc_stop_poll(struct nfc_dev *dev); 110int nfc_stop_poll(struct nfc_dev *dev);
diff --git a/net/rfkill/core.c b/net/rfkill/core.c
index be90640a2774..5be19575c340 100644
--- a/net/rfkill/core.c
+++ b/net/rfkill/core.c
@@ -235,7 +235,7 @@ static bool __rfkill_set_hw_state(struct rfkill *rfkill,
235 else 235 else
236 rfkill->state &= ~RFKILL_BLOCK_HW; 236 rfkill->state &= ~RFKILL_BLOCK_HW;
237 *change = prev != blocked; 237 *change = prev != blocked;
238 any = rfkill->state & RFKILL_BLOCK_ANY; 238 any = !!(rfkill->state & RFKILL_BLOCK_ANY);
239 spin_unlock_irqrestore(&rfkill->lock, flags); 239 spin_unlock_irqrestore(&rfkill->lock, flags);
240 240
241 rfkill_led_trigger_event(rfkill); 241 rfkill_led_trigger_event(rfkill);
diff --git a/net/rfkill/rfkill-regulator.c b/net/rfkill/rfkill-regulator.c
index 18dc512a10f3..3ca7277a3c36 100644
--- a/net/rfkill/rfkill-regulator.c
+++ b/net/rfkill/rfkill-regulator.c
@@ -90,7 +90,6 @@ static int __devinit rfkill_regulator_probe(struct platform_device *pdev)
90 pdata->type, 90 pdata->type,
91 &rfkill_regulator_ops, rfkill_data); 91 &rfkill_regulator_ops, rfkill_data);
92 if (rf_kill == NULL) { 92 if (rf_kill == NULL) {
93 dev_err(&pdev->dev, "Cannot alloc rfkill device\n");
94 ret = -ENOMEM; 93 ret = -ENOMEM;
95 goto err_rfkill_alloc; 94 goto err_rfkill_alloc;
96 } 95 }
diff --git a/net/wireless/core.c b/net/wireless/core.c
index 645437cfc464..220f3bd176f8 100644
--- a/net/wireless/core.c
+++ b/net/wireless/core.c
@@ -582,7 +582,7 @@ int wiphy_register(struct wiphy *wiphy)
582 } 582 }
583 583
584 /* set up regulatory info */ 584 /* set up regulatory info */
585 wiphy_update_regulatory(wiphy, NL80211_REGDOM_SET_BY_CORE); 585 regulatory_update(wiphy, NL80211_REGDOM_SET_BY_CORE);
586 586
587 list_add_rcu(&rdev->list, &cfg80211_rdev_list); 587 list_add_rcu(&rdev->list, &cfg80211_rdev_list);
588 cfg80211_rdev_list_generation++; 588 cfg80211_rdev_list_generation++;
@@ -616,6 +616,9 @@ int wiphy_register(struct wiphy *wiphy)
616 if (res) 616 if (res)
617 goto out_rm_dev; 617 goto out_rm_dev;
618 618
619 rtnl_lock();
620 rdev->wiphy.registered = true;
621 rtnl_unlock();
619 return 0; 622 return 0;
620 623
621out_rm_dev: 624out_rm_dev:
@@ -647,6 +650,10 @@ void wiphy_unregister(struct wiphy *wiphy)
647{ 650{
648 struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy); 651 struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
649 652
653 rtnl_lock();
654 rdev->wiphy.registered = false;
655 rtnl_unlock();
656
650 rfkill_unregister(rdev->rfkill); 657 rfkill_unregister(rdev->rfkill);
651 658
652 /* protect the device list */ 659 /* protect the device list */
diff --git a/net/wireless/core.h b/net/wireless/core.h
index 8672e028022f..796a4bdf8b0d 100644
--- a/net/wireless/core.h
+++ b/net/wireless/core.h
@@ -279,8 +279,6 @@ extern int cfg80211_dev_rename(struct cfg80211_registered_device *rdev,
279 char *newname); 279 char *newname);
280 280
281void ieee80211_set_bitrate_flags(struct wiphy *wiphy); 281void ieee80211_set_bitrate_flags(struct wiphy *wiphy);
282void wiphy_update_regulatory(struct wiphy *wiphy,
283 enum nl80211_reg_initiator setby);
284 282
285void cfg80211_bss_expire(struct cfg80211_registered_device *dev); 283void cfg80211_bss_expire(struct cfg80211_registered_device *dev);
286void cfg80211_bss_age(struct cfg80211_registered_device *dev, 284void cfg80211_bss_age(struct cfg80211_registered_device *dev,
diff --git a/net/wireless/lib80211_crypt_ccmp.c b/net/wireless/lib80211_crypt_ccmp.c
index dacb3b4b1bdb..755738d26bb4 100644
--- a/net/wireless/lib80211_crypt_ccmp.c
+++ b/net/wireless/lib80211_crypt_ccmp.c
@@ -77,8 +77,6 @@ static void *lib80211_ccmp_init(int key_idx)
77 77
78 priv->tfm = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC); 78 priv->tfm = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
79 if (IS_ERR(priv->tfm)) { 79 if (IS_ERR(priv->tfm)) {
80 printk(KERN_DEBUG "lib80211_crypt_ccmp: could not allocate "
81 "crypto API aes\n");
82 priv->tfm = NULL; 80 priv->tfm = NULL;
83 goto fail; 81 goto fail;
84 } 82 }
diff --git a/net/wireless/lib80211_crypt_tkip.c b/net/wireless/lib80211_crypt_tkip.c
index 7ea4f2b0770e..38734846c19e 100644
--- a/net/wireless/lib80211_crypt_tkip.c
+++ b/net/wireless/lib80211_crypt_tkip.c
@@ -101,7 +101,6 @@ static void *lib80211_tkip_init(int key_idx)
101 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, 101 priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
102 CRYPTO_ALG_ASYNC); 102 CRYPTO_ALG_ASYNC);
103 if (IS_ERR(priv->tx_tfm_arc4)) { 103 if (IS_ERR(priv->tx_tfm_arc4)) {
104 printk(KERN_DEBUG pr_fmt("could not allocate crypto API arc4\n"));
105 priv->tx_tfm_arc4 = NULL; 104 priv->tx_tfm_arc4 = NULL;
106 goto fail; 105 goto fail;
107 } 106 }
@@ -109,7 +108,6 @@ static void *lib80211_tkip_init(int key_idx)
109 priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0, 108 priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
110 CRYPTO_ALG_ASYNC); 109 CRYPTO_ALG_ASYNC);
111 if (IS_ERR(priv->tx_tfm_michael)) { 110 if (IS_ERR(priv->tx_tfm_michael)) {
112 printk(KERN_DEBUG pr_fmt("could not allocate crypto API michael_mic\n"));
113 priv->tx_tfm_michael = NULL; 111 priv->tx_tfm_michael = NULL;
114 goto fail; 112 goto fail;
115 } 113 }
@@ -117,7 +115,6 @@ static void *lib80211_tkip_init(int key_idx)
117 priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, 115 priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
118 CRYPTO_ALG_ASYNC); 116 CRYPTO_ALG_ASYNC);
119 if (IS_ERR(priv->rx_tfm_arc4)) { 117 if (IS_ERR(priv->rx_tfm_arc4)) {
120 printk(KERN_DEBUG pr_fmt("could not allocate crypto API arc4\n"));
121 priv->rx_tfm_arc4 = NULL; 118 priv->rx_tfm_arc4 = NULL;
122 goto fail; 119 goto fail;
123 } 120 }
@@ -125,7 +122,6 @@ static void *lib80211_tkip_init(int key_idx)
125 priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0, 122 priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
126 CRYPTO_ALG_ASYNC); 123 CRYPTO_ALG_ASYNC);
127 if (IS_ERR(priv->rx_tfm_michael)) { 124 if (IS_ERR(priv->rx_tfm_michael)) {
128 printk(KERN_DEBUG pr_fmt("could not allocate crypto API michael_mic\n"));
129 priv->rx_tfm_michael = NULL; 125 priv->rx_tfm_michael = NULL;
130 goto fail; 126 goto fail;
131 } 127 }
diff --git a/net/wireless/lib80211_crypt_wep.c b/net/wireless/lib80211_crypt_wep.c
index 2f265e033ae2..c1304018fc1c 100644
--- a/net/wireless/lib80211_crypt_wep.c
+++ b/net/wireless/lib80211_crypt_wep.c
@@ -50,16 +50,12 @@ static void *lib80211_wep_init(int keyidx)
50 50
51 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 51 priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
52 if (IS_ERR(priv->tx_tfm)) { 52 if (IS_ERR(priv->tx_tfm)) {
53 printk(KERN_DEBUG "lib80211_crypt_wep: could not allocate "
54 "crypto API arc4\n");
55 priv->tx_tfm = NULL; 53 priv->tx_tfm = NULL;
56 goto fail; 54 goto fail;
57 } 55 }
58 56
59 priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 57 priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
60 if (IS_ERR(priv->rx_tfm)) { 58 if (IS_ERR(priv->rx_tfm)) {
61 printk(KERN_DEBUG "lib80211_crypt_wep: could not allocate "
62 "crypto API arc4\n");
63 priv->rx_tfm = NULL; 59 priv->rx_tfm = NULL;
64 goto fail; 60 goto fail;
65 } 61 }
diff --git a/net/wireless/mlme.c b/net/wireless/mlme.c
index 832f6574e4ed..61adea540e02 100644
--- a/net/wireless/mlme.c
+++ b/net/wireless/mlme.c
@@ -1095,3 +1095,14 @@ void cfg80211_gtk_rekey_notify(struct net_device *dev, const u8 *bssid,
1095 nl80211_gtk_rekey_notify(rdev, dev, bssid, replay_ctr, gfp); 1095 nl80211_gtk_rekey_notify(rdev, dev, bssid, replay_ctr, gfp);
1096} 1096}
1097EXPORT_SYMBOL(cfg80211_gtk_rekey_notify); 1097EXPORT_SYMBOL(cfg80211_gtk_rekey_notify);
1098
1099void cfg80211_pmksa_candidate_notify(struct net_device *dev, int index,
1100 const u8 *bssid, bool preauth, gfp_t gfp)
1101{
1102 struct wireless_dev *wdev = dev->ieee80211_ptr;
1103 struct wiphy *wiphy = wdev->wiphy;
1104 struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
1105
1106 nl80211_pmksa_candidate_notify(rdev, dev, index, bssid, preauth, gfp);
1107}
1108EXPORT_SYMBOL(cfg80211_pmksa_candidate_notify);
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index bddb5595c659..3c6427abdf34 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -189,6 +189,8 @@ static const struct nla_policy nl80211_policy[NL80211_ATTR_MAX+1] = {
189 .len = IEEE80211_MAX_DATA_LEN }, 189 .len = IEEE80211_MAX_DATA_LEN },
190 [NL80211_ATTR_IE_ASSOC_RESP] = { .type = NLA_BINARY, 190 [NL80211_ATTR_IE_ASSOC_RESP] = { .type = NLA_BINARY,
191 .len = IEEE80211_MAX_DATA_LEN }, 191 .len = IEEE80211_MAX_DATA_LEN },
192 [NL80211_ATTR_ROAM_SUPPORT] = { .type = NLA_FLAG },
193 [NL80211_ATTR_SCHED_SCAN_MATCH] = { .type = NLA_NESTED },
192}; 194};
193 195
194/* policy for the key attributes */ 196/* policy for the key attributes */
@@ -231,6 +233,12 @@ nl80211_rekey_policy[NUM_NL80211_REKEY_DATA] = {
231 [NL80211_REKEY_DATA_REPLAY_CTR] = { .len = NL80211_REPLAY_CTR_LEN }, 233 [NL80211_REKEY_DATA_REPLAY_CTR] = { .len = NL80211_REPLAY_CTR_LEN },
232}; 234};
233 235
236static const struct nla_policy
237nl80211_match_policy[NL80211_SCHED_SCAN_MATCH_ATTR_MAX + 1] = {
238 [NL80211_ATTR_SCHED_SCAN_MATCH_SSID] = { .type = NLA_BINARY,
239 .len = IEEE80211_MAX_SSID_LEN },
240};
241
234/* ifidx get helper */ 242/* ifidx get helper */
235static int nl80211_get_ifidx(struct netlink_callback *cb) 243static int nl80211_get_ifidx(struct netlink_callback *cb)
236{ 244{
@@ -714,11 +722,18 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 pid, u32 seq, int flags,
714 dev->wiphy.max_scan_ie_len); 722 dev->wiphy.max_scan_ie_len);
715 NLA_PUT_U16(msg, NL80211_ATTR_MAX_SCHED_SCAN_IE_LEN, 723 NLA_PUT_U16(msg, NL80211_ATTR_MAX_SCHED_SCAN_IE_LEN,
716 dev->wiphy.max_sched_scan_ie_len); 724 dev->wiphy.max_sched_scan_ie_len);
725 NLA_PUT_U8(msg, NL80211_ATTR_MAX_MATCH_SETS,
726 dev->wiphy.max_match_sets);
717 727
718 if (dev->wiphy.flags & WIPHY_FLAG_IBSS_RSN) 728 if (dev->wiphy.flags & WIPHY_FLAG_IBSS_RSN)
719 NLA_PUT_FLAG(msg, NL80211_ATTR_SUPPORT_IBSS_RSN); 729 NLA_PUT_FLAG(msg, NL80211_ATTR_SUPPORT_IBSS_RSN);
720 if (dev->wiphy.flags & WIPHY_FLAG_MESH_AUTH) 730 if (dev->wiphy.flags & WIPHY_FLAG_MESH_AUTH)
721 NLA_PUT_FLAG(msg, NL80211_ATTR_SUPPORT_MESH_AUTH); 731 NLA_PUT_FLAG(msg, NL80211_ATTR_SUPPORT_MESH_AUTH);
732 if (dev->wiphy.flags & WIPHY_FLAG_AP_UAPSD)
733 NLA_PUT_FLAG(msg, NL80211_ATTR_SUPPORT_AP_UAPSD);
734
735 if (dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_FW_ROAM)
736 NLA_PUT_FLAG(msg, NL80211_ATTR_ROAM_SUPPORT);
722 737
723 NLA_PUT(msg, NL80211_ATTR_CIPHER_SUITES, 738 NLA_PUT(msg, NL80211_ATTR_CIPHER_SUITES,
724 sizeof(u32) * dev->wiphy.n_cipher_suites, 739 sizeof(u32) * dev->wiphy.n_cipher_suites,
@@ -2597,7 +2612,8 @@ static int nl80211_new_station(struct sk_buff *skb, struct genl_info *info)
2597 return -EINVAL; 2612 return -EINVAL;
2598 2613
2599 /* parse WME attributes if sta is WME capable */ 2614 /* parse WME attributes if sta is WME capable */
2600 if ((params.sta_flags_set & NL80211_STA_FLAG_WME) && 2615 if ((rdev->wiphy.flags & WIPHY_FLAG_AP_UAPSD) &&
2616 (params.sta_flags_set & NL80211_STA_FLAG_WME) &&
2601 info->attrs[NL80211_ATTR_STA_WME]) { 2617 info->attrs[NL80211_ATTR_STA_WME]) {
2602 struct nlattr *tb[NL80211_STA_WME_MAX + 1]; 2618 struct nlattr *tb[NL80211_STA_WME_MAX + 1];
2603 struct nlattr *nla; 2619 struct nlattr *nla;
@@ -2611,10 +2627,15 @@ static int nl80211_new_station(struct sk_buff *skb, struct genl_info *info)
2611 if (tb[NL80211_STA_WME_UAPSD_QUEUES]) 2627 if (tb[NL80211_STA_WME_UAPSD_QUEUES])
2612 params.uapsd_queues = 2628 params.uapsd_queues =
2613 nla_get_u8(tb[NL80211_STA_WME_UAPSD_QUEUES]); 2629 nla_get_u8(tb[NL80211_STA_WME_UAPSD_QUEUES]);
2630 if (params.uapsd_queues & ~IEEE80211_WMM_IE_STA_QOSINFO_AC_MASK)
2631 return -EINVAL;
2614 2632
2615 if (tb[NL80211_STA_WME_MAX_SP]) 2633 if (tb[NL80211_STA_WME_MAX_SP])
2616 params.max_sp = 2634 params.max_sp =
2617 nla_get_u8(tb[NL80211_STA_WME_MAX_SP]); 2635 nla_get_u8(tb[NL80211_STA_WME_MAX_SP]);
2636
2637 if (params.max_sp & ~IEEE80211_WMM_IE_STA_QOSINFO_SP_MASK)
2638 return -EINVAL;
2618 } 2639 }
2619 2640
2620 if (dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP && 2641 if (dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP &&
@@ -3625,10 +3646,11 @@ static int nl80211_start_sched_scan(struct sk_buff *skb,
3625 struct net_device *dev = info->user_ptr[1]; 3646 struct net_device *dev = info->user_ptr[1];
3626 struct nlattr *attr; 3647 struct nlattr *attr;
3627 struct wiphy *wiphy; 3648 struct wiphy *wiphy;
3628 int err, tmp, n_ssids = 0, n_channels, i; 3649 int err, tmp, n_ssids = 0, n_match_sets = 0, n_channels, i;
3629 u32 interval; 3650 u32 interval;
3630 enum ieee80211_band band; 3651 enum ieee80211_band band;
3631 size_t ie_len; 3652 size_t ie_len;
3653 struct nlattr *tb[NL80211_SCHED_SCAN_MATCH_ATTR_MAX + 1];
3632 3654
3633 if (!(rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_SCHED_SCAN) || 3655 if (!(rdev->wiphy.flags & WIPHY_FLAG_SUPPORTS_SCHED_SCAN) ||
3634 !rdev->ops->sched_scan_start) 3656 !rdev->ops->sched_scan_start)
@@ -3667,6 +3689,15 @@ static int nl80211_start_sched_scan(struct sk_buff *skb,
3667 if (n_ssids > wiphy->max_sched_scan_ssids) 3689 if (n_ssids > wiphy->max_sched_scan_ssids)
3668 return -EINVAL; 3690 return -EINVAL;
3669 3691
3692 if (info->attrs[NL80211_ATTR_SCHED_SCAN_MATCH])
3693 nla_for_each_nested(attr,
3694 info->attrs[NL80211_ATTR_SCHED_SCAN_MATCH],
3695 tmp)
3696 n_match_sets++;
3697
3698 if (n_match_sets > wiphy->max_match_sets)
3699 return -EINVAL;
3700
3670 if (info->attrs[NL80211_ATTR_IE]) 3701 if (info->attrs[NL80211_ATTR_IE])
3671 ie_len = nla_len(info->attrs[NL80211_ATTR_IE]); 3702 ie_len = nla_len(info->attrs[NL80211_ATTR_IE]);
3672 else 3703 else
@@ -3684,6 +3715,7 @@ static int nl80211_start_sched_scan(struct sk_buff *skb,
3684 3715
3685 request = kzalloc(sizeof(*request) 3716 request = kzalloc(sizeof(*request)
3686 + sizeof(*request->ssids) * n_ssids 3717 + sizeof(*request->ssids) * n_ssids
3718 + sizeof(*request->match_sets) * n_match_sets
3687 + sizeof(*request->channels) * n_channels 3719 + sizeof(*request->channels) * n_channels
3688 + ie_len, GFP_KERNEL); 3720 + ie_len, GFP_KERNEL);
3689 if (!request) { 3721 if (!request) {
@@ -3701,6 +3733,18 @@ static int nl80211_start_sched_scan(struct sk_buff *skb,
3701 request->ie = (void *)(request->channels + n_channels); 3733 request->ie = (void *)(request->channels + n_channels);
3702 } 3734 }
3703 3735
3736 if (n_match_sets) {
3737 if (request->ie)
3738 request->match_sets = (void *)(request->ie + ie_len);
3739 else if (request->ssids)
3740 request->match_sets =
3741 (void *)(request->ssids + n_ssids);
3742 else
3743 request->match_sets =
3744 (void *)(request->channels + n_channels);
3745 }
3746 request->n_match_sets = n_match_sets;
3747
3704 i = 0; 3748 i = 0;
3705 if (info->attrs[NL80211_ATTR_SCAN_FREQUENCIES]) { 3749 if (info->attrs[NL80211_ATTR_SCAN_FREQUENCIES]) {
3706 /* user specified, bail out if channel not found */ 3750 /* user specified, bail out if channel not found */
@@ -3765,6 +3809,31 @@ static int nl80211_start_sched_scan(struct sk_buff *skb,
3765 } 3809 }
3766 } 3810 }
3767 3811
3812 i = 0;
3813 if (info->attrs[NL80211_ATTR_SCHED_SCAN_MATCH]) {
3814 nla_for_each_nested(attr,
3815 info->attrs[NL80211_ATTR_SCHED_SCAN_MATCH],
3816 tmp) {
3817 struct nlattr *ssid;
3818
3819 nla_parse(tb, NL80211_SCHED_SCAN_MATCH_ATTR_MAX,
3820 nla_data(attr), nla_len(attr),
3821 nl80211_match_policy);
3822 ssid = tb[NL80211_ATTR_SCHED_SCAN_MATCH_SSID];
3823 if (ssid) {
3824 if (nla_len(ssid) > IEEE80211_MAX_SSID_LEN) {
3825 err = -EINVAL;
3826 goto out_free;
3827 }
3828 memcpy(request->match_sets[i].ssid.ssid,
3829 nla_data(ssid), nla_len(ssid));
3830 request->match_sets[i].ssid.ssid_len =
3831 nla_len(ssid);
3832 }
3833 i++;
3834 }
3835 }
3836
3768 if (info->attrs[NL80211_ATTR_IE]) { 3837 if (info->attrs[NL80211_ATTR_IE]) {
3769 request->ie_len = nla_len(info->attrs[NL80211_ATTR_IE]); 3838 request->ie_len = nla_len(info->attrs[NL80211_ATTR_IE]);
3770 memcpy((void *)request->ie, 3839 memcpy((void *)request->ie,
@@ -4458,8 +4527,12 @@ static int nl80211_join_ibss(struct sk_buff *skb, struct genl_info *info)
4458 4527
4459 wiphy = &rdev->wiphy; 4528 wiphy = &rdev->wiphy;
4460 4529
4461 if (info->attrs[NL80211_ATTR_MAC]) 4530 if (info->attrs[NL80211_ATTR_MAC]) {
4462 ibss.bssid = nla_data(info->attrs[NL80211_ATTR_MAC]); 4531 ibss.bssid = nla_data(info->attrs[NL80211_ATTR_MAC]);
4532
4533 if (!is_valid_ether_addr(ibss.bssid))
4534 return -EINVAL;
4535 }
4463 ibss.ssid = nla_data(info->attrs[NL80211_ATTR_SSID]); 4536 ibss.ssid = nla_data(info->attrs[NL80211_ATTR_SSID]);
4464 ibss.ssid_len = nla_len(info->attrs[NL80211_ATTR_SSID]); 4537 ibss.ssid_len = nla_len(info->attrs[NL80211_ATTR_SSID]);
4465 4538
@@ -7197,6 +7270,52 @@ void nl80211_gtk_rekey_notify(struct cfg80211_registered_device *rdev,
7197 nlmsg_free(msg); 7270 nlmsg_free(msg);
7198} 7271}
7199 7272
7273void nl80211_pmksa_candidate_notify(struct cfg80211_registered_device *rdev,
7274 struct net_device *netdev, int index,
7275 const u8 *bssid, bool preauth, gfp_t gfp)
7276{
7277 struct sk_buff *msg;
7278 struct nlattr *attr;
7279 void *hdr;
7280
7281 msg = nlmsg_new(NLMSG_GOODSIZE, gfp);
7282 if (!msg)
7283 return;
7284
7285 hdr = nl80211hdr_put(msg, 0, 0, 0, NL80211_CMD_PMKSA_CANDIDATE);
7286 if (!hdr) {
7287 nlmsg_free(msg);
7288 return;
7289 }
7290
7291 NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx);
7292 NLA_PUT_U32(msg, NL80211_ATTR_IFINDEX, netdev->ifindex);
7293
7294 attr = nla_nest_start(msg, NL80211_ATTR_PMKSA_CANDIDATE);
7295 if (!attr)
7296 goto nla_put_failure;
7297
7298 NLA_PUT_U32(msg, NL80211_PMKSA_CANDIDATE_INDEX, index);
7299 NLA_PUT(msg, NL80211_PMKSA_CANDIDATE_BSSID, ETH_ALEN, bssid);
7300 if (preauth)
7301 NLA_PUT_FLAG(msg, NL80211_PMKSA_CANDIDATE_PREAUTH);
7302
7303 nla_nest_end(msg, attr);
7304
7305 if (genlmsg_end(msg, hdr) < 0) {
7306 nlmsg_free(msg);
7307 return;
7308 }
7309
7310 genlmsg_multicast_netns(wiphy_net(&rdev->wiphy), msg, 0,
7311 nl80211_mlme_mcgrp.id, gfp);
7312 return;
7313
7314 nla_put_failure:
7315 genlmsg_cancel(msg, hdr);
7316 nlmsg_free(msg);
7317}
7318
7200void 7319void
7201nl80211_send_cqm_pktloss_notify(struct cfg80211_registered_device *rdev, 7320nl80211_send_cqm_pktloss_notify(struct cfg80211_registered_device *rdev,
7202 struct net_device *netdev, const u8 *peer, 7321 struct net_device *netdev, const u8 *peer,
diff --git a/net/wireless/nl80211.h b/net/wireless/nl80211.h
index 5d69c56400ae..f24a1fbeaf19 100644
--- a/net/wireless/nl80211.h
+++ b/net/wireless/nl80211.h
@@ -113,4 +113,8 @@ void nl80211_gtk_rekey_notify(struct cfg80211_registered_device *rdev,
113 struct net_device *netdev, const u8 *bssid, 113 struct net_device *netdev, const u8 *bssid,
114 const u8 *replay_ctr, gfp_t gfp); 114 const u8 *replay_ctr, gfp_t gfp);
115 115
116void nl80211_pmksa_candidate_notify(struct cfg80211_registered_device *rdev,
117 struct net_device *netdev, int index,
118 const u8 *bssid, bool preauth, gfp_t gfp);
119
116#endif /* __NET_WIRELESS_NL80211_H */ 120#endif /* __NET_WIRELESS_NL80211_H */
diff --git a/net/wireless/reg.c b/net/wireless/reg.c
index 9f3aa5cabdef..2520a1b7e7db 100644
--- a/net/wireless/reg.c
+++ b/net/wireless/reg.c
@@ -751,9 +751,10 @@ static void chan_reg_rule_print_dbg(struct ieee80211_channel *chan,
751 chan->center_freq, 751 chan->center_freq,
752 KHZ_TO_MHZ(desired_bw_khz)); 752 KHZ_TO_MHZ(desired_bw_khz));
753 753
754 REG_DBG_PRINT("%d KHz - %d KHz @ KHz), (%s mBi, %d mBm)\n", 754 REG_DBG_PRINT("%d KHz - %d KHz @ %d KHz), (%s mBi, %d mBm)\n",
755 freq_range->start_freq_khz, 755 freq_range->start_freq_khz,
756 freq_range->end_freq_khz, 756 freq_range->end_freq_khz,
757 freq_range->max_bandwidth_khz,
757 max_antenna_gain, 758 max_antenna_gain,
758 power_rule->max_eirp); 759 power_rule->max_eirp);
759} 760}
@@ -850,6 +851,7 @@ static void handle_channel(struct wiphy *wiphy,
850 return; 851 return;
851 } 852 }
852 853
854 chan->beacon_found = false;
853 chan->flags = flags | bw_flags | map_regdom_flags(reg_rule->flags); 855 chan->flags = flags | bw_flags | map_regdom_flags(reg_rule->flags);
854 chan->max_antenna_gain = min(chan->orig_mag, 856 chan->max_antenna_gain = min(chan->orig_mag,
855 (int) MBI_TO_DBI(power_rule->max_antenna_gain)); 857 (int) MBI_TO_DBI(power_rule->max_antenna_gain));
@@ -910,14 +912,6 @@ static bool ignore_reg_update(struct wiphy *wiphy,
910 return false; 912 return false;
911} 913}
912 914
913static void update_all_wiphy_regulatory(enum nl80211_reg_initiator initiator)
914{
915 struct cfg80211_registered_device *rdev;
916
917 list_for_each_entry(rdev, &cfg80211_rdev_list, list)
918 wiphy_update_regulatory(&rdev->wiphy, initiator);
919}
920
921static void handle_reg_beacon(struct wiphy *wiphy, 915static void handle_reg_beacon(struct wiphy *wiphy,
922 unsigned int chan_idx, 916 unsigned int chan_idx,
923 struct reg_beacon *reg_beacon) 917 struct reg_beacon *reg_beacon)
@@ -1117,11 +1111,13 @@ static void reg_process_ht_flags(struct wiphy *wiphy)
1117 1111
1118} 1112}
1119 1113
1120void wiphy_update_regulatory(struct wiphy *wiphy, 1114static void wiphy_update_regulatory(struct wiphy *wiphy,
1121 enum nl80211_reg_initiator initiator) 1115 enum nl80211_reg_initiator initiator)
1122{ 1116{
1123 enum ieee80211_band band; 1117 enum ieee80211_band band;
1124 1118
1119 assert_reg_lock();
1120
1125 if (ignore_reg_update(wiphy, initiator)) 1121 if (ignore_reg_update(wiphy, initiator))
1126 return; 1122 return;
1127 1123
@@ -1136,6 +1132,22 @@ void wiphy_update_regulatory(struct wiphy *wiphy,
1136 wiphy->reg_notifier(wiphy, last_request); 1132 wiphy->reg_notifier(wiphy, last_request);
1137} 1133}
1138 1134
1135void regulatory_update(struct wiphy *wiphy,
1136 enum nl80211_reg_initiator setby)
1137{
1138 mutex_lock(&reg_mutex);
1139 wiphy_update_regulatory(wiphy, setby);
1140 mutex_unlock(&reg_mutex);
1141}
1142
1143static void update_all_wiphy_regulatory(enum nl80211_reg_initiator initiator)
1144{
1145 struct cfg80211_registered_device *rdev;
1146
1147 list_for_each_entry(rdev, &cfg80211_rdev_list, list)
1148 wiphy_update_regulatory(&rdev->wiphy, initiator);
1149}
1150
1139static void handle_channel_custom(struct wiphy *wiphy, 1151static void handle_channel_custom(struct wiphy *wiphy,
1140 enum ieee80211_band band, 1152 enum ieee80211_band band,
1141 unsigned int chan_idx, 1153 unsigned int chan_idx,
diff --git a/net/wireless/reg.h b/net/wireless/reg.h
index b67d1c3a2fb9..4a56799d868d 100644
--- a/net/wireless/reg.h
+++ b/net/wireless/reg.h
@@ -16,6 +16,8 @@ void regulatory_exit(void);
16 16
17int set_regdom(const struct ieee80211_regdomain *rd); 17int set_regdom(const struct ieee80211_regdomain *rd);
18 18
19void regulatory_update(struct wiphy *wiphy, enum nl80211_reg_initiator setby);
20
19/** 21/**
20 * regulatory_hint_found_beacon - hints a beacon was found on a channel 22 * regulatory_hint_found_beacon - hints a beacon was found on a channel
21 * @wiphy: the wireless device where the beacon was found on 23 * @wiphy: the wireless device where the beacon was found on
diff --git a/net/wireless/scan.c b/net/wireless/scan.c
index b0f003966953..0fb142410404 100644
--- a/net/wireless/scan.c
+++ b/net/wireless/scan.c
@@ -228,6 +228,33 @@ const u8 *cfg80211_find_ie(u8 eid, const u8 *ies, int len)
228} 228}
229EXPORT_SYMBOL(cfg80211_find_ie); 229EXPORT_SYMBOL(cfg80211_find_ie);
230 230
231const u8 *cfg80211_find_vendor_ie(unsigned int oui, u8 oui_type,
232 const u8 *ies, int len)
233{
234 struct ieee80211_vendor_ie *ie;
235 const u8 *pos = ies, *end = ies + len;
236 int ie_oui;
237
238 while (pos < end) {
239 pos = cfg80211_find_ie(WLAN_EID_VENDOR_SPECIFIC, pos,
240 end - pos);
241 if (!pos)
242 return NULL;
243
244 if (end - pos < sizeof(*ie))
245 return NULL;
246
247 ie = (struct ieee80211_vendor_ie *)pos;
248 ie_oui = ie->oui[0] << 16 | ie->oui[1] << 8 | ie->oui[2];
249 if (ie_oui == oui && ie->oui_type == oui_type)
250 return pos;
251
252 pos += 2 + ie->len;
253 }
254 return NULL;
255}
256EXPORT_SYMBOL(cfg80211_find_vendor_ie);
257
231static int cmp_ies(u8 num, u8 *ies1, size_t len1, u8 *ies2, size_t len2) 258static int cmp_ies(u8 num, u8 *ies1, size_t len1, u8 *ies2, size_t len2)
232{ 259{
233 const u8 *ie1 = cfg80211_find_ie(num, ies1, len1); 260 const u8 *ie1 = cfg80211_find_ie(num, ies1, len1);
diff --git a/net/wireless/sme.c b/net/wireless/sme.c
index b7b6ff8be553..6e86d5acf145 100644
--- a/net/wireless/sme.c
+++ b/net/wireless/sme.c
@@ -110,15 +110,22 @@ static int cfg80211_conn_scan(struct wireless_dev *wdev)
110 else { 110 else {
111 int i = 0, j; 111 int i = 0, j;
112 enum ieee80211_band band; 112 enum ieee80211_band band;
113 struct ieee80211_supported_band *bands;
114 struct ieee80211_channel *channel;
113 115
114 for (band = 0; band < IEEE80211_NUM_BANDS; band++) { 116 for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
115 if (!wdev->wiphy->bands[band]) 117 bands = wdev->wiphy->bands[band];
118 if (!bands)
116 continue; 119 continue;
117 for (j = 0; j < wdev->wiphy->bands[band]->n_channels; 120 for (j = 0; j < bands->n_channels; j++) {
118 i++, j++) 121 channel = &bands->channels[j];
119 request->channels[i] = 122 if (channel->flags & IEEE80211_CHAN_DISABLED)
120 &wdev->wiphy->bands[band]->channels[j]; 123 continue;
124 request->channels[i++] = channel;
125 }
126 request->rates[band] = (1 << bands->n_bitrates) - 1;
121 } 127 }
128 n_channels = i;
122 } 129 }
123 request->n_channels = n_channels; 130 request->n_channels = n_channels;
124 request->ssids = (void *)&request->channels[n_channels]; 131 request->ssids = (void *)&request->channels[n_channels];
diff --git a/net/wireless/sysfs.c b/net/wireless/sysfs.c
index c6e4ca6a7d2e..ff574597a854 100644
--- a/net/wireless/sysfs.c
+++ b/net/wireless/sysfs.c
@@ -93,7 +93,8 @@ static int wiphy_suspend(struct device *dev, pm_message_t state)
93 93
94 if (rdev->ops->suspend) { 94 if (rdev->ops->suspend) {
95 rtnl_lock(); 95 rtnl_lock();
96 ret = rdev->ops->suspend(&rdev->wiphy, rdev->wowlan); 96 if (rdev->wiphy.registered)
97 ret = rdev->ops->suspend(&rdev->wiphy, rdev->wowlan);
97 rtnl_unlock(); 98 rtnl_unlock();
98 } 99 }
99 100
@@ -112,7 +113,8 @@ static int wiphy_resume(struct device *dev)
112 113
113 if (rdev->ops->resume) { 114 if (rdev->ops->resume) {
114 rtnl_lock(); 115 rtnl_lock();
115 ret = rdev->ops->resume(&rdev->wiphy); 116 if (rdev->wiphy.registered)
117 ret = rdev->ops->resume(&rdev->wiphy);
116 rtnl_unlock(); 118 rtnl_unlock();
117 } 119 }
118 120
diff --git a/net/wireless/util.c b/net/wireless/util.c
index eef82f79554d..39dbf4ad7ca1 100644
--- a/net/wireless/util.c
+++ b/net/wireless/util.c
@@ -513,10 +513,9 @@ int ieee80211_data_from_8023(struct sk_buff *skb, const u8 *addr,
513 if (head_need) 513 if (head_need)
514 skb_orphan(skb); 514 skb_orphan(skb);
515 515
516 if (pskb_expand_head(skb, head_need, 0, GFP_ATOMIC)) { 516 if (pskb_expand_head(skb, head_need, 0, GFP_ATOMIC))
517 pr_err("failed to reallocate Tx buffer\n");
518 return -ENOMEM; 517 return -ENOMEM;
519 } 518
520 skb->truesize += head_need; 519 skb->truesize += head_need;
521 } 520 }
522 521