Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7322/1: Print BUG instead of undefined instruction on BUG_ON()
  ARM: 7321/1: cache-v7: Disable preemption when reading CCSIDR
  ARM: 7320/1: Fix proc_info table alignment

3 files changed, 11 insertions, 1 deletions

diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 99a572702509..f84dfe67724f 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -266,6 +266,7 @@ void die(const char *str, struct pt_regs *regs, int err)
 {
         struct thread_info *thread = current_thread_info();
         int ret;
+        enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE;
 
         oops_enter();
 
@@ -273,7 +274,9 @@ void die(const char *str, struct pt_regs *regs, int err)
         console_verbose();
         bust_spinlocks(1);
         if (!user_mode(regs))
-                report_bug(regs->ARM_pc, regs);
+                bug_type = report_bug(regs->ARM_pc, regs);
+        if (bug_type != BUG_TRAP_TYPE_NONE)
+                str = "Oops - BUG";
         ret = __die(str, err, thread, regs);
 
         if (regs && kexec_should_crash(thread->task))
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 1e19691e0406..43a31fb06318 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -10,6 +10,7 @@
 #include <asm/page.h>
         
 #define PROC_INFO                                                       \
+        . = ALIGN(4);                                                   \
         VMLINUX_SYMBOL(__proc_info_begin) = .;                          \
         *(.proc.info.init)                                              \
         VMLINUX_SYMBOL(__proc_info_end) = .;
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 07c4bc8ea0a4..7a24d39661f0 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -54,9 +54,15 @@ loop1:
         and     r1, r1, #7                      @ mask of the bits for current cache only
         cmp     r1, #2                          @ see what cache we have at this level
         blt     skip                            @ skip if no cache, or just i-cache
+#ifdef CONFIG_PREEMPT
+        save_and_disable_irqs r9                @ make cssr&csidr read atomic
+#endif
         mcr     p15, 2, r10, c0, c0, 0          @ select current cache level in cssr
         isb                                     @ isb to sych the new cssr&csidr
         mrc     p15, 1, r1, c0, c0, 0           @ read the new csidr
+#ifdef CONFIG_PREEMPT
+        restore_irqs_notrace r9
+#endif
         and     r2, r1, #7                      @ extract the length of the cache lines
         add     r2, r2, #4                      @ add 4 (line length offset)
         ldr     r4, =0x3ff