diff options
author | Shani Michaeli <shanim@mellanox.com> | 2013-02-06 11:19:11 -0500 |
---|---|---|
committer | Roland Dreier <roland@purestorage.com> | 2013-02-25 13:44:31 -0500 |
commit | e448834e3545e02789897ab68905220aea39cd40 (patch) | |
tree | 89d85fdf1d816e6cd575cae2325ae6f65c632244 | |
parent | cc1ade94eeaa235b28fb139d4ba20b697be36768 (diff) |
mlx4_core: Enable memory windows in {INIT, QUERY}_HCA
Add memory windows-related code to INIT_HCA and QUERY_HCA.
Signed-off-by: Haggai Eran <haggaie@mellanox.com>
Signed-off-by: Shani Michaeli <shanim@mellanox.com>
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/fw.c | 3 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/fw.h | 1 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/main.c | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/mlx4.h | 2 |
4 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c index a389612f8a4a..d136b3695258 100644 --- a/drivers/net/ethernet/mellanox/mlx4/fw.c +++ b/drivers/net/ethernet/mellanox/mlx4/fw.c | |||
@@ -1207,6 +1207,7 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param) | |||
1207 | #define INIT_HCA_FS_IB_NUM_ADDRS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x26) | 1207 | #define INIT_HCA_FS_IB_NUM_ADDRS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x26) |
1208 | #define INIT_HCA_TPT_OFFSET 0x0f0 | 1208 | #define INIT_HCA_TPT_OFFSET 0x0f0 |
1209 | #define INIT_HCA_DMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x00) | 1209 | #define INIT_HCA_DMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x00) |
1210 | #define INIT_HCA_TPT_MW_OFFSET (INIT_HCA_TPT_OFFSET + 0x08) | ||
1210 | #define INIT_HCA_LOG_MPT_SZ_OFFSET (INIT_HCA_TPT_OFFSET + 0x0b) | 1211 | #define INIT_HCA_LOG_MPT_SZ_OFFSET (INIT_HCA_TPT_OFFSET + 0x0b) |
1211 | #define INIT_HCA_MTT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x10) | 1212 | #define INIT_HCA_MTT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x10) |
1212 | #define INIT_HCA_CMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x18) | 1213 | #define INIT_HCA_CMPT_BASE_OFFSET (INIT_HCA_TPT_OFFSET + 0x18) |
@@ -1323,6 +1324,7 @@ int mlx4_INIT_HCA(struct mlx4_dev *dev, struct mlx4_init_hca_param *param) | |||
1323 | /* TPT attributes */ | 1324 | /* TPT attributes */ |
1324 | 1325 | ||
1325 | MLX4_PUT(inbox, param->dmpt_base, INIT_HCA_DMPT_BASE_OFFSET); | 1326 | MLX4_PUT(inbox, param->dmpt_base, INIT_HCA_DMPT_BASE_OFFSET); |
1327 | MLX4_PUT(inbox, param->mw_enabled, INIT_HCA_TPT_MW_OFFSET); | ||
1326 | MLX4_PUT(inbox, param->log_mpt_sz, INIT_HCA_LOG_MPT_SZ_OFFSET); | 1328 | MLX4_PUT(inbox, param->log_mpt_sz, INIT_HCA_LOG_MPT_SZ_OFFSET); |
1327 | MLX4_PUT(inbox, param->mtt_base, INIT_HCA_MTT_BASE_OFFSET); | 1329 | MLX4_PUT(inbox, param->mtt_base, INIT_HCA_MTT_BASE_OFFSET); |
1328 | MLX4_PUT(inbox, param->cmpt_base, INIT_HCA_CMPT_BASE_OFFSET); | 1330 | MLX4_PUT(inbox, param->cmpt_base, INIT_HCA_CMPT_BASE_OFFSET); |
@@ -1419,6 +1421,7 @@ int mlx4_QUERY_HCA(struct mlx4_dev *dev, | |||
1419 | /* TPT attributes */ | 1421 | /* TPT attributes */ |
1420 | 1422 | ||
1421 | MLX4_GET(param->dmpt_base, outbox, INIT_HCA_DMPT_BASE_OFFSET); | 1423 | MLX4_GET(param->dmpt_base, outbox, INIT_HCA_DMPT_BASE_OFFSET); |
1424 | MLX4_GET(param->mw_enabled, outbox, INIT_HCA_TPT_MW_OFFSET); | ||
1422 | MLX4_GET(param->log_mpt_sz, outbox, INIT_HCA_LOG_MPT_SZ_OFFSET); | 1425 | MLX4_GET(param->log_mpt_sz, outbox, INIT_HCA_LOG_MPT_SZ_OFFSET); |
1423 | MLX4_GET(param->mtt_base, outbox, INIT_HCA_MTT_BASE_OFFSET); | 1426 | MLX4_GET(param->mtt_base, outbox, INIT_HCA_MTT_BASE_OFFSET); |
1424 | MLX4_GET(param->cmpt_base, outbox, INIT_HCA_CMPT_BASE_OFFSET); | 1427 | MLX4_GET(param->cmpt_base, outbox, INIT_HCA_CMPT_BASE_OFFSET); |
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.h b/drivers/net/ethernet/mellanox/mlx4/fw.h index dbf2f69cc59f..9f1a25ca002c 100644 --- a/drivers/net/ethernet/mellanox/mlx4/fw.h +++ b/drivers/net/ethernet/mellanox/mlx4/fw.h | |||
@@ -170,6 +170,7 @@ struct mlx4_init_hca_param { | |||
170 | u8 log_mc_table_sz; | 170 | u8 log_mc_table_sz; |
171 | u8 log_mpt_sz; | 171 | u8 log_mpt_sz; |
172 | u8 log_uar_sz; | 172 | u8 log_uar_sz; |
173 | u8 mw_enabled; /* Enable memory windows */ | ||
173 | u8 uar_page_sz; /* log pg sz in 4k chunks */ | 174 | u8 uar_page_sz; /* log pg sz in 4k chunks */ |
174 | u8 fs_hash_enable_bits; | 175 | u8 fs_hash_enable_bits; |
175 | u8 steering_mode; /* for QUERY_HCA */ | 176 | u8 steering_mode; /* for QUERY_HCA */ |
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c index 5163af314990..7fdd04af379d 100644 --- a/drivers/net/ethernet/mellanox/mlx4/main.c +++ b/drivers/net/ethernet/mellanox/mlx4/main.c | |||
@@ -1447,6 +1447,10 @@ static int mlx4_init_hca(struct mlx4_dev *dev) | |||
1447 | 1447 | ||
1448 | init_hca.log_uar_sz = ilog2(dev->caps.num_uars); | 1448 | init_hca.log_uar_sz = ilog2(dev->caps.num_uars); |
1449 | init_hca.uar_page_sz = PAGE_SHIFT - 12; | 1449 | init_hca.uar_page_sz = PAGE_SHIFT - 12; |
1450 | init_hca.mw_enabled = 0; | ||
1451 | if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW || | ||
1452 | dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) | ||
1453 | init_hca.mw_enabled = INIT_HCA_TPT_MW_ENABLE; | ||
1450 | 1454 | ||
1451 | err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size); | 1455 | err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size); |
1452 | if (err) | 1456 | if (err) |
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h index 539212b1c8dc..8b75d5ef0940 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h +++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h | |||
@@ -60,6 +60,8 @@ | |||
60 | #define MLX4_FS_MGM_LOG_ENTRY_SIZE 7 | 60 | #define MLX4_FS_MGM_LOG_ENTRY_SIZE 7 |
61 | #define MLX4_FS_NUM_MCG (1 << 17) | 61 | #define MLX4_FS_NUM_MCG (1 << 17) |
62 | 62 | ||
63 | #define INIT_HCA_TPT_MW_ENABLE (1 << 7) | ||
64 | |||
63 | enum { | 65 | enum { |
64 | MLX4_FS_L2_HASH = 0, | 66 | MLX4_FS_L2_HASH = 0, |
65 | MLX4_FS_L2_L3_L4_HASH, | 67 | MLX4_FS_L2_L3_L4_HASH, |