Blackfin: dpmc: don't save/restore scratch registers

The Blackfin C ABI says we do not need to save/restore R0-R3 and P0-P2
as they are available as scratch registers.  So don't bother.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

1 files changed, 6 insertions, 6 deletions

diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S
index fa0df0ac3aea..2d1c3ce19fb1 100644
--- a/arch/blackfin/mach-common/dpmc_modes.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -12,8 +12,8 @@
 .section .l1.text
 
 ENTRY(_sleep_mode)
-        [--SP] = ( R7:0, P5:0 );
-        [--SP] =  RETS;
+        [--SP] = (R7:4, P5:3);
+        [--SP] = RETS;
 
         call _set_sic_iwr;
 
@@ -46,7 +46,7 @@ ENTRY(_sleep_mode)
         call _test_pll_locked;
 
         RETS = [SP++];
-        ( R7:0, P5:0 ) = [SP++];
+        (R7:4, P5:3) = [SP++];
         RTS;
 ENDPROC(_sleep_mode)
 
@@ -81,8 +81,8 @@ ENTRY(_hibernate_mode)
 ENDPROC(_hibernate_mode)
 
 ENTRY(_sleep_deeper)
-        [--SP] = ( R7:0, P5:0 );
-        [--SP] =  RETS;
+        [--SP] = (R7:4, P5:3);
+        [--SP] = RETS;
 
         CLI R4;
 
@@ -175,7 +175,7 @@ ENTRY(_sleep_deeper)
         STI R4;
 
         RETS = [SP++];
-        ( R7:0, P5:0 ) = [SP++];
+        (R7:4, P5:3) = [SP++];
         RTS;
 ENDPROC(_sleep_deeper)