diff options
author | Nick Kossifidis <mickflemm@gmail.com> | 2010-12-02 23:03:00 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2010-12-06 15:58:44 -0500 |
commit | d84938c9be85f4738a350ef44210789fef915cb7 (patch) | |
tree | f192c5924432a5885827eb148965529d7ed97ebf | |
parent | 04ac3c0ee2c773c321ec472d892635a20556f34d (diff) |
ath5k: Always write tx powertable on hw
* By skipping tx power table calibration we also skip setting
tx power table on hw. Make sure we always write tx power table
on hw since it gets cleared on reset.
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath/ath5k/phy.c | 33 |
1 files changed, 21 insertions, 12 deletions
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c index df5cd0fd69d6..f84afb420bd8 100644 --- a/drivers/net/wireless/ath/ath5k/phy.c +++ b/drivers/net/wireless/ath/ath5k/phy.c | |||
@@ -2742,10 +2742,12 @@ ath5k_combine_pwr_to_pdadc_curves(struct ath5k_hw *ah, | |||
2742 | 2742 | ||
2743 | /* Write PDADC values on hw */ | 2743 | /* Write PDADC values on hw */ |
2744 | static void | 2744 | static void |
2745 | ath5k_setup_pwr_to_pdadc_table(struct ath5k_hw *ah, | 2745 | ath5k_setup_pwr_to_pdadc_table(struct ath5k_hw *ah, u8 ee_mode) |
2746 | u8 pdcurves, u8 *pdg_to_idx) | ||
2747 | { | 2746 | { |
2747 | struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; | ||
2748 | u8 *pdadc_out = ah->ah_txpower.txp_pd_table; | 2748 | u8 *pdadc_out = ah->ah_txpower.txp_pd_table; |
2749 | u8 *pdg_to_idx = ee->ee_pdc_to_idx[ee_mode]; | ||
2750 | u8 pdcurves = ee->ee_pd_gains[ee_mode]; | ||
2749 | u32 reg; | 2751 | u32 reg; |
2750 | u8 i; | 2752 | u8 i; |
2751 | 2753 | ||
@@ -2992,7 +2994,7 @@ ath5k_setup_channel_powertable(struct ath5k_hw *ah, | |||
2992 | ee->ee_pd_gains[ee_mode]); | 2994 | ee->ee_pd_gains[ee_mode]); |
2993 | 2995 | ||
2994 | /* Write settings on hw */ | 2996 | /* Write settings on hw */ |
2995 | ath5k_setup_pwr_to_pdadc_table(ah, pdg, pdg_curve_to_idx); | 2997 | ath5k_setup_pwr_to_pdadc_table(ah, ee_mode); |
2996 | 2998 | ||
2997 | /* Set txp.offset, note that table_min | 2999 | /* Set txp.offset, note that table_min |
2998 | * can be negative */ | 3000 | * can be negative */ |
@@ -3114,12 +3116,6 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3114 | return -EINVAL; | 3116 | return -EINVAL; |
3115 | } | 3117 | } |
3116 | 3118 | ||
3117 | /* Reset TX power values */ | ||
3118 | memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower)); | ||
3119 | ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER; | ||
3120 | ah->ah_txpower.txp_min_pwr = 0; | ||
3121 | ah->ah_txpower.txp_max_pwr = AR5K_TUNE_MAX_TXPOWER; | ||
3122 | |||
3123 | /* Initialize TX power table */ | 3119 | /* Initialize TX power table */ |
3124 | switch (ah->ah_radio) { | 3120 | switch (ah->ah_radio) { |
3125 | case AR5K_RF5110: | 3121 | case AR5K_RF5110: |
@@ -3146,11 +3142,24 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
3146 | * so there is no need to recalculate the powertable, we 'll | 3142 | * so there is no need to recalculate the powertable, we 'll |
3147 | * just use the cached one */ | 3143 | * just use the cached one */ |
3148 | if (!fast) { | 3144 | if (!fast) { |
3145 | /* Reset TX power values */ | ||
3146 | memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower)); | ||
3147 | ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER; | ||
3148 | ah->ah_txpower.txp_min_pwr = 0; | ||
3149 | ah->ah_txpower.txp_max_pwr = AR5K_TUNE_MAX_TXPOWER; | ||
3150 | |||
3151 | /* Calculate the powertable */ | ||
3149 | ret = ath5k_setup_channel_powertable(ah, channel, | 3152 | ret = ath5k_setup_channel_powertable(ah, channel, |
3150 | ee_mode, type); | 3153 | ee_mode, type); |
3151 | if (ret) | 3154 | if (ret) |
3152 | return ret; | 3155 | return ret; |
3153 | } | 3156 | /* Write cached table on hw */ |
3157 | } else if (type == AR5K_PWRTABLE_PWR_TO_PDADC) | ||
3158 | ath5k_setup_pwr_to_pdadc_table(ah, ee_mode); | ||
3159 | else | ||
3160 | ath5k_setup_pcdac_table(ah); | ||
3161 | |||
3162 | |||
3154 | 3163 | ||
3155 | /* Limit max power if we have a CTL available */ | 3164 | /* Limit max power if we have a CTL available */ |
3156 | ath5k_get_max_ctl_power(ah, channel); | 3165 | ath5k_get_max_ctl_power(ah, channel); |