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authorLiu Ying <Ying.Liu@freescale.com>2013-08-05 03:33:49 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:01:04 -0400
commitd538d61126e5f3345788f1a524c3ee8b517787dd (patch)
treea713545eb5e768f49a6bab6ca524ff76d027240d
parentd20712a25d0e5965374cdc6969eacb564b7111cc (diff)
ENGR00273852 ipu: header file split up
This patch splits ipu header file up to include/linux/ directory and include/uapi/linux/ directory so that the userspace may include the ipu header file. This patch also fixes some annotations and macros about the header file's naming. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Diffstat
-rw-r--r--include/linux/ipu-v3.h6
-rw-r--r--include/linux/ipu.h254
-rw-r--r--include/uapi/linux/Kbuild1
-rw-r--r--include/uapi/linux/ipu.h280
4 files changed, 288 insertions, 253 deletions
diff --git a/include/linux/ipu-v3.h b/include/linux/ipu-v3.h
index 938139519807..b3a9954e71d9 100644
--- a/include/linux/ipu-v3.h
+++ b/include/linux/ipu-v3.h
@@ -13,8 +13,8 @@
13 * for more details. 13 * for more details.
14 */ 14 */
15 15
16#ifndef __MACH_IPU_V3_H_ 16#ifndef __LINUX_IPU_V3_H_
17#define __MACH_IPU_V3_H_ 17#define __LINUX_IPU_V3_H_
18 18
19#include <linux/ipu.h> 19#include <linux/ipu.h>
20 20
@@ -747,4 +747,4 @@ struct ipuv3_fb_platform_data {
747 bool late_init; 747 bool late_init;
748}; 748};
749 749
750#endif /* __MACH_IPU_V3_H_ */ 750#endif /* __LINUX_IPU_V3_H_ */
diff --git a/include/linux/ipu.h b/include/linux/ipu.h
index 358d315b1194..e516ee787466 100644
--- a/include/linux/ipu.h
+++ b/include/linux/ipu.h
@@ -15,270 +15,24 @@
15 * @defgroup IPU MXC Image Processing Unit (IPU) Driver 15 * @defgroup IPU MXC Image Processing Unit (IPU) Driver
16 */ 16 */
17/*! 17/*!
18 * @file arch-mxc/ipu.h 18 * @file linux/ipu.h
19 * 19 *
20 * @brief This file contains the IPU driver API declarations. 20 * @brief This file contains the IPU driver API declarations.
21 * 21 *
22 * @ingroup IPU 22 * @ingroup IPU
23 */ 23 */
24 24
25#ifndef __ASM_ARCH_IPU_H__ 25#ifndef __LINUX_IPU_H__
26#define __ASM_ARCH_IPU_H__ 26#define __LINUX_IPU_H__
27 27
28#include <linux/types.h>
29#include <linux/videodev2.h>
30#ifdef __KERNEL__
31#include <linux/interrupt.h> 28#include <linux/interrupt.h>
32#else 29#include <uapi/linux/ipu.h>
33#ifndef __cplusplus
34typedef unsigned char bool;
35#endif
36#define irqreturn_t int
37#define dma_addr_t int
38#define uint32_t unsigned int
39#define uint16_t unsigned short
40#define uint8_t unsigned char
41#define u32 unsigned int
42#define u8 unsigned char
43#define __u32 u32
44#endif
45
46/*!
47 * Enumeration of IPU rotation modes
48 */
49typedef enum {
50 /* Note the enum values correspond to BAM value */
51 IPU_ROTATE_NONE = 0,
52 IPU_ROTATE_VERT_FLIP = 1,
53 IPU_ROTATE_HORIZ_FLIP = 2,
54 IPU_ROTATE_180 = 3,
55 IPU_ROTATE_90_RIGHT = 4,
56 IPU_ROTATE_90_RIGHT_VFLIP = 5,
57 IPU_ROTATE_90_RIGHT_HFLIP = 6,
58 IPU_ROTATE_90_LEFT = 7,
59} ipu_rotate_mode_t;
60
61/*!
62 * Enumeration of VDI MOTION select
63 */
64typedef enum {
65 MED_MOTION = 0,
66 LOW_MOTION = 1,
67 HIGH_MOTION = 2,
68} ipu_motion_sel;
69
70/*!
71 * Enumeration of DI ports for ADC.
72 */
73typedef enum {
74 DISP0,
75 DISP1,
76 DISP2,
77 DISP3
78} display_port_t;
79
80/* IPU Pixel format definitions */
81/* Four-character-code (FOURCC) */
82#define fourcc(a, b, c, d)\
83 (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
84
85/*!
86 * @name IPU Pixel Formats
87 *
88 * Pixel formats are defined with ASCII FOURCC code. The pixel format codes are
89 * the same used by V4L2 API.
90 */
91
92/*! @{ */
93/*! @name Generic or Raw Data Formats */
94/*! @{ */
95#define IPU_PIX_FMT_GENERIC fourcc('I', 'P', 'U', '0') /*!< IPU Generic Data */
96#define IPU_PIX_FMT_GENERIC_32 fourcc('I', 'P', 'U', '1') /*!< IPU Generic Data */
97#define IPU_PIX_FMT_GENERIC_16 fourcc('I', 'P', 'U', '2') /*!< IPU Generic Data */
98#define IPU_PIX_FMT_LVDS666 fourcc('L', 'V', 'D', '6') /*!< IPU Generic Data */
99#define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8') /*!< IPU Generic Data */
100/*! @} */
101/*! @name RGB Formats */
102/*! @{ */
103#define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*!< 8 RGB-3-3-2 */
104#define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*!< 16 RGB-5-5-5 */
105#define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*!< 1 6 RGB-5-6-5 */
106#define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*!< 18 RGB-6-6-6 */
107#define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*!< 18 BGR-6-6-6 */
108#define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*!< 24 BGR-8-8-8 */
109#define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*!< 24 RGB-8-8-8 */
110#define IPU_PIX_FMT_GBR24 fourcc('G', 'B', 'R', '3') /*!< 24 GBR-8-8-8 */
111#define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*!< 32 BGR-8-8-8-8 */
112#define IPU_PIX_FMT_BGRA32 fourcc('B', 'G', 'R', 'A') /*!< 32 BGR-8-8-8-8 */
113#define IPU_PIX_FMT_RGB32 fourcc('R', 'G', 'B', '4') /*!< 32 RGB-8-8-8-8 */
114#define IPU_PIX_FMT_RGBA32 fourcc('R', 'G', 'B', 'A') /*!< 32 RGB-8-8-8-8 */
115#define IPU_PIX_FMT_ABGR32 fourcc('A', 'B', 'G', 'R') /*!< 32 ABGR-8-8-8-8 */
116/*! @} */
117/*! @name YUV Interleaved Formats */
118/*! @{ */
119#define IPU_PIX_FMT_YUYV fourcc('Y', 'U', 'Y', 'V') /*!< 16 YUV 4:2:2 */
120#define IPU_PIX_FMT_UYVY fourcc('U', 'Y', 'V', 'Y') /*!< 16 YUV 4:2:2 */
121#define IPU_PIX_FMT_YVYU fourcc('Y', 'V', 'Y', 'U') /*!< 16 YVYU 4:2:2 */
122#define IPU_PIX_FMT_VYUY fourcc('V', 'Y', 'U', 'Y') /*!< 16 VYYU 4:2:2 */
123#define IPU_PIX_FMT_Y41P fourcc('Y', '4', '1', 'P') /*!< 12 YUV 4:1:1 */
124#define IPU_PIX_FMT_YUV444 fourcc('Y', '4', '4', '4') /*!< 24 YUV 4:4:4 */
125#define IPU_PIX_FMT_VYU444 fourcc('V', '4', '4', '4') /*!< 24 VYU 4:4:4 */
126/* two planes -- one Y, one Cb + Cr interleaved */
127#define IPU_PIX_FMT_NV12 fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
128/* two planes -- 12 tiled Y/CbCr 4:2:0 */
129#define IPU_PIX_FMT_TILED_NV12 fourcc('T', 'N', 'V', 'P')
130#define IPU_PIX_FMT_TILED_NV12F fourcc('T', 'N', 'V', 'F')
131
132/*! @} */
133/*! @name YUV Planar Formats */
134/*! @{ */
135#define IPU_PIX_FMT_GREY fourcc('G', 'R', 'E', 'Y') /*!< 8 Greyscale */
136#define IPU_PIX_FMT_YVU410P fourcc('Y', 'V', 'U', '9') /*!< 9 YVU 4:1:0 */
137#define IPU_PIX_FMT_YUV410P fourcc('Y', 'U', 'V', '9') /*!< 9 YUV 4:1:0 */
138#define IPU_PIX_FMT_YVU420P fourcc('Y', 'V', '1', '2') /*!< 12 YVU 4:2:0 */
139#define IPU_PIX_FMT_YUV420P fourcc('I', '4', '2', '0') /*!< 12 YUV 4:2:0 */
140#define IPU_PIX_FMT_YUV420P2 fourcc('Y', 'U', '1', '2') /*!< 12 YUV 4:2:0 */
141#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*!< 16 YVU 4:2:2 */
142#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*!< 16 YUV 4:2:2 */
143/* non-interleaved 4:4:4 */
144#define IPU_PIX_FMT_YUV444P fourcc('4', '4', '4', 'P') /*!< 24 YUV 4:4:4 */
145/*! @} */
146#define IPU_PIX_FMT_TILED_NV12_MBALIGN (16)
147#define TILED_NV12_FRAME_SIZE(w, h) \
148 (ALIGN((w) * (h), SZ_4K) + ALIGN((w) * (h) / 2, SZ_4K))
149/* IPU device */
150typedef enum {
151 RGB_CS,
152 YUV_CS,
153 NULL_CS
154} cs_t;
155 30
156struct ipu_pos {
157 u32 x;
158 u32 y;
159};
160
161struct ipu_crop {
162 struct ipu_pos pos;
163 u32 w;
164 u32 h;
165};
166
167struct ipu_deinterlace {
168 bool enable;
169 u8 motion; /*see ipu_motion_sel*/
170#define IPU_DEINTERLACE_FIELD_TOP 0
171#define IPU_DEINTERLACE_FIELD_BOTTOM 1
172#define IPU_DEINTERLACE_FIELD_MASK \
173 (IPU_DEINTERLACE_FIELD_TOP | IPU_DEINTERLACE_FIELD_BOTTOM)
174 /* deinterlace frame rate double flags */
175#define IPU_DEINTERLACE_RATE_EN 0x80
176#define IPU_DEINTERLACE_RATE_FRAME1 0x40
177#define IPU_DEINTERLACE_RATE_MASK \
178 (IPU_DEINTERLACE_RATE_EN | IPU_DEINTERLACE_RATE_FRAME1)
179#define IPU_DEINTERLACE_MAX_FRAME 2
180 u8 field_fmt;
181};
182
183struct ipu_input {
184 u32 width;
185 u32 height;
186 u32 format;
187 struct ipu_crop crop;
188 dma_addr_t paddr;
189
190 struct ipu_deinterlace deinterlace;
191 dma_addr_t paddr_n; /*valid when deinterlace enable*/
192};
193
194struct ipu_alpha {
195#define IPU_ALPHA_MODE_GLOBAL 0
196#define IPU_ALPHA_MODE_LOCAL 1
197 u8 mode;
198 u8 gvalue; /* 0~255 */
199 dma_addr_t loc_alp_paddr;
200};
201
202struct ipu_colorkey {
203 bool enable;
204 u32 value; /* RGB 24bit */
205};
206
207struct ipu_overlay {
208 u32 width;
209 u32 height;
210 u32 format;
211 struct ipu_crop crop;
212 struct ipu_alpha alpha;
213 struct ipu_colorkey colorkey;
214 dma_addr_t paddr;
215};
216
217struct ipu_output {
218 u32 width;
219 u32 height;
220 u32 format;
221 u8 rotate;
222 struct ipu_crop crop;
223 dma_addr_t paddr;
224};
225
226struct ipu_task {
227 struct ipu_input input;
228 struct ipu_output output;
229
230 bool overlay_en;
231 struct ipu_overlay overlay;
232
233#define IPU_TASK_PRIORITY_NORMAL 0
234#define IPU_TASK_PRIORITY_HIGH 1
235 u8 priority;
236
237#define IPU_TASK_ID_ANY 0
238#define IPU_TASK_ID_VF 1
239#define IPU_TASK_ID_PP 2
240#define IPU_TASK_ID_MAX 3
241 u8 task_id;
242
243 int timeout;
244};
245
246enum {
247 IPU_CHECK_OK = 0,
248 IPU_CHECK_WARN_INPUT_OFFS_NOT8ALIGN = 0x1,
249 IPU_CHECK_WARN_OUTPUT_OFFS_NOT8ALIGN = 0x2,
250 IPU_CHECK_WARN_OVERLAY_OFFS_NOT8ALIGN = 0x4,
251 IPU_CHECK_ERR_MIN,
252 IPU_CHECK_ERR_INPUT_CROP,
253 IPU_CHECK_ERR_OUTPUT_CROP,
254 IPU_CHECK_ERR_OVERLAY_CROP,
255 IPU_CHECK_ERR_INPUT_OVER_LIMIT,
256 IPU_CHECK_ERR_OV_OUT_NO_FIT,
257 IPU_CHECK_ERR_OVERLAY_WITH_VDI,
258 IPU_CHECK_ERR_PROC_NO_NEED,
259 IPU_CHECK_ERR_SPLIT_INPUTW_OVER,
260 IPU_CHECK_ERR_SPLIT_INPUTH_OVER,
261 IPU_CHECK_ERR_SPLIT_OUTPUTW_OVER,
262 IPU_CHECK_ERR_SPLIT_OUTPUTH_OVER,
263 IPU_CHECK_ERR_SPLIT_WITH_ROT,
264 IPU_CHECK_ERR_NOT_SUPPORT,
265 IPU_CHECK_ERR_NOT16ALIGN,
266};
267
268/* IOCTL commands */
269#define IPU_CHECK_TASK _IOWR('I', 0x1, struct ipu_task)
270#define IPU_QUEUE_TASK _IOW('I', 0x2, struct ipu_task)
271#define IPU_ALLOC _IOWR('I', 0x3, int)
272#define IPU_FREE _IOW('I', 0x4, int)
273
274/* export functions */
275#ifdef __KERNEL__
276unsigned int fmt_to_bpp(unsigned int pixelformat); 31unsigned int fmt_to_bpp(unsigned int pixelformat);
277cs_t colorspaceofpixel(int fmt); 32cs_t colorspaceofpixel(int fmt);
278int need_csc(int ifmt, int ofmt); 33int need_csc(int ifmt, int ofmt);
279 34
280int ipu_queue_task(struct ipu_task *task); 35int ipu_queue_task(struct ipu_task *task);
281int ipu_check_task(struct ipu_task *task); 36int ipu_check_task(struct ipu_task *task);
282#endif
283 37
284#endif 38#endif
diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild
index fe802de0f6a0..501638c74af1 100644
--- a/include/uapi/linux/Kbuild
+++ b/include/uapi/linux/Kbuild
@@ -225,6 +225,7 @@ ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/include/uapi/asm/kvm_para.h \
225header-y += kvm_para.h 225header-y += kvm_para.h
226endif 226endif
227 227
228header-y += ipu.h
228header-y += l2tp.h 229header-y += l2tp.h
229header-y += limits.h 230header-y += limits.h
230header-y += llc.h 231header-y += llc.h
diff --git a/include/uapi/linux/ipu.h b/include/uapi/linux/ipu.h
new file mode 100644
index 000000000000..866d2b639d21
--- /dev/null
+++ b/include/uapi/linux/ipu.h
@@ -0,0 +1,280 @@
1/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21/*!
22 * @defgroup IPU MXC Image Processing Unit (IPU) Driver
23 */
24/*!
25 * @file uapi/linux/ipu.h
26 *
27 * @brief This file contains the IPU driver API declarations.
28 *
29 * @ingroup IPU
30 */
31
32#ifndef __ASM_ARCH_IPU_H__
33#define __ASM_ARCH_IPU_H__
34
35#include <linux/types.h>
36#include <linux/videodev2.h>
37
38#ifndef __KERNEL__
39#ifndef __cplusplus
40typedef unsigned char bool;
41#endif
42#define irqreturn_t int
43#define dma_addr_t int
44#define uint32_t unsigned int
45#define uint16_t unsigned short
46#define uint8_t unsigned char
47#define u32 unsigned int
48#define u8 unsigned char
49#define __u32 u32
50#endif
51
52/*!
53 * Enumeration of IPU rotation modes
54 */
55typedef enum {
56 /* Note the enum values correspond to BAM value */
57 IPU_ROTATE_NONE = 0,
58 IPU_ROTATE_VERT_FLIP = 1,
59 IPU_ROTATE_HORIZ_FLIP = 2,
60 IPU_ROTATE_180 = 3,
61 IPU_ROTATE_90_RIGHT = 4,
62 IPU_ROTATE_90_RIGHT_VFLIP = 5,
63 IPU_ROTATE_90_RIGHT_HFLIP = 6,
64 IPU_ROTATE_90_LEFT = 7,
65} ipu_rotate_mode_t;
66
67/*!
68 * Enumeration of VDI MOTION select
69 */
70typedef enum {
71 MED_MOTION = 0,
72 LOW_MOTION = 1,
73 HIGH_MOTION = 2,
74} ipu_motion_sel;
75
76/*!
77 * Enumeration of DI ports for ADC.
78 */
79typedef enum {
80 DISP0,
81 DISP1,
82 DISP2,
83 DISP3
84} display_port_t;
85
86/* IPU Pixel format definitions */
87/* Four-character-code (FOURCC) */
88#define fourcc(a, b, c, d)\
89 (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24))
90
91/*!
92 * @name IPU Pixel Formats
93 *
94 * Pixel formats are defined with ASCII FOURCC code. The pixel format codes are
95 * the same used by V4L2 API.
96 */
97
98/*! @{ */
99/*! @name Generic or Raw Data Formats */
100/*! @{ */
101#define IPU_PIX_FMT_GENERIC fourcc('I', 'P', 'U', '0') /*!< IPU Generic Data */
102#define IPU_PIX_FMT_GENERIC_32 fourcc('I', 'P', 'U', '1') /*!< IPU Generic Data */
103#define IPU_PIX_FMT_GENERIC_16 fourcc('I', 'P', 'U', '2') /*!< IPU Generic Data */
104#define IPU_PIX_FMT_LVDS666 fourcc('L', 'V', 'D', '6') /*!< IPU Generic Data */
105#define IPU_PIX_FMT_LVDS888 fourcc('L', 'V', 'D', '8') /*!< IPU Generic Data */
106/*! @} */
107/*! @name RGB Formats */
108/*! @{ */
109#define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*!< 8 RGB-3-3-2 */
110#define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*!< 16 RGB-5-5-5 */
111#define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*!< 1 6 RGB-5-6-5 */
112#define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*!< 18 RGB-6-6-6 */
113#define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*!< 18 BGR-6-6-6 */
114#define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*!< 24 BGR-8-8-8 */
115#define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*!< 24 RGB-8-8-8 */
116#define IPU_PIX_FMT_GBR24 fourcc('G', 'B', 'R', '3') /*!< 24 GBR-8-8-8 */
117#define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*!< 32 BGR-8-8-8-8 */
118#define IPU_PIX_FMT_BGRA32 fourcc('B', 'G', 'R', 'A') /*!< 32 BGR-8-8-8-8 */
119#define IPU_PIX_FMT_RGB32 fourcc('R', 'G', 'B', '4') /*!< 32 RGB-8-8-8-8 */
120#define IPU_PIX_FMT_RGBA32 fourcc('R', 'G', 'B', 'A') /*!< 32 RGB-8-8-8-8 */
121#define IPU_PIX_FMT_ABGR32 fourcc('A', 'B', 'G', 'R') /*!< 32 ABGR-8-8-8-8 */
122/*! @} */
123/*! @name YUV Interleaved Formats */
124/*! @{ */
125#define IPU_PIX_FMT_YUYV fourcc('Y', 'U', 'Y', 'V') /*!< 16 YUV 4:2:2 */
126#define IPU_PIX_FMT_UYVY fourcc('U', 'Y', 'V', 'Y') /*!< 16 YUV 4:2:2 */
127#define IPU_PIX_FMT_YVYU fourcc('Y', 'V', 'Y', 'U') /*!< 16 YVYU 4:2:2 */
128#define IPU_PIX_FMT_VYUY fourcc('V', 'Y', 'U', 'Y') /*!< 16 VYYU 4:2:2 */
129#define IPU_PIX_FMT_Y41P fourcc('Y', '4', '1', 'P') /*!< 12 YUV 4:1:1 */
130#define IPU_PIX_FMT_YUV444 fourcc('Y', '4', '4', '4') /*!< 24 YUV 4:4:4 */
131#define IPU_PIX_FMT_VYU444 fourcc('V', '4', '4', '4') /*!< 24 VYU 4:4:4 */
132/* two planes -- one Y, one Cb + Cr interleaved */
133#define IPU_PIX_FMT_NV12 fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */
134/* two planes -- 12 tiled Y/CbCr 4:2:0 */
135#define IPU_PIX_FMT_TILED_NV12 fourcc('T', 'N', 'V', 'P')
136#define IPU_PIX_FMT_TILED_NV12F fourcc('T', 'N', 'V', 'F')
137
138/*! @} */
139/*! @name YUV Planar Formats */
140/*! @{ */
141#define IPU_PIX_FMT_GREY fourcc('G', 'R', 'E', 'Y') /*!< 8 Greyscale */
142#define IPU_PIX_FMT_YVU410P fourcc('Y', 'V', 'U', '9') /*!< 9 YVU 4:1:0 */
143#define IPU_PIX_FMT_YUV410P fourcc('Y', 'U', 'V', '9') /*!< 9 YUV 4:1:0 */
144#define IPU_PIX_FMT_YVU420P fourcc('Y', 'V', '1', '2') /*!< 12 YVU 4:2:0 */
145#define IPU_PIX_FMT_YUV420P fourcc('I', '4', '2', '0') /*!< 12 YUV 4:2:0 */
146#define IPU_PIX_FMT_YUV420P2 fourcc('Y', 'U', '1', '2') /*!< 12 YUV 4:2:0 */
147#define IPU_PIX_FMT_YVU422P fourcc('Y', 'V', '1', '6') /*!< 16 YVU 4:2:2 */
148#define IPU_PIX_FMT_YUV422P fourcc('4', '2', '2', 'P') /*!< 16 YUV 4:2:2 */
149/* non-interleaved 4:4:4 */
150#define IPU_PIX_FMT_YUV444P fourcc('4', '4', '4', 'P') /*!< 24 YUV 4:4:4 */
151/*! @} */
152#define IPU_PIX_FMT_TILED_NV12_MBALIGN (16)
153#define TILED_NV12_FRAME_SIZE(w, h) \
154 (ALIGN((w) * (h), SZ_4K) + ALIGN((w) * (h) / 2, SZ_4K))
155/* IPU device */
156typedef enum {
157 RGB_CS,
158 YUV_CS,
159 NULL_CS
160} cs_t;
161
162struct ipu_pos {
163 u32 x;
164 u32 y;
165};
166
167struct ipu_crop {
168 struct ipu_pos pos;
169 u32 w;
170 u32 h;
171};
172
173struct ipu_deinterlace {
174 bool enable;
175 u8 motion; /*see ipu_motion_sel*/
176#define IPU_DEINTERLACE_FIELD_TOP 0
177#define IPU_DEINTERLACE_FIELD_BOTTOM 1
178#define IPU_DEINTERLACE_FIELD_MASK \
179 (IPU_DEINTERLACE_FIELD_TOP | IPU_DEINTERLACE_FIELD_BOTTOM)
180 /* deinterlace frame rate double flags */
181#define IPU_DEINTERLACE_RATE_EN 0x80
182#define IPU_DEINTERLACE_RATE_FRAME1 0x40
183#define IPU_DEINTERLACE_RATE_MASK \
184 (IPU_DEINTERLACE_RATE_EN | IPU_DEINTERLACE_RATE_FRAME1)
185#define IPU_DEINTERLACE_MAX_FRAME 2
186 u8 field_fmt;
187};
188
189struct ipu_input {
190 u32 width;
191 u32 height;
192 u32 format;
193 struct ipu_crop crop;
194 dma_addr_t paddr;
195
196 struct ipu_deinterlace deinterlace;
197 dma_addr_t paddr_n; /*valid when deinterlace enable*/
198};
199
200struct ipu_alpha {
201#define IPU_ALPHA_MODE_GLOBAL 0
202#define IPU_ALPHA_MODE_LOCAL 1
203 u8 mode;
204 u8 gvalue; /* 0~255 */
205 dma_addr_t loc_alp_paddr;
206};
207
208struct ipu_colorkey {
209 bool enable;
210 u32 value; /* RGB 24bit */
211};
212
213struct ipu_overlay {
214 u32 width;
215 u32 height;
216 u32 format;
217 struct ipu_crop crop;
218 struct ipu_alpha alpha;
219 struct ipu_colorkey colorkey;
220 dma_addr_t paddr;
221};
222
223struct ipu_output {
224 u32 width;
225 u32 height;
226 u32 format;
227 u8 rotate;
228 struct ipu_crop crop;
229 dma_addr_t paddr;
230};
231
232struct ipu_task {
233 struct ipu_input input;
234 struct ipu_output output;
235
236 bool overlay_en;
237 struct ipu_overlay overlay;
238
239#define IPU_TASK_PRIORITY_NORMAL 0
240#define IPU_TASK_PRIORITY_HIGH 1
241 u8 priority;
242
243#define IPU_TASK_ID_ANY 0
244#define IPU_TASK_ID_VF 1
245#define IPU_TASK_ID_PP 2
246#define IPU_TASK_ID_MAX 3
247 u8 task_id;
248
249 int timeout;
250};
251
252enum {
253 IPU_CHECK_OK = 0,
254 IPU_CHECK_WARN_INPUT_OFFS_NOT8ALIGN = 0x1,
255 IPU_CHECK_WARN_OUTPUT_OFFS_NOT8ALIGN = 0x2,
256 IPU_CHECK_WARN_OVERLAY_OFFS_NOT8ALIGN = 0x4,
257 IPU_CHECK_ERR_MIN,
258 IPU_CHECK_ERR_INPUT_CROP,
259 IPU_CHECK_ERR_OUTPUT_CROP,
260 IPU_CHECK_ERR_OVERLAY_CROP,
261 IPU_CHECK_ERR_INPUT_OVER_LIMIT,
262 IPU_CHECK_ERR_OV_OUT_NO_FIT,
263 IPU_CHECK_ERR_OVERLAY_WITH_VDI,
264 IPU_CHECK_ERR_PROC_NO_NEED,
265 IPU_CHECK_ERR_SPLIT_INPUTW_OVER,
266 IPU_CHECK_ERR_SPLIT_INPUTH_OVER,
267 IPU_CHECK_ERR_SPLIT_OUTPUTW_OVER,
268 IPU_CHECK_ERR_SPLIT_OUTPUTH_OVER,
269 IPU_CHECK_ERR_SPLIT_WITH_ROT,
270 IPU_CHECK_ERR_NOT_SUPPORT,
271 IPU_CHECK_ERR_NOT16ALIGN,
272};
273
274/* IOCTL commands */
275#define IPU_CHECK_TASK _IOWR('I', 0x1, struct ipu_task)
276#define IPU_QUEUE_TASK _IOW('I', 0x2, struct ipu_task)
277#define IPU_ALLOC _IOWR('I', 0x3, int)
278#define IPU_FREE _IOW('I', 0x4, int)
279
280#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-10 12:34:55 -0400