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authorAnson Huang <b20788@freescale.com>2014-03-14 04:17:04 -0400
committerAnson Huang <b20788@freescale.com>2014-04-30 01:19:02 -0400
commitd50825b82b4d58a3b38ae280fc62e29222accb1a (patch)
tree0f2d47ffa0d85eb88f43e83c736a35e02af2cad1
parent680623410b0c85461b83c04b5b4d428c64d01f77 (diff)
ENGR00303665-1 ARM: dts: imx6sx: add busfreq support
Add busfreq support; Signed-off-by: Anson Huang <b20788@freescale.com>
-rw-r--r--arch/arm/boot/dts/imx6sx.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 134329746b91..77f565e94a09 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -88,6 +88,24 @@
88 interrupt-parent = <&intc>; 88 interrupt-parent = <&intc>;
89 ranges; 89 ranges;
90 90
91 busfreq {
92 compatible = "fsl,imx6_busfreq";
93 clocks = <&clks IMX6SX_CLK_PLL2_BUS>, <&clks IMX6SX_CLK_PLL2_PFD2>,
94 <&clks IMX6SX_CLK_PLL2_198M>, <&clks IMX6SX_CLK_ARM>,
95 <&clks IMX6SX_CLK_PLL3_USB_OTG>, <&clks IMX6SX_CLK_PERIPH>,
96 <&clks IMX6SX_CLK_PERIPH_PRE>, <&clks IMX6SX_CLK_PERIPH_CLK2>,
97 <&clks IMX6SX_CLK_PERIPH_CLK2_SEL>, <&clks IMX6SX_CLK_OSC>,
98 <&clks IMX6SX_CLK_PLL1_SYS>, <&clks IMX6SX_CLK_PERIPH2>,
99 <&clks IMX6SX_CLK_AHB>, <&clks IMX6SX_CLK_OCRAM>,
100 <&clks IMX6SX_CLK_PLL1_SW>, <&clks IMX6SX_CLK_PERIPH2_PRE>,
101 <&clks IMX6SX_CLK_PERIPH2_CLK2_SEL>, <&clks IMX6SX_CLK_PERIPH2_CLK2>,
102 <&clks IMX6SX_CLK_STEP>, <&clks IMX6SX_CLK_MMDC_P0_FAST>;
103 clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
104 "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "pll1_sys", "periph2", "ahb", "ocram", "pll1_sw",
105 "periph2_pre", "periph2_clk2_sel", "periph2_clk2", "step", "mmdc";
106 fsl,max_ddr_freq = <400000000>;
107 };
108
91 pmu { 109 pmu {
92 compatible = "arm,cortex-a9-pmu"; 110 compatible = "arm,cortex-a9-pmu";
93 interrupts = <0 94 0x04>; 111 interrupts = <0 94 0x04>;