diff options
author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-03-08 05:59:25 -0500 |
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committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-06-24 09:40:30 -0400 |
commit | d393d43ff799a1ac3766cdbca9a6367cb8c02db9 (patch) | |
tree | c1d2f7436b7521bac2d069e49060fb51767ad2bf | |
parent | 7b562d0f21b58195596d4800466221e7808d180e (diff) |
ARM: mx2/mx21ads: fold board header in its only user
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
-rw-r--r-- | arch/arm/mach-mx2/mach-mx21ads.c | 36 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/board-mx21ads.h | 52 |
2 files changed, 35 insertions, 53 deletions
diff --git a/arch/arm/mach-mx2/mach-mx21ads.c b/arch/arm/mach-mx2/mach-mx21ads.c index 113e58d7cb40..99f2492991b4 100644 --- a/arch/arm/mach-mx2/mach-mx21ads.c +++ b/arch/arm/mach-mx2/mach-mx21ads.c | |||
@@ -33,10 +33,44 @@ | |||
33 | #include <mach/iomux-mx21.h> | 33 | #include <mach/iomux-mx21.h> |
34 | #include <mach/mxc_nand.h> | 34 | #include <mach/mxc_nand.h> |
35 | #include <mach/mmc.h> | 35 | #include <mach/mmc.h> |
36 | #include <mach/board-mx21ads.h> | ||
37 | 36 | ||
38 | #include "devices.h" | 37 | #include "devices.h" |
39 | 38 | ||
39 | /* | ||
40 | * Memory-mapped I/O on MX21ADS base board | ||
41 | */ | ||
42 | #define MX21ADS_MMIO_BASE_ADDR 0xf5000000 | ||
43 | #define MX21ADS_MMIO_SIZE SZ_16M | ||
44 | |||
45 | #define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \ | ||
46 | (MX21ADS_MMIO_BASE_ADDR + (offset)) | ||
47 | |||
48 | #define MX21ADS_CS8900A_IRQ IRQ_GPIOE(11) | ||
49 | #define MX21ADS_CS8900A_IOBASE_REG MX21ADS_REG_ADDR(0x000000) | ||
50 | #define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000) | ||
51 | #define MX21ADS_VERSION_REG MX21ADS_REG_ADDR(0x400000) | ||
52 | #define MX21ADS_IO_REG MX21ADS_REG_ADDR(0x800000) | ||
53 | |||
54 | /* MX21ADS_IO_REG bit definitions */ | ||
55 | #define MX21ADS_IO_SD_WP 0x0001 /* read */ | ||
56 | #define MX21ADS_IO_TP6 0x0001 /* write */ | ||
57 | #define MX21ADS_IO_SW_SEL 0x0002 /* read */ | ||
58 | #define MX21ADS_IO_TP7 0x0002 /* write */ | ||
59 | #define MX21ADS_IO_RESET_E_UART 0x0004 | ||
60 | #define MX21ADS_IO_RESET_BASE 0x0008 | ||
61 | #define MX21ADS_IO_CSI_CTL2 0x0010 | ||
62 | #define MX21ADS_IO_CSI_CTL1 0x0020 | ||
63 | #define MX21ADS_IO_CSI_CTL0 0x0040 | ||
64 | #define MX21ADS_IO_UART1_EN 0x0080 | ||
65 | #define MX21ADS_IO_UART4_EN 0x0100 | ||
66 | #define MX21ADS_IO_LCDON 0x0200 | ||
67 | #define MX21ADS_IO_IRDA_EN 0x0400 | ||
68 | #define MX21ADS_IO_IRDA_FIR_SEL 0x0800 | ||
69 | #define MX21ADS_IO_IRDA_MD0_B 0x1000 | ||
70 | #define MX21ADS_IO_IRDA_MD1 0x2000 | ||
71 | #define MX21ADS_IO_LED4_ON 0x4000 | ||
72 | #define MX21ADS_IO_LED3_ON 0x8000 | ||
73 | |||
40 | static unsigned int mx21ads_pins[] = { | 74 | static unsigned int mx21ads_pins[] = { |
41 | 75 | ||
42 | /* CS8900A */ | 76 | /* CS8900A */ |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx21ads.h b/arch/arm/plat-mxc/include/mach/board-mx21ads.h deleted file mode 100644 index 0cf4fa29510c..000000000000 --- a/arch/arm/plat-mxc/include/mach/board-mx21ads.h +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | */ | ||
4 | |||
5 | /* | ||
6 | * The code contained herein is licensed under the GNU General Public | ||
7 | * License. You may obtain a copy of the GNU General Public License | ||
8 | * Version 2 or later at the following locations: | ||
9 | * | ||
10 | * http://www.opensource.org/licenses/gpl-license.html | ||
11 | * http://www.gnu.org/copyleft/gpl.html | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_MXC_BOARD_MX21ADS_H__ | ||
15 | #define __ASM_ARCH_MXC_BOARD_MX21ADS_H__ | ||
16 | |||
17 | /* | ||
18 | * Memory-mapped I/O on MX21ADS base board | ||
19 | */ | ||
20 | #define MX21ADS_MMIO_BASE_ADDR 0xF5000000 | ||
21 | #define MX21ADS_MMIO_SIZE SZ_16M | ||
22 | |||
23 | #define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \ | ||
24 | (MX21ADS_MMIO_BASE_ADDR + (offset)) | ||
25 | |||
26 | #define MX21ADS_CS8900A_IRQ IRQ_GPIOE(11) | ||
27 | #define MX21ADS_CS8900A_IOBASE_REG MX21ADS_REG_ADDR(0x000000) | ||
28 | #define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000) | ||
29 | #define MX21ADS_VERSION_REG MX21ADS_REG_ADDR(0x400000) | ||
30 | #define MX21ADS_IO_REG MX21ADS_REG_ADDR(0x800000) | ||
31 | |||
32 | /* MX21ADS_IO_REG bit definitions */ | ||
33 | #define MX21ADS_IO_SD_WP 0x0001 /* read */ | ||
34 | #define MX21ADS_IO_TP6 0x0001 /* write */ | ||
35 | #define MX21ADS_IO_SW_SEL 0x0002 /* read */ | ||
36 | #define MX21ADS_IO_TP7 0x0002 /* write */ | ||
37 | #define MX21ADS_IO_RESET_E_UART 0x0004 | ||
38 | #define MX21ADS_IO_RESET_BASE 0x0008 | ||
39 | #define MX21ADS_IO_CSI_CTL2 0x0010 | ||
40 | #define MX21ADS_IO_CSI_CTL1 0x0020 | ||
41 | #define MX21ADS_IO_CSI_CTL0 0x0040 | ||
42 | #define MX21ADS_IO_UART1_EN 0x0080 | ||
43 | #define MX21ADS_IO_UART4_EN 0x0100 | ||
44 | #define MX21ADS_IO_LCDON 0x0200 | ||
45 | #define MX21ADS_IO_IRDA_EN 0x0400 | ||
46 | #define MX21ADS_IO_IRDA_FIR_SEL 0x0800 | ||
47 | #define MX21ADS_IO_IRDA_MD0_B 0x1000 | ||
48 | #define MX21ADS_IO_IRDA_MD1 0x2000 | ||
49 | #define MX21ADS_IO_LED4_ON 0x4000 | ||
50 | #define MX21ADS_IO_LED3_ON 0x8000 | ||
51 | |||
52 | #endif /* __ASM_ARCH_MXC_BOARD_MX21ADS_H__ */ | ||