ENGR00280689-02 i.MX6 HDMI: Remove HDCP register define from driver

Remove HDCP register define from HDMI kernel driver.

Signed-off-by: Sandor Yu <R01008@freescale.com>

1 files changed, 1 insertions, 82 deletions

diff --git a/include/video/mxc_hdmi.h b/include/video/mxc_hdmi.h
index a47c8fb476c3..e63fde7438f1 100644
--- a/include/video/mxc_hdmi.h
+++ b/include/video/mxc_hdmi.h
@@ -461,35 +461,10 @@
 #define HDMI_CSC_COEF_C4_MSB                    0x4118
 #define HDMI_CSC_COEF_C4_LSB                    0x4119
 
-/* HDCP Encryption Engine Registers */
-#define HDMI_A_HDCPCFG0                         0x5000
-#define HDMI_A_HDCPCFG1                         0x5001
-#define HDMI_A_HDCPOBS0                         0x5002
-#define HDMI_A_HDCPOBS1                         0x5003
-#define HDMI_A_HDCPOBS2                         0x5004
-#define HDMI_A_HDCPOBS3                         0x5005
+/* HDCP Interrupt Registers */
 #define HDMI_A_APIINTCLR                        0x5006
 #define HDMI_A_APIINTSTAT                       0x5007
 #define HDMI_A_APIINTMSK                        0x5008
-#define HDMI_A_VIDPOLCFG                        0x5009
-#define HDMI_A_OESSWCFG                         0x500A
-#define HDMI_A_TIMER1SETUP0                     0x500B
-#define HDMI_A_TIMER1SETUP1                     0x500C
-#define HDMI_A_TIMER2SETUP0                     0x500D
-#define HDMI_A_TIMER2SETUP1                     0x500E
-#define HDMI_A_100MSCFG                         0x500F
-#define HDMI_A_2SCFG0                           0x5010
-#define HDMI_A_2SCFG1                           0x5011
-#define HDMI_A_5SCFG0                           0x5012
-#define HDMI_A_5SCFG1                           0x5013
-#define HDMI_A_SRMVERLSB                        0x5014
-#define HDMI_A_SRMVERMSB                        0x5015
-#define HDMI_A_SRMCTRL                          0x5016
-#define HDMI_A_SFRSETUP                         0x5017
-#define HDMI_A_I2CHSETUP                        0x5018
-#define HDMI_A_INTSETUP                         0x5019
-#define HDMI_A_PRESETUP                         0x501A
-#define HDMI_A_SRM_BASE                         0x5020
 
 /* CEC Engine Registers */
 #define HDMI_CEC_CTRL                           0x7D00
@@ -699,9 +674,6 @@ enum {
         HDMI_VP_REMAP_YCC422_16bit = 0x0,
 
 /* FC_INVIDCONF field values */
-        HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80,
-        HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80,
-        HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00,
         HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40,
         HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40,
         HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00,
@@ -1015,59 +987,6 @@ enum {
         HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70,
         HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03,
 
-/* A_HDCPCFG0 field values */
-        HDMI_A_HDCPCFG0_ELVENA_MASK = 0x80,
-        HDMI_A_HDCPCFG0_ELVENA_ENABLE = 0x80,
-        HDMI_A_HDCPCFG0_ELVENA_DISABLE = 0x00,
-        HDMI_A_HDCPCFG0_I2CFASTMODE_MASK = 0x40,
-        HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE = 0x40,
-        HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE = 0x00,
-        HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK = 0x20,
-        HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE = 0x20,
-        HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE = 0x00,
-        HDMI_A_HDCPCFG0_SYNCRICHECK_MASK = 0x10,
-        HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE = 0x10,
-        HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE = 0x00,
-        HDMI_A_HDCPCFG0_AVMUTE_MASK = 0x8,
-        HDMI_A_HDCPCFG0_AVMUTE_ENABLE = 0x8,
-        HDMI_A_HDCPCFG0_AVMUTE_DISABLE = 0x0,
-        HDMI_A_HDCPCFG0_RXDETECT_MASK = 0x4,
-        HDMI_A_HDCPCFG0_RXDETECT_ENABLE = 0x4,
-        HDMI_A_HDCPCFG0_RXDETECT_DISABLE = 0x0,
-        HDMI_A_HDCPCFG0_EN11FEATURE_MASK = 0x2,
-        HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE = 0x2,
-        HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE = 0x0,
-        HDMI_A_HDCPCFG0_HDMIDVI_MASK = 0x1,
-        HDMI_A_HDCPCFG0_HDMIDVI_HDMI = 0x1,
-        HDMI_A_HDCPCFG0_HDMIDVI_DVI = 0x0,
-
-/* A_HDCPCFG1 field values */
-        HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK = 0x8,
-        HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE = 0x8,
-        HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE = 0x0,
-        HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK = 0x4,
-        HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE = 0x4,
-        HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE = 0x0,
-        HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK = 0x2,
-        HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE = 0x2,
-        HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE = 0x0,
-        HDMI_A_HDCPCFG1_SWRESET_MASK = 0x1,
-        HDMI_A_HDCPCFG1_SWRESET_ASSERT = 0x0,
-
-/* A_VIDPOLCFG field values */
-        HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK = 0x60,
-        HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET = 5,
-        HDMI_A_VIDPOLCFG_DATAENPOL_MASK = 0x10,
-        HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH = 0x10,
-        HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW = 0x0,
-        HDMI_A_VIDPOLCFG_VSYNCPOL_MASK = 0x8,
-        HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH = 0x8,
-        HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW = 0x0,
-        HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2,
-        HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2,
-        HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0,
-
-
 /* I2CM_OPERATION field values */
         HDMI_I2CM_OPERATION_WRITE = 0x10,
         HDMI_I2CM_OPERATION_READ_EXT = 0x2,