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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-09-11 08:27:18 -0400
committerJason Cooper <jason@lakedaemon.net>2012-09-21 14:03:23 -0400
commitc3c5a2815d0b7ebde157556685a0ef8ffa34b98c (patch)
treed60d825a2ea57e3336f7dfce05eb2f30676982b9
parent2332656aec7ae88248cbd9aa6b35c857bb449c94 (diff)
arm: mach-dove: use IOMEM() for base address definitions
We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-dove code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r--arch/arm/mach-dove/addr-map.c2
-rw-r--r--arch/arm/mach-dove/common.c25
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h12
-rw-r--r--arch/arm/mach-dove/irq.c10
-rw-r--r--arch/arm/mach-dove/mpp.c3
-rw-r--r--arch/arm/mach-dove/pcie.c6
6 files changed, 32 insertions, 26 deletions
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 2a06c0163418..b92c9c7d1d6e 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -47,7 +47,7 @@ static inline void __iomem *ddr_map_sc(int i)
47static struct __initdata orion_addr_map_cfg addr_map_cfg = { 47static struct __initdata orion_addr_map_cfg addr_map_cfg = {
48 .num_wins = 8, 48 .num_wins = 8,
49 .remappable_wins = 4, 49 .remappable_wins = 4,
50 .bridge_virt_base = BRIDGE_VIRT_BASE, 50 .bridge_virt_base = (unsigned long) BRIDGE_VIRT_BASE,
51}; 51};
52 52
53static const struct __initdata orion_addr_map_info addr_map_info[] = { 53static const struct __initdata orion_addr_map_info addr_map_info[] = {
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 6321567d8eaa..533fd8123c70 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -40,22 +40,22 @@ static int get_tclk(void);
40 ****************************************************************************/ 40 ****************************************************************************/
41static struct map_desc dove_io_desc[] __initdata = { 41static struct map_desc dove_io_desc[] __initdata = {
42 { 42 {
43 .virtual = DOVE_SB_REGS_VIRT_BASE, 43 .virtual = (unsigned long) DOVE_SB_REGS_VIRT_BASE,
44 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE), 44 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
45 .length = DOVE_SB_REGS_SIZE, 45 .length = DOVE_SB_REGS_SIZE,
46 .type = MT_DEVICE, 46 .type = MT_DEVICE,
47 }, { 47 }, {
48 .virtual = DOVE_NB_REGS_VIRT_BASE, 48 .virtual = (unsigned long) DOVE_NB_REGS_VIRT_BASE,
49 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE), 49 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
50 .length = DOVE_NB_REGS_SIZE, 50 .length = DOVE_NB_REGS_SIZE,
51 .type = MT_DEVICE, 51 .type = MT_DEVICE,
52 }, { 52 }, {
53 .virtual = DOVE_PCIE0_IO_VIRT_BASE, 53 .virtual = (unsigned long) DOVE_PCIE0_IO_VIRT_BASE,
54 .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE), 54 .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
55 .length = DOVE_PCIE0_IO_SIZE, 55 .length = DOVE_PCIE0_IO_SIZE,
56 .type = MT_DEVICE, 56 .type = MT_DEVICE,
57 }, { 57 }, {
58 .virtual = DOVE_PCIE1_IO_VIRT_BASE, 58 .virtual = (unsigned long) DOVE_PCIE1_IO_VIRT_BASE,
59 .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE), 59 .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
60 .length = DOVE_PCIE1_IO_SIZE, 60 .length = DOVE_PCIE1_IO_SIZE,
61 .type = MT_DEVICE, 61 .type = MT_DEVICE,
@@ -128,7 +128,8 @@ void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
128 ****************************************************************************/ 128 ****************************************************************************/
129void __init dove_uart0_init(void) 129void __init dove_uart0_init(void)
130{ 130{
131 orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE, 131 orion_uart0_init((unsigned long) DOVE_UART0_VIRT_BASE,
132 DOVE_UART0_PHYS_BASE,
132 IRQ_DOVE_UART_0, tclk); 133 IRQ_DOVE_UART_0, tclk);
133} 134}
134 135
@@ -137,7 +138,8 @@ void __init dove_uart0_init(void)
137 ****************************************************************************/ 138 ****************************************************************************/
138void __init dove_uart1_init(void) 139void __init dove_uart1_init(void)
139{ 140{
140 orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE, 141 orion_uart1_init((unsigned long) DOVE_UART1_VIRT_BASE,
142 DOVE_UART1_PHYS_BASE,
141 IRQ_DOVE_UART_1, tclk); 143 IRQ_DOVE_UART_1, tclk);
142} 144}
143 145
@@ -146,7 +148,8 @@ void __init dove_uart1_init(void)
146 ****************************************************************************/ 148 ****************************************************************************/
147void __init dove_uart2_init(void) 149void __init dove_uart2_init(void)
148{ 150{
149 orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE, 151 orion_uart2_init((unsigned long) DOVE_UART2_VIRT_BASE,
152 DOVE_UART2_PHYS_BASE,
150 IRQ_DOVE_UART_2, tclk); 153 IRQ_DOVE_UART_2, tclk);
151} 154}
152 155
@@ -155,7 +158,8 @@ void __init dove_uart2_init(void)
155 ****************************************************************************/ 158 ****************************************************************************/
156void __init dove_uart3_init(void) 159void __init dove_uart3_init(void)
157{ 160{
158 orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE, 161 orion_uart3_init((unsigned long) DOVE_UART3_VIRT_BASE,
162 DOVE_UART3_PHYS_BASE,
159 IRQ_DOVE_UART_3, tclk); 163 IRQ_DOVE_UART_3, tclk);
160} 164}
161 165
@@ -185,7 +189,7 @@ void __init dove_i2c_init(void)
185 ****************************************************************************/ 189 ****************************************************************************/
186void __init dove_init_early(void) 190void __init dove_init_early(void)
187{ 191{
188 orion_time_set_base(TIMER_VIRT_BASE); 192 orion_time_set_base((unsigned long) TIMER_VIRT_BASE);
189} 193}
190 194
191static int get_tclk(void) 195static int get_tclk(void)
@@ -196,7 +200,8 @@ static int get_tclk(void)
196 200
197static void __init dove_timer_init(void) 201static void __init dove_timer_init(void)
198{ 202{
199 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, 203 orion_time_init((unsigned long) BRIDGE_VIRT_BASE,
204 BRIDGE_INT_TIMER1_CLR,
200 IRQ_DOVE_BRIDGE, get_tclk()); 205 IRQ_DOVE_BRIDGE, get_tclk());
201} 206}
202 207
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index cccfd1d45f4c..735dd2ef3931 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -25,7 +25,7 @@
25 */ 25 */
26 26
27#define DOVE_CESA_PHYS_BASE 0xc8000000 27#define DOVE_CESA_PHYS_BASE 0xc8000000
28#define DOVE_CESA_VIRT_BASE 0xfdb00000 28#define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
29#define DOVE_CESA_SIZE SZ_1M 29#define DOVE_CESA_SIZE SZ_1M
30 30
31#define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000 31#define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
@@ -38,24 +38,24 @@
38#define DOVE_BOOTROM_SIZE SZ_128M 38#define DOVE_BOOTROM_SIZE SZ_128M
39 39
40#define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000 40#define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
41#define DOVE_SCRATCHPAD_VIRT_BASE 0xfdd00000 41#define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
42#define DOVE_SCRATCHPAD_SIZE SZ_1M 42#define DOVE_SCRATCHPAD_SIZE SZ_1M
43 43
44#define DOVE_SB_REGS_PHYS_BASE 0xf1000000 44#define DOVE_SB_REGS_PHYS_BASE 0xf1000000
45#define DOVE_SB_REGS_VIRT_BASE 0xfde00000 45#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000)
46#define DOVE_SB_REGS_SIZE SZ_8M 46#define DOVE_SB_REGS_SIZE SZ_8M
47 47
48#define DOVE_NB_REGS_PHYS_BASE 0xf1800000 48#define DOVE_NB_REGS_PHYS_BASE 0xf1800000
49#define DOVE_NB_REGS_VIRT_BASE 0xfe600000 49#define DOVE_NB_REGS_VIRT_BASE IOMEM(0xfe600000)
50#define DOVE_NB_REGS_SIZE SZ_8M 50#define DOVE_NB_REGS_SIZE SZ_8M
51 51
52#define DOVE_PCIE0_IO_PHYS_BASE 0xf2000000 52#define DOVE_PCIE0_IO_PHYS_BASE 0xf2000000
53#define DOVE_PCIE0_IO_VIRT_BASE 0xfee00000 53#define DOVE_PCIE0_IO_VIRT_BASE IOMEM(0xfee00000)
54#define DOVE_PCIE0_IO_BUS_BASE 0x00000000 54#define DOVE_PCIE0_IO_BUS_BASE 0x00000000
55#define DOVE_PCIE0_IO_SIZE SZ_1M 55#define DOVE_PCIE0_IO_SIZE SZ_1M
56 56
57#define DOVE_PCIE1_IO_PHYS_BASE 0xf2100000 57#define DOVE_PCIE1_IO_PHYS_BASE 0xf2100000
58#define DOVE_PCIE1_IO_VIRT_BASE 0xfef00000 58#define DOVE_PCIE1_IO_VIRT_BASE IOMEM(0xfef00000)
59#define DOVE_PCIE1_IO_BUS_BASE 0x00100000 59#define DOVE_PCIE1_IO_BUS_BASE 0x00100000
60#define DOVE_PCIE1_IO_SIZE SZ_1M 60#define DOVE_PCIE1_IO_SIZE SZ_1M
61 61
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 9bc97a5baaa8..4ce306aff495 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -99,19 +99,19 @@ void __init dove_init_irq(void)
99{ 99{
100 int i; 100 int i;
101 101
102 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); 102 orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
103 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); 103 orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
104 104
105 /* 105 /*
106 * Initialize gpiolib for GPIOs 0-71. 106 * Initialize gpiolib for GPIOs 0-71.
107 */ 107 */
108 orion_gpio_init(NULL, 0, 32, (void __iomem *)DOVE_GPIO_LO_VIRT_BASE, 0, 108 orion_gpio_init(NULL, 0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
109 IRQ_DOVE_GPIO_START, gpio0_irqs); 109 IRQ_DOVE_GPIO_START, gpio0_irqs);
110 110
111 orion_gpio_init(NULL, 32, 32, (void __iomem *)DOVE_GPIO_HI_VIRT_BASE, 0, 111 orion_gpio_init(NULL, 32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
112 IRQ_DOVE_GPIO_START + 32, gpio1_irqs); 112 IRQ_DOVE_GPIO_START + 32, gpio1_irqs);
113 113
114 orion_gpio_init(NULL, 64, 8, (void __iomem *)DOVE_GPIO2_VIRT_BASE, 0, 114 orion_gpio_init(NULL, 64, 8, DOVE_GPIO2_VIRT_BASE, 0,
115 IRQ_DOVE_GPIO_START + 64, gpio2_irqs); 115 IRQ_DOVE_GPIO_START + 64, gpio2_irqs);
116 116
117 /* 117 /*
diff --git a/arch/arm/mach-dove/mpp.c b/arch/arm/mach-dove/mpp.c
index 7f70afc26f91..fc04ebefbebd 100644
--- a/arch/arm/mach-dove/mpp.c
+++ b/arch/arm/mach-dove/mpp.c
@@ -151,7 +151,8 @@ void __init dove_mpp_conf(unsigned int *mpp_list,
151 dove_mpp_dump_regs(); 151 dove_mpp_dump_regs();
152 152
153 /* Use platform code for pins 0-23 */ 153 /* Use platform code for pins 0-23 */
154 orion_mpp_conf(mpp_list, 0, MPP_MAX, DOVE_MPP_VIRT_BASE); 154 orion_mpp_conf(mpp_list, 0, MPP_MAX,
155 (unsigned long) DOVE_MPP_VIRT_BASE);
155 156
156 dove_mpp_conf_grp(mpp_grp_list); 157 dove_mpp_conf_grp(mpp_grp_list);
157 dove_mpp_cfg_au1(grp_au1_52_57); 158 dove_mpp_cfg_au1(grp_au1_52_57);
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 47921b0cdc65..b3724414fd1a 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -197,18 +197,18 @@ static struct hw_pci dove_pci __initdata = {
197 .map_irq = dove_pcie_map_irq, 197 .map_irq = dove_pcie_map_irq,
198}; 198};
199 199
200static void __init add_pcie_port(int index, unsigned long base) 200static void __init add_pcie_port(int index, void __iomem *base)
201{ 201{
202 printk(KERN_INFO "Dove PCIe port %d: ", index); 202 printk(KERN_INFO "Dove PCIe port %d: ", index);
203 203
204 if (orion_pcie_link_up((void __iomem *)base)) { 204 if (orion_pcie_link_up(base)) {
205 struct pcie_port *pp = &pcie_port[num_pcie_ports++]; 205 struct pcie_port *pp = &pcie_port[num_pcie_ports++];
206 206
207 printk(KERN_INFO "link up\n"); 207 printk(KERN_INFO "link up\n");
208 208
209 pp->index = index; 209 pp->index = index;
210 pp->root_bus_nr = -1; 210 pp->root_bus_nr = -1;
211 pp->base = (void __iomem *)base; 211 pp->base = base;
212 spin_lock_init(&pp->conf_lock); 212 spin_lock_init(&pp->conf_lock);
213 memset(pp->res, 0, sizeof(pp->res)); 213 memset(pp->res, 0, sizeof(pp->res));
214 } else { 214 } else {