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authorPaul Walmsley <paul@pwsan.com>2011-07-09 21:14:07 -0400
committerPaul Walmsley <paul@pwsan.com>2011-07-09 21:14:07 -0400
commitbc6149587b309e3231e5ac7138b84197813e17ec (patch)
tree0b2b29bce338be46b985ce6d3aaa2bd2671fbaa9
parent0d619a89998d308c48d06b033eccb7374c456f12 (diff)
omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays
Previously, struct omap_hwmod_dma_info arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c30
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c20
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c32
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c43
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c60
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h8
6 files changed, 106 insertions, 87 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 21e3eb8e83c1..d1a8bdefea3f 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -702,6 +702,29 @@ static int _count_mpu_irqs(struct omap_hwmod *oh)
702} 702}
703 703
704/** 704/**
705 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
706 * @oh: struct omap_hwmod *oh
707 *
708 * Count and return the number of SDMA request lines associated with
709 * the hwmod @oh. Used to allocate struct resource data. Returns 0
710 * if @oh is NULL.
711 */
712static int _count_sdma_reqs(struct omap_hwmod *oh)
713{
714 struct omap_hwmod_dma_info *ohdi;
715 int i = 0;
716
717 if (!oh || !oh->sdma_reqs)
718 return 0;
719
720 do {
721 ohdi = &oh->sdma_reqs[i++];
722 } while (ohdi->dma_req != -1);
723
724 return i;
725}
726
727/**
705 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh 728 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
706 * @oh: struct omap_hwmod *oh 729 * @oh: struct omap_hwmod *oh
707 * 730 *
@@ -1987,7 +2010,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
1987{ 2010{
1988 int ret, i; 2011 int ret, i;
1989 2012
1990 ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; 2013 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
1991 2014
1992 for (i = 0; i < oh->slaves_cnt; i++) 2015 for (i = 0; i < oh->slaves_cnt; i++)
1993 ret += _count_ocp_if_addr_spaces(oh->slaves[i]); 2016 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
@@ -2007,7 +2030,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
2007 */ 2030 */
2008int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) 2031int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2009{ 2032{
2010 int i, j, mpu_irqs_cnt; 2033 int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
2011 int r = 0; 2034 int r = 0;
2012 2035
2013 /* For each IRQ, DMA, memory area, fill in array.*/ 2036 /* For each IRQ, DMA, memory area, fill in array.*/
@@ -2021,7 +2044,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2021 r++; 2044 r++;
2022 } 2045 }
2023 2046
2024 for (i = 0; i < oh->sdma_reqs_cnt; i++) { 2047 sdma_reqs_cnt = _count_sdma_reqs(oh);
2048 for (i = 0; i < sdma_reqs_cnt; i++) {
2025 (res + r)->name = (oh->sdma_reqs + i)->name; 2049 (res + r)->name = (oh->sdma_reqs + i)->name;
2026 (res + r)->start = (oh->sdma_reqs + i)->dma_req; 2050 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2027 (res + r)->end = (oh->sdma_reqs + i)->dma_req; 2051 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 73157eef2590..60c817e63c3b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -831,6 +831,7 @@ static struct omap_hwmod_class uart_class = {
831static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 831static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
832 { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, 832 { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
833 { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, 833 { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
834 { .dma_req = -1 }
834}; 835};
835 836
836static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { 837static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
@@ -841,7 +842,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
841 .name = "uart1", 842 .name = "uart1",
842 .mpu_irqs = omap2_uart1_mpu_irqs, 843 .mpu_irqs = omap2_uart1_mpu_irqs,
843 .sdma_reqs = uart1_sdma_reqs, 844 .sdma_reqs = uart1_sdma_reqs,
844 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
845 .main_clk = "uart1_fck", 845 .main_clk = "uart1_fck",
846 .prcm = { 846 .prcm = {
847 .omap2 = { 847 .omap2 = {
@@ -863,6 +863,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
863static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 863static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
864 { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, 864 { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
865 { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, 865 { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
866 { .dma_req = -1 }
866}; 867};
867 868
868static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { 869static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
@@ -873,7 +874,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
873 .name = "uart2", 874 .name = "uart2",
874 .mpu_irqs = omap2_uart2_mpu_irqs, 875 .mpu_irqs = omap2_uart2_mpu_irqs,
875 .sdma_reqs = uart2_sdma_reqs, 876 .sdma_reqs = uart2_sdma_reqs,
876 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
877 .main_clk = "uart2_fck", 877 .main_clk = "uart2_fck",
878 .prcm = { 878 .prcm = {
879 .omap2 = { 879 .omap2 = {
@@ -895,6 +895,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
895static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 895static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
896 { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, 896 { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
897 { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, 897 { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
898 { .dma_req = -1 }
898}; 899};
899 900
900static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { 901static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
@@ -905,7 +906,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
905 .name = "uart3", 906 .name = "uart3",
906 .mpu_irqs = omap2_uart3_mpu_irqs, 907 .mpu_irqs = omap2_uart3_mpu_irqs,
907 .sdma_reqs = uart3_sdma_reqs, 908 .sdma_reqs = uart3_sdma_reqs,
908 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
909 .main_clk = "uart3_fck", 909 .main_clk = "uart3_fck",
910 .prcm = { 910 .prcm = {
911 .omap2 = { 911 .omap2 = {
@@ -942,6 +942,7 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = {
942 942
943static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { 943static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = {
944 { .name = "dispc", .dma_req = 5 }, 944 { .name = "dispc", .dma_req = 5 },
945 { .dma_req = -1 }
945}; 946};
946 947
947/* dss */ 948/* dss */
@@ -980,7 +981,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
980 .class = &omap2420_dss_hwmod_class, 981 .class = &omap2420_dss_hwmod_class,
981 .main_clk = "dss1_fck", /* instead of dss_fck */ 982 .main_clk = "dss1_fck", /* instead of dss_fck */
982 .sdma_reqs = omap2420_dss_sdma_chs, 983 .sdma_reqs = omap2420_dss_sdma_chs,
983 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs),
984 .prcm = { 984 .prcm = {
985 .omap2 = { 985 .omap2 = {
986 .prcm_reg_id = 1, 986 .prcm_reg_id = 1,
@@ -1186,6 +1186,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr;
1186static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 1186static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
1187 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, 1187 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
1188 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, 1188 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
1189 { .dma_req = -1 }
1189}; 1190};
1190 1191
1191static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { 1192static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
@@ -1196,7 +1197,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
1196 .name = "i2c1", 1197 .name = "i2c1",
1197 .mpu_irqs = omap2_i2c1_mpu_irqs, 1198 .mpu_irqs = omap2_i2c1_mpu_irqs,
1198 .sdma_reqs = i2c1_sdma_reqs, 1199 .sdma_reqs = i2c1_sdma_reqs,
1199 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
1200 .main_clk = "i2c1_fck", 1200 .main_clk = "i2c1_fck",
1201 .prcm = { 1201 .prcm = {
1202 .omap2 = { 1202 .omap2 = {
@@ -1220,6 +1220,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
1220static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 1220static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
1221 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, 1221 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
1222 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, 1222 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
1223 { .dma_req = -1 }
1223}; 1224};
1224 1225
1225static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { 1226static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
@@ -1230,7 +1231,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
1230 .name = "i2c2", 1231 .name = "i2c2",
1231 .mpu_irqs = omap2_i2c2_mpu_irqs, 1232 .mpu_irqs = omap2_i2c2_mpu_irqs,
1232 .sdma_reqs = i2c2_sdma_reqs, 1233 .sdma_reqs = i2c2_sdma_reqs,
1233 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
1234 .main_clk = "i2c2_fck", 1234 .main_clk = "i2c2_fck",
1235 .prcm = { 1235 .prcm = {
1236 .omap2 = { 1236 .omap2 = {
@@ -1611,6 +1611,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = {
1611 { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ 1611 { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
1612 { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ 1612 { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
1613 { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ 1613 { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
1614 { .dma_req = -1 }
1614}; 1615};
1615 1616
1616static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { 1617static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = {
@@ -1625,7 +1626,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
1625 .name = "mcspi1_hwmod", 1626 .name = "mcspi1_hwmod",
1626 .mpu_irqs = omap2_mcspi1_mpu_irqs, 1627 .mpu_irqs = omap2_mcspi1_mpu_irqs,
1627 .sdma_reqs = omap2420_mcspi1_sdma_reqs, 1628 .sdma_reqs = omap2420_mcspi1_sdma_reqs,
1628 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs),
1629 .main_clk = "mcspi1_fck", 1629 .main_clk = "mcspi1_fck",
1630 .prcm = { 1630 .prcm = {
1631 .omap2 = { 1631 .omap2 = {
@@ -1649,6 +1649,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = {
1649 { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ 1649 { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
1650 { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ 1650 { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
1651 { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ 1651 { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
1652 { .dma_req = -1 }
1652}; 1653};
1653 1654
1654static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { 1655static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = {
@@ -1663,7 +1664,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = {
1663 .name = "mcspi2_hwmod", 1664 .name = "mcspi2_hwmod",
1664 .mpu_irqs = omap2_mcspi2_mpu_irqs, 1665 .mpu_irqs = omap2_mcspi2_mpu_irqs,
1665 .sdma_reqs = omap2420_mcspi2_sdma_reqs, 1666 .sdma_reqs = omap2420_mcspi2_sdma_reqs,
1666 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs),
1667 .main_clk = "mcspi2_fck", 1667 .main_clk = "mcspi2_fck",
1668 .prcm = { 1668 .prcm = {
1669 .omap2 = { 1669 .omap2 = {
@@ -1700,6 +1700,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
1700static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { 1700static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
1701 { .name = "rx", .dma_req = 32 }, 1701 { .name = "rx", .dma_req = 32 },
1702 { .name = "tx", .dma_req = 31 }, 1702 { .name = "tx", .dma_req = 31 },
1703 { .dma_req = -1 }
1703}; 1704};
1704 1705
1705/* l4_core -> mcbsp1 */ 1706/* l4_core -> mcbsp1 */
@@ -1721,7 +1722,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
1721 .class = &omap2420_mcbsp_hwmod_class, 1722 .class = &omap2420_mcbsp_hwmod_class,
1722 .mpu_irqs = omap2420_mcbsp1_irqs, 1723 .mpu_irqs = omap2420_mcbsp1_irqs,
1723 .sdma_reqs = omap2420_mcbsp1_sdma_chs, 1724 .sdma_reqs = omap2420_mcbsp1_sdma_chs,
1724 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs),
1725 .main_clk = "mcbsp1_fck", 1725 .main_clk = "mcbsp1_fck",
1726 .prcm = { 1726 .prcm = {
1727 .omap2 = { 1727 .omap2 = {
@@ -1747,6 +1747,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
1747static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { 1747static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
1748 { .name = "rx", .dma_req = 34 }, 1748 { .name = "rx", .dma_req = 34 },
1749 { .name = "tx", .dma_req = 33 }, 1749 { .name = "tx", .dma_req = 33 },
1750 { .dma_req = -1 }
1750}; 1751};
1751 1752
1752/* l4_core -> mcbsp2 */ 1753/* l4_core -> mcbsp2 */
@@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
1768 .class = &omap2420_mcbsp_hwmod_class, 1769 .class = &omap2420_mcbsp_hwmod_class,
1769 .mpu_irqs = omap2420_mcbsp2_irqs, 1770 .mpu_irqs = omap2420_mcbsp2_irqs,
1770 .sdma_reqs = omap2420_mcbsp2_sdma_chs, 1771 .sdma_reqs = omap2420_mcbsp2_sdma_chs,
1771 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs),
1772 .main_clk = "mcbsp2_fck", 1772 .main_clk = "mcbsp2_fck",
1773 .prcm = { 1773 .prcm = {
1774 .omap2 = { 1774 .omap2 = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 62ecc685f1a2..af758b3e723c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -903,6 +903,7 @@ static struct omap_hwmod_class uart_class = {
903static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 903static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
904 { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, 904 { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
905 { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, 905 { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
906 { .dma_req = -1 }
906}; 907};
907 908
908static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { 909static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
@@ -913,7 +914,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
913 .name = "uart1", 914 .name = "uart1",
914 .mpu_irqs = omap2_uart1_mpu_irqs, 915 .mpu_irqs = omap2_uart1_mpu_irqs,
915 .sdma_reqs = uart1_sdma_reqs, 916 .sdma_reqs = uart1_sdma_reqs,
916 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
917 .main_clk = "uart1_fck", 917 .main_clk = "uart1_fck",
918 .prcm = { 918 .prcm = {
919 .omap2 = { 919 .omap2 = {
@@ -935,6 +935,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
935static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 935static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
936 { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, 936 { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
937 { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, 937 { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
938 { .dma_req = -1 }
938}; 939};
939 940
940static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { 941static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
@@ -945,7 +946,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
945 .name = "uart2", 946 .name = "uart2",
946 .mpu_irqs = omap2_uart2_mpu_irqs, 947 .mpu_irqs = omap2_uart2_mpu_irqs,
947 .sdma_reqs = uart2_sdma_reqs, 948 .sdma_reqs = uart2_sdma_reqs,
948 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
949 .main_clk = "uart2_fck", 949 .main_clk = "uart2_fck",
950 .prcm = { 950 .prcm = {
951 .omap2 = { 951 .omap2 = {
@@ -967,6 +967,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
967static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 967static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
968 { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, 968 { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
969 { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, 969 { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
970 { .dma_req = -1 }
970}; 971};
971 972
972static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { 973static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
@@ -977,7 +978,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
977 .name = "uart3", 978 .name = "uart3",
978 .mpu_irqs = omap2_uart3_mpu_irqs, 979 .mpu_irqs = omap2_uart3_mpu_irqs,
979 .sdma_reqs = uart3_sdma_reqs, 980 .sdma_reqs = uart3_sdma_reqs,
980 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
981 .main_clk = "uart3_fck", 981 .main_clk = "uart3_fck",
982 .prcm = { 982 .prcm = {
983 .omap2 = { 983 .omap2 = {
@@ -1014,6 +1014,7 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = {
1014 1014
1015static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { 1015static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = {
1016 { .name = "dispc", .dma_req = 5 }, 1016 { .name = "dispc", .dma_req = 5 },
1017 { .dma_req = -1 }
1017}; 1018};
1018 1019
1019/* dss */ 1020/* dss */
@@ -1046,7 +1047,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
1046 .class = &omap2430_dss_hwmod_class, 1047 .class = &omap2430_dss_hwmod_class,
1047 .main_clk = "dss1_fck", /* instead of dss_fck */ 1048 .main_clk = "dss1_fck", /* instead of dss_fck */
1048 .sdma_reqs = omap2430_dss_sdma_chs, 1049 .sdma_reqs = omap2430_dss_sdma_chs,
1049 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs),
1050 .prcm = { 1050 .prcm = {
1051 .omap2 = { 1051 .omap2 = {
1052 .prcm_reg_id = 1, 1052 .prcm_reg_id = 1,
@@ -1237,6 +1237,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
1237static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 1237static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
1238 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, 1238 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
1239 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, 1239 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
1240 { .dma_req = -1 }
1240}; 1241};
1241 1242
1242static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { 1243static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
@@ -1247,7 +1248,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
1247 .name = "i2c1", 1248 .name = "i2c1",
1248 .mpu_irqs = omap2_i2c1_mpu_irqs, 1249 .mpu_irqs = omap2_i2c1_mpu_irqs,
1249 .sdma_reqs = i2c1_sdma_reqs, 1250 .sdma_reqs = i2c1_sdma_reqs,
1250 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
1251 .main_clk = "i2chs1_fck", 1251 .main_clk = "i2chs1_fck",
1252 .prcm = { 1252 .prcm = {
1253 .omap2 = { 1253 .omap2 = {
@@ -1278,6 +1278,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
1278static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 1278static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
1279 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, 1279 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
1280 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, 1280 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
1281 { .dma_req = -1 }
1281}; 1282};
1282 1283
1283static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { 1284static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
@@ -1288,7 +1289,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
1288 .name = "i2c2", 1289 .name = "i2c2",
1289 .mpu_irqs = omap2_i2c2_mpu_irqs, 1290 .mpu_irqs = omap2_i2c2_mpu_irqs,
1290 .sdma_reqs = i2c2_sdma_reqs, 1291 .sdma_reqs = i2c2_sdma_reqs,
1291 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
1292 .main_clk = "i2chs2_fck", 1292 .main_clk = "i2chs2_fck",
1293 .prcm = { 1293 .prcm = {
1294 .omap2 = { 1294 .omap2 = {
@@ -1716,6 +1716,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = {
1716 { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ 1716 { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */
1717 { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ 1717 { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */
1718 { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ 1718 { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */
1719 { .dma_req = -1 }
1719}; 1720};
1720 1721
1721static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { 1722static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = {
@@ -1730,7 +1731,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
1730 .name = "mcspi1_hwmod", 1731 .name = "mcspi1_hwmod",
1731 .mpu_irqs = omap2_mcspi1_mpu_irqs, 1732 .mpu_irqs = omap2_mcspi1_mpu_irqs,
1732 .sdma_reqs = omap2430_mcspi1_sdma_reqs, 1733 .sdma_reqs = omap2430_mcspi1_sdma_reqs,
1733 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs),
1734 .main_clk = "mcspi1_fck", 1734 .main_clk = "mcspi1_fck",
1735 .prcm = { 1735 .prcm = {
1736 .omap2 = { 1736 .omap2 = {
@@ -1754,6 +1754,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = {
1754 { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ 1754 { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */
1755 { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ 1755 { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */
1756 { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ 1756 { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */
1757 { .dma_req = -1 }
1757}; 1758};
1758 1759
1759static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { 1760static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = {
@@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
1768 .name = "mcspi2_hwmod", 1769 .name = "mcspi2_hwmod",
1769 .mpu_irqs = omap2_mcspi2_mpu_irqs, 1770 .mpu_irqs = omap2_mcspi2_mpu_irqs,
1770 .sdma_reqs = omap2430_mcspi2_sdma_reqs, 1771 .sdma_reqs = omap2430_mcspi2_sdma_reqs,
1771 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs),
1772 .main_clk = "mcspi2_fck", 1772 .main_clk = "mcspi2_fck",
1773 .prcm = { 1773 .prcm = {
1774 .omap2 = { 1774 .omap2 = {
@@ -1797,6 +1797,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
1797 { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ 1797 { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */
1798 { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ 1798 { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */
1799 { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ 1799 { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */
1800 { .dma_req = -1 }
1800}; 1801};
1801 1802
1802static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { 1803static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = {
@@ -1811,7 +1812,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
1811 .name = "mcspi3_hwmod", 1812 .name = "mcspi3_hwmod",
1812 .mpu_irqs = omap2430_mcspi3_mpu_irqs, 1813 .mpu_irqs = omap2430_mcspi3_mpu_irqs,
1813 .sdma_reqs = omap2430_mcspi3_sdma_reqs, 1814 .sdma_reqs = omap2430_mcspi3_sdma_reqs,
1814 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs),
1815 .main_clk = "mcspi3_fck", 1815 .main_clk = "mcspi3_fck",
1816 .prcm = { 1816 .prcm = {
1817 .omap2 = { 1817 .omap2 = {
@@ -1915,6 +1915,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
1915static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { 1915static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = {
1916 { .name = "rx", .dma_req = 32 }, 1916 { .name = "rx", .dma_req = 32 },
1917 { .name = "tx", .dma_req = 31 }, 1917 { .name = "tx", .dma_req = 31 },
1918 { .dma_req = -1 }
1918}; 1919};
1919 1920
1920/* l4_core -> mcbsp1 */ 1921/* l4_core -> mcbsp1 */
@@ -1936,7 +1937,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
1936 .class = &omap2430_mcbsp_hwmod_class, 1937 .class = &omap2430_mcbsp_hwmod_class,
1937 .mpu_irqs = omap2430_mcbsp1_irqs, 1938 .mpu_irqs = omap2430_mcbsp1_irqs,
1938 .sdma_reqs = omap2430_mcbsp1_sdma_chs, 1939 .sdma_reqs = omap2430_mcbsp1_sdma_chs,
1939 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs),
1940 .main_clk = "mcbsp1_fck", 1940 .main_clk = "mcbsp1_fck",
1941 .prcm = { 1941 .prcm = {
1942 .omap2 = { 1942 .omap2 = {
@@ -1963,6 +1963,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
1963static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { 1963static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = {
1964 { .name = "rx", .dma_req = 34 }, 1964 { .name = "rx", .dma_req = 34 },
1965 { .name = "tx", .dma_req = 33 }, 1965 { .name = "tx", .dma_req = 33 },
1966 { .dma_req = -1 }
1966}; 1967};
1967 1968
1968/* l4_core -> mcbsp2 */ 1969/* l4_core -> mcbsp2 */
@@ -1984,7 +1985,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
1984 .class = &omap2430_mcbsp_hwmod_class, 1985 .class = &omap2430_mcbsp_hwmod_class,
1985 .mpu_irqs = omap2430_mcbsp2_irqs, 1986 .mpu_irqs = omap2430_mcbsp2_irqs,
1986 .sdma_reqs = omap2430_mcbsp2_sdma_chs, 1987 .sdma_reqs = omap2430_mcbsp2_sdma_chs,
1987 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs),
1988 .main_clk = "mcbsp2_fck", 1988 .main_clk = "mcbsp2_fck",
1989 .prcm = { 1989 .prcm = {
1990 .omap2 = { 1990 .omap2 = {
@@ -2011,6 +2011,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
2011static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { 2011static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = {
2012 { .name = "rx", .dma_req = 18 }, 2012 { .name = "rx", .dma_req = 18 },
2013 { .name = "tx", .dma_req = 17 }, 2013 { .name = "tx", .dma_req = 17 },
2014 { .dma_req = -1 }
2014}; 2015};
2015 2016
2016static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { 2017static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = {
@@ -2042,7 +2043,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
2042 .class = &omap2430_mcbsp_hwmod_class, 2043 .class = &omap2430_mcbsp_hwmod_class,
2043 .mpu_irqs = omap2430_mcbsp3_irqs, 2044 .mpu_irqs = omap2430_mcbsp3_irqs,
2044 .sdma_reqs = omap2430_mcbsp3_sdma_chs, 2045 .sdma_reqs = omap2430_mcbsp3_sdma_chs,
2045 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs),
2046 .main_clk = "mcbsp3_fck", 2046 .main_clk = "mcbsp3_fck",
2047 .prcm = { 2047 .prcm = {
2048 .omap2 = { 2048 .omap2 = {
@@ -2069,6 +2069,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
2069static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { 2069static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
2070 { .name = "rx", .dma_req = 20 }, 2070 { .name = "rx", .dma_req = 20 },
2071 { .name = "tx", .dma_req = 19 }, 2071 { .name = "tx", .dma_req = 19 },
2072 { .dma_req = -1 }
2072}; 2073};
2073 2074
2074static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { 2075static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = {
@@ -2100,7 +2101,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
2100 .class = &omap2430_mcbsp_hwmod_class, 2101 .class = &omap2430_mcbsp_hwmod_class,
2101 .mpu_irqs = omap2430_mcbsp4_irqs, 2102 .mpu_irqs = omap2430_mcbsp4_irqs,
2102 .sdma_reqs = omap2430_mcbsp4_sdma_chs, 2103 .sdma_reqs = omap2430_mcbsp4_sdma_chs,
2103 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs),
2104 .main_clk = "mcbsp4_fck", 2104 .main_clk = "mcbsp4_fck",
2105 .prcm = { 2105 .prcm = {
2106 .omap2 = { 2106 .omap2 = {
@@ -2127,6 +2127,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
2127static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { 2127static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
2128 { .name = "rx", .dma_req = 22 }, 2128 { .name = "rx", .dma_req = 22 },
2129 { .name = "tx", .dma_req = 21 }, 2129 { .name = "tx", .dma_req = 21 },
2130 { .dma_req = -1 }
2130}; 2131};
2131 2132
2132static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { 2133static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = {
@@ -2158,7 +2159,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
2158 .class = &omap2430_mcbsp_hwmod_class, 2159 .class = &omap2430_mcbsp_hwmod_class,
2159 .mpu_irqs = omap2430_mcbsp5_irqs, 2160 .mpu_irqs = omap2430_mcbsp5_irqs,
2160 .sdma_reqs = omap2430_mcbsp5_sdma_chs, 2161 .sdma_reqs = omap2430_mcbsp5_sdma_chs,
2161 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs),
2162 .main_clk = "mcbsp5_fck", 2162 .main_clk = "mcbsp5_fck",
2163 .prcm = { 2163 .prcm = {
2164 .omap2 = { 2164 .omap2 = {
@@ -2202,6 +2202,7 @@ static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
2202static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { 2202static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
2203 { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ 2203 { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */
2204 { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ 2204 { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */
2205 { .dma_req = -1 }
2205}; 2206};
2206 2207
2207static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { 2208static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = {
@@ -2221,7 +2222,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
2221 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2222 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2222 .mpu_irqs = omap2430_mmc1_mpu_irqs, 2223 .mpu_irqs = omap2430_mmc1_mpu_irqs,
2223 .sdma_reqs = omap2430_mmc1_sdma_reqs, 2224 .sdma_reqs = omap2430_mmc1_sdma_reqs,
2224 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs),
2225 .opt_clks = omap2430_mmc1_opt_clks, 2225 .opt_clks = omap2430_mmc1_opt_clks,
2226 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), 2226 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks),
2227 .main_clk = "mmchs1_fck", 2227 .main_clk = "mmchs1_fck",
@@ -2251,6 +2251,7 @@ static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
2251static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { 2251static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {
2252 { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ 2252 { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */
2253 { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ 2253 { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */
2254 { .dma_req = -1 }
2254}; 2255};
2255 2256
2256static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { 2257static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = {
@@ -2266,7 +2267,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
2266 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2267 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2267 .mpu_irqs = omap2430_mmc2_mpu_irqs, 2268 .mpu_irqs = omap2430_mmc2_mpu_irqs,
2268 .sdma_reqs = omap2430_mmc2_sdma_reqs, 2269 .sdma_reqs = omap2430_mmc2_sdma_reqs,
2269 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs),
2270 .opt_clks = omap2430_mmc2_opt_clks, 2270 .opt_clks = omap2430_mmc2_opt_clks,
2271 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), 2271 .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks),
2272 .main_clk = "mmchs2_fck", 2272 .main_clk = "mmchs2_fck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 6bac4bb14df3..265f0b10e5ca 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1213,6 +1213,7 @@ static struct omap_hwmod_class uart_class = {
1213static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 1213static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
1214 { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, 1214 { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
1215 { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, 1215 { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
1216 { .dma_req = -1 }
1216}; 1217};
1217 1218
1218static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { 1219static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
@@ -1223,7 +1224,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
1223 .name = "uart1", 1224 .name = "uart1",
1224 .mpu_irqs = omap2_uart1_mpu_irqs, 1225 .mpu_irqs = omap2_uart1_mpu_irqs,
1225 .sdma_reqs = uart1_sdma_reqs, 1226 .sdma_reqs = uart1_sdma_reqs,
1226 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
1227 .main_clk = "uart1_fck", 1227 .main_clk = "uart1_fck",
1228 .prcm = { 1228 .prcm = {
1229 .omap2 = { 1229 .omap2 = {
@@ -1245,6 +1245,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
1245static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 1245static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
1246 { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, 1246 { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
1247 { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, 1247 { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
1248 { .dma_req = -1 }
1248}; 1249};
1249 1250
1250static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { 1251static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
@@ -1255,7 +1256,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
1255 .name = "uart2", 1256 .name = "uart2",
1256 .mpu_irqs = omap2_uart2_mpu_irqs, 1257 .mpu_irqs = omap2_uart2_mpu_irqs,
1257 .sdma_reqs = uart2_sdma_reqs, 1258 .sdma_reqs = uart2_sdma_reqs,
1258 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
1259 .main_clk = "uart2_fck", 1259 .main_clk = "uart2_fck",
1260 .prcm = { 1260 .prcm = {
1261 .omap2 = { 1261 .omap2 = {
@@ -1277,6 +1277,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
1277static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 1277static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
1278 { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, 1278 { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
1279 { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, 1279 { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
1280 { .dma_req = -1 }
1280}; 1281};
1281 1282
1282static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { 1283static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
@@ -1287,7 +1288,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
1287 .name = "uart3", 1288 .name = "uart3",
1288 .mpu_irqs = omap2_uart3_mpu_irqs, 1289 .mpu_irqs = omap2_uart3_mpu_irqs,
1289 .sdma_reqs = uart3_sdma_reqs, 1290 .sdma_reqs = uart3_sdma_reqs,
1290 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
1291 .main_clk = "uart3_fck", 1291 .main_clk = "uart3_fck",
1292 .prcm = { 1292 .prcm = {
1293 .omap2 = { 1293 .omap2 = {
@@ -1314,6 +1314,7 @@ static struct omap_hwmod_irq_info uart4_mpu_irqs[] = {
1314static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { 1314static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {
1315 { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, }, 1315 { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, },
1316 { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, }, 1316 { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, },
1317 { .dma_req = -1 }
1317}; 1318};
1318 1319
1319static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { 1320static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = {
@@ -1324,7 +1325,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
1324 .name = "uart4", 1325 .name = "uart4",
1325 .mpu_irqs = uart4_mpu_irqs, 1326 .mpu_irqs = uart4_mpu_irqs,
1326 .sdma_reqs = uart4_sdma_reqs, 1327 .sdma_reqs = uart4_sdma_reqs,
1327 .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs),
1328 .main_clk = "uart4_fck", 1328 .main_clk = "uart4_fck",
1329 .prcm = { 1329 .prcm = {
1330 .omap2 = { 1330 .omap2 = {
@@ -1367,6 +1367,7 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = {
1367static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { 1367static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = {
1368 { .name = "dispc", .dma_req = 5 }, 1368 { .name = "dispc", .dma_req = 5 },
1369 { .name = "dsi1", .dma_req = 74 }, 1369 { .name = "dsi1", .dma_req = 74 },
1370 { .dma_req = -1 }
1370}; 1371};
1371 1372
1372/* dss */ 1373/* dss */
@@ -1426,8 +1427,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
1426 .class = &omap3xxx_dss_hwmod_class, 1427 .class = &omap3xxx_dss_hwmod_class,
1427 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ 1428 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1428 .sdma_reqs = omap3xxx_dss_sdma_chs, 1429 .sdma_reqs = omap3xxx_dss_sdma_chs,
1429 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
1430
1431 .prcm = { 1430 .prcm = {
1432 .omap2 = { 1431 .omap2 = {
1433 .prcm_reg_id = 1, 1432 .prcm_reg_id = 1,
@@ -1452,8 +1451,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
1452 .class = &omap3xxx_dss_hwmod_class, 1451 .class = &omap3xxx_dss_hwmod_class,
1453 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ 1452 .main_clk = "dss1_alwon_fck", /* instead of dss_fck */
1454 .sdma_reqs = omap3xxx_dss_sdma_chs, 1453 .sdma_reqs = omap3xxx_dss_sdma_chs,
1455 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs),
1456
1457 .prcm = { 1454 .prcm = {
1458 .omap2 = { 1455 .omap2 = {
1459 .prcm_reg_id = 1, 1456 .prcm_reg_id = 1,
@@ -1720,6 +1717,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = {
1720static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 1717static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
1721 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, 1718 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
1722 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, 1719 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
1720 { .dma_req = -1 }
1723}; 1721};
1724 1722
1725static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { 1723static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
@@ -1730,7 +1728,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1730 .name = "i2c1", 1728 .name = "i2c1",
1731 .mpu_irqs = omap2_i2c1_mpu_irqs, 1729 .mpu_irqs = omap2_i2c1_mpu_irqs,
1732 .sdma_reqs = i2c1_sdma_reqs, 1730 .sdma_reqs = i2c1_sdma_reqs,
1733 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
1734 .main_clk = "i2c1_fck", 1731 .main_clk = "i2c1_fck",
1735 .prcm = { 1732 .prcm = {
1736 .omap2 = { 1733 .omap2 = {
@@ -1757,6 +1754,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = {
1757static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 1754static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
1758 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, 1755 { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
1759 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, 1756 { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
1757 { .dma_req = -1 }
1760}; 1758};
1761 1759
1762static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { 1760static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
@@ -1767,7 +1765,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1767 .name = "i2c2", 1765 .name = "i2c2",
1768 .mpu_irqs = omap2_i2c2_mpu_irqs, 1766 .mpu_irqs = omap2_i2c2_mpu_irqs,
1769 .sdma_reqs = i2c2_sdma_reqs, 1767 .sdma_reqs = i2c2_sdma_reqs,
1770 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
1771 .main_clk = "i2c2_fck", 1768 .main_clk = "i2c2_fck",
1772 .prcm = { 1769 .prcm = {
1773 .omap2 = { 1770 .omap2 = {
@@ -1799,6 +1796,7 @@ static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
1799static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { 1796static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {
1800 { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX }, 1797 { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX },
1801 { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX }, 1798 { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX },
1799 { .dma_req = -1 }
1802}; 1800};
1803 1801
1804static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { 1802static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
@@ -1809,7 +1807,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1809 .name = "i2c3", 1807 .name = "i2c3",
1810 .mpu_irqs = i2c3_mpu_irqs, 1808 .mpu_irqs = i2c3_mpu_irqs,
1811 .sdma_reqs = i2c3_sdma_reqs, 1809 .sdma_reqs = i2c3_sdma_reqs,
1812 .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs),
1813 .main_clk = "i2c3_fck", 1810 .main_clk = "i2c3_fck",
1814 .prcm = { 1811 .prcm = {
1815 .omap2 = { 1812 .omap2 = {
@@ -2275,6 +2272,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
2275static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { 2272static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = {
2276 { .name = "rx", .dma_req = 32 }, 2273 { .name = "rx", .dma_req = 32 },
2277 { .name = "tx", .dma_req = 31 }, 2274 { .name = "tx", .dma_req = 31 },
2275 { .dma_req = -1 }
2278}; 2276};
2279 2277
2280static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { 2278static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = {
@@ -2306,7 +2304,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
2306 .class = &omap3xxx_mcbsp_hwmod_class, 2304 .class = &omap3xxx_mcbsp_hwmod_class,
2307 .mpu_irqs = omap3xxx_mcbsp1_irqs, 2305 .mpu_irqs = omap3xxx_mcbsp1_irqs,
2308 .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, 2306 .sdma_reqs = omap3xxx_mcbsp1_sdma_chs,
2309 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs),
2310 .main_clk = "mcbsp1_fck", 2307 .main_clk = "mcbsp1_fck",
2311 .prcm = { 2308 .prcm = {
2312 .omap2 = { 2309 .omap2 = {
@@ -2333,6 +2330,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = {
2333static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { 2330static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = {
2334 { .name = "rx", .dma_req = 34 }, 2331 { .name = "rx", .dma_req = 34 },
2335 { .name = "tx", .dma_req = 33 }, 2332 { .name = "tx", .dma_req = 33 },
2333 { .dma_req = -1 }
2336}; 2334};
2337 2335
2338static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { 2336static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = {
@@ -2369,7 +2367,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
2369 .class = &omap3xxx_mcbsp_hwmod_class, 2367 .class = &omap3xxx_mcbsp_hwmod_class,
2370 .mpu_irqs = omap3xxx_mcbsp2_irqs, 2368 .mpu_irqs = omap3xxx_mcbsp2_irqs,
2371 .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, 2369 .sdma_reqs = omap3xxx_mcbsp2_sdma_chs,
2372 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs),
2373 .main_clk = "mcbsp2_fck", 2370 .main_clk = "mcbsp2_fck",
2374 .prcm = { 2371 .prcm = {
2375 .omap2 = { 2372 .omap2 = {
@@ -2397,6 +2394,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = {
2397static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { 2394static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = {
2398 { .name = "rx", .dma_req = 18 }, 2395 { .name = "rx", .dma_req = 18 },
2399 { .name = "tx", .dma_req = 17 }, 2396 { .name = "tx", .dma_req = 17 },
2397 { .dma_req = -1 }
2400}; 2398};
2401 2399
2402static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { 2400static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = {
@@ -2432,7 +2430,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
2432 .class = &omap3xxx_mcbsp_hwmod_class, 2430 .class = &omap3xxx_mcbsp_hwmod_class,
2433 .mpu_irqs = omap3xxx_mcbsp3_irqs, 2431 .mpu_irqs = omap3xxx_mcbsp3_irqs,
2434 .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, 2432 .sdma_reqs = omap3xxx_mcbsp3_sdma_chs,
2435 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs),
2436 .main_clk = "mcbsp3_fck", 2433 .main_clk = "mcbsp3_fck",
2437 .prcm = { 2434 .prcm = {
2438 .omap2 = { 2435 .omap2 = {
@@ -2460,6 +2457,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = {
2460static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { 2457static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = {
2461 { .name = "rx", .dma_req = 20 }, 2458 { .name = "rx", .dma_req = 20 },
2462 { .name = "tx", .dma_req = 19 }, 2459 { .name = "tx", .dma_req = 19 },
2460 { .dma_req = -1 }
2463}; 2461};
2464 2462
2465static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { 2463static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = {
@@ -2491,7 +2489,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
2491 .class = &omap3xxx_mcbsp_hwmod_class, 2489 .class = &omap3xxx_mcbsp_hwmod_class,
2492 .mpu_irqs = omap3xxx_mcbsp4_irqs, 2490 .mpu_irqs = omap3xxx_mcbsp4_irqs,
2493 .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, 2491 .sdma_reqs = omap3xxx_mcbsp4_sdma_chs,
2494 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs),
2495 .main_clk = "mcbsp4_fck", 2492 .main_clk = "mcbsp4_fck",
2496 .prcm = { 2493 .prcm = {
2497 .omap2 = { 2494 .omap2 = {
@@ -2518,6 +2515,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = {
2518static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { 2515static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = {
2519 { .name = "rx", .dma_req = 22 }, 2516 { .name = "rx", .dma_req = 22 },
2520 { .name = "tx", .dma_req = 21 }, 2517 { .name = "tx", .dma_req = 21 },
2518 { .dma_req = -1 }
2521}; 2519};
2522 2520
2523static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { 2521static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = {
@@ -2549,7 +2547,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
2549 .class = &omap3xxx_mcbsp_hwmod_class, 2547 .class = &omap3xxx_mcbsp_hwmod_class,
2550 .mpu_irqs = omap3xxx_mcbsp5_irqs, 2548 .mpu_irqs = omap3xxx_mcbsp5_irqs,
2551 .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, 2549 .sdma_reqs = omap3xxx_mcbsp5_sdma_chs,
2552 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs),
2553 .main_clk = "mcbsp5_fck", 2550 .main_clk = "mcbsp5_fck",
2554 .prcm = { 2551 .prcm = {
2555 .omap2 = { 2552 .omap2 = {
@@ -2951,6 +2948,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = {
2951 { .name = "rx2", .dma_req = 40 }, 2948 { .name = "rx2", .dma_req = 40 },
2952 { .name = "tx3", .dma_req = 41 }, 2949 { .name = "tx3", .dma_req = 41 },
2953 { .name = "rx3", .dma_req = 42 }, 2950 { .name = "rx3", .dma_req = 42 },
2951 { .dma_req = -1 }
2954}; 2952};
2955 2953
2956static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { 2954static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = {
@@ -2965,7 +2963,6 @@ static struct omap_hwmod omap34xx_mcspi1 = {
2965 .name = "mcspi1", 2963 .name = "mcspi1",
2966 .mpu_irqs = omap2_mcspi1_mpu_irqs, 2964 .mpu_irqs = omap2_mcspi1_mpu_irqs,
2967 .sdma_reqs = omap34xx_mcspi1_sdma_reqs, 2965 .sdma_reqs = omap34xx_mcspi1_sdma_reqs,
2968 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs),
2969 .main_clk = "mcspi1_fck", 2966 .main_clk = "mcspi1_fck",
2970 .prcm = { 2967 .prcm = {
2971 .omap2 = { 2968 .omap2 = {
@@ -2989,6 +2986,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = {
2989 { .name = "rx0", .dma_req = 44 }, 2986 { .name = "rx0", .dma_req = 44 },
2990 { .name = "tx1", .dma_req = 45 }, 2987 { .name = "tx1", .dma_req = 45 },
2991 { .name = "rx1", .dma_req = 46 }, 2988 { .name = "rx1", .dma_req = 46 },
2989 { .dma_req = -1 }
2992}; 2990};
2993 2991
2994static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { 2992static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = {
@@ -3003,7 +3001,6 @@ static struct omap_hwmod omap34xx_mcspi2 = {
3003 .name = "mcspi2", 3001 .name = "mcspi2",
3004 .mpu_irqs = omap2_mcspi2_mpu_irqs, 3002 .mpu_irqs = omap2_mcspi2_mpu_irqs,
3005 .sdma_reqs = omap34xx_mcspi2_sdma_reqs, 3003 .sdma_reqs = omap34xx_mcspi2_sdma_reqs,
3006 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs),
3007 .main_clk = "mcspi2_fck", 3004 .main_clk = "mcspi2_fck",
3008 .prcm = { 3005 .prcm = {
3009 .omap2 = { 3006 .omap2 = {
@@ -3032,6 +3029,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = {
3032 { .name = "rx0", .dma_req = 16 }, 3029 { .name = "rx0", .dma_req = 16 },
3033 { .name = "tx1", .dma_req = 23 }, 3030 { .name = "tx1", .dma_req = 23 },
3034 { .name = "rx1", .dma_req = 24 }, 3031 { .name = "rx1", .dma_req = 24 },
3032 { .dma_req = -1 }
3035}; 3033};
3036 3034
3037static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = { 3035static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = {
@@ -3046,7 +3044,6 @@ static struct omap_hwmod omap34xx_mcspi3 = {
3046 .name = "mcspi3", 3044 .name = "mcspi3",
3047 .mpu_irqs = omap34xx_mcspi3_mpu_irqs, 3045 .mpu_irqs = omap34xx_mcspi3_mpu_irqs,
3048 .sdma_reqs = omap34xx_mcspi3_sdma_reqs, 3046 .sdma_reqs = omap34xx_mcspi3_sdma_reqs,
3049 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs),
3050 .main_clk = "mcspi3_fck", 3047 .main_clk = "mcspi3_fck",
3051 .prcm = { 3048 .prcm = {
3052 .omap2 = { 3049 .omap2 = {
@@ -3073,6 +3070,7 @@ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = {
3073static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { 3070static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = {
3074 { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */ 3071 { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */
3075 { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */ 3072 { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */
3073 { .dma_req = -1 }
3076}; 3074};
3077 3075
3078static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = { 3076static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = {
@@ -3087,7 +3085,6 @@ static struct omap_hwmod omap34xx_mcspi4 = {
3087 .name = "mcspi4", 3085 .name = "mcspi4",
3088 .mpu_irqs = omap34xx_mcspi4_mpu_irqs, 3086 .mpu_irqs = omap34xx_mcspi4_mpu_irqs,
3089 .sdma_reqs = omap34xx_mcspi4_sdma_reqs, 3087 .sdma_reqs = omap34xx_mcspi4_sdma_reqs,
3090 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs),
3091 .main_clk = "mcspi4_fck", 3088 .main_clk = "mcspi4_fck",
3092 .prcm = { 3089 .prcm = {
3093 .omap2 = { 3090 .omap2 = {
@@ -3218,6 +3215,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = {
3218static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { 3215static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = {
3219 { .name = "tx", .dma_req = 61, }, 3216 { .name = "tx", .dma_req = 61, },
3220 { .name = "rx", .dma_req = 62, }, 3217 { .name = "rx", .dma_req = 62, },
3218 { .dma_req = -1 }
3221}; 3219};
3222 3220
3223static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = { 3221static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = {
@@ -3236,7 +3234,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = {
3236 .name = "mmc1", 3234 .name = "mmc1",
3237 .mpu_irqs = omap34xx_mmc1_mpu_irqs, 3235 .mpu_irqs = omap34xx_mmc1_mpu_irqs,
3238 .sdma_reqs = omap34xx_mmc1_sdma_reqs, 3236 .sdma_reqs = omap34xx_mmc1_sdma_reqs,
3239 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs),
3240 .opt_clks = omap34xx_mmc1_opt_clks, 3237 .opt_clks = omap34xx_mmc1_opt_clks,
3241 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), 3238 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks),
3242 .main_clk = "mmchs1_fck", 3239 .main_clk = "mmchs1_fck",
@@ -3266,6 +3263,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = {
3266static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { 3263static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = {
3267 { .name = "tx", .dma_req = 47, }, 3264 { .name = "tx", .dma_req = 47, },
3268 { .name = "rx", .dma_req = 48, }, 3265 { .name = "rx", .dma_req = 48, },
3266 { .dma_req = -1 }
3269}; 3267};
3270 3268
3271static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = { 3269static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = {
@@ -3280,7 +3278,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = {
3280 .name = "mmc2", 3278 .name = "mmc2",
3281 .mpu_irqs = omap34xx_mmc2_mpu_irqs, 3279 .mpu_irqs = omap34xx_mmc2_mpu_irqs,
3282 .sdma_reqs = omap34xx_mmc2_sdma_reqs, 3280 .sdma_reqs = omap34xx_mmc2_sdma_reqs,
3283 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs),
3284 .opt_clks = omap34xx_mmc2_opt_clks, 3281 .opt_clks = omap34xx_mmc2_opt_clks,
3285 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), 3282 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks),
3286 .main_clk = "mmchs2_fck", 3283 .main_clk = "mmchs2_fck",
@@ -3309,6 +3306,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = {
3309static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { 3306static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = {
3310 { .name = "tx", .dma_req = 77, }, 3307 { .name = "tx", .dma_req = 77, },
3311 { .name = "rx", .dma_req = 78, }, 3308 { .name = "rx", .dma_req = 78, },
3309 { .dma_req = -1 }
3312}; 3310};
3313 3311
3314static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { 3312static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = {
@@ -3323,7 +3321,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
3323 .name = "mmc3", 3321 .name = "mmc3",
3324 .mpu_irqs = omap34xx_mmc3_mpu_irqs, 3322 .mpu_irqs = omap34xx_mmc3_mpu_irqs,
3325 .sdma_reqs = omap34xx_mmc3_sdma_reqs, 3323 .sdma_reqs = omap34xx_mmc3_sdma_reqs,
3326 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs),
3327 .opt_clks = omap34xx_mmc3_opt_clks, 3324 .opt_clks = omap34xx_mmc3_opt_clks,
3328 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks), 3325 .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks),
3329 .main_clk = "mmchs3_fck", 3326 .main_clk = "mmchs3_fck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index bbfc4db664b3..a93c4552a571 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -684,6 +684,7 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {
684 { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START }, 684 { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START },
685 { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START }, 685 { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START },
686 { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START }, 686 { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START },
687 { .dma_req = -1 }
687}; 688};
688 689
689/* aess master ports */ 690/* aess master ports */
@@ -738,7 +739,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
738 .class = &omap44xx_aess_hwmod_class, 739 .class = &omap44xx_aess_hwmod_class,
739 .mpu_irqs = omap44xx_aess_irqs, 740 .mpu_irqs = omap44xx_aess_irqs,
740 .sdma_reqs = omap44xx_aess_sdma_reqs, 741 .sdma_reqs = omap44xx_aess_sdma_reqs,
741 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs),
742 .main_clk = "aess_fck", 742 .main_clk = "aess_fck",
743 .prcm = { 743 .prcm = {
744 .omap4 = { 744 .omap4 = {
@@ -953,6 +953,7 @@ static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = {
953 953
954static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { 954static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {
955 { .dma_req = 66 + OMAP44XX_DMA_REQ_START }, 955 { .dma_req = 66 + OMAP44XX_DMA_REQ_START },
956 { .dma_req = -1 }
956}; 957};
957 958
958static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { 959static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {
@@ -1002,7 +1003,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
1002 .class = &omap44xx_dmic_hwmod_class, 1003 .class = &omap44xx_dmic_hwmod_class,
1003 .mpu_irqs = omap44xx_dmic_irqs, 1004 .mpu_irqs = omap44xx_dmic_irqs,
1004 .sdma_reqs = omap44xx_dmic_sdma_reqs, 1005 .sdma_reqs = omap44xx_dmic_sdma_reqs,
1005 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs),
1006 .main_clk = "dmic_fck", 1006 .main_clk = "dmic_fck",
1007 .prcm = { 1007 .prcm = {
1008 .omap4 = { 1008 .omap4 = {
@@ -1220,6 +1220,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = {
1220 1220
1221static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { 1221static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = {
1222 { .dma_req = 5 + OMAP44XX_DMA_REQ_START }, 1222 { .dma_req = 5 + OMAP44XX_DMA_REQ_START },
1223 { .dma_req = -1 }
1223}; 1224};
1224 1225
1225static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { 1226static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {
@@ -1269,7 +1270,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1269 .class = &omap44xx_dispc_hwmod_class, 1270 .class = &omap44xx_dispc_hwmod_class,
1270 .mpu_irqs = omap44xx_dss_dispc_irqs, 1271 .mpu_irqs = omap44xx_dss_dispc_irqs,
1271 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, 1272 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
1272 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs),
1273 .main_clk = "dss_fck", 1273 .main_clk = "dss_fck",
1274 .prcm = { 1274 .prcm = {
1275 .omap4 = { 1275 .omap4 = {
@@ -1311,6 +1311,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = {
1311 1311
1312static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { 1312static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = {
1313 { .dma_req = 74 + OMAP44XX_DMA_REQ_START }, 1313 { .dma_req = 74 + OMAP44XX_DMA_REQ_START },
1314 { .dma_req = -1 }
1314}; 1315};
1315 1316
1316static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { 1317static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {
@@ -1360,7 +1361,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1360 .class = &omap44xx_dsi_hwmod_class, 1361 .class = &omap44xx_dsi_hwmod_class,
1361 .mpu_irqs = omap44xx_dss_dsi1_irqs, 1362 .mpu_irqs = omap44xx_dss_dsi1_irqs,
1362 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, 1363 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
1363 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs),
1364 .main_clk = "dss_fck", 1364 .main_clk = "dss_fck",
1365 .prcm = { 1365 .prcm = {
1366 .omap4 = { 1366 .omap4 = {
@@ -1381,6 +1381,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = {
1381 1381
1382static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { 1382static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = {
1383 { .dma_req = 83 + OMAP44XX_DMA_REQ_START }, 1383 { .dma_req = 83 + OMAP44XX_DMA_REQ_START },
1384 { .dma_req = -1 }
1384}; 1385};
1385 1386
1386static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { 1387static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {
@@ -1430,7 +1431,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
1430 .class = &omap44xx_dsi_hwmod_class, 1431 .class = &omap44xx_dsi_hwmod_class,
1431 .mpu_irqs = omap44xx_dss_dsi2_irqs, 1432 .mpu_irqs = omap44xx_dss_dsi2_irqs,
1432 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, 1433 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
1433 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs),
1434 .main_clk = "dss_fck", 1434 .main_clk = "dss_fck",
1435 .prcm = { 1435 .prcm = {
1436 .omap4 = { 1436 .omap4 = {
@@ -1471,6 +1471,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = {
1471 1471
1472static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { 1472static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = {
1473 { .dma_req = 75 + OMAP44XX_DMA_REQ_START }, 1473 { .dma_req = 75 + OMAP44XX_DMA_REQ_START },
1474 { .dma_req = -1 }
1474}; 1475};
1475 1476
1476static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { 1477static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {
@@ -1520,7 +1521,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
1520 .class = &omap44xx_hdmi_hwmod_class, 1521 .class = &omap44xx_hdmi_hwmod_class,
1521 .mpu_irqs = omap44xx_dss_hdmi_irqs, 1522 .mpu_irqs = omap44xx_dss_hdmi_irqs,
1522 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 1523 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
1523 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs),
1524 .main_clk = "dss_fck", 1524 .main_clk = "dss_fck",
1525 .prcm = { 1525 .prcm = {
1526 .omap4 = { 1526 .omap4 = {
@@ -1556,6 +1556,7 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = {
1556static struct omap_hwmod omap44xx_dss_rfbi_hwmod; 1556static struct omap_hwmod omap44xx_dss_rfbi_hwmod;
1557static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { 1557static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = {
1558 { .dma_req = 13 + OMAP44XX_DMA_REQ_START }, 1558 { .dma_req = 13 + OMAP44XX_DMA_REQ_START },
1559 { .dma_req = -1 }
1559}; 1560};
1560 1561
1561static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { 1562static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {
@@ -1604,7 +1605,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
1604 .name = "dss_rfbi", 1605 .name = "dss_rfbi",
1605 .class = &omap44xx_rfbi_hwmod_class, 1606 .class = &omap44xx_rfbi_hwmod_class,
1606 .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, 1607 .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs,
1607 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs),
1608 .main_clk = "dss_fck", 1608 .main_clk = "dss_fck",
1609 .prcm = { 1609 .prcm = {
1610 .omap4 = { 1610 .omap4 = {
@@ -2137,6 +2137,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {
2137static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { 2137static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
2138 { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START }, 2138 { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START },
2139 { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START }, 2139 { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START },
2140 { .dma_req = -1 }
2140}; 2141};
2141 2142
2142static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { 2143static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
@@ -2168,7 +2169,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2168 .flags = HWMOD_INIT_NO_RESET, 2169 .flags = HWMOD_INIT_NO_RESET,
2169 .mpu_irqs = omap44xx_i2c1_irqs, 2170 .mpu_irqs = omap44xx_i2c1_irqs,
2170 .sdma_reqs = omap44xx_i2c1_sdma_reqs, 2171 .sdma_reqs = omap44xx_i2c1_sdma_reqs,
2171 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs),
2172 .main_clk = "i2c1_fck", 2172 .main_clk = "i2c1_fck",
2173 .prcm = { 2173 .prcm = {
2174 .omap4 = { 2174 .omap4 = {
@@ -2190,6 +2190,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {
2190static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { 2190static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {
2191 { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START }, 2191 { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START },
2192 { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START }, 2192 { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START },
2193 { .dma_req = -1 }
2193}; 2194};
2194 2195
2195static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { 2196static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {
@@ -2221,7 +2222,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2221 .flags = HWMOD_INIT_NO_RESET, 2222 .flags = HWMOD_INIT_NO_RESET,
2222 .mpu_irqs = omap44xx_i2c2_irqs, 2223 .mpu_irqs = omap44xx_i2c2_irqs,
2223 .sdma_reqs = omap44xx_i2c2_sdma_reqs, 2224 .sdma_reqs = omap44xx_i2c2_sdma_reqs,
2224 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs),
2225 .main_clk = "i2c2_fck", 2225 .main_clk = "i2c2_fck",
2226 .prcm = { 2226 .prcm = {
2227 .omap4 = { 2227 .omap4 = {
@@ -2243,6 +2243,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = {
2243static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { 2243static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = {
2244 { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START }, 2244 { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START },
2245 { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START }, 2245 { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START },
2246 { .dma_req = -1 }
2246}; 2247};
2247 2248
2248static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { 2249static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {
@@ -2274,7 +2275,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2274 .flags = HWMOD_INIT_NO_RESET, 2275 .flags = HWMOD_INIT_NO_RESET,
2275 .mpu_irqs = omap44xx_i2c3_irqs, 2276 .mpu_irqs = omap44xx_i2c3_irqs,
2276 .sdma_reqs = omap44xx_i2c3_sdma_reqs, 2277 .sdma_reqs = omap44xx_i2c3_sdma_reqs,
2277 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs),
2278 .main_clk = "i2c3_fck", 2278 .main_clk = "i2c3_fck",
2279 .prcm = { 2279 .prcm = {
2280 .omap4 = { 2280 .omap4 = {
@@ -2296,6 +2296,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = {
2296static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { 2296static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = {
2297 { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START }, 2297 { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START },
2298 { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START }, 2298 { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START },
2299 { .dma_req = -1 }
2299}; 2300};
2300 2301
2301static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { 2302static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {
@@ -2327,7 +2328,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
2327 .flags = HWMOD_INIT_NO_RESET, 2328 .flags = HWMOD_INIT_NO_RESET,
2328 .mpu_irqs = omap44xx_i2c4_irqs, 2329 .mpu_irqs = omap44xx_i2c4_irqs,
2329 .sdma_reqs = omap44xx_i2c4_sdma_reqs, 2330 .sdma_reqs = omap44xx_i2c4_sdma_reqs,
2330 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs),
2331 .main_clk = "i2c4_fck", 2331 .main_clk = "i2c4_fck",
2332 .prcm = { 2332 .prcm = {
2333 .omap4 = { 2333 .omap4 = {
@@ -2466,6 +2466,7 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = {
2466 { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START }, 2466 { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START },
2467 { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START }, 2467 { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START },
2468 { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START }, 2468 { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START },
2469 { .dma_req = -1 }
2469}; 2470};
2470 2471
2471/* iss master ports */ 2472/* iss master ports */
@@ -2505,7 +2506,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
2505 .class = &omap44xx_iss_hwmod_class, 2506 .class = &omap44xx_iss_hwmod_class,
2506 .mpu_irqs = omap44xx_iss_irqs, 2507 .mpu_irqs = omap44xx_iss_irqs,
2507 .sdma_reqs = omap44xx_iss_sdma_reqs, 2508 .sdma_reqs = omap44xx_iss_sdma_reqs,
2508 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs),
2509 .main_clk = "iss_fck", 2509 .main_clk = "iss_fck",
2510 .prcm = { 2510 .prcm = {
2511 .omap4 = { 2511 .omap4 = {
@@ -2790,6 +2790,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
2790static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { 2790static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
2791 { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START }, 2791 { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START },
2792 { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START }, 2792 { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START },
2793 { .dma_req = -1 }
2793}; 2794};
2794 2795
2795static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { 2796static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {
@@ -2841,7 +2842,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
2841 .class = &omap44xx_mcbsp_hwmod_class, 2842 .class = &omap44xx_mcbsp_hwmod_class,
2842 .mpu_irqs = omap44xx_mcbsp1_irqs, 2843 .mpu_irqs = omap44xx_mcbsp1_irqs,
2843 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, 2844 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs,
2844 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs),
2845 .main_clk = "mcbsp1_fck", 2845 .main_clk = "mcbsp1_fck",
2846 .prcm = { 2846 .prcm = {
2847 .omap4 = { 2847 .omap4 = {
@@ -2863,6 +2863,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {
2863static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { 2863static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
2864 { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START }, 2864 { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START },
2865 { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START }, 2865 { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START },
2866 { .dma_req = -1 }
2866}; 2867};
2867 2868
2868static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { 2869static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {
@@ -2914,7 +2915,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
2914 .class = &omap44xx_mcbsp_hwmod_class, 2915 .class = &omap44xx_mcbsp_hwmod_class,
2915 .mpu_irqs = omap44xx_mcbsp2_irqs, 2916 .mpu_irqs = omap44xx_mcbsp2_irqs,
2916 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, 2917 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs,
2917 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs),
2918 .main_clk = "mcbsp2_fck", 2918 .main_clk = "mcbsp2_fck",
2919 .prcm = { 2919 .prcm = {
2920 .omap4 = { 2920 .omap4 = {
@@ -2936,6 +2936,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {
2936static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { 2936static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
2937 { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START }, 2937 { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START },
2938 { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START }, 2938 { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START },
2939 { .dma_req = -1 }
2939}; 2940};
2940 2941
2941static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { 2942static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {
@@ -2987,7 +2988,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
2987 .class = &omap44xx_mcbsp_hwmod_class, 2988 .class = &omap44xx_mcbsp_hwmod_class,
2988 .mpu_irqs = omap44xx_mcbsp3_irqs, 2989 .mpu_irqs = omap44xx_mcbsp3_irqs,
2989 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, 2990 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs,
2990 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs),
2991 .main_clk = "mcbsp3_fck", 2991 .main_clk = "mcbsp3_fck",
2992 .prcm = { 2992 .prcm = {
2993 .omap4 = { 2993 .omap4 = {
@@ -3009,6 +3009,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
3009static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { 3009static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
3010 { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START }, 3010 { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START },
3011 { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START }, 3011 { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START },
3012 { .dma_req = -1 }
3012}; 3013};
3013 3014
3014static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { 3015static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {
@@ -3039,7 +3040,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3039 .class = &omap44xx_mcbsp_hwmod_class, 3040 .class = &omap44xx_mcbsp_hwmod_class,
3040 .mpu_irqs = omap44xx_mcbsp4_irqs, 3041 .mpu_irqs = omap44xx_mcbsp4_irqs,
3041 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, 3042 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs,
3042 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs),
3043 .main_clk = "mcbsp4_fck", 3043 .main_clk = "mcbsp4_fck",
3044 .prcm = { 3044 .prcm = {
3045 .omap4 = { 3045 .omap4 = {
@@ -3082,6 +3082,7 @@ static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = {
3082static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { 3082static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = {
3083 { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START }, 3083 { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START },
3084 { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START }, 3084 { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START },
3085 { .dma_req = -1 }
3085}; 3086};
3086 3087
3087static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { 3088static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = {
@@ -3131,7 +3132,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
3131 .class = &omap44xx_mcpdm_hwmod_class, 3132 .class = &omap44xx_mcpdm_hwmod_class,
3132 .mpu_irqs = omap44xx_mcpdm_irqs, 3133 .mpu_irqs = omap44xx_mcpdm_irqs,
3133 .sdma_reqs = omap44xx_mcpdm_sdma_reqs, 3134 .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
3134 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs),
3135 .main_clk = "mcpdm_fck", 3135 .main_clk = "mcpdm_fck",
3136 .prcm = { 3136 .prcm = {
3137 .omap4 = { 3137 .omap4 = {
@@ -3181,6 +3181,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = {
3181 { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START }, 3181 { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START },
3182 { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START }, 3182 { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START },
3183 { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START }, 3183 { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START },
3184 { .dma_req = -1 }
3184}; 3185};
3185 3186
3186static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { 3187static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = {
@@ -3216,7 +3217,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
3216 .class = &omap44xx_mcspi_hwmod_class, 3217 .class = &omap44xx_mcspi_hwmod_class,
3217 .mpu_irqs = omap44xx_mcspi1_irqs, 3218 .mpu_irqs = omap44xx_mcspi1_irqs,
3218 .sdma_reqs = omap44xx_mcspi1_sdma_reqs, 3219 .sdma_reqs = omap44xx_mcspi1_sdma_reqs,
3219 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs),
3220 .main_clk = "mcspi1_fck", 3220 .main_clk = "mcspi1_fck",
3221 .prcm = { 3221 .prcm = {
3222 .omap4 = { 3222 .omap4 = {
@@ -3241,6 +3241,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = {
3241 { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START }, 3241 { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START },
3242 { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START }, 3242 { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START },
3243 { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START }, 3243 { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START },
3244 { .dma_req = -1 }
3244}; 3245};
3245 3246
3246static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { 3247static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = {
@@ -3276,7 +3277,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
3276 .class = &omap44xx_mcspi_hwmod_class, 3277 .class = &omap44xx_mcspi_hwmod_class,
3277 .mpu_irqs = omap44xx_mcspi2_irqs, 3278 .mpu_irqs = omap44xx_mcspi2_irqs,
3278 .sdma_reqs = omap44xx_mcspi2_sdma_reqs, 3279 .sdma_reqs = omap44xx_mcspi2_sdma_reqs,
3279 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs),
3280 .main_clk = "mcspi2_fck", 3280 .main_clk = "mcspi2_fck",
3281 .prcm = { 3281 .prcm = {
3282 .omap4 = { 3282 .omap4 = {
@@ -3301,6 +3301,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = {
3301 { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START }, 3301 { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START },
3302 { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START }, 3302 { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START },
3303 { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START }, 3303 { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START },
3304 { .dma_req = -1 }
3304}; 3305};
3305 3306
3306static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { 3307static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = {
@@ -3336,7 +3337,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
3336 .class = &omap44xx_mcspi_hwmod_class, 3337 .class = &omap44xx_mcspi_hwmod_class,
3337 .mpu_irqs = omap44xx_mcspi3_irqs, 3338 .mpu_irqs = omap44xx_mcspi3_irqs,
3338 .sdma_reqs = omap44xx_mcspi3_sdma_reqs, 3339 .sdma_reqs = omap44xx_mcspi3_sdma_reqs,
3339 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs),
3340 .main_clk = "mcspi3_fck", 3340 .main_clk = "mcspi3_fck",
3341 .prcm = { 3341 .prcm = {
3342 .omap4 = { 3342 .omap4 = {
@@ -3359,6 +3359,7 @@ static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = {
3359static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { 3359static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = {
3360 { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START }, 3360 { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START },
3361 { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START }, 3361 { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START },
3362 { .dma_req = -1 }
3362}; 3363};
3363 3364
3364static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { 3365static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = {
@@ -3394,7 +3395,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
3394 .class = &omap44xx_mcspi_hwmod_class, 3395 .class = &omap44xx_mcspi_hwmod_class,
3395 .mpu_irqs = omap44xx_mcspi4_irqs, 3396 .mpu_irqs = omap44xx_mcspi4_irqs,
3396 .sdma_reqs = omap44xx_mcspi4_sdma_reqs, 3397 .sdma_reqs = omap44xx_mcspi4_sdma_reqs,
3397 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs),
3398 .main_clk = "mcspi4_fck", 3398 .main_clk = "mcspi4_fck",
3399 .prcm = { 3399 .prcm = {
3400 .omap4 = { 3400 .omap4 = {
@@ -3439,6 +3439,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = {
3439static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { 3439static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {
3440 { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START }, 3440 { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START },
3441 { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START }, 3441 { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START },
3442 { .dma_req = -1 }
3442}; 3443};
3443 3444
3444/* mmc1 master ports */ 3445/* mmc1 master ports */
@@ -3479,7 +3480,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
3479 .class = &omap44xx_mmc_hwmod_class, 3480 .class = &omap44xx_mmc_hwmod_class,
3480 .mpu_irqs = omap44xx_mmc1_irqs, 3481 .mpu_irqs = omap44xx_mmc1_irqs,
3481 .sdma_reqs = omap44xx_mmc1_sdma_reqs, 3482 .sdma_reqs = omap44xx_mmc1_sdma_reqs,
3482 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs),
3483 .main_clk = "mmc1_fck", 3483 .main_clk = "mmc1_fck",
3484 .prcm = { 3484 .prcm = {
3485 .omap4 = { 3485 .omap4 = {
@@ -3503,6 +3503,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = {
3503static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { 3503static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = {
3504 { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START }, 3504 { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START },
3505 { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START }, 3505 { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START },
3506 { .dma_req = -1 }
3506}; 3507};
3507 3508
3508/* mmc2 master ports */ 3509/* mmc2 master ports */
@@ -3538,7 +3539,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
3538 .class = &omap44xx_mmc_hwmod_class, 3539 .class = &omap44xx_mmc_hwmod_class,
3539 .mpu_irqs = omap44xx_mmc2_irqs, 3540 .mpu_irqs = omap44xx_mmc2_irqs,
3540 .sdma_reqs = omap44xx_mmc2_sdma_reqs, 3541 .sdma_reqs = omap44xx_mmc2_sdma_reqs,
3541 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs),
3542 .main_clk = "mmc2_fck", 3542 .main_clk = "mmc2_fck",
3543 .prcm = { 3543 .prcm = {
3544 .omap4 = { 3544 .omap4 = {
@@ -3562,6 +3562,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = {
3562static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { 3562static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = {
3563 { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START }, 3563 { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START },
3564 { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START }, 3564 { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START },
3565 { .dma_req = -1 }
3565}; 3566};
3566 3567
3567static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { 3568static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = {
@@ -3592,7 +3593,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
3592 .class = &omap44xx_mmc_hwmod_class, 3593 .class = &omap44xx_mmc_hwmod_class,
3593 .mpu_irqs = omap44xx_mmc3_irqs, 3594 .mpu_irqs = omap44xx_mmc3_irqs,
3594 .sdma_reqs = omap44xx_mmc3_sdma_reqs, 3595 .sdma_reqs = omap44xx_mmc3_sdma_reqs,
3595 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs),
3596 .main_clk = "mmc3_fck", 3596 .main_clk = "mmc3_fck",
3597 .prcm = { 3597 .prcm = {
3598 .omap4 = { 3598 .omap4 = {
@@ -3614,6 +3614,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = {
3614static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { 3614static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = {
3615 { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START }, 3615 { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START },
3616 { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START }, 3616 { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START },
3617 { .dma_req = -1 }
3617}; 3618};
3618 3619
3619static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { 3620static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = {
@@ -3645,7 +3646,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
3645 .mpu_irqs = omap44xx_mmc4_irqs, 3646 .mpu_irqs = omap44xx_mmc4_irqs,
3646 3647
3647 .sdma_reqs = omap44xx_mmc4_sdma_reqs, 3648 .sdma_reqs = omap44xx_mmc4_sdma_reqs,
3648 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs),
3649 .main_clk = "mmc4_fck", 3649 .main_clk = "mmc4_fck",
3650 .prcm = { 3650 .prcm = {
3651 .omap4 = { 3651 .omap4 = {
@@ -3667,6 +3667,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = {
3667static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { 3667static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = {
3668 { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START }, 3668 { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START },
3669 { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START }, 3669 { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START },
3670 { .dma_req = -1 }
3670}; 3671};
3671 3672
3672static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { 3673static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = {
@@ -3697,7 +3698,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
3697 .class = &omap44xx_mmc_hwmod_class, 3698 .class = &omap44xx_mmc_hwmod_class,
3698 .mpu_irqs = omap44xx_mmc5_irqs, 3699 .mpu_irqs = omap44xx_mmc5_irqs,
3699 .sdma_reqs = omap44xx_mmc5_sdma_reqs, 3700 .sdma_reqs = omap44xx_mmc5_sdma_reqs,
3700 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs),
3701 .main_clk = "mmc5_fck", 3701 .main_clk = "mmc5_fck",
3702 .prcm = { 3702 .prcm = {
3703 .omap4 = { 3703 .omap4 = {
@@ -4617,6 +4617,7 @@ static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = {
4617static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { 4617static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = {
4618 { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START }, 4618 { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START },
4619 { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START }, 4619 { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START },
4620 { .dma_req = -1 }
4620}; 4621};
4621 4622
4622static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { 4623static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {
@@ -4647,7 +4648,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
4647 .class = &omap44xx_uart_hwmod_class, 4648 .class = &omap44xx_uart_hwmod_class,
4648 .mpu_irqs = omap44xx_uart1_irqs, 4649 .mpu_irqs = omap44xx_uart1_irqs,
4649 .sdma_reqs = omap44xx_uart1_sdma_reqs, 4650 .sdma_reqs = omap44xx_uart1_sdma_reqs,
4650 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs),
4651 .main_clk = "uart1_fck", 4651 .main_clk = "uart1_fck",
4652 .prcm = { 4652 .prcm = {
4653 .omap4 = { 4653 .omap4 = {
@@ -4669,6 +4669,7 @@ static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = {
4669static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { 4669static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = {
4670 { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START }, 4670 { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START },
4671 { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START }, 4671 { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START },
4672 { .dma_req = -1 }
4672}; 4673};
4673 4674
4674static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { 4675static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {
@@ -4699,7 +4700,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
4699 .class = &omap44xx_uart_hwmod_class, 4700 .class = &omap44xx_uart_hwmod_class,
4700 .mpu_irqs = omap44xx_uart2_irqs, 4701 .mpu_irqs = omap44xx_uart2_irqs,
4701 .sdma_reqs = omap44xx_uart2_sdma_reqs, 4702 .sdma_reqs = omap44xx_uart2_sdma_reqs,
4702 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs),
4703 .main_clk = "uart2_fck", 4703 .main_clk = "uart2_fck",
4704 .prcm = { 4704 .prcm = {
4705 .omap4 = { 4705 .omap4 = {
@@ -4721,6 +4721,7 @@ static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = {
4721static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { 4721static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = {
4722 { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START }, 4722 { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START },
4723 { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START }, 4723 { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START },
4724 { .dma_req = -1 }
4724}; 4725};
4725 4726
4726static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { 4727static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {
@@ -4752,7 +4753,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
4752 .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), 4753 .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
4753 .mpu_irqs = omap44xx_uart3_irqs, 4754 .mpu_irqs = omap44xx_uart3_irqs,
4754 .sdma_reqs = omap44xx_uart3_sdma_reqs, 4755 .sdma_reqs = omap44xx_uart3_sdma_reqs,
4755 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs),
4756 .main_clk = "uart3_fck", 4756 .main_clk = "uart3_fck",
4757 .prcm = { 4757 .prcm = {
4758 .omap4 = { 4758 .omap4 = {
@@ -4774,6 +4774,7 @@ static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = {
4774static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { 4774static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = {
4775 { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START }, 4775 { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START },
4776 { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START }, 4776 { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START },
4777 { .dma_req = -1 }
4777}; 4778};
4778 4779
4779static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { 4780static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {
@@ -4804,7 +4805,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
4804 .class = &omap44xx_uart_hwmod_class, 4805 .class = &omap44xx_uart_hwmod_class,
4805 .mpu_irqs = omap44xx_uart4_irqs, 4806 .mpu_irqs = omap44xx_uart4_irqs,
4806 .sdma_reqs = omap44xx_uart4_sdma_reqs, 4807 .sdma_reqs = omap44xx_uart4_sdma_reqs,
4807 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs),
4808 .main_clk = "uart4_fck", 4808 .main_clk = "uart4_fck",
4809 .prcm = { 4809 .prcm = {
4810 .omap4 = { 4810 .omap4 = {
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 3bd6d1d9c0da..822556ea3789 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -112,7 +112,7 @@ struct omap_hwmod_irq_info {
112/** 112/**
113 * struct omap_hwmod_dma_info - DMA channels used by the hwmod 113 * struct omap_hwmod_dma_info - DMA channels used by the hwmod
114 * @name: name of the DMA channel (module local name) 114 * @name: name of the DMA channel (module local name)
115 * @dma_req: DMA request ID 115 * @dma_req: DMA request ID (should be non-negative except -1 = terminator)
116 * 116 *
117 * @name should be something short, e.g., "tx" or "rx". It is for use 117 * @name should be something short, e.g., "tx" or "rx". It is for use
118 * by platform_get_resource_byname(). It is defined locally to the 118 * by platform_get_resource_byname(). It is defined locally to the
@@ -120,7 +120,7 @@ struct omap_hwmod_irq_info {
120 */ 120 */
121struct omap_hwmod_dma_info { 121struct omap_hwmod_dma_info {
122 const char *name; 122 const char *name;
123 u16 dma_req; 123 s16 dma_req;
124}; 124};
125 125
126/** 126/**
@@ -467,7 +467,7 @@ struct omap_hwmod_class {
467 * @class: struct omap_hwmod_class * to the class of this hwmod 467 * @class: struct omap_hwmod_class * to the class of this hwmod
468 * @od: struct omap_device currently associated with this hwmod (internal use) 468 * @od: struct omap_device currently associated with this hwmod (internal use)
469 * @mpu_irqs: ptr to an array of MPU IRQs 469 * @mpu_irqs: ptr to an array of MPU IRQs
470 * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) 470 * @sdma_reqs: ptr to an array of System DMA request IDs
471 * @prcm: PRCM data pertaining to this hwmod 471 * @prcm: PRCM data pertaining to this hwmod
472 * @main_clk: main clock: OMAP clock name 472 * @main_clk: main clock: OMAP clock name
473 * @_clk: pointer to the main struct clk (filled in at runtime) 473 * @_clk: pointer to the main struct clk (filled in at runtime)
@@ -480,7 +480,6 @@ struct omap_hwmod_class {
480 * @_sysc_cache: internal-use hwmod flags 480 * @_sysc_cache: internal-use hwmod flags
481 * @_mpu_rt_va: cached register target start address (internal use) 481 * @_mpu_rt_va: cached register target start address (internal use)
482 * @_mpu_port_index: cached MPU register target slave ID (internal use) 482 * @_mpu_port_index: cached MPU register target slave ID (internal use)
483 * @sdma_reqs_cnt: number of @sdma_reqs
484 * @opt_clks_cnt: number of @opt_clks 483 * @opt_clks_cnt: number of @opt_clks
485 * @master_cnt: number of @master entries 484 * @master_cnt: number of @master entries
486 * @slaves_cnt: number of @slave entries 485 * @slaves_cnt: number of @slave entries
@@ -528,7 +527,6 @@ struct omap_hwmod {
528 u16 flags; 527 u16 flags;
529 u8 _mpu_port_index; 528 u8 _mpu_port_index;
530 u8 response_lat; 529 u8 response_lat;
531 u8 sdma_reqs_cnt;
532 u8 rst_lines_cnt; 530 u8 rst_lines_cnt;
533 u8 opt_clks_cnt; 531 u8 opt_clks_cnt;
534 u8 masters_cnt; 532 u8 masters_cnt;