diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-12 10:36:45 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-12 13:19:52 -0400 |
commit | afba018898ae54b498e82b3cd4d2b61c74032c90 (patch) | |
tree | f5be3d82e08bda045e2490bd7ee55a4bf14642cd | |
parent | 172cf15d18889313bf2c3bfb81fcea08369274ef (diff) |
drm/i915: ensure HDMI port is disabled inside set_infoframes
This function is supposed to be used at mode set time, so prevent
against future mistakes by adding a WARN().
Based on a patch by Paulo Zanoni, with the check extracted into a
little assert_hdmi_port_disabled helper added to make things self
documenting and move the assert stuff out of line.
[fixed up spelling goof-up while applying.]
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 69637db9af1f..5b2c88ca6edb 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -37,6 +37,19 @@ | |||
37 | #include "i915_drm.h" | 37 | #include "i915_drm.h" |
38 | #include "i915_drv.h" | 38 | #include "i915_drv.h" |
39 | 39 | ||
40 | static void | ||
41 | assert_hdmi_port_disabled(struct intel_hdmi *intel_hdmi) | ||
42 | { | ||
43 | struct drm_device *dev = intel_hdmi->base.base.dev; | ||
44 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
45 | uint32_t enabled_bits; | ||
46 | |||
47 | enabled_bits = IS_HASWELL(dev) ? DDI_BUF_CTL_ENABLE : SDVO_ENABLE; | ||
48 | |||
49 | WARN(I915_READ(intel_hdmi->sdvox_reg) & enabled_bits, | ||
50 | "HDMI port enabled, expecting disabled\n"); | ||
51 | } | ||
52 | |||
40 | struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder) | 53 | struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder) |
41 | { | 54 | { |
42 | return container_of(encoder, struct intel_hdmi, base.base); | 55 | return container_of(encoder, struct intel_hdmi, base.base); |
@@ -334,6 +347,8 @@ static void g4x_set_infoframes(struct drm_encoder *encoder, | |||
334 | u32 val = I915_READ(reg); | 347 | u32 val = I915_READ(reg); |
335 | u32 port; | 348 | u32 port; |
336 | 349 | ||
350 | assert_hdmi_port_disabled(intel_hdmi); | ||
351 | |||
337 | /* If the registers were not initialized yet, they might be zeroes, | 352 | /* If the registers were not initialized yet, they might be zeroes, |
338 | * which means we're selecting the AVI DIP and we're setting its | 353 | * which means we're selecting the AVI DIP and we're setting its |
339 | * frequency to once. This seems to really confuse the HW and make | 354 | * frequency to once. This seems to really confuse the HW and make |
@@ -395,6 +410,8 @@ static void ibx_set_infoframes(struct drm_encoder *encoder, | |||
395 | u32 val = I915_READ(reg); | 410 | u32 val = I915_READ(reg); |
396 | u32 port; | 411 | u32 port; |
397 | 412 | ||
413 | assert_hdmi_port_disabled(intel_hdmi); | ||
414 | |||
398 | /* See the big comment in g4x_set_infoframes() */ | 415 | /* See the big comment in g4x_set_infoframes() */ |
399 | val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC; | 416 | val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC; |
400 | 417 | ||
@@ -451,6 +468,8 @@ static void cpt_set_infoframes(struct drm_encoder *encoder, | |||
451 | u32 reg = TVIDEO_DIP_CTL(intel_crtc->pipe); | 468 | u32 reg = TVIDEO_DIP_CTL(intel_crtc->pipe); |
452 | u32 val = I915_READ(reg); | 469 | u32 val = I915_READ(reg); |
453 | 470 | ||
471 | assert_hdmi_port_disabled(intel_hdmi); | ||
472 | |||
454 | /* See the big comment in g4x_set_infoframes() */ | 473 | /* See the big comment in g4x_set_infoframes() */ |
455 | val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC; | 474 | val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC; |
456 | 475 | ||
@@ -484,6 +503,8 @@ static void vlv_set_infoframes(struct drm_encoder *encoder, | |||
484 | u32 reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); | 503 | u32 reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); |
485 | u32 val = I915_READ(reg); | 504 | u32 val = I915_READ(reg); |
486 | 505 | ||
506 | assert_hdmi_port_disabled(intel_hdmi); | ||
507 | |||
487 | /* See the big comment in g4x_set_infoframes() */ | 508 | /* See the big comment in g4x_set_infoframes() */ |
488 | val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC; | 509 | val |= VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC; |
489 | 510 | ||
@@ -516,6 +537,8 @@ static void hsw_set_infoframes(struct drm_encoder *encoder, | |||
516 | u32 reg = HSW_TVIDEO_DIP_CTL(intel_crtc->pipe); | 537 | u32 reg = HSW_TVIDEO_DIP_CTL(intel_crtc->pipe); |
517 | u32 val = I915_READ(reg); | 538 | u32 val = I915_READ(reg); |
518 | 539 | ||
540 | assert_hdmi_port_disabled(intel_hdmi); | ||
541 | |||
519 | if (!intel_hdmi->has_hdmi_sink) { | 542 | if (!intel_hdmi->has_hdmi_sink) { |
520 | I915_WRITE(reg, 0); | 543 | I915_WRITE(reg, 0); |
521 | POSTING_READ(reg); | 544 | POSTING_READ(reg); |