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authorMarcin Slusarz <marcin.slusarz@gmail.com>2012-12-25 11:50:43 -0500
committerBen Skeggs <bskeggs@redhat.com>2013-02-20 01:00:34 -0500
commita4cea27b6950885a743a4a000d5f2ea3fd445d25 (patch)
treea33de13c94bb3222bd72cb549b677c5e5b9e691a
parenta624bafbf11c098a859dba4118a33605bfd25788 (diff)
drm/nouveau: share fence structures between nv10+ and nv50 implementations
We already rely on them having the same fields and layout. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fence.c13
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fence.h19
-rw-r--r--drivers/gpu/drm/nouveau/nv50_fence.c19
3 files changed, 24 insertions, 27 deletions
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10_fence.c
index 03017f24d593..a8ea4af3ca76 100644
--- a/drivers/gpu/drm/nouveau/nv10_fence.c
+++ b/drivers/gpu/drm/nouveau/nv10_fence.c
@@ -27,18 +27,7 @@
27 27
28#include "nouveau_drm.h" 28#include "nouveau_drm.h"
29#include "nouveau_dma.h" 29#include "nouveau_dma.h"
30#include "nouveau_fence.h" 30#include "nv10_fence.h"
31
32struct nv10_fence_chan {
33 struct nouveau_fence_chan base;
34};
35
36struct nv10_fence_priv {
37 struct nouveau_fence_priv base;
38 struct nouveau_bo *bo;
39 spinlock_t lock;
40 u32 sequence;
41};
42 31
43int 32int
44nv10_fence_emit(struct nouveau_fence *fence) 33nv10_fence_emit(struct nouveau_fence *fence)
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.h b/drivers/gpu/drm/nouveau/nv10_fence.h
new file mode 100644
index 000000000000..e5d9204826c2
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv10_fence.h
@@ -0,0 +1,19 @@
1#ifndef __NV10_FENCE_H_
2#define __NV10_FENCE_H_
3
4#include <core/os.h>
5#include "nouveau_fence.h"
6#include "nouveau_bo.h"
7
8struct nv10_fence_chan {
9 struct nouveau_fence_chan base;
10};
11
12struct nv10_fence_priv {
13 struct nouveau_fence_priv base;
14 struct nouveau_bo *bo;
15 spinlock_t lock;
16 u32 sequence;
17};
18
19#endif
diff --git a/drivers/gpu/drm/nouveau/nv50_fence.c b/drivers/gpu/drm/nouveau/nv50_fence.c
index d889f3ac0d41..72791d658b40 100644
--- a/drivers/gpu/drm/nouveau/nv50_fence.c
+++ b/drivers/gpu/drm/nouveau/nv50_fence.c
@@ -27,27 +27,16 @@
27 27
28#include "nouveau_drm.h" 28#include "nouveau_drm.h"
29#include "nouveau_dma.h" 29#include "nouveau_dma.h"
30#include "nouveau_fence.h" 30#include "nv10_fence.h"
31 31
32#include "nv50_display.h" 32#include "nv50_display.h"
33 33
34struct nv50_fence_chan {
35 struct nouveau_fence_chan base;
36};
37
38struct nv50_fence_priv {
39 struct nouveau_fence_priv base;
40 struct nouveau_bo *bo;
41 spinlock_t lock;
42 u32 sequence;
43};
44
45static int 34static int
46nv50_fence_context_new(struct nouveau_channel *chan) 35nv50_fence_context_new(struct nouveau_channel *chan)
47{ 36{
48 struct drm_device *dev = chan->drm->dev; 37 struct drm_device *dev = chan->drm->dev;
49 struct nv50_fence_priv *priv = chan->drm->fence; 38 struct nv10_fence_priv *priv = chan->drm->fence;
50 struct nv50_fence_chan *fctx; 39 struct nv10_fence_chan *fctx;
51 struct ttm_mem_reg *mem = &priv->bo->bo.mem; 40 struct ttm_mem_reg *mem = &priv->bo->bo.mem;
52 struct nouveau_object *object; 41 struct nouveau_object *object;
53 int ret, i; 42 int ret, i;
@@ -91,7 +80,7 @@ nv50_fence_context_new(struct nouveau_channel *chan)
91int 80int
92nv50_fence_create(struct nouveau_drm *drm) 81nv50_fence_create(struct nouveau_drm *drm)
93{ 82{
94 struct nv50_fence_priv *priv; 83 struct nv10_fence_priv *priv;
95 int ret = 0; 84 int ret = 0;
96 85
97 priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL); 86 priv = drm->fence = kzalloc(sizeof(*priv), GFP_KERNEL);