diff options
author | Robin Gong <b38343@freescale.com> | 2013-09-12 04:22:26 -0400 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2014-04-16 09:05:39 -0400 |
commit | a3c9d3a0f8165a20eb4c9ae1ea22c3173c2b93ea (patch) | |
tree | c9bb9aeb499acc97424aaad0ae933b4b225c910f | |
parent | ba053009d6ffcc23f9c5ff90a54f6d31e7cdb781 (diff) |
ENGR00279402-1 ARM: dts: imx6: add wdog reset source seclect in dts
Some boards use another WDOG reset source to reboot system in ldo-bypass mode.
We need add the property in board dts file so that we can easily know the
WDOG reset source currently.
For Sabresd, WDOG1 for ldo-enable mode(WDOG event), WDOG2 for ldo-bypass mode
(reset external pmic to trigger POR event).
For sl-evk board, there is no WDOG pin connected with external pmic as Sabresd
, because mx6sl boot at 400Mhz. Then both ldo-enable and ldo-bypass mode use
the common WDOG1 as reset source.
Signed-off-by: Robin Gong <b38343@freescale.com>
-rw-r--r-- | arch/arm/boot/dts/imx6dl-sabresd-ldo.dts | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q-sabresd-ldo.dts | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sl-evk-ldo.dts | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sl-evk.dts | 1 |
5 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl-sabresd-ldo.dts b/arch/arm/boot/dts/imx6dl-sabresd-ldo.dts index 014a72172274..2b5d869421b3 100644 --- a/arch/arm/boot/dts/imx6dl-sabresd-ldo.dts +++ b/arch/arm/boot/dts/imx6dl-sabresd-ldo.dts | |||
@@ -16,6 +16,7 @@ | |||
16 | 16 | ||
17 | &gpc { | 17 | &gpc { |
18 | fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ | 18 | fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ |
19 | fsl,wdog-reset = <1>; /* watchdog select of reset source */ | ||
19 | pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ | 20 | pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ |
20 | }; | 21 | }; |
21 | 22 | ||
diff --git a/arch/arm/boot/dts/imx6q-sabresd-ldo.dts b/arch/arm/boot/dts/imx6q-sabresd-ldo.dts index c0a271bf3db9..e2744f29d8c2 100644 --- a/arch/arm/boot/dts/imx6q-sabresd-ldo.dts +++ b/arch/arm/boot/dts/imx6q-sabresd-ldo.dts | |||
@@ -21,6 +21,7 @@ | |||
21 | 21 | ||
22 | &gpc { | 22 | &gpc { |
23 | fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ | 23 | fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ |
24 | fsl,wdog-reset = <1>; /* watchdog select of reset source */ | ||
24 | pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ | 25 | pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ |
25 | }; | 26 | }; |
26 | 27 | ||
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 1b50cdc9d435..b4965304eea0 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi | |||
@@ -267,6 +267,7 @@ | |||
267 | fsl,cpu_pdnscr_iso2sw = <0x1>; | 267 | fsl,cpu_pdnscr_iso2sw = <0x1>; |
268 | fsl,cpu_pdnscr_iso = <0x1>; | 268 | fsl,cpu_pdnscr_iso = <0x1>; |
269 | fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ | 269 | fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ |
270 | fsl,wdog-reset = <2>; /* watchdog select of reset source */ | ||
270 | pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ | 271 | pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ |
271 | }; | 272 | }; |
272 | 273 | ||
@@ -577,6 +578,7 @@ | |||
577 | MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 | 578 | MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 |
578 | MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 | 579 | MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 |
579 | MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 | 580 | MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 |
581 | MX6QDL_PAD_GPIO_1__WDOG2_B 0x80000000 | ||
580 | >; | 582 | >; |
581 | }; | 583 | }; |
582 | }; | 584 | }; |
diff --git a/arch/arm/boot/dts/imx6sl-evk-ldo.dts b/arch/arm/boot/dts/imx6sl-evk-ldo.dts index 3a6818106cf1..9bbd6fbbfa97 100644 --- a/arch/arm/boot/dts/imx6sl-evk-ldo.dts +++ b/arch/arm/boot/dts/imx6sl-evk-ldo.dts | |||
@@ -16,6 +16,7 @@ | |||
16 | 16 | ||
17 | &gpc { | 17 | &gpc { |
18 | fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ | 18 | fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ |
19 | fsl,wdog-reset = <1>; /* watchdog select of reset source */ | ||
19 | pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ | 20 | pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ |
20 | }; | 21 | }; |
21 | 22 | ||
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 0095c6fc737d..3ed918fc390a 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts | |||
@@ -167,6 +167,7 @@ | |||
167 | fsl,cpu_pdnscr_iso2sw = <0x1>; | 167 | fsl,cpu_pdnscr_iso2sw = <0x1>; |
168 | fsl,cpu_pdnscr_iso = <0x1>; | 168 | fsl,cpu_pdnscr_iso = <0x1>; |
169 | fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ | 169 | fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ |
170 | fsl,wdog-reset = <1>; /* watchdog select of reset source */ | ||
170 | pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ | 171 | pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ |
171 | }; | 172 | }; |
172 | 173 | ||