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authorAxel Lin <axel.lin@gmail.com>2011-10-17 00:34:31 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-10-20 09:48:22 -0400
commit9f9619a0785f8eee42edf731fd18189faa5a7ce8 (patch)
treefb56d54dfecaf2ecfb1899ed53d1518b5981ba34
parent24441e17feb57668e4c5013750cef549bf3c4861 (diff)
ASoC: wm9081: Fix setting soft VMID ramp enable with VMID 2*240k
According to the datasheet: BIT 2:1 VMID_SEL[1:0] VMID Divider Enable and Select 00 = VMID disabled 01 = 2x40k Omh divider 10 = 2x240k Omh divider 11 = 2x5k Omh divider To set VMID 2*240k, we should OR reg with 0x04 instead of 0x40. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--sound/soc/codecs/wm9081.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/codecs/wm9081.c b/sound/soc/codecs/wm9081.c
index 81761388ccf7..3cd35a02c28c 100644
--- a/sound/soc/codecs/wm9081.c
+++ b/sound/soc/codecs/wm9081.c
@@ -820,7 +820,7 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
820 /* VMID 2*240k */ 820 /* VMID 2*240k */
821 reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1); 821 reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1);
822 reg &= ~WM9081_VMID_SEL_MASK; 822 reg &= ~WM9081_VMID_SEL_MASK;
823 reg |= 0x40; 823 reg |= 0x04;
824 snd_soc_write(codec, WM9081_VMID_CONTROL, reg); 824 snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
825 825
826 /* Standby bias current on */ 826 /* Standby bias current on */