diff options
author | Michael Ellerman <michael@ellerman.id.au> | 2011-04-07 17:56:02 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-04-27 00:18:43 -0400 |
commit | 9d4a2925c290a053bb279e75e7a649069fdcaf6b (patch) | |
tree | a1a70803d11ce84a0cfc479182086efcaf405087 | |
parent | 0407a31429500e7e56da33a326ca7cf35c2c9d65 (diff) |
powerpc: Add MSR_64BIT
The MSR bit which indicates 64-bit-ness is different between server and
booke, so add a #define which gives you the right mask regardless.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
-rw-r--r-- | arch/powerpc/include/asm/reg.h | 10 | ||||
-rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 6 |
2 files changed, 12 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 76d7d5fea5be..1f9ac12742e6 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
@@ -99,17 +99,23 @@ | |||
99 | #define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */ | 99 | #define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */ |
100 | 100 | ||
101 | #if defined(CONFIG_PPC_BOOK3S_64) | 101 | #if defined(CONFIG_PPC_BOOK3S_64) |
102 | #define MSR_64BIT MSR_SF | ||
103 | |||
102 | /* Server variant */ | 104 | /* Server variant */ |
103 | #define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV | 105 | #define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV |
104 | #define MSR_KERNEL MSR_ | MSR_SF | 106 | #define MSR_KERNEL MSR_ | MSR_64BIT |
105 | #define MSR_USER32 MSR_ | MSR_PR | MSR_EE | 107 | #define MSR_USER32 MSR_ | MSR_PR | MSR_EE |
106 | #define MSR_USER64 MSR_USER32 | MSR_SF | 108 | #define MSR_USER64 MSR_USER32 | MSR_64BIT |
107 | #elif defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_8xx) | 109 | #elif defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_8xx) |
108 | /* Default MSR for kernel mode. */ | 110 | /* Default MSR for kernel mode. */ |
109 | #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR) | 111 | #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR) |
110 | #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) | 112 | #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) |
111 | #endif | 113 | #endif |
112 | 114 | ||
115 | #ifndef MSR_64BIT | ||
116 | #define MSR_64BIT 0 | ||
117 | #endif | ||
118 | |||
113 | /* Floating Point Status and Control Register (FPSCR) Fields */ | 119 | /* Floating Point Status and Control Register (FPSCR) Fields */ |
114 | #define FPSCR_FX 0x80000000 /* FPU exception summary */ | 120 | #define FPSCR_FX 0x80000000 /* FPU exception summary */ |
115 | #define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ | 121 | #define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ |
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index b316794aa2b5..817bd1ac1752 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
@@ -27,10 +27,12 @@ | |||
27 | #define MSR_CM (1<<31) /* Computation Mode (0=32-bit, 1=64-bit) */ | 27 | #define MSR_CM (1<<31) /* Computation Mode (0=32-bit, 1=64-bit) */ |
28 | 28 | ||
29 | #if defined(CONFIG_PPC_BOOK3E_64) | 29 | #if defined(CONFIG_PPC_BOOK3E_64) |
30 | #define MSR_64BIT MSR_CM | ||
31 | |||
30 | #define MSR_ MSR_ME | MSR_CE | 32 | #define MSR_ MSR_ME | MSR_CE |
31 | #define MSR_KERNEL MSR_ | MSR_CM | 33 | #define MSR_KERNEL MSR_ | MSR_64BIT |
32 | #define MSR_USER32 MSR_ | MSR_PR | MSR_EE | MSR_DE | 34 | #define MSR_USER32 MSR_ | MSR_PR | MSR_EE | MSR_DE |
33 | #define MSR_USER64 MSR_USER32 | MSR_CM | MSR_DE | 35 | #define MSR_USER64 MSR_USER32 | MSR_64BIT |
34 | #elif defined (CONFIG_40x) | 36 | #elif defined (CONFIG_40x) |
35 | #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE) | 37 | #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE) |
36 | #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) | 38 | #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) |