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authorAlexander Shiyan <shc_work@mail.ru>2012-11-17 08:57:17 -0500
committerOlof Johansson <olof@lixom.net>2012-11-21 12:57:43 -0500
commit90383e0ac2ae3df283f2b56997040f71f6d1df08 (patch)
treef4d74f00d18f40f120238cb7a762c676e07c6fe1
parent49e67de364ea7b2dd69066c95990e686d4de6154 (diff)
ARM: clps711x: autcpu12: Special driver for handling NAND memory is removed
This patch provide migration to using "gpio-nand" and "basic-mmio-gpio" drivers instead of using special driver for handling NAND memory. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/mach-clps711x/autcpu12.c98
-rw-r--r--arch/arm/mach-clps711x/include/mach/autcpu12.h10
-rw-r--r--drivers/mtd/nand/Kconfig7
-rw-r--r--drivers/mtd/nand/Makefile1
-rw-r--r--drivers/mtd/nand/autcpu12.c237
5 files changed, 98 insertions, 255 deletions
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 3de19554d800..3fbf43f72589 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -23,9 +23,13 @@
23#include <linux/string.h> 23#include <linux/string.h>
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/gpio.h>
26#include <linux/ioport.h> 27#include <linux/ioport.h>
27#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand-gpio.h>
28#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/basic_mmio_gpio.h>
29 33
30#include <mach/hardware.h> 34#include <mach/hardware.h>
31#include <asm/sizes.h> 35#include <asm/sizes.h>
@@ -43,6 +47,15 @@
43#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300) 47#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300)
44#define AUTCPU12_CS8900_IRQ (IRQ_EINT3) 48#define AUTCPU12_CS8900_IRQ (IRQ_EINT3)
45 49
50#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000)
51#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10)
52
53#define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO)
54#define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */
55#define AUTCPU12_SMC_RDY CLPS711X_GPIO(1, 2)
56#define AUTCPU12_SMC_ALE CLPS711X_GPIO(1, 3)
57#define AUTCPU12_SMC_CLE CLPS711X_GPIO(1, 3)
58
46static struct resource autcpu12_cs8900_resource[] __initdata = { 59static struct resource autcpu12_cs8900_resource[] __initdata = {
47 DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K), 60 DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K),
48 DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ), 61 DEFINE_RES_IRQ(AUTCPU12_CS8900_IRQ),
@@ -59,14 +72,98 @@ static struct platform_device autcpu12_nvram_pdev __initdata = {
59 .num_resources = ARRAY_SIZE(autcpu12_nvram_resource), 72 .num_resources = ARRAY_SIZE(autcpu12_nvram_resource),
60}; 73};
61 74
75static struct resource autcpu12_nand_resource[] __initdata = {
76 DEFINE_RES_MEM(AUTCPU12_SMC_BASE, SZ_16),
77};
78
79static struct mtd_partition autcpu12_nand_parts[] __initdata = {
80 {
81 .name = "Flash partition 1",
82 .offset = 0,
83 .size = SZ_8M,
84 },
85 {
86 .name = "Flash partition 2",
87 .offset = MTDPART_OFS_APPEND,
88 .size = MTDPART_SIZ_FULL,
89 },
90};
91
92static void __init autcpu12_adjust_parts(struct gpio_nand_platdata *pdata,
93 size_t sz)
94{
95 switch (sz) {
96 case SZ_16M:
97 case SZ_32M:
98 break;
99 case SZ_64M:
100 case SZ_128M:
101 pdata->parts[0].size = SZ_16M;
102 break;
103 default:
104 pr_warn("Unsupported SmartMedia device size %u\n", sz);
105 break;
106 }
107}
108
109static struct gpio_nand_platdata autcpu12_nand_pdata __initdata = {
110 .gpio_rdy = AUTCPU12_SMC_RDY,
111 .gpio_nce = AUTCPU12_SMC_NCE,
112 .gpio_ale = AUTCPU12_SMC_ALE,
113 .gpio_cle = AUTCPU12_SMC_CLE,
114 .gpio_nwp = -1,
115 .chip_delay = 20,
116 .parts = autcpu12_nand_parts,
117 .num_parts = ARRAY_SIZE(autcpu12_nand_parts),
118 .adjust_parts = autcpu12_adjust_parts,
119};
120
121static struct platform_device autcpu12_nand_pdev __initdata = {
122 .name = "gpio-nand",
123 .id = -1,
124 .resource = autcpu12_nand_resource,
125 .num_resources = ARRAY_SIZE(autcpu12_nand_resource),
126 .dev = {
127 .platform_data = &autcpu12_nand_pdata,
128 },
129};
130
131static struct resource autcpu12_mmgpio_resource[] __initdata = {
132 DEFINE_RES_MEM_NAMED(AUTCPU12_SMC_SEL_BASE, SZ_1, "dat"),
133};
134
135static struct bgpio_pdata autcpu12_mmgpio_pdata __initdata = {
136 .base = AUTCPU12_MMGPIO_BASE,
137 .ngpio = 8,
138};
139
140static struct platform_device autcpu12_mmgpio_pdev __initdata = {
141 .name = "basic-mmio-gpio",
142 .id = -1,
143 .resource = autcpu12_mmgpio_resource,
144 .num_resources = ARRAY_SIZE(autcpu12_mmgpio_resource),
145 .dev = {
146 .platform_data = &autcpu12_mmgpio_pdata,
147 },
148};
149
62static void __init autcpu12_init(void) 150static void __init autcpu12_init(void)
63{ 151{
64 platform_device_register_simple("video-clps711x", 0, NULL, 0); 152 platform_device_register_simple("video-clps711x", 0, NULL, 0);
65 platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource, 153 platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource,
66 ARRAY_SIZE(autcpu12_cs8900_resource)); 154 ARRAY_SIZE(autcpu12_cs8900_resource));
155 platform_device_register(&autcpu12_mmgpio_pdev);
67 platform_device_register(&autcpu12_nvram_pdev); 156 platform_device_register(&autcpu12_nvram_pdev);
68} 157}
69 158
159static void __init autcpu12_init_late(void)
160{
161 if (IS_ENABLED(MTD_NAND_GPIO) && IS_ENABLED(GPIO_GENERIC_PLATFORM)) {
162 /* We are need both drivers to handle NAND */
163 platform_device_register(&autcpu12_nand_pdev);
164 }
165}
166
70MACHINE_START(AUTCPU12, "autronix autcpu12") 167MACHINE_START(AUTCPU12, "autronix autcpu12")
71 /* Maintainer: Thomas Gleixner */ 168 /* Maintainer: Thomas Gleixner */
72 .atag_offset = 0x20000, 169 .atag_offset = 0x20000,
@@ -75,6 +172,7 @@ MACHINE_START(AUTCPU12, "autronix autcpu12")
75 .init_irq = clps711x_init_irq, 172 .init_irq = clps711x_init_irq,
76 .timer = &clps711x_timer, 173 .timer = &clps711x_timer,
77 .init_machine = autcpu12_init, 174 .init_machine = autcpu12_init,
175 .init_late = autcpu12_init_late,
78 .handle_irq = clps711x_handle_irq, 176 .handle_irq = clps711x_handle_irq,
79 .restart = clps711x_restart, 177 .restart = clps711x_restart,
80MACHINE_END 178MACHINE_END
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h
index b077abd8a475..0452f5f3f034 100644
--- a/arch/arm/mach-clps711x/include/mach/autcpu12.h
+++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h
@@ -40,8 +40,6 @@
40 40
41#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */ 41#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */
42 42
43#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */
44
45#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */ 43#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */
46 44
47#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */ 45#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */
@@ -50,14 +48,6 @@
50 48
51#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */ 49#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */
52 50
53/*
54* defines for smartmedia card access
55*/
56#define AUTCPU12_SMC_RDY (1<<2)
57#define AUTCPU12_SMC_ALE (1<<3)
58#define AUTCPU12_SMC_CLE (1<<4)
59#define AUTCPU12_SMC_PORT_OFFSET PBDR
60#define AUTCPU12_SMC_SELECT_OFFSET 0x10
61/* 51/*
62* defines for lcd contrast 52* defines for lcd contrast
63*/ 53*/
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 4883139460be..e6e0a82cbaaf 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -49,13 +49,6 @@ config MTD_NAND_MUSEUM_IDS
49 NAND chips (page size 256 byte, erase size 4-8KiB). The IDs 49 NAND chips (page size 256 byte, erase size 4-8KiB). The IDs
50 of these chips were reused by later, larger chips. 50 of these chips were reused by later, larger chips.
51 51
52config MTD_NAND_AUTCPU12
53 tristate "SmartMediaCard on autronix autcpu12 board"
54 depends on ARCH_AUTCPU12
55 help
56 This enables the driver for the autronix autcpu12 board to
57 access the SmartMediaCard.
58
59config MTD_NAND_DENALI 52config MTD_NAND_DENALI
60 depends on PCI 53 depends on PCI
61 tristate "Support Denali NAND controller on Intel Moorestown" 54 tristate "Support Denali NAND controller on Intel Moorestown"
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 2cbd0916b733..0b1fca24866c 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_MTD_SM_COMMON) += sm_common.o
11obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o 11obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o
12obj-$(CONFIG_MTD_NAND_SPIA) += spia.o 12obj-$(CONFIG_MTD_NAND_SPIA) += spia.o
13obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o 13obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
14obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o
15obj-$(CONFIG_MTD_NAND_DENALI) += denali.o 14obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
16obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o 15obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
17obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o 16obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o
diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c
deleted file mode 100644
index 04769a49a7cb..000000000000
--- a/drivers/mtd/nand/autcpu12.c
+++ /dev/null
@@ -1,237 +0,0 @@
1/*
2 * drivers/mtd/autcpu12.c
3 *
4 * Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de>
5 *
6 * Derived from drivers/mtd/spia.c
7 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Overview:
14 * This is a device driver for the NAND flash device found on the
15 * autronix autcpu12 board, which is a SmartMediaCard. It supports
16 * 16MiB, 32MiB and 64MiB cards.
17 *
18 *
19 * 02-12-2002 TG Cleanup of module params
20 *
21 * 02-20-2002 TG adjusted for different rd/wr address support
22 * added support for read device ready/busy line
23 * added page_cache
24 *
25 * 10-06-2002 TG 128K card support added
26 */
27
28#include <linux/slab.h>
29#include <linux/init.h>
30#include <linux/module.h>
31#include <linux/mtd/mtd.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/io.h>
35#include <mach/hardware.h>
36#include <asm/sizes.h>
37#include <mach/autcpu12.h>
38
39/*
40 * MTD structure for AUTCPU12 board
41 */
42static struct mtd_info *autcpu12_mtd = NULL;
43static void __iomem *autcpu12_fio_base;
44
45/*
46 * Define partitions for flash devices
47 */
48static struct mtd_partition partition_info16k[] = {
49 { .name = "AUTCPU12 flash partition 1",
50 .offset = 0,
51 .size = 8 * SZ_1M },
52 { .name = "AUTCPU12 flash partition 2",
53 .offset = 8 * SZ_1M,
54 .size = 8 * SZ_1M },
55};
56
57static struct mtd_partition partition_info32k[] = {
58 { .name = "AUTCPU12 flash partition 1",
59 .offset = 0,
60 .size = 8 * SZ_1M },
61 { .name = "AUTCPU12 flash partition 2",
62 .offset = 8 * SZ_1M,
63 .size = 24 * SZ_1M },
64};
65
66static struct mtd_partition partition_info64k[] = {
67 { .name = "AUTCPU12 flash partition 1",
68 .offset = 0,
69 .size = 16 * SZ_1M },
70 { .name = "AUTCPU12 flash partition 2",
71 .offset = 16 * SZ_1M,
72 .size = 48 * SZ_1M },
73};
74
75static struct mtd_partition partition_info128k[] = {
76 { .name = "AUTCPU12 flash partition 1",
77 .offset = 0,
78 .size = 16 * SZ_1M },
79 { .name = "AUTCPU12 flash partition 2",
80 .offset = 16 * SZ_1M,
81 .size = 112 * SZ_1M },
82};
83
84#define NUM_PARTITIONS16K 2
85#define NUM_PARTITIONS32K 2
86#define NUM_PARTITIONS64K 2
87#define NUM_PARTITIONS128K 2
88/*
89 * hardware specific access to control-lines
90 *
91 * ALE bit 4 autcpu12_pedr
92 * CLE bit 5 autcpu12_pedr
93 * NCE bit 0 fio_ctrl
94 *
95 */
96static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd,
97 unsigned int ctrl)
98{
99 struct nand_chip *chip = mtd->priv;
100
101 if (ctrl & NAND_CTRL_CHANGE) {
102 void __iomem *addr;
103 unsigned char bits;
104
105 bits = clps_readb(AUTCPU12_SMC_PORT_OFFSET) & ~0x30;
106 bits |= (ctrl & NAND_CLE) << 4;
107 bits |= (ctrl & NAND_ALE) << 2;
108 clps_writeb(bits, AUTCPU12_SMC_PORT_OFFSET);
109
110 addr = autcpu12_fio_base + AUTCPU12_SMC_SELECT_OFFSET;
111 writeb((readb(addr) & ~0x1) | (ctrl & NAND_NCE), addr);
112 }
113
114 if (cmd != NAND_CMD_NONE)
115 writeb(cmd, chip->IO_ADDR_W);
116}
117
118/*
119 * read device ready pin
120 */
121int autcpu12_device_ready(struct mtd_info *mtd)
122{
123 return clps_readb(AUTCPU12_SMC_PORT_OFFSET) & AUTCPU12_SMC_RDY;
124}
125
126/*
127 * Main initialization routine
128 */
129static int __init autcpu12_init(void)
130{
131 struct nand_chip *this;
132 int err = 0;
133
134 /* Allocate memory for MTD device structure and private data */
135 autcpu12_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip),
136 GFP_KERNEL);
137 if (!autcpu12_mtd) {
138 printk("Unable to allocate AUTCPU12 NAND MTD device structure.\n");
139 err = -ENOMEM;
140 goto out;
141 }
142
143 /* map physical address */
144 autcpu12_fio_base = ioremap(AUTCPU12_PHYS_SMC, SZ_1K);
145 if (!autcpu12_fio_base) {
146 printk("Ioremap autcpu12 SmartMedia Card failed\n");
147 err = -EIO;
148 goto out_mtd;
149 }
150
151 /* Get pointer to private data */
152 this = (struct nand_chip *)(&autcpu12_mtd[1]);
153
154 /* Initialize structures */
155 memset(autcpu12_mtd, 0, sizeof(struct mtd_info));
156 memset(this, 0, sizeof(struct nand_chip));
157
158 /* Link the private data with the MTD structure */
159 autcpu12_mtd->priv = this;
160 autcpu12_mtd->owner = THIS_MODULE;
161
162 /* Set address of NAND IO lines */
163 this->IO_ADDR_R = autcpu12_fio_base;
164 this->IO_ADDR_W = autcpu12_fio_base;
165 this->cmd_ctrl = autcpu12_hwcontrol;
166 this->dev_ready = autcpu12_device_ready;
167 /* 20 us command delay time */
168 this->chip_delay = 20;
169 this->ecc.mode = NAND_ECC_SOFT;
170
171 /* Enable the following for a flash based bad block table */
172 /*
173 this->bbt_options = NAND_BBT_USE_FLASH;
174 */
175 this->bbt_options = NAND_BBT_USE_FLASH;
176
177 /* Scan to find existence of the device */
178 if (nand_scan(autcpu12_mtd, 1)) {
179 err = -ENXIO;
180 goto out_ior;
181 }
182
183 /* Register the partitions */
184 switch (autcpu12_mtd->size) {
185 case SZ_16M:
186 mtd_device_register(autcpu12_mtd, partition_info16k,
187 NUM_PARTITIONS16K);
188 break;
189 case SZ_32M:
190 mtd_device_register(autcpu12_mtd, partition_info32k,
191 NUM_PARTITIONS32K);
192 break;
193 case SZ_64M:
194 mtd_device_register(autcpu12_mtd, partition_info64k,
195 NUM_PARTITIONS64K);
196 break;
197 case SZ_128M:
198 mtd_device_register(autcpu12_mtd, partition_info128k,
199 NUM_PARTITIONS128K);
200 break;
201 default:
202 printk("Unsupported SmartMedia device\n");
203 err = -ENXIO;
204 goto out_ior;
205 }
206 goto out;
207
208 out_ior:
209 iounmap(autcpu12_fio_base);
210 out_mtd:
211 kfree(autcpu12_mtd);
212 out:
213 return err;
214}
215
216module_init(autcpu12_init);
217
218/*
219 * Clean up routine
220 */
221static void __exit autcpu12_cleanup(void)
222{
223 /* Release resources, unregister device */
224 nand_release(autcpu12_mtd);
225
226 /* unmap physical address */
227 iounmap(autcpu12_fio_base);
228
229 /* Free the MTD device structure */
230 kfree(autcpu12_mtd);
231}
232
233module_exit(autcpu12_cleanup);
234
235MODULE_LICENSE("GPL");
236MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
237MODULE_DESCRIPTION("Glue layer for SmartMediaCard on autronix autcpu12");