diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-05-09 17:53:48 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2012-05-20 11:27:01 -0400 |
commit | 879eed68265c8dcb2f2856ec96820fc93b7038c9 (patch) | |
tree | b290c707e1d9eb3033f8a93eff1d81f4b7afb185 | |
parent | 27757e8262669321b496c55f06f4844e827fd1c5 (diff) |
mfd: Remove wm8400 custom cache implementation
Save a useful amount of code by removing the custom cache implementation
for wm8400 and using the regmap cache. Also simplify things by not
separately reseting the CODEC registers, this is a sufficiently infrequent
operation that we can simply invalidate the entire cache when this happens.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
-rw-r--r-- | drivers/mfd/wm8400-core.c | 251 | ||||
-rw-r--r-- | include/linux/mfd/wm8400-private.h | 14 |
2 files changed, 42 insertions, 223 deletions
diff --git a/drivers/mfd/wm8400-core.c b/drivers/mfd/wm8400-core.c index 1189a17f0f25..9083b775e2b6 100644 --- a/drivers/mfd/wm8400-core.c +++ b/drivers/mfd/wm8400-core.c | |||
@@ -23,136 +23,16 @@ | |||
23 | #include <linux/regmap.h> | 23 | #include <linux/regmap.h> |
24 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
25 | 25 | ||
26 | static struct { | 26 | static bool wm8400_volatile(struct device *dev, unsigned int reg) |
27 | u16 readable; /* Mask of readable bits */ | ||
28 | u16 writable; /* Mask of writable bits */ | ||
29 | u16 vol; /* Mask of volatile bits */ | ||
30 | int is_codec; /* Register controlled by codec reset */ | ||
31 | u16 default_val; /* Value on reset */ | ||
32 | } reg_data[] = { | ||
33 | { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */ | ||
34 | { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */ | ||
35 | { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */ | ||
36 | { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */ | ||
37 | { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */ | ||
38 | { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */ | ||
39 | { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */ | ||
40 | { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */ | ||
41 | { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */ | ||
42 | { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */ | ||
43 | { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */ | ||
44 | { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */ | ||
45 | { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */ | ||
46 | { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */ | ||
47 | { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */ | ||
48 | { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */ | ||
49 | { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */ | ||
50 | { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */ | ||
51 | { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */ | ||
52 | { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */ | ||
53 | { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */ | ||
54 | { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */ | ||
55 | { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */ | ||
56 | { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */ | ||
57 | { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */ | ||
58 | { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */ | ||
59 | { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */ | ||
60 | { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */ | ||
61 | { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */ | ||
62 | { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */ | ||
63 | { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */ | ||
64 | { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */ | ||
65 | { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */ | ||
66 | { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */ | ||
67 | { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */ | ||
68 | { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */ | ||
69 | { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */ | ||
70 | { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */ | ||
71 | { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */ | ||
72 | { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */ | ||
73 | { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */ | ||
74 | { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */ | ||
75 | { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */ | ||
76 | { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */ | ||
77 | { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */ | ||
78 | { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */ | ||
79 | { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */ | ||
80 | { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */ | ||
81 | { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */ | ||
82 | { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */ | ||
83 | { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */ | ||
84 | { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */ | ||
85 | { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */ | ||
86 | { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */ | ||
87 | { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */ | ||
88 | { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */ | ||
89 | { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */ | ||
90 | { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */ | ||
91 | { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */ | ||
92 | { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */ | ||
93 | { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */ | ||
94 | { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */ | ||
95 | { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */ | ||
96 | { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */ | ||
97 | { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */ | ||
98 | { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */ | ||
99 | { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */ | ||
100 | { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */ | ||
101 | { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */ | ||
102 | { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */ | ||
103 | { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */ | ||
104 | { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */ | ||
105 | { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */ | ||
106 | { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */ | ||
107 | { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */ | ||
108 | { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */ | ||
109 | { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */ | ||
110 | { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */ | ||
111 | { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */ | ||
112 | { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */ | ||
113 | { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */ | ||
114 | { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */ | ||
115 | { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */ | ||
116 | { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */ | ||
117 | { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */ | ||
118 | }; | ||
119 | |||
120 | static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest) | ||
121 | { | 27 | { |
122 | int i, ret = 0; | 28 | switch (reg) { |
123 | 29 | case WM8400_INTERRUPT_STATUS_1: | |
124 | BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache)); | 30 | case WM8400_INTERRUPT_LEVELS: |
125 | 31 | case WM8400_SHUTDOWN_REASON: | |
126 | /* If there are any volatile reads then read back the entire block */ | 32 | return true; |
127 | for (i = reg; i < reg + num_regs; i++) | 33 | default: |
128 | if (reg_data[i].vol) { | 34 | return false; |
129 | ret = regmap_bulk_read(wm8400->regmap, reg, dest, | ||
130 | num_regs); | ||
131 | return ret; | ||
132 | } | ||
133 | |||
134 | /* Otherwise use the cache */ | ||
135 | memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16)); | ||
136 | |||
137 | return 0; | ||
138 | } | ||
139 | |||
140 | static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs, | ||
141 | u16 *src) | ||
142 | { | ||
143 | int ret, i; | ||
144 | |||
145 | BUG_ON(reg + num_regs > ARRAY_SIZE(wm8400->reg_cache)); | ||
146 | |||
147 | for (i = 0; i < num_regs; i++) { | ||
148 | BUG_ON(!reg_data[reg + i].writable); | ||
149 | wm8400->reg_cache[reg + i] = src[i]; | ||
150 | ret = regmap_write(wm8400->regmap, reg, src[i]); | ||
151 | if (ret != 0) | ||
152 | return ret; | ||
153 | } | 35 | } |
154 | |||
155 | return 0; | ||
156 | } | 36 | } |
157 | 37 | ||
158 | /** | 38 | /** |
@@ -165,13 +45,12 @@ static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs, | |||
165 | */ | 45 | */ |
166 | u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg) | 46 | u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg) |
167 | { | 47 | { |
168 | u16 val; | 48 | unsigned int val; |
169 | 49 | int ret; | |
170 | mutex_lock(&wm8400->io_lock); | ||
171 | |||
172 | wm8400_read(wm8400, reg, 1, &val); | ||
173 | 50 | ||
174 | mutex_unlock(&wm8400->io_lock); | 51 | ret = regmap_read(wm8400->regmap, reg, &val); |
52 | if (ret < 0) | ||
53 | return ret; | ||
175 | 54 | ||
176 | return val; | 55 | return val; |
177 | } | 56 | } |
@@ -179,62 +58,8 @@ EXPORT_SYMBOL_GPL(wm8400_reg_read); | |||
179 | 58 | ||
180 | int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data) | 59 | int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data) |
181 | { | 60 | { |
182 | int ret; | 61 | return regmap_bulk_read(wm8400->regmap, reg, data, count); |
183 | |||
184 | mutex_lock(&wm8400->io_lock); | ||
185 | |||
186 | ret = wm8400_read(wm8400, reg, count, data); | ||
187 | |||
188 | mutex_unlock(&wm8400->io_lock); | ||
189 | |||
190 | return ret; | ||
191 | } | ||
192 | EXPORT_SYMBOL_GPL(wm8400_block_read); | ||
193 | |||
194 | /** | ||
195 | * wm8400_set_bits - Bitmask write | ||
196 | * | ||
197 | * @wm8400: Pointer to wm8400 control structure | ||
198 | * @reg: Register to access | ||
199 | * @mask: Mask of bits to change | ||
200 | * @val: Value to set for masked bits | ||
201 | */ | ||
202 | int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val) | ||
203 | { | ||
204 | u16 tmp; | ||
205 | int ret; | ||
206 | |||
207 | mutex_lock(&wm8400->io_lock); | ||
208 | |||
209 | ret = wm8400_read(wm8400, reg, 1, &tmp); | ||
210 | tmp = (tmp & ~mask) | val; | ||
211 | if (ret == 0) | ||
212 | ret = wm8400_write(wm8400, reg, 1, &tmp); | ||
213 | |||
214 | mutex_unlock(&wm8400->io_lock); | ||
215 | |||
216 | return ret; | ||
217 | } | ||
218 | EXPORT_SYMBOL_GPL(wm8400_set_bits); | ||
219 | |||
220 | /** | ||
221 | * wm8400_reset_codec_reg_cache - Reset cached codec registers to | ||
222 | * their default values. | ||
223 | */ | ||
224 | void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400) | ||
225 | { | ||
226 | int i; | ||
227 | |||
228 | mutex_lock(&wm8400->io_lock); | ||
229 | |||
230 | /* Reset all codec registers to their initial value */ | ||
231 | for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++) | ||
232 | if (reg_data[i].is_codec) | ||
233 | wm8400->reg_cache[i] = reg_data[i].default_val; | ||
234 | |||
235 | mutex_unlock(&wm8400->io_lock); | ||
236 | } | 62 | } |
237 | EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache); | ||
238 | 63 | ||
239 | static int wm8400_register_codec(struct wm8400 *wm8400) | 64 | static int wm8400_register_codec(struct wm8400 *wm8400) |
240 | { | 65 | { |
@@ -257,44 +82,24 @@ static int wm8400_register_codec(struct wm8400 *wm8400) | |||
257 | static int wm8400_init(struct wm8400 *wm8400, | 82 | static int wm8400_init(struct wm8400 *wm8400, |
258 | struct wm8400_platform_data *pdata) | 83 | struct wm8400_platform_data *pdata) |
259 | { | 84 | { |
260 | u16 reg; | 85 | unsigned int reg; |
261 | int ret, i; | 86 | int ret; |
262 | |||
263 | mutex_init(&wm8400->io_lock); | ||
264 | 87 | ||
265 | dev_set_drvdata(wm8400->dev, wm8400); | 88 | dev_set_drvdata(wm8400->dev, wm8400); |
266 | 89 | ||
267 | /* Check that this is actually a WM8400 */ | 90 | /* Check that this is actually a WM8400 */ |
268 | ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, &i); | 91 | ret = regmap_read(wm8400->regmap, WM8400_RESET_ID, ®); |
269 | if (ret != 0) { | 92 | if (ret != 0) { |
270 | dev_err(wm8400->dev, "Chip ID register read failed\n"); | 93 | dev_err(wm8400->dev, "Chip ID register read failed\n"); |
271 | return -EIO; | 94 | return -EIO; |
272 | } | 95 | } |
273 | if (i != reg_data[WM8400_RESET_ID].default_val) { | 96 | if (reg != 0x6172) { |
274 | dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n", i); | 97 | dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n", |
98 | reg); | ||
275 | return -ENODEV; | 99 | return -ENODEV; |
276 | } | 100 | } |
277 | 101 | ||
278 | /* We don't know what state the hardware is in and since this | 102 | ret = regmap_read(wm8400->regmap, WM8400_ID, ®); |
279 | * is a PMIC we can't reset it safely so initialise the register | ||
280 | * cache from the hardware. | ||
281 | */ | ||
282 | ret = regmap_raw_read(wm8400->regmap, 0, wm8400->reg_cache, | ||
283 | ARRAY_SIZE(wm8400->reg_cache)); | ||
284 | if (ret != 0) { | ||
285 | dev_err(wm8400->dev, "Register cache read failed\n"); | ||
286 | return -EIO; | ||
287 | } | ||
288 | for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++) | ||
289 | wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]); | ||
290 | |||
291 | /* If the codec is in reset use hard coded values */ | ||
292 | if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA)) | ||
293 | for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++) | ||
294 | if (reg_data[i].is_codec) | ||
295 | wm8400->reg_cache[i] = reg_data[i].default_val; | ||
296 | |||
297 | ret = wm8400_read(wm8400, WM8400_ID, 1, ®); | ||
298 | if (ret != 0) { | 103 | if (ret != 0) { |
299 | dev_err(wm8400->dev, "ID register read failed: %d\n", ret); | 104 | dev_err(wm8400->dev, "ID register read failed: %d\n", ret); |
300 | return ret; | 105 | return ret; |
@@ -334,8 +139,22 @@ static const struct regmap_config wm8400_regmap_config = { | |||
334 | .reg_bits = 8, | 139 | .reg_bits = 8, |
335 | .val_bits = 16, | 140 | .val_bits = 16, |
336 | .max_register = WM8400_REGISTER_COUNT - 1, | 141 | .max_register = WM8400_REGISTER_COUNT - 1, |
142 | |||
143 | .volatile_reg = wm8400_volatile, | ||
144 | |||
145 | .cache_type = REGCACHE_RBTREE, | ||
337 | }; | 146 | }; |
338 | 147 | ||
148 | /** | ||
149 | * wm8400_reset_codec_reg_cache - Reset cached codec registers to | ||
150 | * their default values. | ||
151 | */ | ||
152 | void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400) | ||
153 | { | ||
154 | regmap_reinit_cache(wm8400->regmap, &wm8400_regmap_config); | ||
155 | } | ||
156 | EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache); | ||
157 | |||
339 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | 158 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
340 | static int wm8400_i2c_probe(struct i2c_client *i2c, | 159 | static int wm8400_i2c_probe(struct i2c_client *i2c, |
341 | const struct i2c_device_id *id) | 160 | const struct i2c_device_id *id) |
diff --git a/include/linux/mfd/wm8400-private.h b/include/linux/mfd/wm8400-private.h index 0147b6968510..2de565b94d0c 100644 --- a/include/linux/mfd/wm8400-private.h +++ b/include/linux/mfd/wm8400-private.h | |||
@@ -24,19 +24,14 @@ | |||
24 | #include <linux/mfd/wm8400.h> | 24 | #include <linux/mfd/wm8400.h> |
25 | #include <linux/mutex.h> | 25 | #include <linux/mutex.h> |
26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
27 | 27 | #include <linux/regmap.h> | |
28 | struct regmap; | ||
29 | 28 | ||
30 | #define WM8400_REGISTER_COUNT 0x55 | 29 | #define WM8400_REGISTER_COUNT 0x55 |
31 | 30 | ||
32 | struct wm8400 { | 31 | struct wm8400 { |
33 | struct device *dev; | 32 | struct device *dev; |
34 | |||
35 | struct mutex io_lock; | ||
36 | struct regmap *regmap; | 33 | struct regmap *regmap; |
37 | 34 | ||
38 | u16 reg_cache[WM8400_REGISTER_COUNT]; | ||
39 | |||
40 | struct platform_device regulators[6]; | 35 | struct platform_device regulators[6]; |
41 | }; | 36 | }; |
42 | 37 | ||
@@ -930,6 +925,11 @@ struct wm8400 { | |||
930 | 925 | ||
931 | u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg); | 926 | u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg); |
932 | int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data); | 927 | int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data); |
933 | int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val); | 928 | |
929 | static inline int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, | ||
930 | u16 mask, u16 val) | ||
931 | { | ||
932 | return regmap_update_bits(wm8400->regmap, reg, mask, val); | ||
933 | } | ||
934 | 934 | ||
935 | #endif | 935 | #endif |